A signal acquisition method and apparatus thereof, electronic device and medium

Abstract

This application discloses a signal acquisition method, apparatus, electronic device, and medium thereof. The method includes: acquiring hardware parameters of a first module and hardware parameters of a second module; performing hardware integration processing on the first module and the second module based on the hardware parameters of the first module and the second module to obtain a physical structure design scheme; performing test parameter configuration processing on the first module and the second module based on the physical structure design scheme to obtain test configuration parameters that enable the first module and the second module to work synchronously; and performing parallel signal acquisition processing and signal compensation processing on the first module and the second module based on the test configuration parameters to obtain dual-module signal data.

Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and in particular to a signal acquisition method, apparatus, electronic device and medium thereof. Background Technology

[0002] With the development of 5G technology, the need for collaborative testing of RedCap modules and 5G NR modules is becoming increasingly urgent. Currently, signal acquisition schemes for the two modules mostly adopt a split test architecture or a single-module independent test method, lacking integrated design and collaborative mechanisms, which easily leads to signal reflection and distortion, making it difficult to accurately evaluate the collaborative performance between modules. Summary of the Invention

[0003] The purpose of this application is to provide a signal acquisition method, as well as its device, electronic equipment and medium, to solve the problems of lack of multi-module collaborative testing capability, insufficient interface adaptation and compatibility, uneven distribution of physical connection stress, poor coordination between heat dissipation and signal suppression, low degree of automation and insufficient data-driven innovation in the current technology.

[0004] To achieve the above objectives, this application provides the following technical solution: A signal acquisition method, comprising: Obtain the hardware parameters of the first module and the hardware parameters of the second module; Based on the hardware parameters of the first module and the hardware parameters of the second module, hardware integration processing is performed on the first module and the second module to obtain a physical structure design scheme; Based on the physical structure design scheme, test parameter configuration processing is performed on the first module and the second module to obtain test configuration parameters that enable the first module and the second module to work synchronously; Based on the test configuration parameters, parallel signal acquisition and signal compensation processing are performed on the first module and the second module to obtain dual-module signal data.

[0005] Compared with existing technologies, the signal acquisition method provided in this application integrates the first and second modules through hardware processing, enabling them to work collaboratively. This results in a physical structure design scheme that integrates interface matching, antenna layout, heat dissipation shielding, and power management, laying a solid hardware foundation for the collaborative operation of the two modules. By configuring test parameters for the operating state constraints included in the physical structure design scheme, test configuration parameters that enable the two modules to work synchronously are obtained. This achieves protocol parsing, clock synchronization, and data format unification, solving key issues in time synchronization and parameter coordination between the two modules. Finally, based on the test configuration parameters, parallel signal acquisition and signal compensation processing are performed on the two modules to obtain dual-module signal data, achieving synchronous acquisition of dual channels and optimization of signal quality.

[0006] Therefore, this application achieves full automation from hardware construction to signal acquisition through the closed-loop design of hardware integration, parameter configuration and signal acquisition. It avoids the uncertainty and connection reliability issues caused by human experience, enabling maintenance personnel to quickly grasp the real-time status and potential problems of the two modules working together, and to adjust and optimize the hardware configuration or test parameters in a timely manner. This provides a guarantee for achieving efficient and stable multi-module signal acquisition and scientific and reasonable test deployment.

[0007] This application also provides a signal acquisition device, including: The acquisition module is used to acquire the hardware parameters of the first module and the hardware parameters of the second module. A hardware integration module is used to perform hardware integration processing on the first module and the second module based on the hardware parameters of the first module and the hardware parameters of the second module to obtain a physical structure design scheme. The parameter configuration module is used to perform test parameter configuration processing on the first module and the second module based on the physical structure design scheme, so as to obtain test configuration parameters that enable the first module and the second module to work synchronously; The signal acquisition and processing module is used to perform parallel signal acquisition and processing and signal compensation processing on the first module and the second module based on the test configuration parameters to obtain dual-module signal data.

[0008] Compared with the prior art, the beneficial effects of the signal acquisition device provided in this application are the same as those of the signal acquisition method described in the above technical solutions, and will not be repeated here.

[0009] This application also provides an electronic device, including a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, it implements the method described in the embodiments of this application.

[0010] Compared with the prior art, the beneficial effects of the electronic device provided in this application are the same as those of the signal acquisition method described in the above technical solution, and will not be repeated here.

[0011] This application also provides a computer storage medium storing instructions that, when executed, implement the methods described in the embodiments of this application.

[0012] Compared with the prior art, the beneficial effects of the computer storage medium provided in this application are the same as those of the signal acquisition method described in the above technical solutions, and will not be repeated here. Attached Figure Description

[0013] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 A flowchart of a signal acquisition method provided in an embodiment of this application is shown; Figure 2 This document illustrates a flowchart of hardware integration processing for the first module and the second module, provided in an embodiment of this application. Figure 3 A schematic diagram of the structure of a signal acquisition device provided in an embodiment of this application is shown; Figure 4 A schematic block diagram of a chip according to an embodiment of this application is shown; Figure 5 A structural block diagram of an exemplary electronic device that can be used to implement embodiments of this application is shown. Detailed Implementation

[0014] To facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with essentially the same function and effect. For example, the first threshold and the second threshold are only used to distinguish different thresholds and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0015] It should be noted that, in this application, the terms "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0016] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c, where a, b, and c can be single or multiple.

[0017] With the evolution of 5G technology, wireless communication testing technology faces unprecedented challenges. RedCap (Reduced Capability), a key technology defined in the 3GPP Release 17 / 18 standard, aims to provide lightweight 5G connectivity for medium-to-high-speed, low-power scenarios such as industrial IoT, wearable devices, and smart cities. The need for collaborative testing of RedCap and general-purpose 5G NR (New Radio) modules is becoming increasingly urgent. However, existing wireless probe signal acquisition methods for both 5G modules are insufficient to meet the high precision, high efficiency, and high reliability requirements of collaborative testing between RedCap and 5G NR modules, becoming one of the key bottlenecks restricting the development and deployment of multi-mode terminal devices and networks.

[0018] Existing methods for acquiring wireless probe signals from two 5G modules mainly include the following core steps: separate module testing, manually intervened mechanical splicing, single-module independent testing, general wireless testing systems, and multi-sensor fusion control system applications. In the separate module testing step, the RedCap module and the 5G NR module are tested on independent testing platforms for signal acquisition and performance analysis. Modules are physically connected via standard interfaces such as flexible pins or M.2 interfaces, but data exchange uses an offline merging method, lacking a real-time collaborative acquisition mechanism, resulting in low testing efficiency. The manually intervened mechanical splicing step relies on operator experience for interface selection, installation location determination, and fastening scheme design, supplemented by basic simulation software such as CAD tools for signal integrity assessment. However, it lacks scientific stress analysis and automated optimization processes, easily introducing human error and affecting connection consistency and reliability. The single-module independent testing step focuses on testing the performance indicators of a single module, such as signal strength and power consumption, lacking interference suppression mechanisms and interoperability assessment capabilities in a collaborative environment between two modules, and cannot realistically simulate a network environment where two modules operate simultaneously. The general wireless test system application steps employ a dual-module network communication strategy of 5G and Wi-Fi, focusing on communication link switching and energy management. However, it does not address the specific structural design of the hardware integration and signal acquisition of the two modules. Its hardware interfaces and heat dissipation solutions are highly generic and cannot adapt to the low-power, high-interference characteristics of the RedCap module. While the multi-sensor fusion control system possesses multiple sensor types and intelligent decision-making capabilities, its structural design and decision-making logic are unsuitable for high-precision wireless probe signal acquisition and RF testing in the field of traffic safety facilities, lacking an integrated test framework specifically for the two 5G modules.

[0019] As can be seen from the above, the methods generally suffer from common defects such as isolated modules, reliance on manual labor, and lack of automated collaboration. Furthermore, they are not optimized for the low power consumption and high interference characteristics of the RedCap module, resulting in limited test accuracy and efficiency. Specifically, from the perspective of interface adaptation and compatibility, the interface types and electrical characteristics between modules in the split-type test architecture are incompatible. For example, the voltage levels of the flexible pins and the M.2 interface are inconsistent, and impedance mismatch can easily cause signal reflection and distortion. Current processes lack scientific matching algorithms and rely on manual trial and error, resulting in reduced reliability of the acquired data. From the perspective of physical connection reliability, mechanical connections lack real-time stress analysis and uniformity assessment. Under vibration or temperature change environments, connections are prone to loosening, poor contact, and physical damage to hardware. Existing stress assessment methods are only applicable to static gasket testing and have not been extended to dynamic communication equipment, making it difficult to guarantee mechanical reliability. From the perspective of heat dissipation and signal suppression synergy, the existing solution has not achieved synergistic optimization of heat dissipation design and electromagnetic shielding. Under high load operation, insufficient heat dissipation and electromagnetic leakage coexist, affecting the accuracy of signal acquisition. Fixed heat dissipation structures cannot be dynamically adjusted based on real-time temperature, which can easily lead to thermal failure and performance degradation. From the perspective of multi-module collaborative testing capabilities, current processes do not support RedCap and 5G. The synchronous acquisition and joint analysis of NR modules cannot simulate the real network environment of two modules. The test data is isolated, lacks end-to-end verification, and the accuracy of interoperability assessment is insufficient, making it difficult to meet the testing requirements of multi-mode terminals in the evolution of 5G-A / 6G. In terms of automation, from interface matching and structural modeling to signal analysis, it relies heavily on human experience, resulting in low testing efficiency and poor consistency. Existing automation tools only focus on data transmission and do not cover hardware integration and real-time optimization, leading to fragmented testing processes. From the perspective of data-driven innovation, existing technologies lack machine learning and real-time learning capabilities. For example, entropy models and stress assessments are static algorithms that cannot be adaptively optimized based on real-time data, limiting the accuracy and adaptability of testing.

[0020] Therefore, a method for acquiring wireless probe signals from two 5G modules is needed to address the current technical issues of insufficient interface compatibility, uneven physical connection stress distribution, poor coordination between heat dissipation and signal suppression, lack of multi-module collaborative testing capabilities, low automation, and insufficient data-driven innovation. This method aims to achieve full-process automation and data closed-loop optimization from hardware integration to testing and verification, providing high-precision, high-efficiency, and high-reliability technical support for multi-mode terminal testing in the 5G-A / 6G evolution.

[0021] To overcome the above problems, this application provides a signal acquisition method. Figure 1 A flowchart of the signal acquisition method provided in an embodiment of this application is shown. Figure 1 As shown, the method includes: Step 110: Obtain the hardware parameters of the first module and the second module. It is understood that the first and second modules can be different types of communication modules; for example, the first module could be a RedCap module, and the second module could be a 5G NR module. Hardware parameters include, but are not limited to, the module's physical dimensions, interface type, interface pin definitions, electrical characteristics, operating frequency band, and power consumption parameters. These parameters can be retrieved from a pre-defined module parameter database or automatically identified and collected by the interface identification module.

[0022] Step 120: Based on the hardware parameters of the first module and the second module, perform hardware integration processing on the first module and the second module to obtain a physical structure design scheme.

[0023] The aforementioned hardware integration process integrates the independent first and second modules into a single physical unit capable of collaborative operation. This hardware integration process includes physical integration processing, RF co-design processing, thermal and electromagnetic co-design processing, and energy management design processing. Through the coordinated optimization of multiple processing methods, the first and second modules can achieve optimal performance in multiple dimensions, including mechanical reliability, signal integrity, heat dissipation efficiency, and power supply stability, ultimately yielding a physical structure design scheme describing the first and second modules. This scheme includes three-dimensional structural models of the first and second modules, antenna layout parameters, housing construction parameters, and power supply and heat dissipation control parameters, providing a complete hardware foundation for subsequent test parameter configuration.

[0024] Step 130: Based on the physical structure design scheme, perform test parameter configuration processing on the first module and the second module to obtain test configuration parameters that enable the first module and the second module to work synchronously.

[0025] The aforementioned test parameter configuration process can be seen as the process of transforming the hardware-level physical structure design into software-level test configuration parameters. This process may include protocol parsing, clock synchronization configuration, and parameter standardization. By parsing the communication protocol, calibrating clock deviations, and unifying data formats, it can be ensured that the two modules can work collaboratively in both the time and parameter dimensions.

[0026] Step 140: Based on the test configuration parameters, perform parallel signal acquisition and signal compensation processing on the first module and the second module to obtain dual-module signal data.

[0027] The aforementioned parallel signal acquisition and processing, along with signal compensation processing, involves synchronously acquiring signals from two modules and optimizing the quality of the acquired data. This process can include parallel sampling processing and error compensation processing. Through dual-threaded parallel sampling and various error compensation algorithms, high-quality purified signal data can be obtained.

[0028] As can be seen from the above, in the signal acquisition method provided in this application embodiment, by performing hardware integration processing on the first module and the second module, the two modules are made into a first module and a second module that can work collaboratively, obtaining a physical structure design scheme. This scheme integrates the collaborative design of interface matching, antenna layout, heat dissipation shielding, and power supply management, laying a solid hardware foundation for the collaborative work of the two modules. By configuring test parameters for the working state constraints included in the physical structure design scheme, test configuration parameters that enable the two modules to work synchronously are obtained, realizing the unification of protocol parsing, clock synchronization, and data format, and solving the key problems of time synchronization and parameter coordination between the two modules. Finally, based on the test configuration parameters, parallel signal acquisition and signal compensation processing are performed on the two modules to obtain dual-module signal data, realizing synchronous acquisition of dual channels and optimization of signal quality.

[0029] Therefore, this application achieves full automation from hardware construction to signal acquisition through the closed-loop design of hardware integration, parameter configuration and signal acquisition. It avoids the uncertainty and connection reliability issues caused by human experience, enabling maintenance personnel to quickly grasp the real-time status and potential problems of the two modules working together, and to adjust and optimize the hardware configuration or test parameters in a timely manner. This provides a guarantee for achieving efficient and stable multi-module signal acquisition and scientific and reasonable test deployment.

[0030] In some embodiments, Figure 2 A flowchart illustrating the hardware integration process for the first module and the second module provided in an embodiment of this application is shown. Figure 2 As shown, the hardware integration processing of the first module and the second module based on the hardware parameters of the first module and the second module can further include: Step 121: Based on the hardware parameters of the first module and the second module, perform physical integration processing on the first and second modules to obtain hardware structural parameters. It can be understood that this physical integration processing is used to resolve compatibility issues between different modules in terms of interface type, physical size, and spatial layout. Through physical integration processing, the hardware structural parameters of the first and second modules can be obtained. These hardware structural parameters may include the 3D model files, assembly drawings, and structural strength reports of the first and second modules, reflecting the spatial structure and physical characteristics of the first and second modules, providing a precise spatial reference for subsequent antenna system design.

[0031] Step 122: Based on the hardware structure parameters, perform RF co-design processing on the antenna systems of the first and second modules to obtain the layout structure parameters of the antenna system. It can be understood that this RF co-design processing is a process of optimizing the spatial layout and electrical parameters of the antenna system based on physical integration, in order to solve the mutual interference problem and signal transmission efficiency problem of the two antenna modules within a limited space. Through RF co-design processing, the layout structure parameters of the antenna system can be obtained. These layout structure parameters can include antenna coordinates, cable connection parameters, and polarization direction configuration, providing spatial constraints for subsequent housing design.

[0032] Step 123: Based on the spatial constraints included in the layout structural parameters, perform thermal and electromagnetic co-design processing on the first and second modules to obtain the shell structure scheme. It can be understood that this thermal and electromagnetic co-design processing is a process of integrating heat dissipation and shielding design on the shell structure based on the determined antenna layout, in order to solve the problems of insufficient heat dissipation and electromagnetic leakage coexisting under high load operation. Through thermal and electromagnetic co-design processing, a shell structure scheme can be obtained, which includes parameters such as the shell's structural layout, material distribution, heat dissipation hole distribution, and shielding thickness, providing internal space constraints for subsequent power supply system design.

[0033] Step 124: Based on the shell structure scheme, perform energy management design processing on the power supply systems of the first and second modules to obtain an integrated power supply and heat dissipation control scheme. It can be understood that this energy management design processing, based on a determined shell structure, is a process of optimizing the layout of the power supply system and coordinating heat dissipation control to achieve collaborative management of the power supply and heat dissipation systems, extend equipment battery life, and ensure operational stability. Through energy management design processing, an integrated power supply and heat dissipation control scheme can be obtained, which may include power supply system layout coordinates, fan control strategies, and power consumption management parameters.

[0034] As can be seen from the above, the embodiments of this application realize a complete hardware integration process from physical integration to energy management. This process ensures reliable mechanical connection between the two modules through physical integration, optimizes the signal transmission and reception performance of the antenna through radio frequency co-design, balances the conflicting requirements of heat dissipation and shielding through thermal and electromagnetic co-design, and achieves coordinated control of power supply and heat dissipation through energy management design, laying the foundation for subsequent test parameter configuration and signal acquisition.

[0035] In some embodiments, the physical integration process of the first and second modules based on the hardware parameters of the first and second modules may first include: performing interface matching processing on the first and second modules based on their hardware parameters to obtain interface configuration parameters. Specifically, the system can read the hardware parameters of the first and second modules from a pre-set module parameter database. This database includes, but is not limited to, detailed parameters such as the physical dimensions, pin definitions, interface types, and electrical characteristics of the modules. These hardware parameters may include, but are not limited to, physical dimensions, interface types, number of pins, contact arrangement, signal levels, voltage levels, and impedance characteristics, providing basic data for subsequent physical connection adaptation.

[0036] Then, based on the interface configuration parameters, the interface specification parameters can be determined. Specifically, the system can extract detailed specification information of the interface from the interface configuration parameters, including interface specification parameters such as flexible pin spacing, M.2 interface length, pin arrangement, and signal distribution scheme.

[0037] Then, based on the interface specification parameters, physical connection adaptation processing can be performed on the interface configuration parameters to obtain the interface fastening parameters. It can be understood that this physical connection adaptation processing is a process of optimizing the interface connection method to ensure the reliability and stability of the connection structure under environments such as vibration and temperature changes. The system can determine the connection compatibility between two modules based on the interface specification parameters, analyze the stress distribution of the connection structure, determine the stress uniformity index, and determine the interface fastening parameters based on the connection compatibility and stress uniformity index. The interface fastening parameters may include fastener type, installation location, fastening sequence, and torque recommendations to ensure that the connection structure meets mechanical reliability requirements.

[0038] Finally, spatial modeling can be performed on the first and second modules based on the interface fastening parameters to obtain hardware structural parameters. This spatial modeling process involves creating three-dimensional digital models of the first and second modules to verify the spatial layout coordination and structural stability of the various components. The system can construct three-dimensional spatial models of the first and second modules based on the interface fastening parameters, detect spatial interference between components in the models, determine structural stability indices based on the physical characteristics of the three-dimensional spatial models, and determine hardware structural parameters based on spatial interference and structural stability indices. These hardware structural parameters can include three-dimensional model files, assembly drawings, and structural strength reports, fully reflecting the spatial structure and physical characteristics of the first and second modules.

[0039] As can be seen, the above steps can realize a complete physical integration process from interface matching to spatial modeling, ensuring reliable mechanical connection and spatial layout coordination between the two modules.

[0040] In some embodiments, the interface matching process for the first module and the second module based on the hardware parameters of the first module and the second module to obtain interface configuration parameters may further include: firstly, calculating an interface compatibility index based on the interface electrical characteristic parameters and physical specification parameters of the first module and the second module. This interface compatibility index includes interface signal matching degree and electrical characteristic consistency parameters.

[0041] The aforementioned interface signal matching degree can be determined based on the functional types of the interfaces of the first module and the signal categories of the contact points of the second module. It is used to measure the correspondence between the two interfaces in terms of functional types. For example, the function of each pin of the first module is compared one by one with the signal category of each contact point of the M.2 interface of the second module, the number of matches is counted, and the entropy value is calculated based on the ratio of the number of matches to the total number of matches, thus quantifying the interface signal allocation difference. For example, an interface signal allocation difference model can be constructed: the functional type of the flexible pin is matched with the signal category of the M.2 interface contact points, and the entropy value is calculated as an interface signal matching degree index.

[0042] The aforementioned electrical characteristic consistency parameters can be determined based on the signal level correlation between the first and second modules. For example, an interface matching algorithm can be used to verify the electrical characteristics of the interfaces of the two modules, such as voltage levels, current carrying capacity, and signal integrity indicators, to ensure that both interfaces meet the design requirements of the integrated test unit at both the physical and electrical layers. During operation, the system receives input from the module parameter database, retrieves the latest module version information in real time, and performs dynamic matching in conjunction with the system's interface management strategy. The system issues matching commands to automatically identify physical interfaces, collects interface signal characteristics, and feeds them back to the interface matching algorithm for verification. After verification, the system stores the generated interface configuration parameters as input for subsequent physical connection adaptation processing. Through interface matching processing, the system can automatically determine whether the interfaces of the two modules are compatible and generate level conversion or signal isolation schemes when differences exist.

[0043] In one example, the above interface signal matching degree can be calculated through the following process. First, obtain the number of pins of the first module's flexible pin interface. Number of contact points with M.2 interface . The elastic pin number Functional type of each pin M.2 interface Signal category of each contact point Perform matching using a Boolean matching function. Determine if the two match. Construct an interface signal allocation difference model and use entropy value calculation to quantize the interface adaptation scheme. The formula for calculating the interface signal matching degree can be expressed as follows: Formula (1) in: This represents the calculated entropy value of the interface signal allocation difference, used to quantify the interface adaptation scheme. The index variable represents the flexible pin, and the traversal range is from 1 to... ; This variable represents the index of the M.2 interface contact point, and its traversal range is from 1 to... ; Indicates the number of pins on the flexible pin connector; Indicates the number of contact points of the M.2 interface; Indicates the elastic pin number The function type of the pin; Indicates the M.2 interface number Signal type at the contact point; This is a Boolean matching function; it takes the value 1 when the function type matches the signal category, and 0 otherwise. Total represents the total number of matches and the entropy value. The smaller the value, the higher the degree of matching between the interface function types.

[0044] The aforementioned electrical characteristic consistency parameters can be calculated through the following process. First, acquire the signal level sequences of the first and second modules within the same time window, and calculate the cross-correlation function of the two sequences. This function reflects the similarity between the two signals under different time delays. The formula for calculating the electrical characteristic consistency parameters can be expressed as follows: Formula (2) in: Indicates time delay The cross-correlation coefficients under the following conditions; Indicates a time point index variable; Indicates the length of the time window for signal sampling or the total number of sampling points; This indicates that the RedCap module is in the... Signal level at a given time point; The corresponding value for 5G NR modules This is the delay compensation amount (with a value range of ±5ns).

[0045] Cross-correlation function can be extracted. Peak value within the range of τ variation As a criterion for electrical layer compatibility. When If the value is ≥ 0.95, a level conversion scheme is generated. Otherwise, the electrical characteristics of the two modules are considered to be highly consistent.

[0046] Then, based on the calculated entropy value... and peak The interface compatibility index is used to determine the interface configuration parameters. When the interface compatibility index meets the preset conditions, the interface configuration parameters are generated directly; when the interface compatibility index is lower than the preset threshold, the system automatically generates level conversion and signal isolation schemes to ensure that both interfaces meet the integration requirements at the physical and electrical layers.

[0047] When the first module is a RedCap module and the second module is a 5G NR module, the RedCap module is compatible with the 3GPP R17 / R18 protocol and supports the Sub-6 GHz band, while the 5G NR module supports mainstream frequency bands such as n1, n3, and n5 and is compatible with both standalone and non-standalone network modes. In this case, the interface identification module can classify the interface standards of the two modules, identifying the physical connection specifications and signal level requirements of the flexible pin interface and the M.2 interface respectively. To achieve unified integration of the two modules, the interface type matching processing module compares the number of pins, spacing, and signal allocation scheme of the flexible pin interface with the specifications of the M.2 interface according to preset rules, determines compatibility, and outputs an interface adaptation scheme.

[0048] In one example, the above method may further include: first, acquiring historical interface connection data, and then optimizing the interface compatibility index based on the historical interface connection data. For instance, data such as connection success rate and signal stability during historical interface connection processes can be collected, and a reinforcement learning algorithm can be used to dynamically adjust the calculation weights of the interface compatibility index, with the weight coefficients being iteratively updated and optimized. The interface compatibility index, dynamically adjusted using the reinforcement learning algorithm, can continuously self-optimize based on actual usage effects, achieving adaptive adjustment of interface matching and further improving the accuracy and adaptability of interface matching. It is understood that the reinforcement learning algorithm here can be selected according to the actual situation and is not limited thereto. For example, the reinforcement learning algorithm can be such as Q-learning, but is not limited to this.

[0049] In practical applications, after interface matching, interface data from both modules can be collected. This interface data can include real-time signal quality metrics of the RedCap and 5G NR modules, such as signal-to-noise ratio (SNR) and bit error rate (BER), and the weight parameters of the entropy model can be optimized using the Q-learning algorithm. The specific process can be based on the entropy value of the current interface matching. The state is defined by weighted adjustment actions, and the reward function is the connection success rate. Iterative updates are performed using an iterative update algorithm. Q The value is optimized by adjusting the weight coefficients to maximize interface stability. The reward function is included. It can be defined as: Formula (3) The optimized entropy model can be expressed by the following formula: Formula (4) in, Let λ be the original entropy value in formula (1), and λ be the learning rate. The initial value of the learning rate can be 0.1, which is dynamically adjusted based on real-time data. This is the reward function. The optimized interface compatibility index can be continuously iterated and optimized based on actual usage results, achieving adaptive adjustment of interface matching and further improving the accuracy and adaptability of interface matching.

[0050] In some embodiments, the above-mentioned physical connection adaptation processing of interface configuration parameters based on interface specification parameters to obtain interface fastening parameters further includes: first, determining the connection adaptation degree between the first module and the second module based on the interface specification parameters. For example, the connection adaptation degree can be determined based on the degree of matching between the interface spacing and design constraints between the first module and the second module, thus characterizing the degree of matching between the interface spacing and design constraints.

[0051] In practical applications, a measurement sample sequence of the elastic pin spacing can be obtained, and the elastic pin spacing can be extracted. M.2 interface length Construct the physical connection adaptation function, which can be expressed by the following formula: Formula (5) in: This represents the calculated physical connectivity fit score; This represents the total number of measurement samples indicating the spacing between the flexible pins; The sample index variable represents the distance measurement; For the elastic pin number Individual spacing measurements; and These are the mean and standard deviation in the design constraints, respectively. Indicates the actual length of the M.2 interface; This is the standard length of the motherboard M.2 slot; This is a weighting coefficient, which can be 0.7. Fit score. The smaller the value, the better the match between the interface spacing and the design constraints. If the value is ≤ 0.1, the connection compatibility is considered acceptable.

[0052] Secondly, the stress uniformity index can be determined based on the stress distribution of the connection structure linking the first and second modules. For example, this stress uniformity index can be determined based on the degree of deviation between the stress values ​​at each node of the connection structure and the average stress value. For instance, the stress distribution of the connection structure under different installation postures and stress conditions can be simulated using finite element analysis, dividing the connection structure into multiple mesh nodes and calculating the stress value of each node. And calculate the average stress at all nodes. Then, the maximum relative deviation between the stress value at each node and the average stress value is calculated, which is used as the stress concentration factor. This factor is the stress uniformity index. The smaller the stress concentration factor, the more uniform the stress distribution, and the higher the reliability of the connection structure. The stress uniformity index can be expressed by the following formula: Formula (6) in: This represents the calculated stress concentration factor; For the first Stress values ​​at each grid node; The average stress is denoted as .

[0053] Finally, interface fastening parameters can be determined based on connection compatibility and stress uniformity indices. When both connection compatibility and stress uniformity indices meet preset conditions, the system generates interface fastening parameters, including fastener type, installation location, fastening sequence, and torque recommendations. For example, when... Upon successful completion, the fastening scheme is deemed qualified, and interface fastening parameters are generated, including fastener type, installation location, fastening sequence, and torque recommendations. Through physical connection adaptation processing, the fastening parameters can be automatically optimized to ensure the stability and reliability of the connection structure under vibration or temperature change environments.

[0054] In practical applications, we can first analyze the pin pitch, pin arrangement, and interface mechanical dimensions of the flexible pin interfaces identified in the module interface configuration parameters. Combined with motherboard design constraints, we can then plan the spatial layout for physical connection adaptation. This planning includes the crimping method of the flexible pin interfaces, soldering process parameters, and compatibility analysis between the flexible pins and the motherboard connectors. Using 3D mechanical modeling software, we can simulate the stress distribution of the flexible pins under different mounting postures and optimize the pin pitch to ensure connection stability and reliability. Next, we can analyze the M.2 interface specifications in detail, including interface length, width, mounting hole positions, and signal line arrangement. Combined with the motherboard's M.2 slot standard, we can design the fastening structure for the adapter card. Based on the interface's mechanical characteristics, we can generate a fastening scheme, including screw specifications, fastening torque, and anti-loosening measures, to ensure the stability of the interface connection under equipment vibration or movement. This fastening scheme can also consider electromagnetic compatibility requirements, configuring the installation position and grounding method of the metal shield to reduce the propagation of radio frequency interference.

[0055] In some embodiments, the above-mentioned spatial modeling of the first module and the second module based on interface fastening parameters to obtain hardware structure parameters may further include: first, constructing three-dimensional spatial models of the first module and the second module based on the interface fastening parameters. For example, three-dimensional computer-aided design software can be invoked, using the fastener layout, mounting hole positions, and fixing structure in the interface fastening parameters as a reference, to progressively superimpose three-dimensional models of components such as the first module, the second module, the interface connector, and the shielding cover, in order to restore the relative positional relationship of each component in space, achieve spatial coordination of the modules, interface connector, shielding cover, and fasteners, ensure no interference between components, and meet assembly tolerance requirements.

[0056] Furthermore, based on the mechanical installation suggestions in the interface fastening parameters, the system can automatically generate the mounting hole positions and fixing structures for fasteners, and plan the signal line routing and wiring space in conjunction with the electrical connection path of the module interface. This wiring design balances signal integrity and heat dissipation requirements, avoiding excessive bending or cross-interference of signal lines. The 3D model also integrates the installation position and thickness parameters of the shielding cover to ensure a balance between RF shielding effectiveness and structural strength. Through simulated assembly, the system verifies the manufacturability and ease of maintenance of the hardware structure, and adjusts the design to adapt to actual production needs.

[0057] Secondly, by inspecting the 3D spatial model, the spatial interference between various components within the model is obtained. In one example, the spatial interference can be determined by the offset of each component from its actual position within the allowable tolerance range. For instance, the minimum distance between any two components can be calculated; if this distance is less than a preset safety clearance threshold, an interference risk is identified. By recording all interference points and their amounts, a spatial interference index is formed. When the spatial interference index is 0, it indicates that there is no interference between the components and the spatial layout is reasonable. The spatial interference index can be expressed by the following formula: Formula (7) in: This represents the calculated spatial interference index; Index variables representing parts in a CAD model; This represents the total number of components involved in the interference detection in the CAD model; For the first The actual offset of each component; To allow for tolerances; This is the interference flag function, taking a value of 1 when interference exists between components, and 0 otherwise. Spatial Interference Index The smaller the value, the lower the degree of interference between the components. When When = 0, it indicates that there is no interference between the components and the spatial layout is reasonable. In this case, assembly drawings can be generated.

[0058] Next, based on the physical properties of the three-dimensional spatial model, the structural stability index is determined. In one example, the structural stability index can be determined based on the strain energy gradient and thermal gradient of the three-dimensional spatial model. The strain energy gradient reflects the uniformity of energy distribution under stress, which can be calculated using finite element analysis to determine the strain energy distribution under preset load conditions and to calculate the spatial rate of change of strain energy. The thermal gradient reflects the thermal stress distribution of the structure under temperature changes, which can be calculated using thermodynamic simulation to determine the temperature field distribution under temperature changes and to calculate the spatial rate of change of temperature. Then, the strain energy gradient and thermal gradient can be combined using a weighted summation method to obtain the structural stability function value. The structural stability function can be expressed by the following formula: Formula (7) in: This represents the calculated stability function value; The strain energy gradient; For thermal gradient; This is the weighting coefficient, which can take values ​​of 0.6 and 0.4.

[0059] As can be seen from the above, the smaller the value of the structural stability function, the better the stability of the structure under stress and heat conditions. When When the condition is met, it indicates that the structural stability meets the requirements. In this case, the hardware structural parameters can be output.

[0060] Finally, it can be based on the situation of spatial interference. and structural stability index Determine the hardware structure parameters. When the spatial interference index... = 0, and the structural stability function value is less than the preset threshold, i.e. It can output hardware structural parameters, which may include 3D model files, assembly drawings, and structural strength reports. Spatial modeling allows for the early detection and elimination of assembly interferences, ensuring the coordinated layout of components within a limited space. It also verifies the mechanical and thermal stability of the structure and guides the layout and installation of high-gain antenna systems. The output of hardware structural parameters not only achieves the physical integration of the two module test units but also provides crucial information for subsequent module spatial planning and signal isolation, completing a closed loop from interface matching to hardware structural design.

[0061] During operation, the system can receive interface fastening parameters as input and perform modeling based on a CAD platform. Combining material properties and mechanical characteristics, structural strength analysis is conducted to confirm the stability of the hardware structure under operating conditions. If spatial conflicts or structural weaknesses are found during modeling, optimization suggestions are automatically generated and fed back for design adjustments. All design changes are recorded to ensure the traceability of the design process.

[0062] In some embodiments, the method of this application may further include a module collaborative control processing step to achieve real-time data exchange and adaptive optimization among various technical modules, forming a dynamic feedback closed loop. Specifically, after completing the above interface matching processing and physical connection adaptation processing, the output of the interface matching entropy model can be fed back to the stress uniformity evaluation module in real time. The physical connection parameters are then optimized using an algorithm to reduce stress concentration and construct an adaptation function. The adaptation function can be expressed by the following formula: Formula (8) in, This represents the fitness function value; The entropy value originates from the calculation result of the interface matching entropy model; The stress standard deviation is derived from the calculation results of stress uniformity assessment. and This is a weighting coefficient, dynamically adjusted based on real-time data. The adjustment logic is as follows: when the connection success rate falls below a threshold, increase the weighting coefficient. To enhance entropy weighting, priority is given to ensuring the accuracy of interface matching; when stress distribution is uneven, increase... To optimize stress balance and prioritize the reliability of the connection structure, this linkage mechanism enables real-time coordination between interface matching and stress management, avoiding the shortcomings of current technologies where interface design and stress analysis are independent.

[0063] In some embodiments, the above-mentioned radio frequency co-design processing of the antenna systems of the first and second modules based on hardware structural parameters to obtain the layout structural parameters of the antenna system may further include: First, determining the installation position coordinates of each antenna in the antenna system based on the spatial layout information included in the hardware structural parameters. Specifically, the preliminary layout information of the antenna system can be determined by accurately locating the installation positions of the two module hardware structures in the overall device and combining this with the internal space constraints of the device housing. The spatial layout information includes the overall dimensions of the first and second modules, the position coordinates of the module radio frequency interfaces, the edge position of the shielding cover, the plane where the fasteners are located, and the boundary conditions of the available installation area.

[0064] In one example, determining the installation coordinates of each antenna in the antenna system based on the spatial layout information included in the hardware structure parameters can further include: firstly, determining the antenna spacing constraints based on the operating frequency bands of the first and second modules. Since different operating frequency bands correspond to different signal wavelengths, the antenna spacing needs to meet minimum distance requirements to avoid mutual interference. For example, for modules operating in the high-frequency band, the signal wavelength is shorter, and the antenna spacing can be relatively smaller; while for modules operating in the low-frequency band, the signal wavelength is longer, requiring a larger antenna spacing to ensure isolation. Based on this, the corresponding wavelength can be calculated according to the operating frequency band of each module, and combined with the maximum scanning angle of the antenna system, the minimum spacing requirement between antennas can be determined, forming the antenna spacing constraints.

[0065] Optionally, interference suppression optimization can be performed for specific frequency band characteristics of the RedCap module. For example, when the RedCap module operates in the 470-510MHz frequency band, a frequency domain notch filter design is introduced. Combining the bandwidth modes of the RedCap module at 1MHz, 500kHz, and 200kHz and real-time spectrum analysis data, the notch filter parameters are dynamically adjusted. When determining the antenna coordinates, interference suppression constraints need to be further considered to ensure that the antenna spacing meets the scanning requirements while minimizing adjacent channel interference.

[0066] In practical applications, after calculating and processing the antenna position coordinates, the frequency band characteristics of the RedCap module can be automatically identified based on the 3GPP Release 17 / 18 protocol, and frequency domain notch filter design can be performed. The specific process is as follows: First, bandwidth modes such as 1MHz, 500kHz, and 200kHz for the RedCap module are extracted from the configuration database. Combined with real-time spectrum analysis data, notch filter parameters are dynamically generated. The filter design employs an adaptive algorithm to adjust the notch depth and bandwidth based on the intensity of adjacent channel interference.

[0067] The wavelength λ corresponding to each module's operating frequency band can be calculated, and combined with the maximum scanning angle θ of the antenna system, the minimum spacing requirement between antennas can be determined. The antenna spacing constraint can be expressed by the following formula: Formula (9) Where d represents the minimum allowable spacing between antennas, λ is the wavelength corresponding to the operating frequency band, and θ is the maximum scanning angle of the antenna system.

[0068] Optionally, for high-interference scenarios where the RedCap module operates in the 470MHz-510MHz frequency band, an interference suppression factor can be introduced into formula (9) to form an extended antenna spacing constraint: Formula (10) Where λ is the wavelength calculated based on the operating frequency band of the RedCap module, and θ is the maximum scanning angle. The adjacent channel interference ratio is obtained through real-time spectrum monitoring, and α is the suppression coefficient determined through simulation optimization, with a default value of 0.5. This extended formula ensures that the antenna spacing can effectively suppress adjacent channel interference while meeting scanning requirements.

[0069] Then, based on spatial layout information and antenna spacing constraints, the coordinate set of each antenna can be determined. Specifically, by combining the internal spatial constraints of the equipment casing, geometric analysis algorithms can be used to extract key nodes of the hardware structure of the two modules, including the location of the module RF interface, the edge of the shield, and the plane where the fasteners are located. By performing multi-dimensional spatial constraint judgment, usable areas that meet the antenna installation requirements are selected, while considering the minimum spacing requirements between antennas, the mutual interference threshold of RF signals, and the spatial distribution of antenna polarization directions, to ensure that the antenna layout meets both physical installation conditions and signal performance optimization. An iterative optimization algorithm, combined with RF simulation results, can be used to obtain an antenna installation coordinate set that meets the design constraints. This coordinate set fully describes the three-dimensional installation position of each antenna. For example, for the four antennas of the general 5G test unit and the two antennas of the RedCap test unit, their specific coordinates within the first and second modules are determined, respectively. In abnormal situations, such as spatial conflicts or insufficient installation area, the conflict points and the scope of impact can be automatically recorded, and adjustment suggestions can be generated for designers' reference.

[0070] In one example, the cable connection parameters between the antenna system and the first and second modules can be determined based on the installation coordinates of each antenna. Specifically, after determining the antenna installation locations, suitable connection cables need to be matched to each antenna to ensure effective transmission of radio frequency signals. In this case, the radio frequency interface distance parameters can be extracted based on the antenna coordinate set determined above. The radio frequency interface distance parameters can include the spatial distance and relative azimuth angle from the radio frequency interface of each antenna to the radio frequency port of the test unit.

[0071] For example, the antenna coordinates and module interface coordinates can be accurately measured using the three-dimensional Euclidean distance formula, forming a set of RF interface distance parameters. This set provides the foundational data for coaxial cable length optimization. A multi-objective optimization algorithm is employed for fine-tuning the cable length, comprehensively considering the cable's electrical characteristics and physical feasibility. Under the premise of minimizing signal reflection and maximizing transmission efficiency, the optimal cable length scheme and impedance matching parameters are output. During processing, the physical feasibility of cable length and connector location can be automatically detected. Adjustment reports are generated and recorded in the design log for anomalies such as insufficient space or excessive cable length, for use in subsequent design iterations. RF simulation tools can be used to evaluate the impact of cable length on signal transmission in real time, ensuring the effectiveness of the impedance matching scheme. Finally, a complete cable matching scheme including cable length, connector type, and impedance parameters is generated.

[0072] In one example, the polarization direction of the antenna system can be calibrated based on the installation coordinates of each antenna and the cable connection parameters to obtain layout structure parameters. This allows for adjustments to the mechanical mounting angles and electrical polarization parameters of the antennas, optimizing their signal reception and transmission performance. Furthermore, polarization direction calibration also considers mutual interference between antennas and multipath effects, determining the optimal polarization distribution through simulation analysis. For example, for multi-antenna systems, cross-polarization or orthogonal polarization configurations can be used to enhance signal isolation and reduce mutual interference.

[0073] During polarization calibration, a feedback control mechanism can be used to iteratively optimize the calibration results. Signal quality metrics such as signal-to-noise ratio and bit error rate can be collected in real time through RF performance monitoring. Combined with polarization adjustment parameters, the antenna polarization angle can be dynamically adjusted to ensure high gain is maintained under various environmental conditions. In case of abnormal situations, such as signal attenuation or increased interference due to polarization adjustment, the system can automatically roll back to the previous stable state and record relevant abnormal data for subsequent analysis.

[0074] Through the above processing, the layout and structural parameters of the antenna system can be obtained. These parameters may include the antenna coordinate set, cable matching scheme, and polarization configuration, which are used to determine the spatial layout and electrical characteristics of the antenna system. The layout and structural parameters can be stored as output in the design database and used in subsequent thermal and electromagnetic co-design processes, providing crucial input for internal space planning and signal suppression design.

[0075] As can be seen, through the above steps, this embodiment of the application realizes a complete RF co-design process from antenna location determination to polarization calibration. This process ensures optimal spatial layout through precise antenna coordinate calculation, guarantees signal transmission quality through coaxial cable length optimization, and improves signal transmission and reception performance through polarization direction calibration, laying a solid RF foundation for subsequent housing design and signal acquisition.

[0076] In some embodiments, the thermal and electromagnetic co-design processing of the first and second modules based on the spatial constraints included in the layout structural parameters to obtain the housing structure scheme may further include: firstly, determining the distribution density of the heat dissipation structure based on the internal space of the housing included in the layout structural parameters, to ensure that the heat generated by the first and second modules during high-load operation can be effectively dissipated. It is understood that the internal space parameters of the housing can be extracted from the layout structural parameters mentioned above to determine the distribution density of the heat dissipation structure. These internal space parameters may include the three-dimensional dimensions of the antenna layout structure, the antenna mounting position, and its relative relationship with the internal space of the housing.

[0077] In one example, determining the heat dissipation density of the internal space of the housing based on the layout structural parameters can further include: firstly, calculating the heat dissipation hole density based on the heat power distribution and temperature rise requirements of the first and second modules. For example, after obtaining the internal space parameters of the housing, the available space inside the housing can be meticulously divided according to the preset overall dimensions and material properties of the housing, clarifying the boundaries and constraints of the heat dissipation area. Based on heat dissipation design specifications and thermodynamic principles, the heat distribution generated during the operation of the dual-module test unit and antenna system is simulated using heat flow simulation methods, the heat flow path and thermal resistance characteristics are analyzed, and the cellular heat dissipation hole density is calculated using the following formula: Formula (11) in: This represents the calculated density of heat dissipation holes; This refers to the number of heat dissipation holes; For aperture; This refers to the surface area of ​​the shell. Temperature rise, which is the difference between the expected operating temperature and the ambient temperature; The material coefficient, which can be taken as 0.02, is determined based on the thermal conductivity of the shell material. This formula comprehensively considers the area ratio of the heat dissipation holes and the influence of temperature rise on heat dissipation efficiency. When the temperature rise increases, the density of heat dissipation holes increases accordingly to enhance heat dissipation capacity.

[0078] Then, it can be based on the density of heat dissipation holes. Determine the distribution pattern of the heat dissipation holes, i.e., the distribution density of the heat dissipation structure. When the heat dissipation hole density... When within the preset range, that is When the density of heat dissipation holes is determined to be reasonable, a heat dissipation hole distribution map can be generated. This heat dissipation hole distribution map can include the arrangement, diameter, and spacing of the heat dissipation holes. A honeycomb arrangement is used to maximize heat dissipation efficiency while taking into account the feasibility of mechanical processing.

[0079] According to formula (11), for areas with local overheating risk, the pore density distribution can be adjusted to form a zoned heat dissipation pore design scheme. The thermodynamic performance of the heat dissipation pore layout is verified by finite element analysis to ensure that the heat dissipation design meets the requirements.

[0080] After determining the distribution density of the heat dissipation structure, the thickness parameters of the shielding structure can be determined based on the thermal conduction model and electromagnetic shielding requirements to provide sufficient electromagnetic shielding effectiveness while ensuring heat dissipation efficiency. The thermal conductivity coefficient can be extracted from the heat dissipation hole distribution parameters mentioned earlier. This study aims to demonstrate the thermal conductivity efficiency of the honeycomb heat dissipation hole region of the shell and the thermophysical properties of the aluminum alloy material. By combining parameters such as thermal conductivity, specific heat capacity, and density of aluminum alloy from a materials science database, a heat conduction model is constructed to simulate the heat transfer process of the shell under operating conditions.

[0081] For example, the determination of the shielding structure thickness parameters based on the thermal conductivity model and electromagnetic shielding requirements can further include: firstly, iteratively calculating the shielding thickness based on the thermal conductivity coefficient and heat dissipation area. The expression for iteratively optimizing the shielding thickness can be: Formula (12) in: For the first Thickness of the next iteration; Thermal power can be determined based on the operating status of the first and second modules. Indicates the thermal conductivity coefficient; For heat dissipation area; This is the step size coefficient, which can take a value of 0.1.

[0082] Formula (12) can gradually approximate the optimal shield thickness value through iteration. Each iteration can calculate the temperature distribution based on the current thickness and adjust the thickness according to the temperature distribution to achieve a balance between heat dissipation performance and shielding effectiveness.

[0083] When the thickness difference between two consecutive iterations is less than a preset threshold, the iteration terminates and the current shield thickness is determined as the thickness parameter of the shielding structure. For example, it can be when... When the iteration is complete, the shield thickness parameter is determined. This thickness parameter takes into account both thermal conductivity efficiency and RF shielding performance requirements, ensuring that the shield has sufficient thermal conductivity and effective RF leakage blocking capability.

[0084] For example, determining the thickness parameters of the shielding structure based on the heat conduction model and electromagnetic shielding requirements may further include: first, acquiring real-time temperature monitoring data; and then adjusting the distribution density of the heat dissipation structure and / or the thickness parameters of the shielding structure based on the real-time temperature monitoring data. For instance, a thermo-electromagnetic coupling optimization algorithm can be introduced to dynamically adjust the shielding thickness or the distribution density of the heat dissipation structure according to the real-time monitored temperature data.

[0085] In practical applications, temperature sensors can be used to collect real-time temperature data at key points inside the first and second modules, and the temperature change ΔT can be calculated. The shielding thickness can be dynamically adjusted using the following formula. : Formula (13) in, The thickness of the shielding cover is dynamically adjusted. For real-time monitoring of temperature changes, The coupling coefficient is determined through optimization using multiphysics simulation data. Its initial value is set based on the properties of aluminum alloy materials, and S is the base thickness determined based on the initial design parameters.

[0086] According to the above formula (13), the temperature sensor data can be periodically adjusted. This ensures a balance between heat dissipation efficiency and shielding effectiveness. For example, when the temperature rises, the k-value is appropriately increased to thicken the shielding cover and enhance heat conduction; when the temperature returns to normal, the base thickness is restored to maintain electromagnetic shielding effectiveness. This achieves a dynamic balance between heat dissipation and shielding effectiveness, avoiding the problem of insufficient heat dissipation or shielding failure when the temperature changes in the fixed thickness design of the prior art.

[0087] After determining the heat dissipation structure and shielding structure, a shell construction scheme can be obtained based on the distribution density of the heat dissipation structure and the thickness parameters of the shielding structure. The shell structure determined by the shell construction scheme can then be subjected to strength verification to ensure its reliability and stability in actual use environments.

[0088] In one example, based on the shield thickness parameters determined earlier and combined with the mechanical properties of the aluminum alloy material, the finite element method can be used to simulate the stress conditions of the shell in a real-world operating environment, including static loads, vibration and shock, and thermal expansion stress. A safety factor calculation formula can then be constructed. Formula (14) in: This represents the calculated safety factor; The yield strength of the material, in megapascals, is determined based on the shell material. The actual stress is obtained through finite element analysis. The thickness is designed, i.e., the thickness of the shielding cover determined above; This is the minimum permissible thickness determined according to mechanical design specifications. This formula comprehensively considers the mechanical properties of the material and the impact of structural thickness on safety.

[0089] When safety factor Greater than or equal to a preset threshold, for example Upon successful completion, the shell construction scheme is deemed acceptable, and a suppression shell construction scheme is generated. This scheme details the shell's structural layout, material distribution, heat dissipation hole distribution, and shielding thickness parameters, providing internal space constraints for subsequent power supply system design.

[0090] Therefore, the embodiments of this application realize a complete thermal and electromagnetic co-design process, from heat dissipation structure design to shielding structure optimization and structural strength verification. This process ensures heat dissipation efficiency through honeycomb heat dissipation hole density calculation, balances the contradiction between heat dissipation and shielding through iterative optimization of shielding cover thickness, guarantees shell reliability through structural strength verification, and achieves synergy between heat dissipation and shielding through a dynamic adjustment mechanism of thermal and electromagnetic coupling, providing structural protection for subsequent energy management design and signal acquisition.

[0091] In some embodiments, the above-mentioned energy management design process for the power supply systems of the first module and the second module based on the housing structure scheme to obtain the integrated power supply and heat dissipation control scheme may further include: first, determining the layout position of the power supply system based on the constraints of the housing structure scheme, so as to determine the optimal layout position of the power supply system in the internal space of the housing, and ensuring the safety clearance, electromagnetic compatibility and heat dissipation path between the power supply system and other internal components.

[0092] For example, internal space constraint parameters can be extracted from the shell structure scheme determined above. These internal space constraint parameters may include the three-dimensional dimensions of the available space inside the shell, the location of structural support points, safety clearance requirements, electromagnetic shielding area division, and heat dissipation channel layout, so as to clarify the spatial allocation and isolation requirements of each functional area inside the shell.

[0093] Then, precise spatial matching is performed based on the physical dimensions and shape parameters of the built-in lithium battery. For example, a space-filling algorithm can be used to automatically generate the optimal layout coordinates of the lithium battery based on the spatial distribution and structural support points inside the casing. During the layout planning process, the electromagnetic shielding requirements between the battery and other internal components such as modules, antennas, and shielding covers need to be considered to ensure that the battery arrangement does not affect the radio frequency signal suppression effect; the relative position of the battery and heat dissipation channels needs to be considered to ensure that the heat generated by the battery can be dissipated in a timely manner; and the feasibility of the battery fixing structure needs to be considered, including the position of the support frame, the arrangement of cushioning materials, and shockproof measures to ensure that the lithium battery remains stable under conditions such as equipment vibration and drops.

[0094] Finally, three-dimensional space verification confirms that the layout coordinates do not conflict with other components within the housing. When insufficient space or non-compliance with safety clearance standards are detected, an alarm mechanism can be automatically triggered and adjustment suggestions generated. The final determined power supply system layout includes the three-dimensional coordinates and installation orientation of the lithium battery within the housing, providing a spatial reference for subsequent heat dissipation strategy design.

[0095] After determining the layout of the power supply system, a heat dissipation control strategy can be determined based on the real-time power consumption of the first and second modules to achieve on-demand heat dissipation, avoid energy waste caused by excessive heat dissipation, and ensure that key components operate within the allowable temperature range.

[0096] In one example, power consumption data of the first and second modules can be collected in real time. Simultaneously, temperature data at key locations inside the housing, such as module surface temperature, battery temperature, and heat dissipation channel outlet temperature, can be collected via temperature sensors. Combined with heat dissipation channel parameters from the housing structure, such as vent locations, channel cross-sectional area, and airflow direction, an internal airflow model can be constructed.

[0097] The aforementioned determination of the heat dissipation control strategy based on the real-time power consumption of the first and second modules can further include: determining the cooling fan speed based on the deviation between the real-time power consumption of the first and second modules and their preset power consumption thresholds, and then determining the heat dissipation control strategy based on the cooling fan speed. Specifically, a PID control algorithm can be used to dynamically adjust the fan speed. The fan speed control formula is defined as: Formula (15) in, Fan speed, unit: revolutions per minute. The real-time power consumption of the RedCap module can be considered simultaneously with the power consumption of the second module, taking the sum or weighted sum of the two, depending on actual needs. A power consumption threshold set based on the maximum allowable power consumption of the RedCap module. , , To control the proportional coefficient, integral coefficient, and derivative coefficient of the algorithm, the initial values ​​were determined through experimental optimization. This formula ensures that the fan speed is dynamically adjusted according to changes in power consumption, avoiding excessive heat dissipation that could lead to increased energy consumption.

[0098] The internal heat transfer process of the equipment under different power loads can be simulated by the heat flow simulation module. Combined with the temperature threshold feedback mechanism, the dynamic speed curve is generated using formula (15) to adapt to the heat dissipation requirements of different operating states. When the temperature exceeds the preset threshold, the system automatically adjusts the PID parameters or increases the upper limit of the speed to ensure the thermal management stability of the equipment; when the temperature returns to normal, the speed is gradually reduced to save energy.

[0099] After determining the power supply system layout and heat dissipation control strategy, an integrated power supply and heat dissipation control scheme can be determined based on the layout location of the power supply system and the heat dissipation control strategy. Specifically, the power supply energy consumption and heat dissipation energy consumption can be balanced and verified based on the layout location of the power supply system and the heat dissipation control strategy to obtain an integrated power supply and heat dissipation control scheme, so as to ensure that the overall energy consumption is within an acceptable range while meeting the heat dissipation requirements.

[0100] In one example, power management functionality can be invoked to comprehensively evaluate the energy consumption of the power supply and cooling systems. This evaluation can cover lithium battery discharge performance, fan power consumption, and the energy efficiency ratio of the thermal management system. A combination of simulation and measured data is used to analyze the power distribution and thermal balance under different operating conditions, including standby, light load, and full load. Then, a power balance algorithm can be used to determine the impact of the cooling control strategy on the power supply system load, ensuring that fan speed adjustments do not lead to excessive energy consumption or reduced battery life.

[0101] For example, energy consumption trends during long-term operation can be simulated to evaluate the synergistic effect of the power supply and cooling systems. When the cooling strategy leads to excessive fan power consumption, the proportional coefficient in the PID control parameters is automatically adjusted. Reduce fan speed response sensitivity; when insufficient heat dissipation causes the temperature to exceed the limit, automatically adjust the integral coefficient in the PID control parameters. Enhance heat dissipation capacity; dynamically adjust power consumption threshold when the power supply system load fluctuates significantly. To optimize the balance between heat dissipation and energy consumption.

[0102] Through the above balance verification, an integrated power supply and heat dissipation control scheme is obtained. This integrated control scheme can include power supply system layout coordinates, fan control strategies including PID parameters, speed curves, and temperature thresholds, as well as power management parameters including power budget allocation and battery charging and discharging strategies. This integrated power supply and heat dissipation control scheme can be stored in the design database as output and used for subsequent protocol parsing and processing, providing device operating state constraints for test parameter configuration.

[0103] As can be seen from the above, the embodiments of this application realize a complete energy management design process from power supply system layout to heat dissipation control strategy determination and energy consumption balance verification. This process ensures the safe layout of the power supply system through spatial matching, achieves dynamic coordination of power consumption and heat dissipation through PID control algorithm, and ensures overall energy efficiency through energy consumption balance verification, providing power supply and heat dissipation guarantees for subsequent test parameter configuration and signal acquisition.

[0104] In some embodiments, the above-mentioned test parameter configuration processing of the first module and the second module based on the working state constraints of the physical structure design scheme to obtain test configuration parameters that enable the first module and the second module to work synchronously may include: firstly, performing protocol parsing on the first module and the second module to obtain the parsing results, and then determining the frequency band matching rules based on the parsing results and the device operating status included in the power supply and heat dissipation integrated control scheme, so as to determine the optimal frequency band configuration scheme for the first module and the second module, so as to achieve the best communication performance under the premise of meeting power consumption constraints.

[0105] In one example, the protocol parsing of the first and second modules described above, and the resulting parsing results, can further include: determining frequency band usage rules and network access strategies based on the communication protocol standards supported by the first and second modules. Specifically, based on the communication protocol standards supported by the first and second modules, such as 3GPP Release 17 or 3GPP Release 18, the protocol parameters of the physical layer, link layer, and network layer can be analyzed layer by layer by the protocol stack decoder. The parsed content can include frequency band usage rules, such as the bandwidth configuration, center frequency, and duplex mode of each frequency band in Sub-6 GHz; bandwidth configuration, such as the 1 MHz, 500 kHz, and 200 kHz bandwidth modes supported by the RedCap module; network access strategies, such as the access procedures for Standalone (SA) mode and Non-Standalone (NSA) mode; and power control parameters.

[0106] Then, the parsed protocol parameters are fused with the device operating status characterized by the power supply and heat dissipation integrated control scheme. This scheme includes current and expected device operating status information, such as lithium battery discharge characteristics (e.g., remaining available power, discharge current limits), fan power consumption, overall power consumption distribution, and temperature status. Based on these device operating status constraints, a multi-dimensional mapping algorithm is used to match the frequency band information supported by the dual modules with the device power consumption constraints, selecting a set of frequency bands that meet both power budget and communication requirements.

[0107] The process of generating the aforementioned frequency band matching rules may include evaluating each candidate frequency band, assessing its expected power consumption based on the module power consumption model and frequency band characteristics, its heat dissipation requirements based on the thermal conduction model, and its impact on the power supply system based on the battery discharge curve. When the operating power consumption of a frequency band exceeds the current available power budget, or its heat dissipation requirements exceed the current heat dissipation capacity, or it places an excessive load on the power supply system, that frequency band is marked as unusable. Simultaneously, considering the mutual exclusion relationships between frequency bands, spectrum resource allocation priorities, and environmental interference factors, the frequency band matching rules are dynamically adjusted. Finally, a frequency band matching rule is generated, which details the frequency band selection criteria and matching strategies applicable to dual-module testing, including the primary frequency band, backup frequency band, frequency band switching conditions, and the corresponding transmit power limits for each frequency band.

[0108] After determining the frequency band matching rules, the parameter synchronization instruction set can be determined based on the frequency band matching rules to eliminate clock deviation between the two modules and ensure the consistency of sampling timing.

[0109] In one example, the above-mentioned determination of the parameter synchronization instruction set based on frequency band matching rules can further include: first, determining the sampling rate requirement based on the frequency band matching rules. It is understood that the sampling rate requirement can be extracted from the frequency band matching rules determined above, and may include the sampling clock frequency, sampling precision, and sampling window length. It should be noted that since different frequency bands and bandwidth configurations correspond to different sampling rate requirements, the sampling rate requirement can be determined by matching the selected frequency band matching rules.

[0110] Then, based on the sampling rate requirements, the clocks of the first and second modules are configured to obtain the parameter synchronization instruction set.

[0111] For example, a high-precision clock source can be used to calibrate the sampling clock deviation between the first and second modules. A temperature-compensated crystal oscillator is selected as the reference clock source, which has the characteristics of high frequency stability and small temperature drift. Using a clock synchronization algorithm, based on the timestamp alignment requirements in the frequency band matching rules, the clock deviation and delay compensation parameters between the two modules are calculated. For instance, synchronization reference signals output by the first and second modules, such as frame synchronization signals or timing reference signals, can be collected. The time difference between the two signals is measured as the initial clock deviation. Then, the deviation compensation amount is dynamically adjusted according to the device operating status, such as temperature changes and aging effects, to obtain the final clock deviation.

[0112] The clock configuration process can include the following steps: First, the clock source of the dual modules is calibrated by comparing the reference frequency of the temperature-compensated crystal oscillator with the local clocks of the two modules, calculating the frequency deviation, and compensating for it. Second, a sampling clock control signal is generated according to the sampling rate requirements to ensure that the sampling clock frequencies of the two modules are strictly consistent. Third, a synchronization trigger signal is generated to simultaneously start the sampling process of the two modules, ensuring that the sampling start time is aligned. Finally, the clock synchronization parameters are fused with the protocol parameters in the frequency band matching rules to generate a parameter synchronization command set. This command set includes sampling rate settings, clock calibration commands, and the synchronization trigger signal. It should be noted that this parameter synchronization command set can adopt a unified command format to support the distribution to the dual modules through the main control interface, achieving synchronous startup and parameter coordination. During the command generation process, parameter consistency and timing integrity are continuously monitored, and a reconfiguration process is automatically triggered for abnormal commands.

[0113] After generating the parameter synchronization instruction set, the parameter synchronization instruction set is processed for data format standardization to obtain test configuration parameters. Through data format standardization, the consistency of parameter expression between different modules and test units can be ensured, providing a unified data interface for subsequent parallel signal acquisition.

[0114] For example, various parameters in the parameter synchronization instruction set, including sampling rate settings, clock synchronization parameters, synchronization trigger signals, frequency band selection instructions, and transmit power control parameters, can be parsed. These parameters are then mapped to standard fields according to a predefined unified data format specification. This specification covers field naming rules (e.g., camelCase or underscore naming), data types (e.g., integer, floating-point, enumeration), unified units (e.g., frequency in Hertz, time in seconds), and checksum design (e.g., cyclic redundancy check or hash check).

[0115] Then, format conversion and encapsulation operations are performed to package the mapped parameter set into a structured data format. Optionally, Extended Markup Language (Extended Markup Language) or JavaScript Object Notation (JavaScript Object Notation) can be used as the encapsulation format to facilitate subsequent parsing and transmission. During the encapsulation process, file header information is automatically generated, including a file type identifier, a version number for configuration version management, and a timestamp recording the configuration generation time. To ensure data integrity, a digital signature and verification code are attached to prevent the configuration file from being tampered with during transmission or storage.

[0116] The system performs integrity checks and parameter range checks on the input command set. For missing fields, format errors, or parameter anomalies, it automatically triggers an error correction process and records anomaly details in a standardized processing log for subsequent troubleshooting and configuration optimization. It supports incremental updates and difference merging of configuration files, improving the flexibility and efficiency of configuration management.

[0117] As can be seen from the above, the embodiments of this application implement a complete test parameter configuration process from protocol parsing to parameter standardization. This process determines the frequency band matching rules through protocol parsing, achieves clock synchronization configuration through a high-precision clock source, and ensures the uniformity of parameter expression through data format standardization, thereby obtaining test configuration parameters that enable the first module and the second module to work synchronously, laying the timing and parameter foundation for subsequent parallel signal acquisition.

[0118] In some embodiments, the above-mentioned parallel signal acquisition and signal compensation processing of the first module and the second module based on test configuration parameters to obtain dual-module signal data may include: firstly, based on test configuration parameters, parallel sampling of the first module and the second module to obtain raw signal data, so as to ensure that the sampling process of the two modules is precisely aligned in the time dimension.

[0119] In one example, the test configuration parameters mentioned earlier can be retrieved. These parameters are stored in a structured data format and include key parameters such as the sampling clock frequency, sampling window length, and synchronization trigger conditions of the dual-module test unit. The sampling clock frequency, sampling window length, and synchronization trigger conditions in the test configuration parameters are parsed through the configuration management function to initialize the dual-channel parallel sampling environment, including two independent sampling threads corresponding to the first module and the second module, respectively.

[0120] Sampling control can configure the sampling hardware according to the acquisition parameters, setting the sampling frequency and resolution of the analog-to-digital converter, and achieving precise alignment of the sampling clock in conjunction with clock synchronization parameters. When starting the dual-channel sampling thread, a synchronization signal is first triggered to activate the sampling clock synchronization mechanism of the dual-module test unit. A high-precision temperature-compensated crystal oscillator is used as the clock reference, and the phase and frequency offset of the sampling clock are adjusted in real time to ensure timing consistency between the two sampling channels. During execution, the sampling thread employs a ring buffer mechanism to achieve continuous data acquisition and caching, avoiding data loss. High-speed data transmission is achieved through direct memory access technology, converting the acquired analog signals into digital signals and writing them to the storage unit in real time.

[0121] The sampling data includes the original radio frequency signal samples of the first and second modules, and fully preserves the signal amplitude, phase and timestamp information to obtain the original signal data.

[0122] Then, error compensation processing is performed on the original signal data to obtain dual-module signal data, so as to extract and suppress interference components from the original signal and restore the original characteristics of the signal.

[0123] For example, digital signal processing functions can be invoked to identify and separate interference noise components in the original signal. A multi-channel interference detection algorithm can be employed, using adaptive filters and time-frequency analysis techniques to separate background noise, radio frequency leakage, and multipath interference components from the original signal. By combining a preset noise model, filtering parameters can be dynamically adjusted to optimize the extraction accuracy of the interference signal.

[0124] Then, based on the extracted interference noise components, multi-level compensation processing is performed. For example, a filtering algorithm based on the minimum mean square error criterion can be used first to suppress the influence of interference signals on the useful signal and restore the true amplitude and phase information of the signal. Secondly, combined with the dual-module hardware structure parameters and the housing signal suppression scheme, spatial filtering and temporal correction are performed to eliminate system errors caused by imperfect equipment layout and shielding. Then, an iterative optimization mechanism is adopted to automatically adjust the weight coefficients of the compensation algorithm according to the real-time sampled signal quality indicators to improve the signal purification effect. Through the above processing, purified signal data is obtained as dual-module signal data.

[0125] In some embodiments, the above-described error compensation processing of the original signal data to obtain dual-module signal data may further include: using a deep learning model to perform error compensation processing on the original signal data to obtain dual-module signal data. For example, a trained deep learning model can be used to perform error compensation processing on the original signal data. This deep learning model can use a convolutional neural network structure, including convolutional layers, pooling layers, and fully connected layers. The optimizer can be Adam, and the loss function is mean squared error. The training process of this model can involve first training with a public dataset or simulation data. The dataset contains signal samples under various channel conditions, such as 3GPP Release 17 standard data or Release 18 standard data, labeled as clean signals. During training, the model learns the mapping relationship from noisy signals to clean signals.

[0126] In practical applications, after obtaining the raw signal data, it is input into a trained convolutional neural network model. The output is calculated through forward propagation to obtain the purified signal. This deep learning compensation module can handle nonlinear errors that traditional filtering algorithms struggle with, such as multipath interference, further improving compensation accuracy. It should be noted that this deep learning compensation process can run in parallel with traditional error compensation algorithms. It can dynamically select the optimal compensation strategy based on signal quality metrics, such as signal-to-noise ratio, or fuse the outputs of both to generate the final purified signal data, i.e., dual-module signal data.

[0127] In some embodiments, the method provided in this application further includes a digital twin calibration process.

[0128] Specifically, digital twin models of the first and second modules can be constructed first. These digital twin models can be built using 3D modeling and physical simulation to simulate the hardware behavior and environmental impacts of the first and second modules. Hardware behavior includes interface connection characteristics, signal transmission characteristics, and heat dissipation characteristics; environmental impacts include external conditions such as temperature changes and vibration / shock. The construction of the digital twin models is based on the physical structure design scheme and test configuration parameters obtained earlier to ensure consistency between the constructed digital twin models and the physical entities.

[0129] Then, the original signal data and / or dual-module signal data can be compared with the predicted data of the digital twin model to obtain the comparison results. The digital twin model can predict the expected signal output under the same operating conditions based on the current test configuration parameters and physical structure design. During the comparison process, the mean square error (MSE) can be determined based on the original signal data and / or dual-module signal data and the predicted data of the digital twin model. That is, the MSE is used as a deviation metric to calculate the deviation between the measured data and the predicted data, and the comparison result is determined based on the MSE. The formula for calculating the MSE is as follows: Formula (16) in This is a measured data vector, including information such as signal delay and power consumption. This is the data vector predicted by the digital twin model, where N is the number of data points. The default value is 100 points, which can be configured according to the actual situation.

[0130] Finally, the test configuration parameters and / or error compensation parameters can be automatically calibrated based on the comparison results. When the deviation exceeds a preset threshold, the relevant parameters are automatically adjusted to reduce the difference between the measured and predicted values. Calibrable parameters include clock synchronization deviation and sampling rate settings in the test configuration parameters, as well as filter coefficients and deep learning model weights in the error compensation process. The calibration process employs a closed-loop control mechanism, feeding the adjusted parameters back to the parameter synchronization instruction set or error compensation process described above, forming a continuously optimizing cycle.

[0131] For example, when clock synchronization deviation causes signal delay to exceed expectations, the clock synchronization deviation compensation amount can be automatically adjusted; when signal amplitude attenuation does not match the prediction, the gain coefficient of the error compensation processing can be automatically adjusted. Through digital twin calibration, closed-loop control of the testing process is achieved, ensuring parameter accuracy and signal acquisition precision.

[0132] As can be seen from the above, the embodiments of this application realize a complete signal acquisition and processing flow from parallel sampling to error compensation and then to digital twin calibration. This flow ensures time synchronization of the two modules through parallel sampling, suppresses signal interference through error compensation processing, improves compensation accuracy through deep learning models, and achieves closed-loop calibration through digital twin models, ultimately obtaining high-quality dual-module signal data, laying a data foundation for subsequent performance analysis and test report generation.

[0133] In some embodiments, the method provided in this application may further include a data integrity verification step.

[0134] First, data integrity processing is performed on the dual-module signal data to obtain verification information for verifying data integrity. For example, this data integrity processing involves feature extraction from the dual-module signal data, mapping dual-module signal data of arbitrary length to fixed-length verification information using a preset algorithm. This verification information is unique; different data content will generate different verification information, and the same data content will necessarily generate the same verification information. For example, a cryptographic hash algorithm can be used to calculate a hash value for the dual-module signal data as verification information; a message authentication code algorithm can be used in conjunction with a key to generate keyed verification information; or a digital signature algorithm can be used to generate signature information that can be used to verify the data's origin and integrity. The verification information serves as a digital fingerprint of the dual-module signal data, uniquely representing the original state of the data.

[0135] Then, the verification information is associated with the dual-module signal data. Specifically, this association refers to establishing a correspondence between the verification information and the dual-module signal data, enabling the corresponding verification information to be located based on the dual-module signal data during subsequent verification. Association methods can include appending the verification information as metadata to the dual-module signal data, packaging the verification information and dual-module signal data into a unified data structure, establishing a mapping index between the verification information and dual-module signal data, or independently saving the verification information and recording its correspondence with the dual-module signal data. By establishing this association, it is ensured that the verification information corresponds to specific dual-module signal data, providing a basis for subsequent integrity verification.

[0136] Finally, based on the correlation results, the integrity of the dual-module signal data is determined. Specifically, when dual-module signal data needs to be verified, the verification information associated with the dual-module signal data to be verified can be obtained first as the baseline verification information. The same data integrity processing is then performed on the dual-module signal data to be verified again to obtain the verification information to be verified. The verification information to be verified is compared with the baseline verification information. If they match, the dual-module signal data is determined to be complete and has not been tampered with; if they do not match, the dual-module signal data is determined to have been altered, its integrity is compromised, and an integrity anomaly warning is triggered. In this way, traceability and tamper-proof capabilities are provided for the dual-module signal data, ensuring the reliability of the test data.

[0137] As can be seen from the above, the embodiments of this application achieve integrity protection for dual-module signal data. By generating unique verification information and establishing a connection with the original data, it is possible to verify whether the data has been tampered with during subsequent use, providing technical assurance for the reliability of test data and audit traceability capabilities.

[0138] The above mainly describes the solutions provided in the embodiments of this application from the perspective of interaction between various network elements. It is understood that each network element, such as a base station and a UE, includes corresponding hardware structures and / or software modules to perform the above functions. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the examples described in the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0139] This application embodiment can divide base stations, UEs, etc., into functional modules based on the above method examples. For example, each function can be divided into its own functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.

[0140] When dividing each function into modules according to its corresponding function. Figure 3 A schematic diagram of the structure of a signal acquisition device provided in an embodiment of this application is shown. Figure 3 As shown, the signal acquisition device 300 includes: The acquisition module 310 is used to acquire the hardware parameters of the first module and the hardware parameters of the second module. The hardware integration module 320 is used to perform hardware integration processing on the first module and the second module based on the hardware parameters of the first module and the hardware parameters of the second module to obtain a physical structure design scheme. The parameter configuration module 330 is used to perform test parameter configuration processing on the first module and the second module based on the physical structure design scheme, so as to obtain test configuration parameters that enable the first module and the second module to work synchronously. The signal acquisition and processing module 340 is used to perform parallel signal acquisition and processing and signal compensation processing on the first module and the second module based on the test configuration parameters to obtain dual-module signal data.

[0141] In some embodiments, the hardware integration module 320 is further configured to perform physical integration processing on the first module and the second module based on the hardware parameters of the first module and the hardware parameters of the second module to obtain hardware structure parameters; Based on the hardware structure parameters, radio frequency co-design processing is performed on the antenna systems of the first module and the second module to obtain the layout structure parameters of the antenna system; Based on the spatial constraints included in the layout structure parameters, thermal and electromagnetic co-design processing is performed on the first module and the second module to obtain a shell structure scheme; Based on the aforementioned housing structure, energy management design is performed on the power supply systems of the first module and the second module to obtain an integrated power supply and heat dissipation control scheme.

[0142] In some embodiments, the hardware integration module 320 is further configured to calculate an interface compatibility index based on the interface electrical characteristic parameters and physical specification parameters of the first module and the second module, wherein the interface compatibility index includes interface signal matching degree and electrical characteristic consistency parameters; The parameter configuration module 330 is further configured to determine interface configuration parameters based on the interface compatibility index; perform physical connection adaptation processing on the first module and the second module based on the interface configuration parameters to determine the connection adaptation degree between the first module and the second module; determine the stress uniformity index based on the stress distribution of the connection structure connecting the first module and the second module; and determine interface fastening parameters based on the connection adaptation degree and the stress uniformity index. The hardware integration module 320 is also used to perform spatial modeling processing on the first module and the second module based on the interface fastening parameters, and to obtain the hardware structure parameters by detecting the spatial interference and structural stability indicators of each component in the spatial model.

[0143] In some embodiments, the hardware integration module 320 is further configured to calculate the heat dissipation hole density based on the heat power distribution and temperature rise requirements of the first module and the second module; determine the distribution density of the heat dissipation structure based on the heat dissipation hole density; iteratively calculate the shield thickness based on the thermal conductivity coefficient and heat dissipation area; determine the current shield thickness as the thickness parameter of the shield structure when the thickness difference between two adjacent iterations is less than a preset threshold; and determine the shell construction scheme based on the distribution density of the heat dissipation structure and the thickness parameter of the shield structure.

[0144] In some embodiments, the hardware integration module 320 is further configured to determine the layout location of the power supply system based on the constraints of the housing structure scheme; determine the speed of the cooling fan based on the deviation between the real-time power consumption of the first module and the second module and the preset power consumption threshold of the first module and the second module; determine the heat dissipation control strategy based on the speed of the cooling fan; and determine the power supply and heat dissipation integrated control scheme based on the layout location of the power supply system and the heat dissipation control strategy.

[0145] In some embodiments, the parameter configuration module 330 is further configured to perform protocol parsing on the first module and the second module to obtain the parsing result; Based on the analysis results and the power supply and heat dissipation integrated control scheme, frequency band matching rules are determined. Based on the frequency band matching rules, the sampling rate requirement is determined; based on the sampling rate requirement, the clocks of the first and second modules are configured to obtain the parameter synchronization instruction set; The parameter synchronization instruction set is processed to standardize the data format to obtain the test configuration parameters.

[0146] In some embodiments, the signal acquisition and processing module 340 is further configured to perform parallel sampling of the first module and the second module based on test configuration parameters to obtain raw signal data; and to perform error compensation processing on the raw signal data to obtain dual-module signal data.

[0147] In some embodiments, the signal acquisition device further includes a model building module 350 for building digital twin models of the first module and the second module; The signal acquisition and processing module 340 is also used to determine the mean square error based on the original signal data and / or the prediction data of the dual-module signal data and the digital twin model; determine the comparison result based on the mean square error; and calibrate the test configuration parameters and / or error compensation processing parameters based on the comparison result.

[0148] In some embodiments, the signal acquisition and processing module 340 is further configured to perform data integrity processing on the dual-module signal data to obtain verification information for verifying data integrity; associate the verification information with the dual-module signal data, and determine the integrity of the dual-module signal data based on the association result.

[0149] Figure 4 A schematic block diagram of a chip based on an embodiment of this application is shown. (As...) Figure 4 As shown, the chip 400 includes one or more processors 401 and a communication interface 402. The communication interface 402 can support the server in performing the data transmission and reception steps in the above-described image processing method, and the processor 401 can support the server in performing the data processing steps in the above-described image processing method.

[0150] Optional, such as Figure 4 As shown, the chip 400 also includes a memory 403, which may include read-only memory and random access memory, and provides operation instructions and data to the processor. A portion of the memory may also include non-volatile random access memory (NVRAM).

[0151] In some implementations, such as Figure 4 As shown, processor 401 executes corresponding operations by calling operation instructions stored in memory (which may be stored in the operating system). Processor 401 controls the processing operations of any terminal device; processor can also be called a central processing unit (CPU). Memory 403 may include read-only memory and random access memory, and provides instructions and data to processor 401. A portion of memory 403 may also include NVRAM. For example, in applications, memory, communication interfaces, and other components are coupled together via a bus system, which may include, in addition to a data bus, a power bus, a control bus, and a status signal bus, etc. However, for clarity, in... Figure 4 The general designated all buses as Bus System 404.

[0152] The methods disclosed in the embodiments of this disclosure can be applied to a processor or implemented by a processor. The processor may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above methods can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an ASIC, a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this disclosure. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this disclosure can be directly embodied as execution by a hardware decoding processor, or as a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above methods.

[0153] Exemplary embodiments of this disclosure also provide an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor. The memory stores a computer program executable by the at least one processor, which, when executed by the at least one processor, causes the electronic device to perform a method based on an embodiment of this disclosure.

[0154] Exemplary embodiments of this disclosure also provide a non-transitory computer-readable storage medium storing a computer program, wherein the computer program, when executed by a computer's processor, is used to cause the computer to perform a method based on embodiments of this disclosure.

[0155] Exemplary embodiments of this disclosure also provide a computer program product, including a computer program, wherein the computer program, when executed by a computer's processor, is used to cause the computer to perform a method based on embodiments of this disclosure.

[0156] refer to Figure 5 The present invention describes a structural block diagram of an electronic device 500 that can serve as a server or client of the present disclosure, which is an example of a hardware device that can be applied to various aspects of the present disclosure. Electronic device 500 is intended to represent various forms of digital electronic computer devices, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. Electronic device 500 can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0157] like Figure 5 As shown, the electronic device 500 includes a computing unit 501, which can perform various appropriate actions and processes based on a computer program stored in a read-only memory (ROM) 502 or a computer program loaded from a storage unit 508 into a random access memory (RAM) 503. The RAM 503 may also store various programs and data required for the operation of the electronic device 500. The computing unit 501, ROM 502, and RAM 503 are interconnected via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.

[0158] Multiple components in electronic device 500 are connected to I / O interface 505, including: input unit 506, output unit 507, storage unit 508, and communication unit 509. Input unit 506 can be any type of device capable of inputting information to electronic device 500. Input unit 506 can receive input digital or character information and generate key signal inputs related to user settings and / or function control of electronic device. Output unit 507 can be any type of device capable of presenting information and may include, but is not limited to, a display, speaker, video / audio output terminal, vibrator, and / or printer. Storage unit 508 may include, but is not limited to, disk and optical disk. Communication unit 509 allows electronic device 500 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks, and may include, but is not limited to, modems, network cards, infrared communication devices, wireless communication transceivers, and / or chipsets, such as Bluetooth™ devices, WiFi devices, WiMax devices, cellular communication devices, and / or the like.

[0159] The computing unit 501 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 501 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 501 performs the various methods and processes described above. For example, in some embodiments, the methods of the embodiments of this disclosure can be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 508. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 500 via ROM 502 and / or communication unit 509. In some embodiments, the computing unit 501 can be configured to perform the methods of the embodiments of this disclosure by any other suitable means (e.g., by means of firmware).

[0160] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0161] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0162] As used in this disclosure, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, device, and / or apparatus (e.g., disk, optical disk, memory, programmable logic device (PLD)) for providing machine instructions and / or data to a programmable processor, including machine-readable media that receive machine instructions as machine-readable signals. The term "machine-readable signal" refers to any signal for providing machine instructions and / or data to a programmable processor.

[0163] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0164] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0165] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other.

[0166] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. A computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions of the embodiments of this disclosure are performed, in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, a computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video disc (DVD); or it can be a semiconductor medium, such as a solid-state drive (SSD).

[0167] Although this disclosure has been described in conjunction with specific features and embodiments thereof, it will be apparent that various modifications and combinations can be made thereto without departing from the spirit and scope of this disclosure. Accordingly, this specification and drawings are merely exemplary illustrations of the disclosure as defined by the appended claims and are to be considered as covering any and all modifications, variations, combinations, or equivalents within the scope of this disclosure. It is obvious that those skilled in the art can make various alterations and modifications to this disclosure without departing from its spirit and scope. Thus, this disclosure is also intended to include any such modifications and modifications that fall within the scope of the claims of this disclosure and their equivalents.

Claims

1. A signal acquisition method, characterized by, include: Obtain the hardware parameters of the first module and the hardware parameters of the second module; Based on the hardware parameters of the first module and the hardware parameters of the second module, hardware integration processing is performed on the first module and the second module to obtain a physical structure design scheme; Based on the physical structure design scheme, test parameter configuration processing is performed on the first module and the second module to obtain test configuration parameters that enable the first module and the second module to work synchronously; Based on the test configuration parameters, parallel signal acquisition and signal compensation processing are performed on the first module and the second module to obtain dual-module signal data.

2. The method of claim 1, wherein, The hardware integration process for the first module and the second module based on the hardware parameters of the first module and the second module includes: Based on the hardware parameters of the first module and the hardware parameters of the second module, physical integration processing is performed on the first module and the second module to obtain hardware structure parameters; Based on the hardware structure parameters, radio frequency co-design processing is performed on the antenna systems of the first module and the second module to obtain the layout structure parameters of the antenna system; Based on the spatial constraints included in the layout structure parameters, thermal and electromagnetic co-design processing is performed on the first module and the second module to obtain a shell structure scheme; Based on the aforementioned housing structure, energy management design is performed on the power supply systems of the first module and the second module to obtain an integrated power supply and heat dissipation control scheme.

3. The method of claim 2, wherein, The physical integration process for the first module and the second module based on the hardware parameters of the first module and the second module includes: The interface compatibility index is calculated based on the interface electrical characteristic parameters and physical specification parameters of the first module and the second module. The interface compatibility index includes interface signal matching degree and electrical characteristic consistency parameters. Determine the interface configuration parameters based on the aforementioned interface compatibility indicators; Based on the interface configuration parameters, physical connection adaptation processing is performed on the first module and the second module to determine the connection adaptation degree between the first module and the second module; Based on the stress distribution of the connection structure connecting the first module and the second module, the stress uniformity index is determined; The interface fastening parameters are determined based on the connection compatibility and the stress uniformity index. Based on the interface fastening parameters, spatial modeling is performed on the first module and the second module. By detecting the spatial interference and structural stability indicators of each component in the spatial model, the hardware structure parameters are obtained.

4. The method of claim 2, wherein, Based on the spatial constraints included in the layout structural parameters, the first module and the second module undergo thermal and electromagnetic co-design processing to obtain a shell structure scheme, including: Based on the heat power distribution and temperature rise requirements of the first module and the second module, the density of heat dissipation holes is calculated; Based on the density of the heat dissipation holes, determine the distribution density of the heat dissipation structure; The thickness of the shielding cover is calculated iteratively based on the thermal conductivity coefficient and heat dissipation area. When the thickness difference between two adjacent iterations is less than a preset threshold, the current shield thickness is determined as the thickness parameter of the shield structure. Based on the distribution density of the heat dissipation structure and the thickness parameters of the shielding structure, the shell construction scheme is determined; and / or, Based on the aforementioned housing structure, energy management design is performed on the power supply systems of the first module and the second module to obtain an integrated power supply and heat dissipation control scheme, including: Based on the constraints of the aforementioned shell construction scheme, the layout location of the power supply system is determined; The speed of the cooling fan is determined based on the deviation between the real-time power consumption of the first module and the second module and the preset power consumption threshold of the first module and the second module. Based on the rotational speed of the cooling fan, a heat dissipation control strategy is determined; Based on the layout of the power supply system and the heat dissipation control strategy, determine the integrated power supply and heat dissipation control scheme; and / or, Based on the physical structure design scheme, the test parameter configuration process is performed on the first module and the second module to obtain test configuration parameters that enable the first module and the second module to work synchronously, including: The protocol of the first module and the second module is parsed to obtain the parsing result; Based on the analysis results and the power supply and heat dissipation integrated control scheme, frequency band matching rules are determined. Based on the frequency band matching rules, the sampling rate requirement is determined; Based on the sampling rate requirement, the clocks of the first module and the second module are configured to obtain the parameter synchronization instruction set; The parameter synchronization instruction set is processed to standardize the data format to obtain the test configuration parameters.

5. The method of claim 1, wherein, Based on the test configuration parameters, parallel signal acquisition and compensation processing are performed on the first module and the second module to obtain dual-module signal data, including: Based on the test configuration parameters, the first module and the second module are sampled in parallel to obtain the original signal data; Error compensation processing is performed on the original signal data to obtain the dual-module signal data.

6. The method of claim 5, wherein, The method further includes: Construct digital twin models of the first module and the second module; The mean square error is determined based on the original signal data or the dual-module signal data and the prediction data of the digital twin model. Based on the mean square error, the comparison result is determined; The test configuration parameters and / or the error compensation parameters are calibrated based on the comparison results.

7. The method according to claim 1, characterized in that, The method further includes: Data integrity processing is performed on the dual-module signal data to obtain verification information for verifying data integrity; The verification information is associated with the dual-module signal data, and the integrity of the dual-module signal data is determined based on the association result.

8. A signal acquisition device, characterized in that, include: The acquisition module is used to acquire the hardware parameters of the first module and the hardware parameters of the second module. A hardware integration module is used to perform hardware integration processing on the first module and the second module based on the hardware parameters of the first module and the hardware parameters of the second module to obtain a physical structure design scheme. The parameter configuration module is used to perform test parameter configuration processing on the first module and the second module based on the physical structure design scheme, so as to obtain test configuration parameters that enable the first module and the second module to work synchronously; The signal acquisition and processing module is used to perform parallel signal acquisition and processing and signal compensation processing on the first module and the second module based on the test configuration parameters to obtain dual-module signal data.

9. An electronic device, characterized in that, It includes a processor and a memory, the memory storing a computer program that, when executed by the processor, implements the method as described in any one of claims 1-7.

10. A computer storage medium, characterized in that, The computer storage medium stores instructions that, when executed, implement the method of any one of claims 1-7.

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