Modular adaptive addressing multi-channel high-precision light source control system and method

Abstract

This invention relates to the field of light source control technology, and in particular provides a modular adaptive addressing multi-channel high-precision light source control system and method. The system includes a slave addressing and communication link establishment subsystem, a frame format control command issuance subsystem, a power MOSFET driving subsystem, and a master dynamic adjustment and protection control subsystem. The method includes the master dynamically assigning a communication address to each slave based on the received unique identifier sequence and establishing a slave address mapping table; encapsulated control commands are sent to the corresponding slave unit via the SPI bus, and the slave receives and parses the commands; after receiving the control commands, the slave unit parses parameters such as brightness, pulse width, and delay using its internal microcontroller unit; during operation, the slave unit periodically collects current detection signals and temperature sensor data, and the master receives and parses the status information of each slave to determine abnormal conditions. This invention improves the reliability and long-term operational stability of the system.

Description

Technical Field

[0001] This invention relates to the field of light source control technology, and in particular to a modular adaptive addressing multi-channel high-precision light source control system and method. Background Technology

[0002] With the rapid development of machine vision and automated inspection, industrial light source controllers have evolved from single-channel output to multi-channel output to drive different light sources for lighting control. However, existing products generally suffer from the following shortcomings: First, the number of channels is fixed and expansion capabilities are poor, making it impossible to flexibly add or remove channels according to application scenarios; second, the master-slave addressing method is simple, and the system cannot function if a slave device is missing or the DIP switch is faulty, making maintenance difficult; third, the control modes are limited, mostly only achieving constant brightness output, failing to meet the needs of strobe or custom sequences; fourth, the time base and brightness scale are inconsistent, the instruction format is chaotic, and operation is complex; fifth, power utilization is low, monitoring and protection are insufficient, and long-term operational stability is poor. To address these issues, a light source controller with a reasonable structure, rich functionality, and flexible expansion capabilities is needed.

[0003] Prior art 1, Chinese Patent Application No. 202311303571.8, discloses a multi-channel light source control circuit. It converts the control signals of the control module through a first conversion circuit, and the main control chip receives the converted signals and generates parallel data signals based on them. The parallel data signals generated by different control signals have small differences, which are transformed into larger differences after passing through a gain circuit. Signals with larger differences belong to different judgment ranges. A channel switching circuit is used to transmit the signals to different controlled units in the controlled module through an analog output interface according to the range of the signals. Although this achieves multi-channel light source control without setting up a multi-channel controller and control circuit, solving the problem of increased costs caused by each channel requiring a corresponding control circuit in the prior art, it lacks true intelligent addressing and dynamic networking capabilities. It relies on hardware circuits to hard-determine channel differences based on analog signal differences, and cannot achieve plug-and-play and automatic identification of the device. Each addition or replacement of a light source channel may require readjustment or calibration of the circuit thresholds, resulting in low system scalability and modularity. The channel switching method based on analog signal differences has relatively weak reliability and anti-interference capabilities, and is easily affected by factors such as noise and temperature drift, making it difficult to achieve high-precision and high-reliability digital parameter control, such as microsecond-level pulse width and precise PWM dimming. Without a digital address mapping and management mechanism, the host cannot perform independent, address-based precise control and status monitoring of each execution unit, resulting in low efficiency in unified management and data interaction.

[0004] Prior art two, Chinese patent application number 200910243737.5, discloses a photo-addressable electropolymerization device and a molecularly imprinted electrochemical modification method and application. It consists of a measuring cell, an array chip, an electrochemical workstation, an LED array light source, an LED array light source controller, a lock-in amplifier, a reference electrode, and a control electrode. A photo-addressable array chip with a MOS array structure is installed in the photo-addressable electropolymerization device. High-frequency modulated infrared LEDs selectively excite sensitive units, enabling the MOS capacitor array of the chip to be selected. Driven by the power supply of the electrochemical workstation in the external circuit, a photo-addressable, selective cyclic voltammetric electrochemical circuit is formed with the reference electrode, thereby realizing photo-addressable electropolymerization. The combination of optically addressed electropolymerization and molecular imprinting technology constitutes an optically addressed molecular imprinted electrochemical modification method. This provides an effective approach to the electrochemical modification of sensitive thin films in array chips, enabling optically addressed sensors to better leverage their advantages of multiple parameters and simple detection instruments. However, this method is application-specific and lacks versatility: it is tailored for molecular imprinted electrochemical modification, and its optical addressing purpose is to selectively excite sensitive units on the chip to form an electrochemical circuit, not for general industrial lighting control. Its system architecture, communication method, and control objectives are completely different from the multi-channel high-precision light source drive and management system described in this application, and it lacks the flexibility, programmability, and power drive capability required by general industrial light source controllers. It focuses on using light to address and trigger specific electrochemical reactions, without addressing the brightness, timing, and operating mode of each independent light source channel for high-precision closed-loop control and real-time status feedback, and it also lacks industrial-grade protection mechanisms such as overcurrent and overtemperature protection.

[0005] Prior art three, Chinese patent application number 202311152515.9, discloses a multi-channel light quality and quantity band adjustment controller drive circuit and its control method, belonging to the field of optical controller technology. The mains power is connected to the external power supply input circuit, and then input through the multi-channel LED light source internal protection circuit of the multi-channel light quality and quantity band adjustment controller to the multi-channel LED light source signal isolation intelligent acquisition circuit and the adjustable high-power dimming power supply drive circuit. The adjustable high-power dimming power supply drive circuit outputs current to the AC input terminal of the adjustable high-power dimming power supply. The multi-channel LED light source signal isolation intelligent acquisition circuit acquires the electrical parameter data of the multi-channel LED light source, and then outputs to the high-voltage AC to low-voltage DC circuit of the multi-channel LED light source isolation power supply, converting the 220V AC voltage to 12V DC voltage. Although it aims to achieve precise control and adjustment of multi-channel light quality, quantity, and wavelength bands in the light environment for experimental biological growth, the system architecture is complex and has low integration. It includes multiple relatively independent modules such as external power supply input circuits, internal protection circuits, signal isolation and acquisition circuits, and high-voltage AC to low-voltage DC circuits. The low system integration and modularity may result in large size, high cost, and many reliability nodes. Furthermore, it lacks a clear channel addressing, communication protocol, and network management mechanism, potentially relying on traditional pre-allocated addresses or simple hardware wiring distinctions. It lacks the automatic, efficient, and adaptive bus addressing and unified communication link described in this application, resulting in insufficient convenience and flexibility when dealing with a large number of channels or frequent configuration changes. While signal acquisition and isolation are mentioned, the dynamic real-time monitoring and automatic protection control subsystem centrally processed by the host is not emphasized. For high-power LED drivers, the lack of system-level rapid anomaly diagnosis and automatic protection strategies poses a challenge to long-term operational stability.

[0006] Current technologies 1, 2, and 3 suffer from low modularity, inconvenient system expansion, insufficient control precision and reliability, and a lack of intelligent closed-loop management. Therefore, this invention provides a modular adaptive addressing multi-channel high-precision light source control system and method. Summary of the Invention

[0007] To achieve the above objectives, the present invention adopts the following technical solution: In one aspect, the present invention provides a modular adaptive addressing multi-channel high-precision light source control system, comprising: The slave addressing and communication link establishment subsystem is configured such that after the master unit powers on, it broadcasts an enumeration command via the bus. Upon receiving the broadcast, each slave unit responds with its unique identifier (UID) within its assigned time slot. The master dynamically assigns a communication address to each slave based on the received UIDs and establishes a slave address mapping table. After addressing is completed, a serial peripheral interface (SPI) communication link based on address identifiers is formed between the master and each slave, enabling unified management and data interaction of multiple slaves by the master. The frame format control command sending subsystem is configured to encapsulate information such as brightness value, delay time, pulse width parameter and trigger source into a unified frame format according to the user-defined constant light, strobe or programmable working mode. The unified frame format includes frame header AA, command word, address, data length, data body and cyclic redundancy check CRC. The encapsulated control command is sent to the slave unit at the corresponding address through the SPI bus. The slave unit receives and parses the command, extracts the specific control parameters and prepares to execute the corresponding drive operation. The power MOSFET driver subsystem is configured as a slave unit. After receiving control commands, the internal microcontroller unit (MCU) parses parameters such as brightness, pulse width, and delay, and configures the timer and pulse width modulation (PWM) output according to the operating mode. The slave unit controls the switching action of the power MOSFET NCE6050A through the gate driver UCC27324, converting the 24V power supply into current pulses that meet the set parameters, driving the external light source to achieve constant brightness, strobe, or programmable sequence lighting. At the same time, the slave unit detects the output current in real time through a sampling resistor and transmits the current value and temperature status back to the master unit via the bus. The host dynamic adjustment and protection control subsystem is configured to periodically collect current detection signals and temperature sensor data during the operation of the slave units. After processing by the MCU, the data is encapsulated into status frames and uploaded to the host via the SPI bus. The host receives and parses the status information of each slave unit to determine whether there are abnormal conditions such as overcurrent or overtemperature. If an abnormality is detected, the host automatically adjusts the output parameters or triggers an alarm protection mechanism, and forcibly shuts down the corresponding channel through an instruction to ensure long-term stable operation of the system.

[0008] Another aspect of the present invention provides a modular adaptive addressing multi-channel high-precision light source control method, comprising the following steps: Step 1: After the master unit powers on, it broadcasts an enumeration command via the bus. Upon receiving the broadcast, each slave unit responds with its unique identifier (UID) within its allocated time slot. The master dynamically assigns a communication address to each slave based on the received UIDs and establishes a slave address mapping table. After addressing is completed, a serial peripheral interface (SPI) communication link based on address identifiers is formed between the master and each slave, enabling unified management and data interaction of multiple slaves by the master. Step 2: The host computer encapsulates information such as brightness value, delay time, pulse width parameter and trigger source into a unified frame format according to the user-defined constant light, strobe or programmable working mode. The unified frame format includes frame header AA, command word, address, data length, data body and cyclic redundancy check CRC. The encapsulated control command is sent to the slave unit at the corresponding address through the SPI bus. The slave unit receives and parses the command, extracts the specific control parameters and prepares to execute the corresponding drive operation. Step 3: After receiving the control command, the slave unit's internal microcontroller (MCU) parses parameters such as brightness, pulse width, and delay, and configures the timer and pulse width modulation (PWM) output according to the working mode. The slave unit controls the switching action of the power MOSFET NCE6050A through the gate driver UCC27324, converting the 24V power supply into current pulses that conform to the set parameters, driving the external light source to achieve constant brightness, strobe, or programmable sequence lighting. At the same time, the slave unit detects the output current in real time through the sampling resistor and transmits the current value and temperature status back to the master unit via the bus. Step four: During operation, the slave unit periodically collects current detection signals and temperature sensor data, processes them through the MCU, encapsulates them into status frames, and uploads them to the host via the SPI bus. The host receives and parses the status information of each slave unit to determine whether there are abnormal conditions such as overcurrent or overtemperature. If an abnormality is detected, the host automatically adjusts the output parameters or triggers an alarm protection mechanism, and forcibly shuts down the corresponding channel through an instruction to ensure long-term stable operation of the system.

[0009] This invention achieves precise control and dynamic management of multiple light sources and possesses comprehensive monitoring and protection functions. During system initialization, a broadcast enumeration and dynamic address allocation mechanism enables automatic identification and networking of slave units, eliminating the need for manual address setting and improving system deployment flexibility and scalability. A serial peripheral interface communication link based on address mapping ensures that the host can perform orderly and reliable centralized control of multiple slave units. In the instruction issuance and execution phase, a unified frame format encapsulates parameters such as operating mode, brightness, and timing, ensuring the structured and standardized nature of control instructions. Slave units, by parsing instructions and driving power MOSFETs, can accurately convert digital control signals into light outputs with specific current, pulse width, and timing characteristics, thereby supporting constant brightness, flickering, and complex programmable lighting modes. Regarding operation monitoring and dynamic adjustment, the system continuously tracks the operating status of each light source by real-time acquisition of output current and temperature data. The host performs anomaly diagnosis based on the returned status information and automatically performs parameter adjustments or channel shutdown operations in case of overcurrent or overtemperature, effectively preventing device damage and improving system reliability and long-term operational stability. Attached Figure Description

[0010] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 This is a block diagram of the modular adaptive addressing multi-channel high-precision light source control system provided in Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of the modular adaptive addressing multi-channel high-precision light source control system provided in Embodiment 1 of the present invention; Figure 3 This is a block diagram of the slave addressing and communication link establishment subsystem provided in Embodiment 2 of the present invention; Figure 4 This is a block diagram of the frame format control instruction issuing subsystem provided in Embodiment 9 of the present invention; Figure 5 This is a block diagram of the power field-effect transistor driving subsystem provided in Embodiment 10 of the present invention; Figure 6 This is a flowchart of the modular adaptive addressing multi-channel high-precision light source control method provided in Embodiment 11 of the present invention; Figure 7 A block diagram of the electronic device provided by the present invention; Figure 8 A block diagram of a computer-readable storage medium provided for this invention; Figure 9 The schematic diagram of the microcontroller provided for this invention. Detailed Implementation

[0011] The technical solutions of the present invention will now be described with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0012] Hereinafter, the terms "first," "second," etc., are used for descriptive convenience only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0013] In this invention, unless otherwise explicitly specified and limited, the term "connection" should be interpreted broadly. For example, "connection" can be a fixed mechanical connection, a detachable mechanical connection, or an integral part; or, "connection" can be a direct connection or an indirect connection through an intermediate medium. Furthermore, unless otherwise explicitly specified and limited, the term "coupling" should be interpreted broadly. For example, "coupling" can be a direct electrical connection, such as physical contact and electrical conduction between two components; it can also be understood as an electrical connection between different components in a circuit structure through physical lines capable of transmitting electrical signals, such as copper foil or wires on a printed circuit board (PCB), to transmit electrical signals; or, "coupling" can be an indirect electrical connection between two components through an intermediate medium; or, "coupling" can be an electrical connection between two components in a non-contact manner, such as an electrical connection between two components using capacitive coupling to transmit electrical signals.

[0014] In this embodiment of the invention, directional terms such as "up," "down," "left," and "right" may be defined relative to the orientation of the components shown in the accompanying drawings. It should be understood that these directional terms can be relative concepts, used for relative description and clarification, and can change accordingly depending on the orientation of the components in the accompanying drawings.

[0015] In the context of automated optical inspection of PCB circuit boards, this invention enables the coordinated control of multi-angle, multi-color-temperature light sources. A ring light source and four strip light sources are deployed above the inspection station, each driven by a slave unit. Each slave unit controls two independent light sources, resulting in a total of eight outputs. All slave units are connected to the same host. Upon system startup, the host sends an enumeration broadcast command via the SPI bus. Upon receiving the command, each of the four slave units extracts a specific byte from its unique identifier (UID), performs an XOR operation and concatenation, generates a unique response delay time, and writes it to a timer. When their respective delay times arrive, each slave unit sequentially sends a response data packet containing its complete UID via the bus. The host records the four UIDs in the order they are received, forming a UID sequence. Position numbers 1 to 4 in the sequence are assigned to the corresponding slave units as communication addresses, and the last two bytes of each UID are stored as a communication verification code associated with the address. The host sets an address polling counter starting from 1 and sequentially sends point-to-point parameter read commands to the four communication addresses. Each command contains the corresponding communication address and communication verification code. After receiving the command, each slave device first checks if the address matches, then checks if the verification code matches the last byte of its own UID. The target slave device that passes the double verification encapsulates its hardware parameters, such as the number of drive channels, maximum output current, temperature protection threshold, and brightness calibration coefficient, and sends them back. Upon receiving this, the master device writes the parameters, along with the UID and communication address, into the address mapping table, completing the registration of the four slave devices. During the detection process, the host computer sets the detection program: the ring light source first provides uniform illumination in a constant brightness mode, followed by four strip light sources flashing sequentially, acquiring images from different angles. The master computer converts the host computer command into a unified frame format and sends it sequentially to the corresponding slave device via the SPI bus. After receiving the command, the slave device configures the timer and PWM output according to the working mode, controls the MOSFET switch through the gate driver, converts the 24V power supply into current pulses that conform to the set parameters, and drives the corresponding light source to light up according to the preset timing. During operation, each slave device periodically collects output current and temperature data and uploads it to the master device via the SPI bus. The host monitors the status of each channel in real time. When the current of a certain strip light source increases abnormally due to aging, the host immediately issues a command to reduce the output brightness of that channel and triggers an alarm to prompt the replacement of the light source, ensuring that the detection process is not affected and the system continues to operate stably.

[0016] Example 1: As Figure 1 As shown, this embodiment of the invention provides a modular adaptive addressing multi-channel high-precision light source control system, comprising: The slave addressing and communication link establishment subsystem is configured such that after the master unit powers on, it broadcasts an enumeration command via the bus. Upon receiving the broadcast, each slave unit responds with its unique identifier (UID) within its assigned time slot. The master dynamically assigns a communication address to each slave based on the received UIDs and establishes a slave address mapping table. After addressing is completed, a serial peripheral interface (SPI) communication link based on address identifiers is formed between the master and each slave, enabling unified management and data interaction of multiple slaves by the master. The frame format control command sending subsystem is configured to encapsulate information such as brightness value, delay time, pulse width parameter and trigger source into a unified frame format according to the user-defined constant light, strobe or programmable working mode. The unified frame format includes frame header AA, command word, address, data length, data body and cyclic redundancy check CRC. The encapsulated control command is sent to the slave unit at the corresponding address through the SPI bus. The slave unit receives and parses the command, extracts the specific control parameters and prepares to execute the corresponding drive operation. The power MOSFET driver subsystem is configured as a slave unit. After receiving control commands, the internal microcontroller unit (MCU) parses parameters such as brightness, pulse width, and delay, and configures the timer and pulse width modulation (PWM) output according to the operating mode. The slave unit controls the switching action of the power MOSFET NCE6050A through the gate driver UCC27324, converting the 24V power supply into current pulses that meet the set parameters, driving the external light source to achieve constant brightness, strobe, or programmable sequence lighting. At the same time, the slave unit detects the output current in real time through a sampling resistor and transmits the current value and temperature status back to the master unit via the bus. The host dynamic adjustment and protection control subsystem is configured to periodically collect current detection signals and temperature sensor data during the operation of the slave units. After processing by the MCU, the data is encapsulated into status frames and uploaded to the host via the SPI bus. The host receives and parses the status information of each slave unit to determine whether there are abnormal conditions such as overcurrent or overtemperature. If an abnormality is detected, the host automatically adjusts the output parameters or triggers an alarm protection mechanism, and forcibly shuts down the corresponding channel through an instruction to ensure long-term stable operation of the system.

[0017] In this embodiment, the host unit, as the central command center in the industrial light source control system, is typically a high-performance industrial computer, PLC (Programmable Logic Controller), or a dedicated main control board. It is responsible for the initialization, configuration, operation scheduling, and status monitoring of the entire lighting network. It receives instructions from the host computer software, touchscreen, or external triggers, such as setting brightness, frequency, and trigger mode, and translates them into specific control commands. As the sole active initiator in the communication link, it uniformly sends instructions and collects data to all subordinate light source drivers or slaves, ensuring the synchronization and coordination of multi-channel light source actions. This is crucial for applications requiring multi-lamp collaboration, such as machine vision, high-speed inspection, or complex lighting sequences. Bus broadcasting is a key communication method for the host to discover and initialize the network during system startup. The host simultaneously sends the same instruction or enumeration instruction to all slave units connected to a shared physical communication line or bus. In industrial light source control, this avoids the tedious process of manually setting addresses for each lamp, enabling plug-and-play modular deployment and greatly improving system integration efficiency and maintainability. Each slave unit corresponds to an independent light source or light source channel and is an intelligent driver module. Its core components include a microcontroller (MCU), communication interface, power drive circuit (MOSFET), and feedback sensor. It receives and parses precise commands from the host, drives power devices, and ultimately controls the current flowing through the LED or other light source, as well as the on / off timing. It monitors its own operating status in real time and reports the data to the host. In industrial applications, each slave unit may drive a strip light source, a ring light source, or a point light source of a specific wavelength, achieving independently controllable lighting for different areas and functions. The UID is a globally unique identification code assigned to each slave unit at the factory, usually stored in the chip's read-only memory. During the initialization of the industrial light source controller, the host does not know in advance which lights are in the network; the UID is the unique identification number for each light. When the host broadcasts an enumeration command, the slave units respond using their respective UIDs, ensuring no identity confusion occurs during network identification. This guarantees that even if there are dozens or hundreds of identical light source modules in the same system, the host can correctly identify them without exception. A communication address is a workstation number dynamically assigned by the host to each identified slave device during system initialization, used for daily operational communication. Unlike lengthy UIDs, communication addresses are typically short numbers. Once established, the host can specify the target slave device using only this short address in all subsequent control commands, greatly improving communication efficiency and command simplicity.The slave address mapping table is a core relationship table established and maintained by the host in memory. It records the one-to-one correspondence between the slave's physical identity (UID) and its logical or communication address, and may also contain the channel's configuration parameters and status information. It is the foundation for the host to achieve precise control, decoupling the user logic layer from the device physical layer. The Serial Peripheral Interface (SPI) communication link is a high-speed, full-duplex, synchronous serial data channel established between the host and multiple slaves. In this system, SPI typically operates in a master-slave mode: high-speed synchronization: the host provides the clock signal, all communication is strictly synchronized, data transmission rate is high, and latency is deterministic, which is crucial for industrial vision lighting requiring precise timing control; the host selects a specific slave address for communication via the chip select line, achieving precise point-to-point command issuance and data feedback, avoiding bus conflicts. While sending control commands, the host can receive status data reported by the slaves, achieving efficient real-time interaction. Constant brightness, strobe, or programmable operating modes define the basic form of the light source's output light signal, which is core to meeting different industrial inspection needs.

[0018] The principles described in the above embodiments are referenced in the appendix. Figure 2 This embodiment achieves precise control and dynamic management of multiple light sources and possesses comprehensive monitoring and protection functions. During system initialization, automatic identification and networking of slave units are achieved through broadcast enumeration and dynamic address allocation mechanisms, eliminating the need for manual address setting and improving the flexibility and scalability of system deployment. A serial peripheral interface communication link based on address mapping ensures that the host can perform orderly and reliable centralized control of multiple slave units. In the instruction issuance and execution phase, a unified frame format encapsulates parameters such as working mode, brightness, and timing, ensuring the structured and standardized nature of control instructions. Slave units, by parsing instructions and driving power MOSFETs, can accurately convert digital control signals into light outputs with specific current, pulse width, and timing characteristics, thereby supporting constant brightness, flickering, and complex programmable lighting modes. Regarding operation monitoring and dynamic adjustment, the system continuously tracks the operating status of each light source by real-time acquisition of output current and temperature data. The host performs anomaly diagnosis based on the returned status information and automatically performs parameter adjustments or channel shutdown operations in the event of overcurrent or overtemperature, effectively preventing device damage and improving system reliability and long-term operational stability.

[0019] In summary, this embodiment achieves efficient, flexible, and reliable control of multi-channel light sources by combining modular design, adaptive addressing, standardized communication, high-precision driving, and closed-loop monitoring and protection technologies. It is suitable for industrial, scientific research, and professional lighting scenarios that require precise light output and systematic management.

[0020] This embodiment features a flexible, expandable light source controller with different functional slave units. It employs a modular architecture of master and slave units, with each master unit capable of connecting up to eight slave units. Each slave unit contains four independent light source drivers, supporting up to 32 output channels. Compared to existing technologies, this system offers the following advantages: it uses broadcast enumeration + time slot response to achieve adaptive slave addressing, allowing for the addition, removal, or replacement of slave units at any location without affecting overall operation; it supports three operating modes: constant brightness, strobe, and programmable, and unifies microsecond-level time reference and dual-scale brightness control. Users can freely set pulse width, delay, and brightness sequence for precise illumination; the motherboard integrates an STM32-based control circuit and a W5500 network interface, supporting serial and Ethernet communication for online upgrades and remote control; the power supply uses a 24V input with a step-down converter, and each channel uses a UCC27324 gate driver in conjunction with a MOSFET switch, featuring overcurrent and overtemperature detection and alarm functions, ensuring stable and reliable long-term operation. Through these improvements, the controller significantly enhances channel scalability, control accuracy, and system reliability, making it suitable for complex and ever-changing industrial vision scenarios.

[0021] Example 2: As Figure 3 As shown, based on Embodiment 1, the slave addressing and communication link establishment subsystem provided in this embodiment of the invention specifically includes: The sequence sorting component is configured such that the master sends an enumeration broadcast command via the SPI bus. After receiving the command, all slave devices calculate a unique response delay time based on a specific byte in their built-in unique identifier UID, and send a response data packet containing their own complete unique identifier UID via the bus when the response delay time arrives. The master receives the response data packets in sequence and records all unique identifier UIDs in the order of receipt, forming a unique identifier UID sequence arranged in chronological order. The address association component is configured so that the host uses the obtained unique identifier (UID) sequence as the allocation basis and assigns a communication address to each unique identifier (UID) in the unique identifier (UID) sequence in sequence. The value of the communication address is equal to the sequence number of the unique identifier (UID) in the unique identifier (UID) sequence. At the same time, the host temporarily associates the communication address with the corresponding unique identifier (UID) as a preliminary addressing identifier for point-to-point communication. The communication establishment component is configured so that the host uses the assigned communication address to establish point-to-point communication with each slave device in sequence, sends a read parameter command to the slave device, and the slave device returns its factory-stored hardware parameters, including the number of drive channels, maximum output current, temperature protection threshold, and brightness calibration coefficient. The host writes the received parameters, along with the corresponding unique identifier (UID) and communication address, into the address mapping table in the internal storage area to form a complete slave device information record. This mapping table is subsequently used by the host to quickly index the slave device configuration through the communication address and generate corresponding control commands and chip select signals.

[0022] In the above embodiments, the process of dynamically allocating communication addresses in this embodiment achieves automatic, orderly, and reliable identification and systematic registration of multiple slave units through the synergistic effect of the technical features in its specific steps. Its technical effects are mainly reflected in the following aspects: First, through a deterministic delayed response mechanism based on a unique identifier (UID), conflict-free and orderly responses from multiple slaves on the bus are achieved. Each slave calculates a unique response delay time based on its unique identifier (UID), ensuring that it sends response data packets in different, non-overlapping time slots; this avoids bus data collisions caused by multiple slaves responding simultaneously, enabling the host to clearly and accurately receive the identification information of all slaves sequentially, laying a reliable data foundation for subsequent orderly address allocation. Second, by directly mapping the receiving order to the communication address allocation strategy, the automation and determinism of address allocation are achieved; the host directly assigns the position number in the sequence of received response data packets as the corresponding unique identifier (UID) as its communication address; the logic is simple and direct, requiring no complex negotiation or conflict detection algorithms, generating a unique and deterministic communication address for each online slave, ensuring the efficiency and unambiguity of the entire addressing process. Finally, through point-to-point communication parameter reading and mapping table construction, systematic registration and centralized management of slave device information were achieved. The host establishes a dedicated communication link with each slave device using the initially assigned address, obtaining its key hardware configuration and performance parameters. After associating the parameters with the slave device's unique identifier (UID) and communication address, the parameters are centrally stored in the address mapping table. As a core system configuration database, the address mapping table enables the host to quickly and accurately index the complete identity information and capability parameters of any slave device based on the communication address, providing necessary data support for differentiated and precise control, resource scheduling, and status monitoring.

[0023] In summary, the dynamic address allocation process in this embodiment combines ordered response, sequential mapping, and information registration to achieve automatic discovery, unique identification, address binding, and information integration of bus-mounted slave units. The result is the construction of a stable, clear, and information-complete underlying communication infrastructure, providing key addressing and device management capabilities for the upper layer to achieve centralized control and collaborative management of multi-channel light sources.

[0024] Example 3: Based on Example 2, the sequence sorting component provided in this embodiment of the invention specifically includes: The byte acquisition sub-component is configured to read four bytes consecutively from the storage space of its own unique identifier UID according to a preset offset address, which are respectively denoted as the first byte, the second byte, the third byte, and the fourth byte; The XOR operation sub-component is configured so that the slave device performs an XOR operation on the first byte and the fourth byte to obtain an intermediate value, which is denoted as the first intermediate value; the slave device performs an XOR operation on the second byte and the third byte to obtain another intermediate value, which is denoted as the second intermediate value; The auto-reload sub-component is configured to concatenate the first and second intermediate values ​​into a 16-bit binary number, with the high eight bits of the 16-bit binary number being the first intermediate value and the low eight bits being the second intermediate value. The slave writes the 16-bit binary number as the base value into the auto-reload register of the timer and starts the timer to begin counting down. The time taken for the timer to decrease from the base value to zero is the response delay time.

[0025] In the above embodiments, this embodiment combines fragment extraction of unique identifiers, lightweight hash transformation based on XOR, and direct driving of hardware timers to achieve a core function: autonomously and deterministically generating a unique and precise response waiting time for each slave node in the network based on its unchangeable unique identity; providing a key time scheduling basis for multiple slaves to achieve time-division multiplexing and conflict-free response on the same bus, avoiding data packet collisions caused by overlapping response times, and ensuring the reliability and orderliness of communication during the enumeration phase.

[0026] Example 4: Based on Example 3, the automatic loading sub-component provided in this embodiment of the invention specifically includes: The register clearing module is configured to write the base value into the timer's auto-reload register, clear the timer's current value register, and set the timer's operating mode to decrementing count mode after the slave device writes the base value into the timer's auto-reload register. The control bit module is configured so that the slave device clears the update event flag of the timer to zero, enables the update interrupt of the timer, and then sets the enable control bit of the timer, so that the timer starts counting down from the base value. The set-up module is configured to decrement the value of the current value register by one for each system master clock pulse received by the timer; when the current value register decrements to zero, the timer hardware automatically sets the update event flag and sends an interrupt request to the microcontroller core of the slave device. The interrupt service module, configured as a slave microcontroller kernel, responds to the interrupt request, enters the interrupt service routine, reads the current value register to confirm that its value is zero, marks the update event as the response time has arrived, and then sends a response data packet containing its own fully unique identifier (UID) via the bus.

[0027] In the above embodiments, this embodiment achieves precise setting of the initial state of the timing by loading the base value into the auto-reload register and clearing the current value register; after configuring it to decrement counting mode and clearing the update event flag, the update interrupt is enabled to ensure that the counting direction matches the interrupt triggering mechanism; after enabling the timer, it gradually decrements the count value according to the system master clock pulse until the current value register is zero. At this time, the hardware automatically sets the update event flag and triggers an interrupt request; the microcontroller kernel responds to the interrupt, verifies the current value to be zero in the service routine and marks the update event as the response time, and then sends a response data packet carrying a unique identifier through the bus; complete timing control from timing start, precise decrement counting to zero value interrupt triggering is achieved, ensuring the predictability and measurability of the response delay time. At the same time, the hardware automatic flag setting and interrupt mechanism reduce the software polling overhead and improve the system real-time performance and reliability.

[0028] Example 5: Based on Example 4, the register clearing module provided in this embodiment of the invention specifically includes: The counting clock selection submodule is configured to allow the slave device to select a clock source from the system master clock frequency division link as the timer's counting clock based on the pulse width adjustment accuracy required for light source control, and to connect the output of the counting clock source to the timer's clock input terminal. The technical operation execution submodule is configured to clear the counting direction control bit in the timer control register, so that the value in the current value register of the timer is decremented by one each time the counting clock arrives, thus realizing the decrementing counting function; The decrementing submodule is configured to set the timer's count start control bit as a slave device. After receiving the first count clock pulse, the timer starts counting down from the base value in the auto-reload register and updates the decremented value to the current value register in real time.

[0029] In the above embodiments, this embodiment selects a specific clock source in the system master clock frequency divider link as the timer counting clock, thereby achieving the matching of the counting frequency with the light source pulse width adjustment accuracy and ensuring the accuracy and adaptability of the time reference. The counting direction control bit is cleared, causing the timer to decrement the current value register by one each time a counting clock pulse arrives, thus establishing a decrementing counting mode. After setting the counting start control bit, the timer starts counting decrementing from the base value of the auto-reload register when the first counting clock pulse is triggered, and updates the current value register value in real time. A precisely controllable decrementing counting timing link is constructed, realizing a complete initialization process from clock source selection and counting direction setting to counting start, providing a stable and configurable hardware timing foundation for measuring response delay time.

[0030] Example 6: Based on Example 5, the counting clock selection submodule provided in this embodiment of the invention specifically includes: The precision word reading unit is configured to read the light source pulse width adjustment precision word from the internal non-volatile memory. The light source pulse width adjustment precision word is written by the slave device at the factory according to the type of the light source it drives, and is used to characterize the minimum pulse width that the slave device can output in subsequent strobe or programmable modes. The period comparison unit is configured to input the system master clock into the cascaded frequency divider network, which consists of multiple frequency divider stages. Each stage outputs a clock signal, and each clock signal is connected to the first input of a digital comparator. The slave device simultaneously inputs the light source pulse width adjustment precision word into the second input of all digital comparators. The digital comparators compare the clock period value corresponding to the light source pulse width adjustment precision word with the actual clock period output by the current frequency divider stage. In the frequency divider stage where the precision word period is greater than or equal to the actual clock period, a high-level strobe signal is output. The signal access unit is configured to connect the strobe signals output by each digital comparator to the clock selection encoder. The encoder generates the corresponding frequency division level selection code according to the position of the strobe signal and writes the frequency division level selection code into the control terminal of the clock multiplexer. The clock multiplexer connects the clock output of the corresponding frequency division level to the clock input pin of the timer, while turning off the outputs of other unselected frequency division levels, thus completing the selection of the counting clock source.

[0031] In the above embodiment, this embodiment obtains the minimum pulse width reference value matching the type of the driving light source by reading the light source pulse width adjustment precision word in the internal non-volatile memory, providing a precision basis for clock source selection. The system master clock is input into a cascaded frequency divider network to generate a multi-stage frequency divider clock signal. The output of each frequency divider stage is connected to the first input terminal of a digital comparator. Simultaneously, the precision word is input in parallel to the second input terminals of all comparators, enabling the comparators to synchronously compare the clock period corresponding to the precision word with the actual frequency divider clock period. In frequency divider stages where the precision word period is greater than or equal to the actual clock period, the comparator outputs a high-level strobe signal, realizing clock period threshold filtering based on precision requirements. The strobe signal is input to the clock selection encoder to generate a frequency divider selection code. This code is written to the clock multiplexer control terminal to drive the multiplexer to connect the corresponding frequency divider clock output to the timer clock input pin and turn off the output of unselected frequency dividers. A complete adaptive clock selection link was constructed, from precision benchmark reading, frequency division network generation, period comparison and screening to encoding gating output. This achieved dynamic matching of the pulse width adjustment accuracy between the counting clock source and the light source, ensuring that the timer counting clock period is not greater than the minimum pulse width required by the system, thereby guaranteeing the accuracy and timing stability of pulse width control at the hardware level.

[0032] Example 7: Based on Example 6, the period comparison unit provided in this embodiment of the invention specifically includes: The pulse counting subunit is configured to receive the clock signal output by the corresponding frequency divider stage for each digital comparator, and to use the clock signal as a counting enable signal to connect to the enable terminal of a period counter that uses the system master clock as the counting pulse; within one complete cycle of the clock signal output by the frequency divider stage, the period counter counts the number of pulses of the system master clock, and obtains the actual period count value of the clock output by the frequency divider stage when the counting ends. The numerical writing unit is configured as a digital comparator to write the actual period count value obtained from the period counter and the light source pulse width adjustment precision word into two independent decrement registers respectively. The two decrement registers start the decrement counting synchronously with the same clock source. The real-time monitoring unit is configured as a digital comparator to monitor the zero flags of two decrementing registers in real time. If the decrementing register corresponding to the light source pulse width adjustment precision word reaches zero before the decrementing register corresponding to the actual period, it is determined that the light source pulse width adjustment precision word is less than the actual period, and a low level is output. If the decrementing register corresponding to the actual period reaches zero before or simultaneously with the decrementing register corresponding to the light source pulse width adjustment precision word, it is determined that the light source pulse width adjustment precision word is greater than or equal to the actual period, and a high level is output.

[0033] In the above embodiments, this embodiment uses the clock signal output from the frequency divider stage as a counting enable signal to drive a period counter with the system master clock as the counting pulse, thereby achieving accurate measurement of the number of master clock pulses within a complete clock cycle and obtaining the actual period count value of the frequency divider stage output clock. The actual period count value and the light source pulse width adjustment precision word are loaded into two independent decrementing registers, and the decrementing count is started synchronously with the same clock source to ensure the timing consistency of the comparison process. By monitoring the zero flag state of the two decrementing registers in real time, if the decrementing register corresponding to the precision word reaches zero before the actual period decrementing register, it is determined that the precision word period is less than the actual period, and a low level is output; if the actual period decrementing register reaches zero before or simultaneously with the precision word decrementing register, it is determined that the precision word period is greater than or equal to the actual period, and a high level is output. A period comparison mechanism based on synchronous decrementing counting is constructed, realizing hardware parallel comparison of the precision word period and the actual clock period, avoiding the delay of software intervention, improving the comparison speed and determinism, and providing a real-time and reliable determination signal for clock source selection.

[0034] Example 8: Based on Example 2, the communication establishment component provided in this embodiment of the invention specifically includes: The relationship establishment sub-component is configured so that the host reads the last two bytes of each unique identifier UID from the obtained sequence of unique identifiers UID, uses the two bytes as the communication verification code of the corresponding slave, and stores them in association with the slave's assigned communication address to form a mapping table between address and verification code. The address polling subcomponent is configured to set an address polling counter for the host, with an initial value of one. Based on the current value of the address polling counter, the host extracts the corresponding communication address and communication verification code from the corresponding relationship table, and encapsulates these two data into the address field and verification field of the point-to-point read parameter instruction, and then broadcasts the instruction through the SPI bus. The byte comparison sub-component is configured so that after all slave devices receive an instruction on the SPI bus, they each parse the communication address and communication verification code from the instruction. Each slave device first compares the parsed communication address with its own previously obtained communication address. If they match, it further compares the parsed communication verification code with the last two bytes of its own unique identifier (UID). If they match, the slave device is identified as the target slave device for this communication, and its factory-stored hardware parameters are encapsulated into a response data packet, which is then sent back to the master device via the SPI bus. The address mapping subcomponent is configured so that after the host sends a command, it enters a waiting state. If it receives hardware parameters returned by the slave within a preset waiting time window, it writes the hardware parameters, the currently used communication address, and the corresponding unique identifier (UID) into the address mapping table in the internal storage area, thus completing the information recording of the slave. Subsequently, the host increments the address polling counter. If the incremented counter is less than or equal to the total number of recorded unique identifier (UID) sequences, the process is repeated until all identified slaves have been accessed. If the host does not receive any response data within the waiting time window, it determines that the slave communication corresponding to the current communication address is abnormal. The host marks the communication address as missing and directly increments the address polling counter by one, continuing to process the next communication address until the value of the address polling counter exceeds the total number of unique identifier (UID) sequences.

[0035] In the above embodiments, this embodiment extracts the last two bytes of the unique identifier (UID) as a communication verification code and stores it in association with the allocated communication address, establishing a mapping relationship between the address and verification information, providing the host with a basis for addressing and identity verification. The host extracts the communication address and verification code sequentially through an address polling counter, encapsulates them into a point-to-point read parameter command, and broadcasts it, realizing ordered polling access to the slave devices. After receiving the command, all slave devices first compare whether the communication address matches their own. If they match, they further verify the conformity of the communication verification code with the last byte of their own UID. This double verification mechanism ensures that only the target slave device responds, avoiding false responses from non-target devices. The host receives response data within the waiting time window. After successful reception, it writes the hardware parameters, address, and UID into the address mapping table, completing the slave device information recording. If there is no response after timeout, the address is marked as missing. After each communication ends, the address polling counter increments until it covers all UID sequences, ensuring that all identified slave devices are traversed and accessed. A point-to-point communication link based on address polling and dual authentication was constructed, enabling the host to access multiple slave devices in an orderly and reliable manner, effectively distinguishing between normal and abnormal nodes, and systematically completing the collection and storage of slave device information, providing a complete equipment information foundation for network control.

[0036] Example 9: As Figure 4 As shown, based on Embodiment 1, the frame format control instruction issuing subsystem provided in this embodiment of the invention specifically includes: The numerical conversion component is configured so that the host extracts the parameter configuration template corresponding to the mode set by the user, such as constant brightness, strobe, or programmable working mode, from the internally stored mode parameter mapping table. The parameter configuration template specifies the type identifier, value range, and arrangement order of the required parameters in the data body. The host writes the brightness value, delay time, pulse width parameter, and trigger source information input by the user into the parameter buffer in the order specified by the parameter configuration template. At the same time, a type identifier byte is added to each parameter. The high four bits of the identifier byte indicate the parameter category, and the low four bits indicate the parameter's sequence number in the parameter configuration template. The actual value of the parameter is converted into a binary format consistent with the time base and brightness scale agreed upon by the slave device. The field filling component is configured so that the host reads the communication address of the target slave from the established address mapping table and writes the address into the address field of the frame format; then, the host counts the total number of all parameter identifier bytes and parameter data bytes in the parameter buffer and writes the value into the data length field; the host writes the fixed frame header AA into the frame header field and retrieves the corresponding command word from the command word mapping table according to the current working mode and writes it into the command word field, thus completing the filling of all fields in the frame structure except for the check field; The verification generation component is configured so that the host sequentially sends the filled frame header, command word, address, data length, and the entire data body into the cyclic redundancy check generator. The cyclic redundancy check generator uses the same linear feedback shift register structure as the generator polynomial preset by all slave devices. It performs bit-by-bit XOR and shift operations on the input byte stream to finally obtain a four-byte check code. The host writes the check code into the check field at the end of the frame to form a complete unified control frame, ready to be sent to the corresponding slave device via the SPI bus.

[0037] The frame format control instruction sending subsystem converts the user's physical quantity input, such as time and brightness percentage, into digital configuration values ​​that can be directly used by the slave MCU peripherals, timers, and ADCs; this is mainly achieved through dimensional conversion and linear mapping.

[0038] The digital conversion of time parameters, the user-defined delay and pulse width are usually milliseconds (ms) or microseconds (µs). Physical time at the s) level; the slave MCU's timer counts based on the system clock cycle; converting physical time into timer count values ​​ensures that the timing of slave execution is consistent with the user settings; set up: This indicates user-defined time parameters, such as delay time and pulse width, in seconds (s). This indicates the clock frequency of the slave timer, measured in Hertz (Hz). ; Represents the prescaler value of the timer, dimensionless; This represents the count value written to the timer register after conversion; it is dimensionless.

[0039] Formula expression:

[0040] Dimensional check representation: Molecular representation The unit is (Dimensionless); Denominator represents Dimensionless; results expressed Dimensionless, which meets the requirements for count values.

[0041] The association with Example 10 indicates that the formula calculates... This value will be encapsulated into a data body. The pulse width period value mapper in Example 10 reads this value and writes it into the timer's auto-reload register.

[0042] The digital conversion of brightness parameters represents a user-defined brightness value, typically ranging from 0% to 100%. The slave device controls brightness via the duty cycle of pulse width modulation (PWM), requiring the setting of a timer's comparison value. This formula linearly maps the percentage brightness to the PWM comparison value.

[0043] This represents the user-defined percentage of brightness, is dimensionless, and ranges from [0, 1]. For example, 50% is equivalent to 0.5. This represents the timer's auto-reload value, i.e., the count value of the PWM cycle, and is dimensionless. This value can be obtained from... It is determined when setting the PWM period; This represents the dimensionless count value written to the timer capture / compare register (CCR) after conversion.

[0044] Formula expression:

[0045] Dimensional inspection indicates that, Dimensionless Dimensionless, product It is also dimensionless, which meets the requirements for comparison values. The formula calculates... This value will be encapsulated into the data body, and the brightness comparison value mapper reads this value and writes it into the timer's capture / compare register.

[0046] Cyclic Redundancy Check (CRC) calculation ensures the integrity of communication frames during transmission. The host performs polynomial division on the entire frame except for the check field, and appends the remainder as the check code to the end of the frame. After receiving the frame, the slave calculates the check code in the same way and compares it with the received check code to determine whether the data has been corrupted during transmission.

[0047] This represents the original message to be verified, including the frame header, command word, address, data length, and binary polynomial of the data body. The master and slave devices have pre-defined generator polynomials, such as the standard CRC-32 polynomial: ; Represents the quotient of a division operation (ignored). This represents the remainder of the division operation, which is the binary polynomial of the calculated CRC checksum.

[0048] formula:

[0049] The formula is implemented in hardware or software using a linear feedback shift register (LFSR); it is not a simple arithmetic formula, but an algebraic polynomial division process.

[0050] In the above embodiments, this embodiment realizes a systematic conversion and encapsulation process from user parameter input to the generation of a complete communication frame; it ensures that the control commands meet the slave device parsing requirements in terms of content, format and transmission reliability, and provides complete frame construction support for the master to accurately and reliably issue working mode control commands to a specific slave device.

[0051] Example 10: As Figure 5 As shown, based on Embodiment 1, the power field-effect transistor driving subsystem provided in this embodiment of the invention specifically includes: The hardware link connection component is configured to extract the working mode identifier from the received instruction, use the identifier as an index pointer to read the corresponding timer working mode word and output comparison mode word from the mode configuration table stored in the internal read-only memory, and write them into the high and low bits of the timer control register to complete the hardware link connection of the timer working mode. The counting value reading component is configured such that the slave device takes the brightness value in the instruction as an input parameter and sends it to the brightness comparison value mapper. The mapper uses the brightness value as an address to read the corresponding comparison count value from the factory-preset brightness-comparison value mapping table and writes it to the capture comparison register of the timer output comparison channel. At the same time, the slave device takes the pulse width parameter in the instruction as an input and sends it to the pulse width period value mapper. The pulse width-period value mapper reads the corresponding period count value from the factory-preset pulse width-period value mapping table and writes it to the timer's auto-reload register. The pulse output component is configured to have the slave device write the trigger signal selection code parsed from the trigger source field in the instruction into the trigger selection bit of the slave mode control register of the timer, clear the current value register of the timer, and set the enable control bit of the timer. After detecting the trigger signal, the timer starts to count down. The current value register is decremented by one for each clock cycle. When the current value is equal to the comparison value in the capture comparison register, the output pin level flips, completing one PWM pulse output.

[0052] In the power MOSFET driver subsystem, the slave MCU receives the digital configuration value and, through the hardware logic of the timer, accurately converts it into the PWM waveform that drives the MOSFET.

[0053] The calculation of the PWM output high-level time describes the time the slave device receives the calculated output high-level time. and Then, the actual physical signal characteristics are generated; this formula reverses the timer count value back to physical time, proving that the control loop is closed.

[0054] This indicates the duration of the high-level pulse in seconds (s). Indicates the capture / compare register value. This indicates the prescaler value of the timer. This indicates the timer clock frequency.

[0055] formula:

[0056] Dimensional check: Molecular weight: Dimensionless, denominator: Units are ,result: .

[0057] The PWM period and frequency calculation defines the period and frequency of the PWM signal output by the slave device, which are the core parameters of the strobe mode.

[0058] This indicates the period of the PWM signal, in seconds (s). This indicates the frequency of the PWM signal, measured in Hertz (Hz). This indicates the value of the automatic reload register; Indicates the prescaler value of the timer; This indicates the timer clock frequency.

[0059] formula:

[0060] The actual output duty cycle verified that the final output brightness (duty cycle) of the slave device matched the brightness set by the user. Totally consistent. This represents the duty cycle of the PWM signal and is dimensionless.

[0061] formula:

[0062] Formula Substitute the values ​​and approximately ignore the rounding error:

[0063] when When it is large enough, that is, when the PWM resolution is high enough, ,therefore:

[0064] The formulas together prove that the physical quantity set by the user ( Starting with digital encapsulation and transmission, followed by hardware configuration and driving, the final output is optical light. The system is mathematically consistent with the user settings, achieving high-precision control as described in the system description.

[0065] In the above embodiments, this embodiment realizes the complete driving process from instruction parsing to PWM pulse output. Through hardware link configuration, parameter mapping conversion, and trigger control output, the received instruction parameters such as mode, brightness, pulse width, and trigger source are converted into the specific working configuration and counting reference of the timer. Finally, under the control of the trigger signal, a PWM pulse signal that meets the instruction requirements is generated, providing accurate and reliable timing control support for driving the power MOSFET.

[0066] Example 11: As Figure 6 As shown, based on Embodiments 1-10, the modular adaptive addressing multi-channel high-precision light source control method provided by this invention includes the following steps: Step S100: After the master unit is powered on, it broadcasts an enumeration command via the bus. After receiving the broadcast, each slave unit responds with its own unique identifier (UID) within its allocated time slot. The master dynamically assigns a communication address to each slave according to the order of the received unique identifiers (UIDs) and establishes a slave address mapping table. After addressing is completed, a serial peripheral interface (SPI) communication link based on address identifiers is formed between the master and each slave, realizing unified management and data interaction of multiple slaves by the master. Step S200: The host encapsulates information such as brightness value, delay time, pulse width parameter and trigger source into a unified frame format according to the user-defined constant light, strobe or programmable working mode. The unified frame format includes frame header AA, command word, address, data length, data body and cyclic redundancy check CRC. The encapsulated control command is sent to the slave unit at the corresponding address through the SPI bus. The slave unit receives and parses the command, extracts the specific control parameters and prepares to execute the corresponding drive operation. Step S300: After receiving the control command, the slave unit parses the parameters such as brightness, pulse width, and delay by the internal microcontroller unit (MCU), and configures the timer and pulse width modulation (PWM) output according to the working mode. The slave unit controls the switching action of the power MOSFET NCE6050A through the gate driver UCC27324 to convert the 24V power supply into current pulses that meet the set parameters, driving the external light source to achieve constant brightness, strobe, or programmable sequence lighting. At the same time, the slave unit detects the output current in real time through the sampling resistor and transmits the current value and temperature status back to the master unit through the bus. Step S400: During operation, the slave unit periodically collects current detection signals and temperature sensor data, processes them through the MCU, encapsulates them into status frames, and uploads them to the host via the SPI bus. The host receives and parses the status information of each slave unit to determine whether there are abnormal conditions such as overcurrent or overtemperature. If an abnormality is detected, the host automatically adjusts the output parameters or triggers an alarm protection mechanism, and forcibly shuts down the corresponding channel through an instruction to ensure long-term stable operation of the system.

[0067] In the above embodiments, the modular adaptive addressing multi-channel high-precision light source control method of this embodiment achieves high-precision, scalable, reliable, and efficient control of multi-channel light sources through the coordinated cooperation of technical features in each step. Its technical effects are specifically reflected in the following aspects: First, through dynamic addressing and address mapping mechanisms, automatic identification and address allocation of multiple slave units are realized, constructing an SPI communication link based on address identifiers; avoiding the configuration complexity and expansion limitations brought about by traditional fixed address allocation, supporting flexible increases or decreases in the number of slaves, and improving the modularity and scalability of the system. Second, through unified instruction frame format encapsulation and parsing, and instruction distribution based on the SPI bus, centralized control of the operating modes and parameters of multiple slaves by the host is realized; ensuring the standardization and reliability of control instruction transmission, enabling the host to accurately send complex control parameters, including brightness, delay, and pulse width, to designated slaves, achieving precise management of various operating modes such as constant brightness, strobe, and programmable sequence lighting. The slave unit internally uses a microcontroller to parse parameters and configure timers and PWM outputs. Combined with a drive circuit consisting of a gate driver and power MOSFETs, it accurately converts control commands into adjustable current pulse outputs. This allows each channel to independently and accurately drive an external light source, achieving high-precision brightness and timing control to meet the light output quality requirements of different application scenarios. Finally, through a real-time status monitoring and feedback mechanism, the system achieves closed-loop control and fault protection. The slave unit periodically collects output current and temperature data and reports it to the host. The host then performs status monitoring and anomaly diagnosis based on this data. Once an anomaly such as overcurrent or overtemperature is detected, the system can automatically adjust parameters or trigger a protection mechanism to forcibly shut down the abnormal channel, thereby effectively preventing equipment damage and ensuring the long-term stability and safety of the system.

[0068] In summary, this embodiment organically combines modular design, adaptive addressing, unified communication protocol, high-precision drive output, and closed-loop status monitoring to construct a multi-channel light source control system with high-precision control capabilities, good scalability, high reliability, and intelligent management functions.

[0069] Figure 7 A block diagram of an exemplary electronic device suitable for implementing embodiments of the present invention is shown.

[0070] Electronic devices may include a central processing unit / microprocessor / main control chip; and a storage medium coupled to the central processing unit / microprocessor / main control chip, wherein computer-executable instructions are stored for performing the steps of various methods of embodiments of the present invention when executed by a processor.

[0071] The central processing unit / microprocessor / main control chip may include, but is not limited to, one or more processors or microprocessors.

[0072] Storage media may include, but are not limited to, random access memory (RAM), read-only memory (ROM), flash memory, EPROM memory, EEPROM memory, registers, and computer storage media (such as hard disks, floppy disks, solid-state drives, removable disks, and CDs). ROM, DVD ROM, Blu-ray discs, etc.

[0073] In addition, the electronic device may include (but is not limited to) a data bus, an input / output bus / external bus / device bus, a display, and input / output devices (e.g., keyboard, mouse, speaker, etc.).

[0074] The central processing unit / microprocessor / main control chip can communicate with external devices via wired or wireless networks (not shown) through input / output buses / external buses / device buses.

[0075] The storage medium may also store at least one computer-executable instruction for performing the steps of various functions and / or methods in the embodiments described herein when the central processing unit / microprocessor / main control chip is running.

[0076] In one embodiment, the at least one computer-executable instruction may also be compiled into or comprise a software product, wherein one or more computer-executable instructions are executed by a processor to perform the steps of the various functions and / or methods in the embodiments described herein.

[0077] Figure 8 A schematic diagram of a computer-readable storage medium according to an embodiment of the present invention is shown.

[0078] like Figure 8 As shown, instructions, such as computer-readable instructions, are stored on a non-transitory computer-readable storage medium. When the computer-readable instructions are executed by a processor, the various methods described above can be performed. The non-transitory computer-readable storage medium includes, but is not limited to, volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory. Non-transitory non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. For example, the non-transitory computer-readable storage medium can be connected to a computing device such as a computer, and then, when the computing device executes the computer-readable instructions stored on the non-transitory computer-readable storage medium, the various methods described above can be performed.

[0079] The light source controller in this embodiment includes a master unit and at least one slave unit, with each slave unit connected to the master unit via a bus. The master unit consists of a microcontroller, a network interface, a power module, a human-machine interface, and several chip select outputs. The power module converts the external 24V input to 5V and 3.3V via a synchronous buck chip and an LDO to power the logic circuits. like Figure 9 As shown, the microcontroller uses the STM32G431 series and has multiple built-in SPI, UART and timer resources. Among them, SPI3 communicates with the W5500 network chip, and SPI2 and the multi-channel chip select are connected to multiple slave devices respectively. The buttons and digital tubes form a local operation interface through the TM1637 interface. The UART interface is used for external serial communication or upgrades.

[0080] The master detects and enumerates slave devices by broadcasting commands, assigns an address to the slave device based on the responding UID, and then sends various control commands via SPI in a unified frame format, including AA header, command word, address, length, data, and CRC.

[0081] Each slave unit includes a power conversion module, a drive module, and a control interface: the power conversion module obtains power from the host's 24V bus, converts it to 5V via DC / DC conversion, and then linearly regulates it to 3.3V; the drive module includes four UCC27324 gate drivers, four NCE6050A power MOSFETs, Schottky diodes, and current sampling resistors, each capable of driving a load of over 1A and detecting the output current through an operational amplifier; During system operation, the master unit controls each slave unit according to three modes: In normal mode, the master unit directly sends brightness values ​​and on / off commands, and the slave unit controls the light source according to the set duty cycle; in strobe mode, the master and slave units work independently, accurately controlling the light source to blink according to the specified trigger source, delay, and pulse width through a timer; in programmable mode, the master unit sends up to 64 lines of instruction sequences, including instructions for setting channels, brightness, delay, and loop, to the slave unit's MCU. The hardware trigger source for both the master and slave units is the master unit's trigger pin 1. The master and slave units use a single IO of the communication interface for trigger synchronization, and the slave units execute sequentially according to a microsecond-level time base.

[0082] Each slave device periodically uploads current, temperature, and alarm status data, and the master device dynamically adjusts based on the feedback. When a firmware update is needed, the master device can enter the slave device's Bootloader mode via frame commands, transmit the program in segments, and upgrade the slave device.

[0083] In the embodiments provided by this invention, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between systems or units may be electrical, mechanical, or other forms.

[0084] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0085] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0086] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for executing all or part of the steps of the methods of the various embodiments of the present invention through a computer device (which may be a personal computer, a server, or a network device, etc.). The aforementioned storage medium includes: USB flash drive, portable hard drive, read-only memory (Read-Only Memory). ROM (Read-Only Memory), RAM (Random Access Memory), magnetic disks, optical disks, and other media that can store program code.

[0087] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A modular adaptive addressing multi-channel high-precision light source control system, characterized in that, Include: The slave addressing and communication link establishment subsystem is configured such that after the master unit is powered on, it broadcasts an enumeration command via the bus. After receiving the broadcast, each slave unit responds with its own unique identifier within its allocated time slot. The master dynamically assigns a communication address to each slave based on the order of the received unique identifiers and establishes a slave address mapping table. After addressing is completed, a serial peripheral interface communication link based on address identifier is formed between the host and each slave, realizing unified management and data interaction of multiple slaves by the host; The frame format control instruction sending subsystem is configured so that the host encapsulates the content of the working mode into a unified frame format according to the user-defined constant light, strobe or programmable working mode; the slave unit executes the corresponding drive operation according to the encapsulated control instruction. The power MOSFET driver subsystem is configured to resolve the brightness, pulse width, and delay parameters by the internal microcontroller unit, and configure the timer and pulse width modulation (PWM) output according to the operating mode. The slave device controls the switching action of the power MOSFET through the gate driver, driving an external light source to achieve constant brightness, strobe, or programmable sequence lighting.

2. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 1, characterized in that, The slave addressing and communication link establishment subsystem specifically includes: The sequence sorting component is configured such that the master sends an enumeration broadcast command via the SPI bus. After receiving the command, all slave devices calculate a unique response delay time based on a specific byte in their built-in unique identifier UID, and send a response data packet containing their own complete unique identifier UID via the bus when the response delay time arrives. The master receives the response data packets in sequence and records all unique identifier UIDs in the order of receipt, forming a unique identifier UID sequence arranged in chronological order. The address association component is configured so that the host uses the obtained unique identifier (UID) sequence as the allocation basis and assigns a communication address to each unique identifier (UID) in the unique identifier (UID) sequence in sequence. The value of the communication address is equal to the sequence number of the unique identifier (UID) in the unique identifier (UID) sequence. At the same time, the host temporarily associates the communication address with the corresponding unique identifier (UID) as a preliminary addressing identifier for point-to-point communication. The communication establishment component is configured so that the host uses the assigned communication address to establish point-to-point communication with each slave device in sequence, sends a read parameter command to the slave device, and the slave device returns its factory-stored hardware parameters, including the number of drive channels, maximum output current, temperature protection threshold, and brightness calibration coefficient, etc. The host writes the received parameters, along with the corresponding unique identifier UID and communication address, into the address mapping table in the internal storage area to form a complete slave device information record.

3. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 2, characterized in that, The sequence sorting component specifically includes: The byte acquisition sub-component is configured to read four bytes consecutively from the storage space of its own unique identifier UID according to a preset offset address, which are respectively denoted as the first byte, the second byte, the third byte, and the fourth byte; The XOR operation sub-component is configured so that the slave device performs an XOR operation on the first byte and the fourth byte to obtain an intermediate value, which is denoted as the first intermediate value; the slave device performs an XOR operation on the second byte and the third byte to obtain another intermediate value, which is denoted as the second intermediate value; The auto-reload sub-component is configured to concatenate the first and second intermediate values ​​into a 16-bit binary number, with the high eight bits of the 16-bit binary number being the first intermediate value and the low eight bits being the second intermediate value. The slave writes the 16-bit binary number as the base value into the auto-reload register of the timer and starts the timer to begin counting down. The time taken for the timer to decrease from the base value to zero is the response delay time.

4. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 3, characterized in that, Automatically loads sub-components, specifically including: The register clearing module is configured to write the base value into the timer's auto-reload register, clear the timer's current value register, and set the timer's operating mode to decrementing count mode after the slave device writes the base value into the timer's auto-reload register. The control bit module is configured so that the slave device clears the update event flag of the timer to zero, enables the update interrupt of the timer, and then sets the enable control bit of the timer, so that the timer starts counting down from the base value. The set-up module is configured to decrement the value of the current value register by one for each system master clock pulse received by the timer; when the current value register decrements to zero, the timer hardware automatically sets the update event flag and sends an interrupt request to the microcontroller core of the slave device. The interrupt service module, configured as a slave microcontroller kernel, responds to the interrupt request, enters the interrupt service routine, reads the current value register to confirm that its value is zero, marks the update event as the response time has arrived, and then sends a response data packet containing its own fully unique identifier (UID) via the bus.

5. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 4, characterized in that, The register clearing module specifically includes: The counting clock selection submodule is configured to allow the slave device to select a clock source from the system master clock frequency division link as the timer's counting clock based on the pulse width adjustment accuracy required for light source control, and to connect the output of the counting clock source to the timer's clock input terminal. The technical operation execution submodule is configured to clear the counting direction control bit in the timer control register, so that the value in the current value register of the timer is decremented by one each time the counting clock arrives, thus realizing the decrementing counting function; The decrementing submodule is configured to set the timer's count start control bit as a slave device. After receiving the first count clock pulse, the timer starts counting down from the base value in the auto-reload register and updates the decremented value to the current value register in real time.

6. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 5, characterized in that, The counting clock selection submodule specifically includes: The precision word reading unit is configured to read the light source pulse width adjustment precision word from the internal non-volatile memory. The light source pulse width adjustment precision word is written by the slave device at the factory according to the type of the light source it drives, and is used to characterize the minimum pulse width that the slave device can output in subsequent strobe or programmable modes. The period comparison unit is configured to input the system master clock into the cascaded frequency divider network, which consists of multiple frequency divider stages. Each stage outputs a clock signal, and each clock signal is connected to the first input of a digital comparator. The slave device simultaneously inputs the light source pulse width adjustment precision word into the second input of all digital comparators. The digital comparators compare the clock period value corresponding to the light source pulse width adjustment precision word with the actual clock period output by the current frequency divider stage. In the frequency divider stage where the precision word period is greater than or equal to the actual clock period, a high-level strobe signal is output. The signal access unit is configured to connect the strobe signals output by each digital comparator to the clock selection encoder. The encoder generates the corresponding frequency division level selection code according to the position of the strobe signal and writes the frequency division level selection code into the control terminal of the clock multiplexer. The clock multiplexer connects the clock output of the corresponding frequency division level to the clock input pin of the timer, while turning off the outputs of other unselected frequency division levels, thus completing the selection of the counting clock source.

7. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 6, characterized in that, The periodic comparison unit specifically includes: The pulse counting subunit is configured to receive the clock signal output by the corresponding frequency divider stage for each digital comparator, and to use the clock signal as a counting enable signal to connect to the enable terminal of a period counter that uses the system master clock as the counting pulse; within one complete cycle of the clock signal output by the frequency divider stage, the period counter counts the number of pulses of the system master clock, and obtains the actual period count value of the clock output by the frequency divider stage when the counting ends. The numerical writing unit is configured as a digital comparator to write the actual period count value obtained from the period counter and the light source pulse width adjustment precision word into two independent decrement registers respectively. The two decrement registers start the decrement counting synchronously with the same clock source. The real-time monitoring unit is configured as a digital comparator to monitor the zero flags of two decrementing registers in real time. If the decrementing register corresponding to the light source pulse width adjustment precision word reaches zero before the decrementing register corresponding to the actual period, it is determined that the light source pulse width adjustment precision word is less than the actual period, and a low level is output. If the decrement register corresponding to the actual period reaches zero before or simultaneously with the decrement register corresponding to the light source pulse width adjustment precision word, then it is determined that the light source pulse width adjustment precision word is greater than or equal to the actual period, and a high level is output.

8. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 1, characterized in that, The frame format control command sending subsystem is configured so that the host encapsulates the brightness value, delay time, pulse width parameter and trigger source information into a unified frame format according to the user-defined constant brightness, strobe or programmable working mode; the encapsulated control command is sent to the slave unit at the corresponding address through the serial peripheral interface bus, the slave unit receives and parses the command, extracts the specific control parameters, and prepares to execute the corresponding drive operation; The power MOSFET driver subsystem is configured as a slave unit that receives control commands, and then uses the internal microcontroller unit to parse the brightness, pulse width, and delay parameters, and configures the timer and pulse width modulation (PWM) output according to the working mode. The slave device controls the switching action of the power MOSFET through the gate driver, converting the 24V power supply into current pulses that meet the set parameters, driving the external light source to achieve constant brightness, strobe, or programmable sequence lighting; at the same time, the slave device detects the output current in real time through the sampling resistor, and transmits the current value and temperature status back to the master device through the bus.

9. The modular adaptive addressing multi-channel high-precision light source control system as described in claim 1, characterized in that, The host dynamic adjustment and protection control subsystem is configured to periodically collect current detection signals and temperature sensor data during the operation of the slave unit. After processing by the internal microcontroller unit, the data is encapsulated into status frames and uploaded to the host through the serial peripheral interface bus. The host receives and parses the status information of each slave unit to determine whether there are overcurrent or overtemperature abnormalities. If an anomaly is detected, the host will automatically adjust the output parameters or trigger an alarm protection mechanism, and forcibly shut down the corresponding channel through a command.

10. A modular adaptive addressing multi-channel high-precision light source control method, used to implement the modular adaptive addressing multi-channel high-precision light source control system as described in any one of claims 1 to 9, characterized in that, Includes the following steps: After the master unit is powered on, it broadcasts an enumeration command via the bus. After receiving the broadcast, each slave unit responds with its own unique identifier (UID) within its allocated time slot. The master unit dynamically assigns a communication address to each slave unit according to the order of the received unique identifiers (UIDs) and establishes a slave address mapping table. After addressing is completed, a serial peripheral interface (SPI) communication link based on address identifier is formed between the master and each slave, enabling the master to manage and interact with multiple slaves in a unified manner. The host encapsulates the brightness value, delay time, pulse width parameter and trigger source information into a unified frame format according to the user-defined constant light, strobe or programmable working mode. The unified frame format includes frame header AA, command word, address, data length, data body and cyclic redundancy check CRC. The encapsulated control command is sent to the slave unit at the corresponding address through the SPI bus. The slave unit receives and parses the command, extracts the specific control parameters and prepares to execute the corresponding drive operation. After receiving the control command, the slave unit's internal microcontroller (MCU) parses the brightness, pulse width, and delay parameters, and configures the timer and pulse width modulation (PWM) output according to the operating mode. The slave unit controls the switching action of the power MOSFET NCE6050A through the gate driver UCC27324, converting the 24V power supply into current pulses that conform to the set parameters, driving the external light source to achieve constant brightness, strobe, or programmable sequence lighting. At the same time, the slave unit detects the output current in real time through a sampling resistor and transmits the current value and temperature status back to the master unit via the bus. During operation, the slave unit periodically collects current detection signals and temperature sensor data. After processing by the MCU, the data is encapsulated into a status frame and uploaded to the host via the SPI bus. The host receives and parses the status information of each slave unit to determine whether there are any overcurrent or overtemperature abnormalities. If an anomaly is detected, the host will automatically adjust the output parameters or trigger an alarm protection mechanism, and forcibly shut down the corresponding channel through a command.

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