A multilayer circuit board resistant to oxidation and corrosion
By employing a gradient composite anti-oxidation barrier structure and a stepped labyrinth sealing design for multilayer circuit boards, the problem of oxidation and corrosion resistance in complex environments is solved, thereby improving signal transmission reliability and service life.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NINGBO ANBEI INTELLIGENT CONTROL TECH CO LTD
- Filing Date
- 2026-06-12
- Publication Date
- 2026-07-31
AI Technical Summary
Existing multilayer circuit boards lack sufficient resistance to oxidation and corrosion in humid, dusty, or fluctuating environments, leading to changes in circuit conductivity and signal transmission performance. Vias and pads are also susceptible to environmental factors, resulting in a shortened lifespan.
It adopts a multi-layer structure design, including a top solder mask layer, a conductive circuit layer, a gradient composite anti-oxidation barrier layer, an insulating dielectric layer, a shielding barrier layer, a bottom circuit layer, and a peripheral protective layer. Combined with a stepped labyrinth seal structure and a through-hole composite seal, it forms all-round protection.
It achieves all-round protection against oxidation and corrosion of circuit boards, enhances interlayer bonding, reduces structural delamination and cracking, and improves signal transmission reliability and service life.
Smart Images

Figure CN122496981A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of printed circuit board manufacturing technology, specifically to a multilayer circuit board resistant to oxidation and corrosion. Background Technology
[0002] Circuit boards are fundamental components in electronic devices that enable electrical connections between components. Their environmental resistance and lifespan significantly impact the overall operational status of the equipment. Currently, conventional multilayer circuit boards are structurally and environmentally friendly, making them suitable for most common operating environments.
[0003] As the application scenarios of electronic devices continue to expand, higher demands are placed on the oxidation and corrosion resistance of circuit boards in humid, dusty, or temperature-fluctuating environments. The surface protection of ordinary circuit boards is mostly based on traditional solder mask structures. Under long-term complex environmental conditions, external media can still gradually affect the internal circuitry, causing changes in the conductivity and signal transmission performance. Furthermore, the interlayer mating and edge structures of circuit boards often follow conventional designs. Under continuous environmental stress, media may gradually penetrate along the interlayer and edge areas, affecting the internal structure. Vias and pads, as key structures of circuit boards, are also susceptible to environmental factors during long-term use, leading to oxidation, changes in solder reliability, and difficulty in maintaining ideal performance. Therefore, we propose a multilayer circuit board that is resistant to oxidation and corrosion. Summary of the Invention
[0004] To address the aforementioned technical problems, this application provides a multilayer circuit board resistant to oxidation and corrosion, comprising, from top to bottom: a top solder mask layer, a top circuit layer, an upper gradient composite anti-oxidation barrier layer, an upper insulating dielectric layer, an inner first circuit layer, an intermediate composite shielding barrier layer, an inner second circuit layer, a lower insulating dielectric layer, a lower gradient composite anti-oxidation barrier layer, a bottom circuit layer, a bottom solder mask layer, and a peripheral protective layer surrounding the outer perimeter of the circuit board; the peripheral protective layer has a trapezoidal cross-section and covers the edge of the circuit board.
[0005] In some embodiments, both the upper gradient composite anti-oxidation barrier layer and the lower gradient composite anti-oxidation barrier layer are three-layer composite structures, which are respectively composed of an inner bonding layer, a middle dense oxygen barrier layer and an outer flexible buffer layer.
[0006] In some embodiments, the inner bonding layer is a composite layer of silane coupling agent and nano-copper particles; the middle dense oxygen barrier layer is a nano-alumina ceramic film; and the outer flexible buffer layer is a flexible polyimide or low thermal stress resin film.
[0007] In some embodiments, the top circuit layer, the inner first circuit layer, the inner second circuit layer, and the bottom circuit layer are all made of electrolytic copper foil, and each conductive circuit layer is arranged in a progressively recessed manner at the edge of the board.
[0008] In some embodiments, the intermediate composite shielding barrier layer is a continuous, unbroken thin film formed by combining nano-metal oxides and insulating resin, which simultaneously possesses the dual functions of blocking the diffusion of corrosive media and electromagnetic shielding.
[0009] In some embodiments, the edge of the circuit board adopts a stepped labyrinth sealing structure, which is formed by the upper insulating dielectric layer and the lower insulating dielectric layer protruding outward and each conductive circuit layer retracting inward to form a multi-level stepped structure.
[0010] In some embodiments, the peripheral protective layer covers the outer side of the stepped labyrinth sealing structure and is made of a nickel-phosphorus alloy and epoxy resin composite material, with a trapezoidal cross-section whose width gradually decreases from the inside to the outside.
[0011] In some embodiments, the inner wall of the via of the circuit board is provided with a composite protective layer, the inside of the via is filled with resin plug, and an annular sealing boss is provided at the opening of the via.
[0012] In some embodiments, the pore wall composite protective layer is composed of a chemically plated nickel layer and a nano-ceramic impregnation layer.
[0013] In some embodiments, the pads of the circuit board are composed of a copper base layer, a nickel barrier layer and an immersion gold surface layer in sequence, forming a composite pad structure that is resistant to galvanic corrosion.
[0014] The present invention has at least the following beneficial effects: (1) By setting up a symmetrical solder resist structure, a multi-layer conductive line layout and a gradient composite anti-oxidation barrier structure, the present invention achieves anti-oxidation protection for the surface and internal conductive lines of the circuit board, reduces oxidation and corrosion, enhances interlayer bonding, and reduces the possibility of structural delamination and cracking.
[0015] (2) By setting up a symmetrical insulation support structure, an intermediate composite shielding structure and an anti-galvanic corrosion pad structure, the present invention achieves interlayer insulation and mechanical support of the circuit board, reduces the impact of external electromagnetic interference on signal transmission, ensures circuit continuity and welding effect, and improves product reliability.
[0016] (3) By setting a stepped labyrinth sealing structure, an outer trapezoidal full-coverage protective structure and a through hole composite sealing structure, the present invention achieves all-round sealing protection of the circuit board edge and through holes, delays the intrusion of corrosive media, adapts to a variety of usage environments, and further improves the service life of the product. Attached Figure Description
[0017] Figure 1 This is a schematic diagram of the structure of the present invention; Figure 2 This is an overall structural appearance diagram of the present invention; Figure 3 This is a structural breakdown diagram of the present invention; Figure 4 This is a schematic diagram of the protective layer structure of the present invention.
[0018] In the diagram: 1-Top solder mask layer; 2-Top circuit layer; 3-Upper gradient composite anti-oxidation barrier layer; 4-Upper insulating dielectric layer; 5-Inner first circuit layer; 6-Middle composite shielding barrier layer; 7-Inner second circuit layer; 8-Lower insulating dielectric layer; 9-Lower gradient composite anti-oxidation barrier layer; 10-Bottom circuit layer; 11-Bottom solder mask layer; 12-Surrounding protective layer. Detailed Implementation
[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0020] Example 1: Please refer to Figure 1-4 This invention provides a multilayer circuit board technology solution for preventing oxidation and corrosion: a multilayer circuit board for preventing oxidation and corrosion, comprising, from top to bottom: a top solder mask layer 1, a top circuit layer 2, an upper gradient composite anti-oxidation barrier layer 3, an upper insulating dielectric layer 4, an inner first circuit layer 5, an intermediate composite shielding barrier layer 6, an inner second circuit layer 7, a lower insulating dielectric layer 8, a lower gradient composite anti-oxidation barrier layer 9, a bottom circuit layer 10, a bottom solder mask layer 11, and a peripheral protective layer 12 disposed around the outer perimeter of the circuit board; the peripheral protective layer 12 has a trapezoidal cross section and covers the edge of the circuit board.
[0021] Both the upper gradient composite anti-oxidation barrier layer 3 and the lower gradient composite anti-oxidation barrier layer 9 are three-layer composite structures, which are composed of an inner bonding layer, a middle dense oxygen barrier layer and an outer flexible buffer layer in sequence.
[0022] The inner bonding layer is a composite layer of silane coupling agent and nano-copper particles; the middle dense oxygen barrier layer is a nano-alumina ceramic film; and the outer flexible buffer layer is a flexible polyimide or low thermal stress resin film.
[0023] The top layer 2, the inner first layer 5, the inner second layer 7, and the bottom layer 10 are all made of electrolytic copper foil, and each conductive layer is arranged in a progressively recessed manner at the edge of the board.
[0024] The intermediate composite shielding barrier layer 6 is a continuous, unbroken thin film formed by the composite of nano-metal oxides and insulating resin, which has the dual functions of blocking the diffusion of corrosive media and electromagnetic shielding.
[0025] The circuit board adopts a stepped labyrinth seal structure at its edge. The stepped labyrinth seal structure consists of an upper insulating dielectric layer 4 and a lower insulating dielectric layer 8 that protrude outwards, and each conductive circuit layer that retracts inwards, forming a multi-level stepped structure.
[0026] The outer side of the peripheral protective layer 12 covers the stepped labyrinth sealing structure and is made of nickel-phosphorus alloy and epoxy resin composite material. The cross-section is trapezoidal and its width gradually decreases from the inside to the outside.
[0027] The inner wall of the via on the circuit board is provided with a composite protective layer, the inside of the via is filled with resin plug, and an annular sealing boss is provided at the via opening.
[0028] The pore wall composite protective layer is composed of a chemically plated nickel layer and a nano-ceramic impregnation layer.
[0029] The circuit board's pads are composed of a copper base layer, a nickel barrier layer, and an immersion gold surface layer, forming a composite pad structure that prevents galvanic corrosion.
[0030] Through the above technical solution: In use, the top solder mask layer 1 and the bottom solder mask layer 11 adopt a symmetrical structural design, both using modified epoxy resin-based solder mask ink with added nano-silica filler to improve moisture resistance and abrasion resistance. During preparation, a screen printing process is used to uniformly coat the solder mask ink onto the surfaces of the top circuit layer 2 and the bottom circuit layer 10, with a thickness controlled at 10-15 μm. After curing, windows are only opened at the corresponding positions of the pads and component leads for subsequent component soldering. The solder mask layer at the board edge extends to the inner side of the stepped labyrinth seal structure, forming a seamless connection with the surrounding protective layer 12, avoiding protective gaps. This structure isolates the internal circuitry from air, moisture, and dust, preventing direct exposure and oxidation of the surface copper foil, while also providing mechanical protection for the circuitry, reducing scratch damage, and improving overall durability.
[0031] All four conductive circuit layers are made of 35μm thick electrolytic copper foil with a purity of ≥99.9%, achieving excellent conductivity. During fabrication, a pre-defined circuit pattern is formed on the copper foil surface using photolithography and etching processes: the top circuit layer 2 and the bottom circuit layer 10 are mainly used for electrical connections of surface components, with a line width controlled between 0.1-0.2mm; the inner first circuit layer 5 is the inner signal transmission line, with wiring density adapted to the requirements of high-frequency signal transmission; the inner second circuit layer 7 adopts a large-area copper-plated design, serving as a ground and power layer, achieving grounding, power supply, and electromagnetic interference shielding functions. Simultaneously, each conductive circuit layer is arranged with a progressively recessed layout at the board edge, with a recess distance of 0.5-1mm between adjacent circuit layers. This avoids direct exposure of the copper layer at the board edge, reduces the starting point of edge oxidation, and provides a structural basis for the subsequent stepped sealing structure, delaying the intrusion of corrosive media.
[0032] The upper gradient composite anti-oxidation barrier layer 3 and the lower gradient composite anti-oxidation barrier layer 9 adopt the same structure and are arranged in a mirror symmetrical manner. Both are three-layer composite structures. From the inner layer close to the conductive circuit layer to the outer layer close to the insulating dielectric layer, they are successively an inner bonding layer, a middle dense oxygen barrier layer, and an outer flexible buffer layer. The total thickness is ≤3μm, which will not increase the overall board thickness or affect the interlayer bonding force.
[0033] The inner bonding layer is a composite layer of silane coupling agent and nano-copper particles, with a thickness of 0.5-1 μm, prepared by a coating process. It enhances the bonding force between the barrier layer and the conductive circuit layer, achieving seamless adhesion through chemical bonding and reducing the possibility of film peeling and delamination under high temperature or humid conditions. The middle dense oxygen barrier layer is a nano-alumina ceramic film with a thickness of 1-1.5 μm, prepared by magnetron sputtering. This layer has high density and no pores, which can block the penetration of corrosive media such as oxygen and water molecules into the copper circuit layer, reducing oxidation and corrosion at the source. The outer flexible buffer layer is a flexible polyimide film with a thickness of 0.5 μm, prepared by a coating and curing process. It can absorb the stress generated by thermal expansion and contraction between layers, reducing the possibility of cracking and peeling of the barrier layer, keeping the protective structure intact under high and low temperature cycling conditions, and improving the reliability of the circuit board in harsh environments.
[0034] Specifically, for the aforementioned three-layer composite structure, the overall structure consists of an inner bonding layer, a dense oxygen-barrier magnetron sputtered Al12O3 layer in the middle, and an outer buffer coating, arranged sequentially from the inside out. These three layers are stacked outwards one by one, with the total thickness of the gradient composite anti-oxidation barrier layer controlled to be 2–3 μm. Before each layer is formed, an interface plasma cleaning pretreatment is performed using argon plasma at a power of 200W for 30 seconds to remove oil and oxide dust from the substrate surface. A 0.5 μm thick silane coupling agent is coated on the upper and lower surfaces of the magnetron sputtered alumina layer to harmonize the material compatibility between the inorganic ceramic layer and the organic coating, thereby improving interlayer adhesion.
[0035] The inner bonding layer is prepared by roller coating process, using epoxy bonding resin as the coating material. The coating thickness is 0.6-0.8μm. After coating, it is pre-baked at 80℃ for 5 minutes to achieve a semi-cured state.
[0036] The dense oxygen barrier layer in the middle was prepared using a magnetron sputtering process with nano-Al12O3. This process was located at a production line node before the overall multilayer lamination process after the PCB circuit pattern etching was completed. The magnetron sputtering process parameters were set to a vacuum degree of 8×10⁻⁶. -4 Pa, DC sputtering power 350W, target-substrate distance 80mm, substrate constant temperature maintained at 110℃, sputtering rate 0.06μm / min, film thickness controlled at 0.8~1.0μm, and 5% by volume of trace oxygen added to the sputtering atmosphere to improve the density of the alumina film itself.
[0037] The outer buffer layer is prepared by coating and curing process. Flexible acrylic buffer resin is selected for roller coating, with a coating thickness of 0.6-0.8μm. After coating, it is completely cured at 120℃ for 15min. After curing, it is tightly bonded to the middle magnetron sputtered alumina layer.
[0038] The complete processing sequence of the gradient barrier layer is as follows: core board circuit etching → plasma interface cleaning → inner bonding layer roll coating semi-curing → magnetron sputtering Al12O3 dense oxygen barrier layer → outer buffer layer coating and curing. After processing, it is transferred to the subsequent 11-layer overall lamination process.
[0039] The upper insulating dielectric layer 4 and the lower insulating dielectric layer 8 adopt a symmetrical structure, both using FR-4 epoxy resin fiberglass cloth with a thickness controlled at 100-120μm, possessing good insulation performance, mechanical strength, and heat resistance. During preparation, the epoxy resin-impregnated fiberglass cloth is cut to a predetermined size and laid below the upper gradient composite anti-oxidation barrier layer 3 and above the lower gradient composite anti-oxidation barrier layer 9, respectively. The insulating dielectric layer at the board edge protrudes outwards, with the protrusion distance matching the indentation distance of the conductive circuit layers, providing a foundation for the stepped structure. This structure achieves interlayer electrical insulation, preventing short circuits between conductive circuits, while also providing mechanical support for the internal circuitry, resulting in a flat overall board shape and reduced warping.
[0040] The intermediate composite shielding layer 6 is a continuous, uninterrupted thin film formed by combining nano-metal oxides and insulating resin, with a thickness of 2-3 μm. It is laid between the inner first circuit layer 5 and the inner second circuit layer 7, covering the entire inner layer area. The nano-metal oxide is selected from nano-zinc oxide, with an addition ratio of 30-40%, and the insulating resin is modified epoxy resin. The two are mixed, coated, and cured to form a composite film. On the one hand, this further blocks the lateral diffusion of corrosive media between layers, preventing localized corrosion from spreading inwards; on the other hand, it provides electromagnetic shielding, reducing the impact of external interference on internal signal transmission, and is suitable for high-frequency and high-speed signal transmission requirements.
[0041] The peripheral protective layer 12 surrounds the outer perimeter of the circuit board, completely covering the outer side of the stepped labyrinth seal structure. It is made of a composite material of nickel-phosphorus alloy and epoxy resin, and is manufactured using a potting process. The composite material is filled into the stepped gaps along the board edge, and after curing, it forms a trapezoidal protective structure with a width that gradually decreases from the inside to the outside, with an inner width of 1-1.5 mm and an outer width of 0.5-0.8 mm. This trapezoidal structure enhances the fit with the board edge, reducing the possibility of the protective layer detaching, while not occupying excessive installation space. It achieves full coverage protection of the board edge, completely preventing corrosive media from penetrating from the board edge and improving the circuit board's performance in humid and salt spray environments.
[0042] The stepped labyrinth sealing structure consists of an upper insulating dielectric layer 4 and a lower insulating dielectric layer 8 that protrude outwards, while each conductive circuit layer is recessed inwards, forming a multi-step shape. The number of steps matches the number of conductive circuit layers, and the height of each step is 0.5-1mm. This structure extends the penetration path of corrosive media such as water vapor and salt spray. Combined with the surrounding protective layer 12, it forms a double seal, further enhancing the corrosion resistance of the plate edge. Compared to traditional straight-cut plate edge structures, it offers superior protection.
[0043] The vias penetrate the entire vertical layer of the circuit board, with a diameter controlled between 0.3-0.5 mm. The inner wall of the via is equipped with a composite protective layer, consisting of a chemically plated nickel layer and a nano-ceramic impregnation layer. The chemically plated nickel layer is 2-3 μm thick, and the nano-ceramic impregnation layer is 1-2 μm thick. During fabrication, the inner wall of the via is first chemically plated with nickel, then impregnated with a nano-ceramic solution and cured. Subsequently, a resin plugging process is used to fill the via's interior. Finally, an annular sealing boss is integrally formed with the solder mask layer, with the same thickness. This structure prevents oxidation, corrosion, and even breakage of the copper layer on the via wall. The resin plugging and the sealing boss further seal the via channel, preventing moisture from entering the interior and improving the reliability of the via. It is suitable for products with high density and high reliability requirements.
[0044] The solder pads are located on the surfaces of the top layer 2 and the bottom layer 10, corresponding to the solder mask openings. They consist of a copper base layer, a nickel barrier layer, and a gold-plated surface layer, arranged sequentially. The copper base layer is integrally formed with the circuit layers and has a thickness of 35 μm. The nickel barrier layer has a thickness of 2-3 μm, and the gold-plated surface layer has a thickness of 0.05-0.1 μm, prepared using a chemical plating process. The nickel barrier layer blocks the potential difference corrosion between copper and gold, reducing blackening, cold solder joints, and rust on the solder pads during long-term use. The gold-plated surface layer ensures good solderability, facilitating a smooth soldering process and reducing oxidation, thus extending the overall product lifespan.
[0045] This embodiment achieves a comprehensive and three-dimensional anti-oxidation and corrosion effect through the synergistic effect of multiple structures, including internal gradient barrier, interlayer shielding, plate edge stepped labyrinth seal, outer perimeter trapezoidal full coverage, through-hole triple seal, and pad anti-galvanic corrosion. At the same time, it does not affect electrical performance, structural strength, or signal transmission.
[0046] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.
[0047] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A multilayer circuit board resistant to oxidation and corrosion, characterized in that, From top to bottom, the circuit includes: top solder mask layer (1), top circuit layer (2), upper gradient composite anti-oxidation barrier layer (3), upper insulating dielectric layer (4), inner first circuit layer (5), middle composite shielding barrier layer (6), inner second circuit layer (7), lower insulating dielectric layer (8), lower gradient composite anti-oxidation barrier layer (9), bottom circuit layer (10), bottom solder mask layer (11), and a peripheral protective layer (12) surrounding the outer perimeter of the circuit board; the peripheral protective layer (12) has a trapezoidal cross section and covers the edge of the circuit board.
2. The multilayer circuit board for preventing oxidation and corrosion according to claim 1, characterized in that: The upper gradient composite anti-oxidation barrier layer (3) and the lower gradient composite anti-oxidation barrier layer (9) are both three-layer composite structures, which are composed of an inner bonding layer, a middle dense oxygen barrier layer and an outer flexible buffer layer respectively.
3. The multilayer circuit board for preventing oxidation and corrosion according to claim 2, characterized in that: The inner bonding layer is a composite layer of silane coupling agent and nano-copper particles; the middle dense oxygen barrier layer is a nano-alumina ceramic film; and the outer flexible buffer layer is a flexible polyimide or low thermal stress resin film.
4. The multilayer circuit board for preventing oxidation and corrosion according to claim 1, characterized in that: The top layer (2), the inner first layer (5), the inner second layer (7) and the bottom layer (10) are all made of electrolytic copper foil, and each conductive layer is arranged in a progressively recessed manner at the edge of the board.
5. The multilayer circuit board for preventing oxidation and corrosion according to claim 1, characterized in that: The intermediate composite shielding barrier layer (6) is a continuous, unbroken thin film formed by the composite of nano-metal oxide and insulating resin, which has the dual functions of blocking the diffusion of corrosive media and electromagnetic shielding.
6. The multilayer circuit board for preventing oxidation and corrosion according to claim 1, characterized in that: The circuit board adopts a stepped labyrinth sealing structure on its edge. The stepped labyrinth sealing structure is formed by the upper insulating dielectric layer (4) and the lower insulating dielectric layer (8) protruding outward and each conductive circuit layer retracting inward to form a multi-level stepped structure.
7. The multilayer circuit board for preventing oxidation and corrosion according to claim 1, characterized in that: The peripheral protective layer (12) covers the outer side of the stepped labyrinth sealing structure and is made of nickel-phosphorus alloy and epoxy resin composite material. The cross section is trapezoidal and its width gradually decreases from the inside to the outside.
8. The multilayer circuit board for preventing oxidation and corrosion according to claim 1, characterized in that: The circuit board has a composite protective layer on the inner wall of the via, the via is filled with resin plug, and an annular sealing boss is provided at the via opening.
9. The multilayer circuit board for preventing oxidation and corrosion according to claim 8, characterized in that: The pore wall composite protective layer is composed of a chemically plated nickel layer and a nano-ceramic impregnation layer.
10. The multilayer circuit board for preventing oxidation and corrosion according to claim 1, characterized in that: The circuit board's pads are composed of a copper base layer, a nickel barrier layer, and an immersion gold surface layer, forming a composite pad structure that prevents galvanic corrosion.