Thermosensitive crystal package structure and integrated circuit board

Abstract

This application discloses a thermistor packaging structure and an integrated circuit board, relating to the field of electronic devices. The thermistor packaging structure includes: a thermistor, a crystal oscillator assembly, and a carrier assembly; the crystal oscillator assembly includes a first package, a second package, and a crystal; the first package is connected to the second package, and a sealed cavity is provided between the first package and the second package, with the crystal disposed in the sealed cavity; the second package is disposed on the carrier assembly; the thermistor is disposed on the side of the first package opposite to the second package, and the thermistor is connected to the first package via a first pad. This application can solve the problems caused by the ceramic substrate supporting the wafer and the thermistor, resulting in a large volume of the thermistor, which is not conducive to miniaturization and thinning.

Description

Technical Field

[0001] This application belongs to the technical field of electronic devices, specifically relating to a thermistor crystal packaging structure and an integrated circuit board. Background Technology

[0002] In related technologies, the main structures of thermistors include the following two types: one is that the wafer and thermistor are encapsulated in a cavity surrounded by a ceramic substrate and a metal cover; the other is the H-type structure, that is, the wafer and thermistor are distributed in two cavities surrounded by a ceramic substrate and a metal cover.

[0003] However, in both of the above structures, the chip and thermistor are encapsulated by a ceramic substrate and a metal cover. The reliance on the ceramic substrate results in a large overall volume of the thermistor, which is not conducive to the miniaturization and thinning of the thermistor. Summary of the Invention

[0004] The purpose of this application is to provide a thermistor packaging structure and integrated circuit board that can solve the problems that the large size of the thermistor caused by carrying the chip and thermistor on a ceramic substrate is not conducive to miniaturization and thinning.

[0005] To solve the above-mentioned technical problems, this application is implemented as follows: This application provides a thermistor packaging structure, including: a thermistor device, a crystal oscillator assembly, and a carrier assembly; The crystal oscillator assembly includes a first package, a second package, and a crystal. The first package is connected to the second package, and a sealed cavity is provided between the first package and the second package. The crystal is disposed in the sealed cavity. The second encapsulation component is disposed on the carrier component; The thermal device is disposed on the side of the first package opposite to the second package, and the thermal device is connected to the first package via a first pad.

[0006] This application embodiment also provides an integrated circuit board, including: a circuit board body and the above-mentioned thermistor crystal packaging structure; The thermistor crystal package structure is disposed on the circuit board body, wherein the circuit board body serves as the carrier component.

[0007] This embodiment encapsulates the crystal in a sealed environment using a first encapsulation component and a second encapsulation component, ensuring the crystal operates in a clean, interference-free environment. Furthermore, the thermistor is positioned on the side of the first encapsulation component away from the second encapsulation component, placing the thermistor outside the sealed cavity. Compared to related technologies, this embodiment eliminates the need for a ceramic substrate and metal cover to co-encapsulate the thermistor and crystal. Instead, it uses only the first and second encapsulation components to encapsulate the crystal separately, with the first encapsulation component supporting the thermistor. This reduces the encapsulation volume of the thermistor structure while meeting the crystal's operating environment requirements, allowing for miniaturization and thinning of the thermistor packaging structure. Additionally, the second encapsulation component in this embodiment uses a support component, eliminating the need for a ceramic substrate and effectively avoiding the use of a bulky ceramic substrate. This reduces the overall size of the thermistor packaging structure and eliminates dependence on a ceramic substrate, freeing the thermistor packaging structure from its limitations. Attached Figure Description

[0008] Figure 1 This is a side view of the thermistor packaging structure disclosed in an embodiment of this application; Figure 2 This is a top view schematic diagram of the first type of thermistor packaging structure disclosed in the embodiments of this application; Figure 3 This is a top view schematic diagram of the second form of thermistor packaging structure disclosed in the embodiments of this application; Figure 4 This is a schematic diagram of the bottom surface of the load-bearing component disclosed in an embodiment of this application; Figure 5 This is a side view of the crystal oscillator assembly and thermistor disclosed in the embodiments of this application.

[0009] Explanation of reference numerals in the attached figures: 10-Thermistor device; 11-Thermistor chip; 12-First metal layer; 13-Second metal layer; 20-Crystal oscillator assembly; 20a-Sealed cavity; 21-First package; 21a-First peripheral wall; 211-First pad; 22-Second package; 22a-Second peripheral wall; 221-Fourth pad; 23-Crystal; 231-First electrode layer; 232-Second electrode layer; 233-Wafer unit; 24-Metal solder; 25-Ring package; 30 - Carrier component; 31 - Carrier board; 311 - Conductive via; 32 - Second pad; 33 - Third pad; 41-First electrical connector; 42-Second electrical connector; 51-Conductive adhesive; 60 - Encapsulation material; 70 - Third metal layer. Detailed Implementation

[0010] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0011] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0012] The embodiments of this application will be described in detail below with reference to the accompanying drawings and specific examples and application scenarios.

[0013] refer to Figures 1 to 5 This application discloses a thermistor crystal packaging structure, which is a quartz crystal oscillator that achieves high frequency stability through temperature compensation. The disclosed thermistor crystal packaging structure includes a thermistor 10, a crystal oscillator assembly 20, and a carrier assembly 30. The thermistor 10 detects the temperature in real time and dynamically adjusts the load capacitance of the crystal oscillator assembly 20, thereby offsetting the frequency temperature drift of the crystal oscillator assembly 20. Specifically, the principle is an open-loop compensation mechanism of thermistor 10 sensing temperature, varactor diode adjusting capacitance, and dynamic frequency compensation. Under vacuum packaging protection, the temperature stability of the crystal can be greatly improved.

[0014] In this embodiment of the application, the crystal oscillator assembly 20 includes a first package 21, a second package 22 and a crystal 23. The first package 21 is connected to the second package 22, and a sealed cavity 20a is provided between the first package 21 and the second package 22. The crystal 23 is disposed in the sealed cavity 20a. In this way, the sealed cavity 20a can provide a good environment for the crystal 23 to prevent the external environment from interfering with the operation of the crystal 23.

[0015] Specifically, the edge of the first package 21 is connected to the edge of the second package 22, and the central regions of the first package 21 and the second package 22 are spaced apart to form a sealed cavity 20a between them. Exemplarily, both the first package 21 and the second package 22 can be plate-like or cap-like structures. Furthermore, the edges of the first package 21 and the second package 22 can be connected by means of bonding, welding, fusion, etc., to ensure the sealing of the connection.

[0016] Optionally, the first package 21 and the second package 22 can be made of SiO2 or Si. Of course, other materials can also be used, and no specific limitation is made here. Compared with ceramic substrates, the first package 21 and the second package 22 made of SiO2 or Si are freed from dependence on a single ceramic material, making raw materials easier to obtain and less susceptible to limitations in technology and production capacity.

[0017] It should be noted that the edges of the first package 21 and the second package 22 can be connected in a vacuum environment to create a certain degree of vacuum within the sealed cavity 20a. This provides a vacuum environment for the crystal 23, preventing dust, impurities, and other external contaminants from contacting the crystal 23 and affecting its normal operation. Furthermore, the temperature within the sealed environment provided to the crystal 23 inside the sealed cavity 20a can be adjusted to meet the temperature requirements of the crystal 23 during operation.

[0018] The thermal device 10 is disposed on the side of the first package 21 away from the second package 22. In this way, the thermal device 10 can be supported by the first package 21, and the connection between the thermal device 10 and the first package 21 can be realized to ensure the installation stability of the thermal device 10.

[0019] The second package 22 is disposed on the support component 30. The support component 30 supports the second package 22, which effectively eliminates the dependence on the ceramic base and helps to improve the installation stability of the crystal oscillator component 20.

[0020] To achieve electrical connection, the thermistor 10 and the first package 21 can be connected through the first pad 211, thus enabling stable signal transmission between the thermistor 10 and the first package 21.

[0021] Optionally, such as Figure 5As shown, the first package 21 may have a first pad 211 on the side facing the thermistor 10, which is electrically connected to the thermistor 10. Based on this arrangement, signal transmission between the thermistor 10 and the first pad 211 can be realized, and the thermistor 10 can also be fixed by the first pad 211 to ensure the installation stability of the thermistor 10 on the first package 21.

[0022] Optionally, the first pad 211 can be formed on the side of the first package 21 facing the thermistor 10 by sputtering, photolithography, or electroplating. Other methods can also be used to form the first pad 211, which are not specifically limited here.

[0023] In addition, the first package 21 can also be formed with a wiring electrode layer and other structures by means of sputtering, photolithography or electroplating, so as to facilitate signal transmission.

[0024] Based on the above settings, the crystal 23 can be directly encapsulated in a sealed environment through the first encapsulation component 21 and the second encapsulation component 22 to ensure that the crystal 23 works in a pure and interference-free environment; and the thermal device 10 is disposed on the side of the first encapsulation component 21 away from the second encapsulation component 22, so that the thermal device 10 is located outside the sealed cavity 20a.

[0025] Compared to related technologies, the embodiments of this application do not require a ceramic base and a metal cover to jointly encapsulate the thermistor and the crystal 23. Instead, only the first encapsulation component 21 and the second encapsulation component 22 are used to encapsulate the crystal 23 separately. The thermistor 10 is supported by the first encapsulation component 21. This reduces the encapsulation volume of the thermistor crystal encapsulation structure while meeting the operating environment requirements of the crystal 23, allowing the thermistor crystal encapsulation structure to develop towards miniaturization and thinning. In addition, the second encapsulation component 22 in this embodiment is supported by the support component 30, eliminating the need for a ceramic base. This effectively avoids the use of a large ceramic base, thereby reducing the overall size of the thermistor crystal encapsulation structure and freeing it from dependence on a ceramic base, thus freeing the thermistor crystal encapsulation structure from the limitations of a ceramic base.

[0026] refer to Figure 5 In some embodiments, the first package 21 may have a first peripheral wall 21a on the side facing the second package 22, and correspondingly, the second package 22 may have a second peripheral wall 22a on the side facing the first package 21. The first peripheral wall 21a and the second peripheral wall 22a are fused together by metal solder 24. Based on this, the edges of the first package 21 and the second package 22 can be connected together and sealed, thereby forming a sealed space to facilitate the encapsulation of the crystal between the first package 21 and the second package 22.

[0027] Optionally, both the first peripheral wall 21a and the second peripheral wall 22a can be annular sidewalls, located at the respective edges of the first package 21 and the second package 22.

[0028] Furthermore, the ends of the first peripheral wall 21a and the second peripheral wall 22a may each be provided with a metal layer, and the metal layers of the first peripheral wall 21a and the second peripheral wall 22a can be fused together by metal solder 24.

[0029] In other embodiments, the crystal oscillator assembly 20 may further include an annular package 25 connected between the first package 21 and the second package 22, such that the three packages can form a sealed cavity 20a. The crystal oscillator assembly 20 can be connected to the annular package 25 to support the crystal oscillator assembly 20.

[0030] Optionally, the two ends of the annular package 25 may be provided with metal layers, and the metal layers at both ends may be fused together with the metal layers of the first peripheral wall 21a and the second peripheral wall 22a to form a sealed cavity 20a.

[0031] When encapsulation is required, the first peripheral wall 21a and the second peripheral wall 22a are joined together and welded together in a vacuum environment using metal solder 24 to form a sealed cavity 20a. The sealed cavity 20a has a certain degree of vacuum, which can provide a pure space for the crystal to prevent the external environment from interfering with the crystal 23.

[0032] Continue to refer to Figure 5 In some embodiments, the crystal 23 may include a wafer unit 233, a first electrode layer 231 and a second electrode layer 232. The first electrode layer 231 and the second electrode layer 232 are disposed on opposite sides of the wafer unit 233. The first electrode layer 231 is electrically connected to the pads or trace electrode layer provided on the second package 22, and the second electrode layer 232 is electrically connected to the pads or trace electrode layer provided on the second package 22. The second package 22 is electrically connected to the carrier component 30.

[0033] Based on the above configuration, the chip unit 233 can transmit signals to the second package 22 through the first electrode layer 231 and the second electrode layer 232 respectively, and the second package 22 can transmit signals to the carrier component 30, thereby ensuring the power supply to the chip unit 233 and the transmission of stable signals.

[0034] For example, the first electrode layer 231 and the second electrode layer 232 can be made of the same metal, such as silver, gold, alloy, etc., and formed on both sides of the wafer unit 233 by sputtering, photolithography and other processes.

[0035] Optionally, the second package 22 can be formed with pads, trace electrode layers, or other structures by sputtering, photolithography, or electroplating to facilitate signal transmission. The first electrode layer 231 and the second electrode layer 232 can be electrically connected to at least one of the pads and trace electrode layers, respectively.

[0036] refer to Figure 1 and Figure 5 In some embodiments, the thermistor device 10 may include a thermistor chip 11, a first metal layer 12, and a second metal layer 13. The first metal layer 12 is disposed on a first side of the thermistor chip 11 and is electrically connected to a first pad 211. The second metal layer 13 is disposed on a second side of the thermistor chip 11 opposite to the first metal layer 12 and is electrically connected to a carrier component 30. Therefore, the first metal layer 12 and the second metal layer 13 can serve as two electrodes of the thermistor chip 11, respectively. Signal transmission occurs through the first metal layer 12 with the first pad 211 and through the second metal layer 13 with the carrier component 30.

[0037] It should be noted that the embodiments of this application employ chip-level thermistors, specifically the thermistor chip 11, which is a small chip structure manufactured using a ceramic substrate and thick / thin film processes. Compared to ordinary surface-mount thermistors, the thermistor chip 11 in this embodiment has better resistance layer uniformity and a more consistent temperature coefficient; its chip structure is compact, and its thermal response path is short, reducing the effects of natural effects and thermal gradients; its electrode design is optimized, resulting in smaller lead inductance / capacitance; furthermore, the thermistor chip 11 in this embodiment is functionally connected via bonding wires, while ordinary surface-mount thermistors are soldered using solder paste via reflow soldering. Therefore, the thermistor chip 11 in this embodiment has higher precision and sensitivity; and it eliminates the need for reflow soldering, effectively reducing the adverse effects of the reflow soldering process on the thermistor device 10 and even the entire thermistor crystal package structure. Furthermore, the thermistor chip 11 in this embodiment is suitable for miniaturization and thinning requirements.

[0038] Optionally, the first metal layer 12 and the second metal layer 13 can be silver layers, or other material layer structures, without specific limitations here.

[0039] It should be noted that since the first pad 211 is disposed on the side of the first package 21 facing the thermistor 10, when the thermistor 10 is disposed on the first package 21, the first pad 211 can be connected to the first metal layer 12 of the thermistor 10, thereby enabling signal transmission between the first pad 211 and the thermistor 10.

[0040] Furthermore, the thermal crystal encapsulation structure may also include conductive adhesive 51, such as... Figure 1 and Figure 5 As shown, the conductive adhesive 51 is connected between the first pad 211 and the first metal layer 12. In this way, the conductive adhesive 51 can both bond and fix the first pad 211 and the first metal layer 12, and enable signal transmission between the first pad 211 and the first metal layer 12.

[0041] In other embodiments, the conductive adhesive 51 may be replaced with other devices that have fixing and conductive functions, which are not specifically limited here.

[0042] refer to Figure 1 In some embodiments, the thermistor crystal packaging structure may further include a first electrical connector 41 and a second electrical connector 42. The first electrical connector 41 is electrically connected between the conductive adhesive 51 and the carrier component 30 to achieve signal transmission between the thermistor 10 and the carrier component 30 through the first electrical connector 41; the second electrical connector 42 is electrically connected between the second metal layer 13 and the carrier component 30 to transmit signals between the thermistor 10 and the carrier component 30 through the second electrical connector 42.

[0043] It should be noted that the thermistor packaging structure can eliminate the need for a carrier component 30, and instead directly integrate the crystal oscillator component 20 and the thermistor 10 into the chip, such as integrating them into an IC chip. This effectively alleviates the problem that traditional thermistors 23 using ceramic substrates cannot be directly integrated into chips.

[0044] The first electrical connector 41 can be connected to the first electrode of the thermistor 10, and the second electrical connector 42 can be connected to the second electrode of the thermistor 10. Optionally, both the first electrical connector 41 and the second electrical connector 42 can be metal leads, or other conductive structures, which are not specifically limited here.

[0045] Continue to refer to Figure 1 The carrier component 30 may include a carrier plate 31, a plurality of second pads 32 and a plurality of third pads 33. The plurality of second pads 32 are all located on the side of the carrier plate 31 facing the crystal oscillator component 20, and the second pads 32 are used for electrical connection with the second package 22 located inside the thermistor crystal package structure.

[0046] Specifically, at least some of the second pads 32 are electrically connected to the second package 22, the first electrical connector 41, and the second electrical connector 42, respectively. Thus, the second pads 32 can be electrically connected to the crystal 23 through the second package 22, so that signal transmission can be realized between the carrier component 30 and the crystal 23, that is, the crystal function can be brought out. Through the second pads 32 being electrically connected to the first electrical connector 41 and the second electrical connector 42, signal transmission between the thermistor 10 and the carrier component 30 can be realized, that is, the thermistor 10 function can be brought out.

[0047] In addition, multiple third pads 33 are provided on the side of the carrier board 31 opposite to the second pad 32. The third pads 33 are used for electrical connection with devices located outside the thermistor package structure.

[0048] The plurality of third pads 33 are electrically connected to at least a portion of the plurality of second pads 32 to enable signal transmission between the third pads 33 and the corresponding connected second pads 32; and the third pads 33 are also electrically connected to external devices so that the thermistor package structure can transmit signals with external devices.

[0049] Optionally, the number of second pads 32 may be greater than the number of third pads 33. In this case, the multiple third pads 33 are connected to a portion of the second pads 32. Alternatively, the number of second pads 32 may be equal to the number of third pads 33. In this case, the multiple third pads 33 are connected to the multiple second pads 32 in a one-to-one correspondence. The specific implementation can be set according to actual needs.

[0050] In some embodiments, the second package 22 may be electrically connected to the second pad 32 via the fourth pad 221 to transmit signals between the second package 22 and the second pad 32 via the fourth pad 221.

[0051] Specifically, such as Figure 1 As shown, the second package 22 may have a plurality of fourth pads 221 on the side opposite to the first package 21. The plurality of fourth pads 221 are electrically connected to at least a portion of the plurality of second pads 32. In this way, signal transmission between the crystal oscillator assembly 20 and the carrier assembly 30 can be realized through the fourth pads 221 and the corresponding connected second pads 32.

[0052] Optionally, the number of second pads 32 may be greater than the number of fourth pads 221. In this case, the multiple fourth pads 221 are connected to a portion of the second pads 32. Alternatively, the number of second pads 32 may be equal to the number of fourth pads 221. In this case, the multiple fourth pads 221 are connected to the multiple second pads 32 in a one-to-one correspondence. The specific implementation can be set according to actual needs.

[0053] refer to Figure 2 and Figure 3 In some more specific embodiments, a portion of the plurality of second pads 32 may be distributed at the corners of the carrier board 31, and correspondingly, a plurality of fourth pads 221 may be distributed at the corners of the second package 22, with a portion of the plurality of second pads 32 and a plurality of fourth pads 221 connected in a one-to-one correspondence. Based on this arrangement, signal transmission between the crystal oscillator assembly 20 and the carrier assembly 30 can be achieved by connecting a portion of the plurality of second pads 32 and a plurality of fourth pads 221.

[0054] Another portion of the plurality of second pads 32 can be distributed at both ends of the crystal oscillator assembly 20, wherein the second pad 32 located at the first end is connected to the first electrical connector 41, and the second pad 32 located at the second end is connected to the second electrical connector 42. Based on this arrangement, by connecting another portion of the plurality of second pads 32 to the first electrical connector 41 and the second electrical connector 42 respectively, signal transmission between the thermistor 10 and the carrier assembly 30 can be realized.

[0055] For example, the carrier board 31 can be a rectangular board, and the second pads 32 can be distributed at the four corners of the rectangular board and at the midpoints of the two opposite sides of the rectangular board. The second pads 32 at the four corners are respectively connected to the fourth pad 221 of the crystal oscillator assembly 20, and the second pads 32 at the midpoints of the two sides are respectively connected to the first electrical connector 41 and the second electrical connector 42.

[0056] In some more specific embodiments, multiple second pads 32 can be distributed at the corners of the carrier board 31, and correspondingly, multiple fourth pads 221 can be distributed at the corners of the second package 22, with each of the multiple second pads 32 and the multiple fourth pads 221 connected in a one-to-one correspondence. Based on this arrangement, signal transmission between the crystal oscillator assembly 20 and the carrier assembly 30 can be achieved through the connection of the multiple second pads 32 with the multiple fourth pads 221.

[0057] Furthermore, such as Figure 3 As shown, the first electrical connector 41 and the fourth pad 221 at one of the corners of the crystal oscillator assembly 20 can share a second pad 32. In this case, the first electrical connector 41 and the crystal oscillator assembly 20 can be electrically connected to the carrier assembly 30 through the same second pad 32.

[0058] Similarly, the second electrical connector 42 and the fourth pad 221 at another corner of the crystal oscillator assembly 20 can share a second pad 32. In this case, the second electrical connector 42 and the crystal oscillator assembly 20 can be electrically connected to the carrier assembly 30 through the same second pad 32.

[0059] It should be noted that the main difference between this embodiment and the above embodiment is that the second pad 32 at one corner is integrated with the second pad 32 at the first end of the crystal oscillator component 20, and the second pad 32 at the other corner is integrated with the second pad 32 at the second end of the crystal oscillator component 20. This method can reduce the distribution area of ​​the second pad 32 while meeting the signal transmission requirements, which is beneficial to reducing the cross-sectional area of ​​the carrier component 30.

[0060] Optionally, the second pads 32 at two adjacent corners can be used to bring out the crystal oscillator assembly 20, and the second pads 32 at the other two corners can be used to bring out the thermistor 10.

[0061] In other embodiments, the second pad 32 at one corner can also be connected to the second pad 32 at the first end of the crystal oscillator assembly 20 through a conductive via 311, a circuit layer or other structure; the second pad 32 at the other corner can also be connected to the second pad 32 at the second end of the crystal oscillator assembly 20 through a conductive via 311, a circuit layer or other structure.

[0062] Optionally, such as Figure 4 As shown, multiple third pads 33 can be distributed at the corners of the carrier board 31, and each of the multiple third pads 33 is connected to a corresponding multiple second pads 32 located at the corners of the carrier board 31. Based on this, the second pads 32 can be connected to other electrical components through the third pads 33 to achieve signal transmission.

[0063] Furthermore, the third pads 33 located at two of the diagonal corners can serve as the lead-out pins of the crystal oscillator assembly 20, and the third pad 33 at one of the corners can serve as the crystal 23 pin for orientation identification; the third pads 33 located at the other two diagonal corners can serve as the lead-out pins of the thermal device 10.

[0064] Optionally, the carrier board 31 may have conductive vias 311, through which the second pad 32 and the corresponding third pad 33 can be connected. Additionally, the carrier board 31 may also have a circuit layer, and the conductive vias 311 can be connected to the circuit layer. It should be noted that the conductive via 311 can be understood as having a metal wall on its inner wall to facilitate signal transmission. The metal wall can be formed using methods such as electroplating or sputtering.

[0065] Continue to refer to Figure 1In some embodiments, the thermistor crystal encapsulation structure may further include an encapsulating material 60, which is disposed on the side of the carrier component 30 facing the crystal oscillator component 20, and the encapsulating material 60 covers the outside of the thermistor 10 and the crystal oscillator component 20. Based on this, the thermistor 10 and the crystal oscillator component 20 can be encapsulated and protected by the encapsulating material 60. Optionally, the encapsulating material 60 can be resin; of course, it can also be other materials, which are not specifically limited here.

[0066] Furthermore, a third metal layer 70 may be provided on the surface of the encapsulating material 60 facing away from the carrier component 30. This third metal layer 70 can serve to shield electromagnetic waves and reduce electromagnetic interference.

[0067] Furthermore, in this embodiment, multiple carrier components 30 of single crystals 23 can be spliced ​​together into a whole, then the crystal oscillator component 20 can be mounted onto the whole, followed by overall molding, and finally cut into individual thermistor crystal package structures. Compared with traditional thermistors that can only be individually mounted, the thermistor crystal package structure design in this embodiment is more flexible and has higher production efficiency.

[0068] Based on the aforementioned thermistor package structure, this application also discloses an integrated circuit board. The disclosed integrated circuit board includes a circuit board body and the aforementioned thermistor package structure, with the thermistor package structure disposed on the circuit board body, wherein the circuit board body serves as a carrier component 30. Based on this configuration, the thermistor package structure can be carried by the circuit board body in the integrated circuit board, and signal transmission can be performed between the thermistor package structure and the circuit board body.

[0069] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A thermistor crystal packaging structure, characterized in that, include: Thermistor (10), crystal oscillator assembly (20) and carrier assembly (30); The crystal oscillator assembly (20) includes a first package (21), a second package (22) and a crystal (23). The first package (21) is connected to the second package (22), and a sealed cavity (20a) is provided between the first package (21) and the second package (22). The crystal (23) is disposed in the sealed cavity (20a). The second encapsulation (22) is disposed on the carrier component (30); The thermal device (10) is disposed on the side of the first package (21) opposite to the second package (22), and the thermal device (10) is connected to the first package (21) via a first pad (211).

2. The thermistor crystal packaging structure according to claim 1, characterized in that, The first package (21) has a first peripheral wall (21a) on the side facing the second package (22), and the second package (22) has a second peripheral wall (22a) on the side facing the first package (21). The first peripheral wall (21a) and the second peripheral wall (22a) are fused together by metal solder (24).

3. The thermistor crystal packaging structure according to claim 1, characterized in that, The crystal (23) includes a wafer unit (233) and a first electrode layer (231) and a second electrode layer (232) disposed on opposite sides of the wafer unit (233). The first electrode layer (231) is electrically connected to the pad or trace electrode layer provided in the second package (22), and the second electrode layer (232) is electrically connected to the pad or trace electrode layer provided in the second package (22). The second package (22) is electrically connected to the carrier component (30).

4. The thermistor crystal packaging structure according to claim 1, characterized in that, The thermistor device (10) includes a thermistor chip (11), a first metal layer (12), and a second metal layer (13). The first metal layer (12) is disposed on the first side of the thermistor chip (11) and is electrically connected to the first pad (211). The second metal layer (13) is disposed on the second side of the thermistor chip (11) away from the first metal layer (12) and is electrically connected to the carrier component (30).

5. The thermistor crystal packaging structure according to claim 4, characterized in that, The thermal crystal packaging structure also includes conductive adhesive (51), which is connected between the first pad (211) and the first metal layer (12).

6. The thermistor crystal packaging structure according to any one of claims 1 to 5, characterized in that, The carrier component (30) includes a carrier plate (31), a plurality of second pads (32) and a plurality of third pads (33). Multiple second pads (32) are provided on the side of the carrier plate (31) facing the crystal oscillator assembly (20), and the second pads (32) are used to electrically connect with the second package (22) located inside the thermistor crystal package structure; Multiple third pads (33) are disposed on the side of the carrier plate (31) opposite to the second pad (32), and the third pads (33) are used for electrical connection with devices located outside the thermistor crystal package structure.

7. The thermistor crystal packaging structure according to claim 6, characterized in that, The second package (22) is electrically connected to the second pad (32) via the fourth pad (221).

8. The thermistor crystal packaging structure according to claim 1, characterized in that, The thermal crystal packaging structure further includes an encapsulation material (60), which is disposed on the side of the carrier component (30) facing the crystal oscillator component (20) and wraps around the thermal device (10) and the crystal oscillator component (20).

9. The thermistor crystal packaging structure according to claim 8, characterized in that, The surface of the encapsulating material (60) facing away from the carrier component (30) is provided with a third metal layer (70).

10. An integrated circuit board, characterized in that, include: The circuit board body and the thermistor crystal packaging structure according to any one of claims 1 to 9; The thermal crystal package structure is disposed on the circuit board body, wherein the circuit board body serves as the carrier component (30).

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