Method for suppressing warpage of embedded power module on PCB and low stress PCB structure

Abstract

This invention discloses a method for suppressing warpage of embedded power modules on a PCB and a low-stress PCB structure. The method includes: dividing the thick copper conductive layer of the PCB into multiple thick copper segments, reserving stress relief gaps between adjacent thick copper segments, and performing a gradual transition treatment on the edges of each thick copper segment to form a gradually thinning transition zone with continuously decreasing thickness along the radial direction of the board surface; stacking the inner core board with the thick copper segments, stress relief gaps, and gradually thinning transition zone, along with a prepreg and an outer copper foil, in a preset order, and performing hot-press curing using a segmented pressurization and stepped temperature control process; during the cooling stage after hot-press curing or in an independent annealing process, applying a non-uniform temperature field to the PCB surface based on the copper foil thickness distribution map of the PCB, controlling the cooling rate of the thick copper segment area to be faster than that of the sparse copper foil area, or controlling the target temperature of the thick copper segment area to be lower than that of the sparse copper foil area, so that a prestress compensation field opposite to the direction of thermal stress is formed inside the PCB.

Description

Technical Field

[0001] This invention relates to the field of high-density power integration technology, and in particular to a method for suppressing warpage problems in chip-embedded PCB thick copper processes and a low-stress PCB integration design method. Background Technology

[0002] With the rapid development of power electronics, new energy vehicles, 5G communications, and artificial intelligence (AI) servers, electronic devices are facing increasingly stringent requirements for power density and heat dissipation performance. PCB-embedded power modules (typically referring to power modules with IGBT / SiC power chips embedded in the PCB printed circuit board and copper foil thickness greater than or equal to 3oz, possessing power conversion capabilities) are suitable for high-power-density power conversion scenarios due to their excellent electrical characteristics, current carrying capacity, and heat dissipation performance.

[0003] However, the manufacturing process of PCB embedded power modules faces a severe technical challenge—warpage. Warpage refers to the bending or twisting deformation that occurs during the manufacturing or assembly of PCB embedded power modules. This problem mainly stems from the significant mismatch in the coefficient of thermal expansion (CTE) between different materials in the PCB. The CTE of the chip is approximately 4 ppm / °C, the CTE of copper is approximately 17 ppm / °C, while the widely used FR-4 substrate has a CTE of approximately 14-18 ppm / °C in the XY plane (board plane), showing a significant difference among the three. Furthermore, in the Z-axis direction (perpendicular to the board plane), the CTE of FR-4 increases sharply, and the difference is even greater above the glass transition temperature (Tg). When PCB embedded power modules undergo high-temperature processes such as lamination and reflow soldering, the drastic temperature changes cause inconsistent expansion and contraction between the copper layer and the substrate, resulting in enormous thermomechanical stress. For large-area, unevenly distributed thick copper layers, this stress cannot be effectively released, ultimately leading to severe warpage deformation of the PCB embedded power module.

[0004] Figure 1 This diagram illustrates a prior art PCB-embedded power module that warps due to thermal stress during fabrication. (Example:) Figure 1 As shown, a power chip (power module) is embedded within a PCB. Warping occurs when the PCB-embedded power module bends or twists during manufacturing or assembly. The dashed lines in the figure illustrate how warping can lead to deformation and cracking of the power chip.

[0005] Severe warping can lead to a series of problems: First, it affects embedded power devices, causing IGBT / SiC devices to fail under stress, significantly reducing production yield; second, the internal stress generated by warping will persist in the product, and during long-term use, temperature cycling will exacerbate stress fatigue, eventually leading to reliability issues such as plated through-hole (PTH) cracking and FR4 breakage, shortening product lifespan; finally, warped PCBs are difficult to fit flatly with heat sinks or housings, increasing contact thermal resistance and weakening heat dissipation performance.

[0006] Existing technologies have proposed several solutions to address warpage issues. For example, adding symmetrical copper foil balancing layers in the PCB design can partially offset stress; or optimizing pressure during lamination, such as using pulsed pressure, can slowly release stress. However, for the small size and high integration of PCB-embedded power modules, the effectiveness of balancing layer design and process parameter optimization is limited, and they significantly increase cost and weight, making it difficult to fundamentally solve the stress concentration problem caused by inherent material CTE mismatch. Furthermore, some methods predict warpage and perform design compensation through finite element analysis (FEA), but the accuracy of the simulation depends on complex material constitutive models and precise process parameters, making implementation difficult.

[0007] Therefore, there is an urgent need for a more effective, controllable and easy-to-implement method that works synergistically from both the integrated design and manufacturing process levels to fundamentally suppress the warpage problem of PCB embedded power modules and improve product yield and long-term reliability. Summary of the Invention

[0008] To overcome the shortcomings of existing technologies, this invention provides a PCB embedded warpage suppression method and a low-stress PCB structure based on low-stress structure and three-dimensional commutation topology matching design. This method actively manages and counteracts thermomechanical stress by designing a stress compensation structure and combining it with precise temperature gradient control processes, thereby significantly reducing the warpage of PCB embedded power modules. The method of this invention is applicable to power electronic devices (such as SiC MOSFETs, IGBTs, etc.), providing a high-density integration method for more compact and efficient embedded power module packaging. The PCB embedded power module fabricated using this method features an integrated architecture with low internal stress and high reliability.

[0009] In one embodiment, the present invention discloses a method for suppressing warpage of a PCB-embedded power module, the method including but not limited to the following steps: The thick copper conductive layer of the PCB is divided into multiple independent thick copper segments. Stress relief gaps are reserved between adjacent thick copper segments, and the edges of each thick copper segment are subjected to a gradual transition treatment to form a gradual transition area where the thickness continuously decreases along the radial direction of the board surface. The inner core board, which has the thick copper section, the stress relief gap and the gradual transition zone, is stacked with the prepreg and the outer copper foil in a preset order, and then hot-pressed and cured using a segmented pressurization and stepped temperature control process. In the cooling stage or independent annealing process after hot pressing and curing, a non-uniform temperature field is applied to the PCB surface based on the copper foil thickness distribution map of the PCB. The cooling rate of the area where the thick copper section is located is controlled to be faster than that of the sparse copper foil area, or the target temperature of the area where the thick copper section is located is controlled to be lower than that of the sparse copper foil area, so that a prestress compensation field opposite to the direction of thermal stress is formed inside the PCB.

[0010] In one embodiment, the gradient transition zone is formed by controlling the number of layers of the stacked copper foil to gradually decrease from the heat source concentration area to the heat source dispersion area of ​​the thick copper segment, forming a conical or stepped decreasing structure at the edge of the thick copper segment.

[0011] In one embodiment, the step of hot-press curing using segmented pressurization and stepped temperature control includes: The system is divided into three stages: voltage stabilization, main pressure, and cooling. During the pressure stabilization phase, a first pressure is applied within a first temperature range and maintained for a first time period to soften the resin and expel residual air and moisture from the interlayer. During the main pressure stage, a second pressure is applied within a second temperature range and maintained for a second time period to allow the resin to flow fully and cure. The second temperature range is higher than the first temperature range, the second pressure is greater than the first pressure, and the second time period is greater than the first time period. During the cooling phase, while maintaining the second pressure, the temperature is reduced at a certain rate for a third time period.

[0012] In one embodiment, the first temperature range is 100°C-120°C, the first pressure is 200 psi, and the first time period is 15 minutes.

[0013] In one embodiment, the second temperature range is 170°C-180°C, the second pressure is 300 psi, and the second time period is 60 minutes.

[0014] In one embodiment, the certain rate is 2-3℃ / min, and the third time period is 60-90 minutes.

[0015] In one embodiment, during the application of the non-uniform temperature field, the temperature of each region is dynamically adjusted by a zoned temperature control system so that the surface temperature of the region where the thick copper section is located is lower than that of the sparse copper foil region. The temperature difference is dynamically maintained throughout the cooling process, and the value of the temperature difference is such that the prestress compensation field can just offset most of the thermal stress caused by the mismatch of thermal expansion coefficients after the PCB has been completely cooled to room temperature.

[0016] In one embodiment, the temperature difference is 10°C-15°C.

[0017] In one embodiment, the planar division layout of the thick copper conductive layer of the PCB into multiple independent thick copper segments matches the three-dimensional commutation topology of the power component positions and main current paths embedded inside the PCB; to maintain electrical continuity, adjacent thick copper segments are connected across the stress relief gap through interlayer blind vias or conductive lines of adjacent signal layers.

[0018] In one embodiment, the process of applying the non-uniform temperature field includes: acquiring the thickness distribution curve of the copper foil, generating a target temperature distribution curve through a control algorithm, and driving the partition temperature control device to perform differentiated cooling in real time.

[0019] In one embodiment, the present invention also discloses a low-stress PCB structure manufactured using the method described above. The PCB structure includes an insulating substrate and at least one thick copper conductive layer. The thick copper conductive layer is presented as a plurality of thick copper segments separated by the stress relief gap, and each thick copper segment has a gradually changing transition region with a gradually varying thickness at its edge. The prestress compensation field is solidified inside the PCB structure, and the prestress compensation field is opposite in direction and matches the magnitude of the thermal stress generated by the PCB structure at the operating temperature.

[0020] This invention, through a combination of structural design and process control, effectively disperses and compensates for thermomechanical stress, significantly reducing the warpage of PCB-embedded power modules and improving product yield and long-term reliability. It provides a solution for achieving more compact and efficient embedded power module packaging.

[0021] Compared with the prior art, the present invention has the following beneficial effects: 1. Significantly Reduced Warpage: Through a "segmented layout" and "gradual transition" structural design, macroscopic, concentrated stress is decomposed into microscopic, dispersed stress, reducing stress accumulation at its source. Combined with pre-stress compensation introduced by the "copper thickness temperature gradient control" process, most of the residual stress can be offset, keeping the warpage of the final product below 0.5%, far superior to the industry standard of 0.75%, or even lower.

[0022] 2. Improved production yield and reliability: A flat PCB surface ensures the soldering quality of components (especially BGAs) in the SMT process, significantly reducing the incidence of defects such as cold solder joints and open circuits, and improving first-pass yield. At the same time, due to the low internal residual stress, the reliability of the PCB is significantly improved under harsh conditions such as long-term temperature cycling and vibration, and the fatigue life of plated through-holes and solder joints is extended.

[0023] 3. Optimized Thermal Performance: Although the thick copper layer is segmented, its overall current carrying capacity and heat dissipation capacity are not significantly affected by the reasonable layout and buried via interconnect design. On the contrary, the flatter board surface facilitates a tighter fit with the heatsink, reducing contact thermal resistance and thus improving overall heat dissipation efficiency.

[0024] 4. Design and process synergy, wide applicability: This invention combines structural design optimization with advanced process control to form a complete solution. This method does not rely on expensive special substrate materials, has good compatibility with existing thick copper PCB production lines, and is suitable for various complex thick copper PCB products with uneven copper thickness distribution and large dimensions. Attached Figure Description

[0025] The above-described invention and the following detailed description will be better understood when read in conjunction with the accompanying drawings. It should be noted that the drawings are merely examples of the claimed invention. In the drawings, the same reference numerals represent the same or similar elements.

[0026] Figure 1 This diagram illustrates the warping of a PCB-embedded power module during fabrication due to thermal stress in the prior art. Figure 2 A schematic diagram of a segmented, gradually transitioning low-stress layout of a stress compensation structure according to an embodiment of the present invention is shown. Figure 3 This diagram shows an enlarged cross-sectional view of the edge gradient transition zone according to an embodiment of the present invention. Figure 4 A schematic diagram of a lamination process according to an embodiment of the present invention is shown; Figure 5 A schematic diagram illustrating the principle of a temperature gradient control process according to an embodiment of the present invention is shown. Detailed Implementation

[0027] The following detailed description of the features and advantages of the present invention provides sufficient information for any person skilled in the art to understand and implement the invention. Furthermore, based on the specification, claims, and drawings disclosed herein, those skilled in the art can easily understand the related objectives and advantages of the invention. Although the description of the invention is presented in conjunction with preferred embodiments, this does not mean that the features of the invention are limited to these embodiments. On the contrary, the purpose of describing the invention in conjunction with embodiments is to cover other options or modifications that may arise based on the claims of the invention. To provide a thorough understanding of the invention, numerous specific details will be included in the following description. The invention may also be implemented without using these details. Moreover, to avoid confusion or obscuring the focus of the invention, some specific details will be omitted in the description.

[0028] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0029] Furthermore, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," and "vertical" used in the following description should be understood as the orientations shown in the relevant paragraphs and accompanying drawings. These relative terms are for illustrative purposes only and do not imply that the described apparatus must be manufactured or operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0030] As indicated in this application and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not specifically singular and may include plural forms. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of explicitly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0031] In some embodiments, numbers describing the quantity of components and attributes are used. It should be understood that such numbers used in the description of embodiments are modified in some examples with the terms "approximately," "approximately," or "generally." Unless otherwise stated, "approximately," "approximately," or "generally" indicates that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may be changed depending on the characteristics required by individual embodiments. In some embodiments, numerical parameters should take into account specified significant digits and employ a general method of digit reservation. Although the numerical ranges and parameters used to confirm their breadth of scope in some embodiments of this application are approximate values, in specific embodiments, such values ​​are set as precisely as feasible.

[0032] Furthermore, this application uses specific terms to describe embodiments of the application. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic related to at least one embodiment of the application. Therefore, it should be emphasized and noted that "an embodiment," "one embodiment," or "an alternative embodiment" mentioned twice or more in different locations in this specification do not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of the application can be appropriately combined.

[0033] In the specific description of the embodiments of the present invention, a method for suppressing the warpage of a PCB embedded power module is introduced using a 12-layer PCB embedded power module as an example. However, it should be noted that the PCB embedded power module involved in the present invention is not limited to 12 layers or the specific functional division of each layer. Those skilled in the art should understand that the method for suppressing the warpage of a PCB embedded power module of the present invention can be applied to PCB embedded power modules of any number of layers.

[0034] The PCB embedded power module of this invention can be applied to a certain automotive power module. In one embodiment, taking a 12-layer PCB embedded power module as an example, layers L1-L4 are drive signal layers, layers L5-L10 are current-carrying power layers, L11 is a chip embedding layer, and L12 is a heatsink embedding layer. In one embodiment, the L5-L10 current-carrying power layers can be designed with a large area of ​​20oz (approximately 700μm) thick copper. In one embodiment, the substrate material can be FR-4 with a high Tg value (Tg≥170℃) to improve its dimensional stability at high temperatures.

[0035] The method for suppressing warpage of PCB embedded power modules of the present invention aims to solve the severe warpage problem caused by the mismatch of the coefficients of thermal expansion (CTE) of the chip, copper layer and substrate materials during the design and manufacturing process of PCB embedded power modules. The method includes, but is not limited to, the following steps: Step 1: Design a stress compensation structure. Design a segmented thick copper layout on the thick copper layer, set stress relief gaps between each thick copper segment, and design a transition zone with gradually changing thickness at the edge of the thick copper segment. Step 2: Perform lamination processing, using a step-by-step pressurization and stepped temperature control strategy; Step 3: Implement copper thickness temperature gradient control. In the cooling or independent annealing process after lamination, apply a temperature gradient that is negatively correlated with the copper thickness distribution to the board surface according to the copper foil distribution map of the PCB to form pre-stress compensation.

[0036] The three steps described above will be explained in detail below.

[0037] Step 1: Design the stress compensation structure

[0038] In traditional PCB embedded power module design and fabrication, large-area continuous copper layers lead to thermal stress concentration, causing severe warping deformation. To address this issue, this invention employs a low-stress design technique that combines segmented thick copper layout with gradual transitions. This segmented thick copper layout design divides the continuous thick copper layer into multiple independent rectangular regions, maintaining minimum spacing between each region. Physical stress relief channels are formed in the thick copper regions through transition grooves.

[0039] Specifically, when designing PCB layouts, for thick copper layers (e.g., power or ground layers with a thickness ≥ 3 oz), instead of using a single, large copper plane, a segmented layout is adopted. Specifically, the large area of ​​thick copper is divided into multiple smaller, independent thick copper segments. Stress relief gaps of a specific width are reserved between these segments. Simultaneously, to avoid abrupt stress concentration at the edges of the thick copper segments, each segment undergoes a gradual transition, forming a transition zone with gradually decreasing thickness.

[0040] Furthermore, the gradient transition zone can be designed as a tapered edge structure with a linear thickness reduction from the center to the edge of the thick copper segment, or as a multi-level stepped thickness reduction structure formed by multiple electroplating and local etching processes. This design can smoothly disperse stress from a point to a region, avoiding the formation of stress concentration points.

[0041] Furthermore, the stress relief gap can be filled with a low-modulus flexible resin material with a CTE between that of copper and the substrate material, serving as a buffer. If electrical continuity is required, adjacent thick copper segments can be connected across the gap using fine wires or copper-plated vias in other layers (such as signal layers) during the design phase.

[0042] Figure 2 A schematic diagram of a segmented, gradually transitioning low-stress layout for a stress compensation structure according to an embodiment of the present invention is shown. Figure 2As shown, stress compensation design is performed on the current-carrying power layers L5-L10. The original single copper plane is divided into several (e.g., Figure 2 The four main thick copper segments 210 are defined based on the layout of the power devices and the main current path. Stress relief gaps 220 with a width of 1.0 mm are provided between each thick copper segment 210. These gaps will be filled with resin in subsequent processes; their function is to physically interrupt the continuous transmission of stress, decomposing a large stress field into several (e.g., Figure 2 (Four) smaller, independent stress fields. To ensure the integrity of the converter circuit, adjacent thick copper sections 210 are connected by interlayer blind vias (e.g., Φ0.6mm in diameter) to form a complete electrical network.

[0043] In one embodiment, the thick copper segment 210 includes the following structures from top to bottom: copper layer 200 (layer 1), copper layer 201 (layer 2), copper layer 202 (layer 3), copper layer 203 (layer 4), copper layer 204 (layer 5), copper layer 206 (layer 6), chip embedding layer 207, heat sink embedding layer 208, buried via copper pillar 209, and embedded power chip 210.

[0044] Figure 3 This diagram shows an enlarged cross-sectional view of the edge gradient transition region according to an embodiment of the present invention. The present invention performs a gradient transition treatment on each thick copper segment 210. A gradient transition region 300 is formed by laminating stacked copper foils. The gradient transition region 300 smoothly transitions from a four-segment structure with concentrated heat sources (e.g., a central high-heat region) to a two-segment structure with dispersed heat sources (e.g., a peripheral low-heat region). This reduction in the number of segments manifests in the physical cross-section as a continuous reduction in thickness (height) along the Z-axis, thereby forming a tapered profile or a stepped decreasing structure at the edge of the thick copper segment. This tapered or stepped decreasing structure effectively avoids thermal stress concentration under the combined heat sources of thick copper current carrying and chip heating, allowing stress to be distributed smoothly to the surrounding substrate area.

[0045] Step 2: Lamination process

[0046] The materials, including the inner core board containing the stress compensation structure, prepreg (PP), and outer copper foil (the top or bottom copper foil in the PCB stack-up structure), are stacked in a predetermined order and then subjected to hot pressing. This process preferably employs a step-by-step pressurization and stepped temperature control strategy. For example, pre-pressing is first performed at a lower pressure and temperature to expel interlayer gases and volatiles, and then the temperature and pressure are gradually increased to the curing point to ensure that the resin flows fully and fills all gaps, while minimizing the internal stress generated during lamination.

[0047] Figure 4A schematic diagram illustrating the principle of a temperature gradient control process according to an embodiment of the present invention is shown. In this embodiment, a core board with fabricated inner layer circuitry (stress compensation structure) is laminated with a prepreg (PP) sheet and an outer copper foil. In one embodiment, a high-flow-rate 1080 type PP sheet can be used to ensure that the resin can completely fill the microstructure of the stress relief gap 220 and the gradient transition zone 300.

[0048] The lamination process can employ the following three-stage pressurization process: 1. Stabilization phase: At a first temperature range (e.g., about 100°C-120°C), apply a first pressure (e.g., a low pressure of about 200 psi) for a first time period (e.g., about 15 minutes) to soften the resin and expel residual air and moisture from the interlayer.

[0049] 2. Main pressure stage: Increase the temperature to the second temperature range (e.g., about 170°C-180°C), increase the pressure to the second pressure (e.g., a low pressure of about 300 psi), and continue for the second time period (e.g., about 60 minutes) to allow the resin to flow fully and cure.

[0050] 3. Cooling phase: While maintaining the second pressure (e.g., about 300 psi), the temperature is programmed to decrease at a certain rate (e.g., 2-3 °C / min) for a third time period (e.g., about 60-90 minutes).

[0051] Step 3: Copper Thickness Temperature Gradient Control

[0052] This step is one of the core innovations of this invention. During the cooling stage after lamination, or in a subsequent independent annealing process, a precisely controlled, non-uniform temperature field is applied to the PCB surface. This temperature field is designed based on the PCB's copper distribution map. Specifically, through a zoned heating or cooling system, the cooling rate of areas with high copper foil coverage and thickness is faster than, or the target temperature is lower than, areas with sparse copper foil and thinner thickness. Since copper shrinks more during cooling than the substrate, allowing the thicker copper areas to "cool more" actively introduces a pre-stress field with a controllable magnitude, opposite to the direction of thermal stress. This pre-stress field effectively compensates for and counteracts the tensile stress caused by CTE mismatch, resulting in extremely low overall internal stress levels and significantly reduced warpage when the PCB returns to room temperature.

[0053] Figure 5A schematic diagram of a copper thickness temperature gradient control system according to an embodiment of the present invention is shown. During the cooling stage of the lamination process described above, the copper thickness temperature gradient control system 500 is activated when the PCB temperature begins to decrease from 180°C. This system includes multiple independently controllable heating / cooling units 510 (e.g., an array of infrared heating lamps or an array of air-cooled nozzles) and a high-precision infrared thermometer 520. The system first generates a copper thickness distribution curve based on the PCB design file (Gerber file), which reflects the equivalent thickness of the copper foil in different areas of the board surface. Based on this distribution curve, the control system adjusts the power of each heating / cooling unit 510 in real time to form a target temperature distribution curve on the PCB surface related to the copper thickness distribution curve. Specifically, for the area containing the thick copper section 210, its cooling rate is accelerated, making its surface temperature lower than that of the sparse copper foil areas, for example, by 10-15°C. This temperature difference is dynamically maintained throughout the cooling process (from 180°C to 80°C). This differentiated cooling causes the thick copper area to have a greater contraction tendency than the thin copper area, thereby forming a compressive prestress compensation field inside the PCB that is opposite to the direction of thermal stress. Once the PCB has completely cooled to room temperature, the prestress compensation field can just offset most of the tensile stress caused by CTE mismatch.

[0054] In one embodiment, the copper thickness temperature gradient control system of the present invention can also be designed as an adaptive stress control system, which generates a target temperature distribution curve related to the copper thickness distribution curve through an algorithm to realize an adaptive control mechanism.

[0055] In one embodiment, the copper thickness temperature gradient control system of the present invention can be divided into a multi-zone temperature control system, dividing the electroplating tank into three temperature zones: a preheating zone, a main electroplating zone, and a slow cooling zone, and implementing a copper thickness gradient temperature control strategy.

[0056] This invention also provides a low-stress PCB structure manufactured using the above method. This structure exhibits excellent flatness and long-term reliability. The structure comprises a substrate and at least one thick copper conductive layer. This thick copper conductive layer is presented as multiple thick copper segments separated by stress-relief gaps, each segment having a transition zone with a gradually varying thickness at its edge. Most importantly, a precisely designed pre-stress compensation field is cured within the PCB structure. This pre-stress field is opposite in direction and similar in magnitude to the thermal stress generated by the PCB at operating temperature, thereby maintaining high flatness of the PCB throughout the entire operating temperature range. For example, when the PCB cools from a high temperature to room temperature, the non-uniform shrinkage caused by differential cooling is locked by the resin curing reaction, forming a pre-existing compressive stress distribution within the board. When the power module expands under heat at operating temperature, generating tensile thermal stress, this pre-stress field is similar in magnitude and opposite in direction, thereby dynamically offsetting the stress and maintaining overall flatness.

[0057] The terminology and expressions used above are for descriptive purposes only, and the invention should not be limited to these terms and expressions. The use of these terms and expressions does not mean excluding any illustrative and descriptive equivalent features (or parts thereof), and it should be recognized that various modifications that may exist should also be included within the scope of the claims. Other modifications, variations, and substitutions may also exist. Accordingly, the claims should be considered to cover all such equivalents.

[0058] Similarly, it should be noted that, in order to simplify the description of the present application and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of the embodiments of the present application sometimes combines multiple features into a single embodiment, drawing, or description thereof. However, this disclosure method does not imply that the subject matter of the present application requires more features than those mentioned in the claims.

[0059] Similarly, it should be noted that although the present invention has been described with reference to the specific embodiments described above, those skilled in the art should recognize that the above embodiments are only used to illustrate the present invention, and various equivalent changes or substitutions can be made without departing from the spirit of the present invention. Therefore, any changes or modifications to the above embodiments within the scope of the essential spirit of the present invention will fall within the scope of the claims of this application.

Claims

1. A method for suppressing warpage of PCB embedded power modules, characterized in that, include: The thick copper conductive layer of the PCB is divided into multiple independent thick copper segments. Stress relief gaps are reserved between adjacent thick copper segments, and the edges of each thick copper segment are subjected to a gradual transition treatment to form a gradual transition area where the thickness continuously decreases along the radial direction of the board surface. The inner core board, which has the thick copper section, the stress relief gap and the gradual transition zone, is stacked with the prepreg and the outer copper foil in a preset order, and then hot-pressed and cured using a segmented pressurization and stepped temperature control process. In the cooling stage or independent annealing process after hot pressing and curing, a non-uniform temperature field is applied to the PCB surface based on the copper foil thickness distribution map of the PCB. The cooling rate of the area where the thick copper section is located is controlled to be faster than that of the sparse copper foil area, or the target temperature of the area where the thick copper section is located is controlled to be lower than that of the sparse copper foil area, so that a prestress compensation field opposite to the direction of thermal stress is formed inside the PCB.

2. The method as described in claim 1, characterized in that, The gradual transition zone is formed by controlling the number of layers of the stacked copper foil to gradually decrease from the heat source concentration area to the heat source dispersion area of ​​the thick copper segment, forming a conical or stepped decreasing structure at the edge of the thick copper segment.

3. The method as described in claim 1, characterized in that, The steps for hot pressing curing using a segmented pressurization and stepped temperature control process include: The system is divided into three stages: voltage stabilization, main pressure, and cooling. During the pressure stabilization phase, a first pressure is applied within a first temperature range and maintained for a first time period to soften the resin and expel residual air and moisture from the interlayer. During the main pressure stage, a second pressure is applied within a second temperature range and maintained for a second time period to allow the resin to flow fully and cure. The second temperature range is higher than the first temperature range, the second pressure is greater than the first pressure, and the second time period is greater than the first time period. During the cooling phase, while maintaining the second pressure, the temperature is reduced at a certain rate for a third time period.

4. The method as described in claim 3, characterized in that, The first temperature range is 100℃-120℃, the first pressure is 200psi, and the first time period is 15 minutes.

5. The method as described in claim 3, characterized in that, The second temperature range is 170℃-180℃, the second pressure is 300psi, and the second time period is 60 minutes.

6. The method as described in claim 3, characterized in that, The specified rate is 2-3℃ / min, and the third time period is 60-90 minutes.

7. The method as described in claim 1, characterized in that, During the application of the non-uniform temperature field, the temperature of each region is dynamically adjusted by the zoned temperature control system, so that the surface temperature of the region where the thick copper section is located is lower than that of the sparse copper foil region. The temperature difference is dynamically maintained throughout the cooling process, and the value of the temperature difference is such that when the PCB is completely cooled to room temperature, the prestress compensation field can just offset most of the thermal stress caused by the mismatch of thermal expansion coefficients.

8. The method as described in claim 7, characterized in that, The temperature difference is 10℃-15℃.

9. The method as described in claim 1, characterized in that, The planar layout of dividing the thick copper conductive layer of the PCB into multiple independent thick copper segments matches the three-dimensional commutation topology of the power components embedded inside the PCB and the main current path; to maintain electrical continuity, adjacent thick copper segments are connected across the stress relief gap through interlayer blind vias or conductive lines of adjacent signal layers.

10. The method as described in claim 1, characterized in that, The process of applying the non-uniform temperature field includes: acquiring the thickness distribution curve of the copper foil, generating the target temperature distribution curve through a control algorithm, and driving the partition temperature control equipment to perform differentiated cooling in real time.

11. A low-stress PCB structure manufactured using the method described in any one of claims 1 to 10, characterized in that, It includes an insulating substrate and at least one thick copper conductive layer; the thick copper conductive layer is presented as a plurality of thick copper segments separated by the stress relief gap, and each thick copper segment has a gradually changing transition area with a gradually changing thickness at its edge; the prestress compensation field is solidified inside the PCB structure, and the prestress compensation field is opposite in direction and matches the magnitude of the thermal stress generated by the PCB structure at the operating temperature.

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