Semiconductor memory device, method of manufacturing semiconductor memory device
By designing the connection method between the leads and the substrate in the semiconductor memory device, bending processing is avoided, the problem of high processing difficulty is solved, and the processing accuracy and device thickness are reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- KIOXIA CORP
- Filing Date
- 2025-06-27
- Publication Date
- 2026-07-31
AI Technical Summary
The high processing technology and precision requirements of existing semiconductor memory devices have increased manufacturing difficulty.
By designing the leads of electronic components to converge from the central axis of the component body in the thickness direction of the substrate, and fixing them after the extended front end of the lead is aligned with the connection part of the substrate, bending of the lead is avoided, and end face through holes are used as the connection part.
This reduces the processing technology and precision requirements for semiconductor memory devices, simplifies the manufacturing process, reduces capacitor tilting and offset, and enables the device to be made thinner.
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Figure CN122497079A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to a semiconductor memory device and a method for manufacturing a semiconductor memory device. Background Technology
[0002] A semiconductor memory device is known, comprising: a substrate having a through hole; and an electronic component having a lead inserted into the through hole. Summary of the Invention
[0003] One embodiment provides a semiconductor memory device and a method for manufacturing the semiconductor memory device that can reduce the requirements for processing technology or processing accuracy.
[0004] One embodiment of a semiconductor memory device includes: a substrate; a semiconductor memory disposed on the substrate; and an electronic component having a body and leads. The body has a central axis, and the leads extend from the body and are connected to a connection portion of the substrate. The electronic component is arranged such that the central axis of the body converges within the thickness of the substrate in the thickness direction. The leads are fixed to the connection portion with their extended tips facing the connection portion in the extension direction of the leads extending from the body. Attached Figure Description
[0005] Figure 1 This is a perspective view of a semiconductor memory device according to the first embodiment.
[0006] Figure 2 This is a perspective view of the semiconductor memory device according to the first embodiment, shown in partial decomposition.
[0007] Figure 3 This is a diagram showing the capacitor of the first embodiment.
[0008] Figure 4 This is a perspective view showing a portion of the substrate according to the first embodiment.
[0009] Figure 5 It is along Figure 4 A cross-sectional view of a portion of the substrate along line F5-F5.
[0010] Figure 6 This is a diagram illustrating the positional relationship between the substrate and the capacitor in the first embodiment.
[0011] Figure 7 yes Figure 1 The diagram shows a cross-sectional view of the semiconductor memory device along line F7-F7.
[0012] Figure 8 This is an enlarged top view showing the connection portion of the substrate in the second embodiment.
[0013] Figure 9 This is an enlarged perspective view showing the state in which the conductive part of the connector in the second embodiment is separated from the substrate.
[0014] Figure 10 It means Figure 9 An enlarged perspective view of a deformed example of the conductive part.
[0015] Figure 11 This is a three-dimensional diagram of an axial capacitor. Detailed Implementation
[0016] Hereinafter, the semiconductor memory device according to the embodiments will be described with reference to the accompanying drawings.
[0017] In the following description, components with the same or similar functions are labeled with the same reference numerals. Furthermore, repeated descriptions of these components are sometimes omitted. In this application, "parallel," "orthogonal," or "identical" can respectively include cases of "generally parallel," "generally orthogonal," or "generally identical." In this application, "overlapping" refers to the virtual projected images of two objects overlapping each other. That is, "overlapping" is not limited to the case where two objects are in contact, but can also include cases where two objects are not in contact (e.g., where there is space or other components between two objects). In this application, "fixed" is not limited to the case where two objects are directly fixed, but can also include cases where other components are placed between them to fix the two objects. In this application, "connected" is not limited to mechanical connections, but can also include electrical connections. That is, "connected" is not limited to the case of direct connection to an object, but can also include cases where other components are placed between them to connect to the object.
[0018] In this application, the +X direction, -X direction, +Y direction, -Y direction, +Z direction, and -Z direction are defined as follows. The +X direction, -X direction, +Y direction, and -Y direction are related to the first surface 21a of the substrate 21 described later (refer to...). Figure 2 The +X direction is parallel to the direction from the second end 10b of the housing 10 (described later) toward the first end 10a (see reference). Figure 1 The -X direction is the direction opposite to the +X direction. Without distinguishing between the +X and -X directions, it is simply referred to as the "X direction". The +Y and -Y directions are directions that intersect (e.g., are orthogonal) the X direction. The +Y direction is the direction from the fourth end 10d of the housing 10 described later toward the third end 10c (see reference). Figure 1The -Y direction is the direction opposite to the +Y direction. Without distinguishing between the +Y and -Y directions, it is simply referred to as the "Y direction". The +Z and -Z directions are directions that intersect (e.g., are orthogonal) the X and Y directions, and are the thickness directions of the substrate 21. The +Z direction is the direction from the substrate 21 toward the first main wall 11 of the housing 10 (see reference). Figure 2 The -Z direction is the direction opposite to the +Z direction. Without distinguishing between the +Z and -Z directions, it is simply referred to as the "Z direction". The X direction is an example of the "first direction". The Z direction is an example of the "second direction". The +Z direction side is an example of the "first side". The -Z direction side is an example of the "second side".
[0019] Hereinafter, the semiconductor memory device according to the embodiments will be described with reference to the accompanying drawings.
[0020] (First Implementation)
[0021] Reference Figures 1 to 7 The semiconductor storage device 1 according to the first embodiment will be described. The semiconductor storage device 1 is, for example, a storage device such as an SSD (Solid State Drive). The semiconductor storage device 1 is installed in a host device and serves as the host device's storage device. The host device is a personal computer, mobile device, video recorder, or vehicle-mounted device, etc., but is not limited to these examples.
[0022] Figure 1 This is a perspective view of a semiconductor memory device 1. The semiconductor memory device 1, for example, has a housing 10 and a substrate unit 20.
[0023] The housing 10 is a component that forms the outer contour of the semiconductor memory device 1. The housing 10 is, for example, a flat rectangular box. The housing 10 has a first end 10a and a second end 10b as a pair of ends separated in the longitudinal direction (X direction) of the housing 10. The first end 10a has an opening (not shown) that exposes the connector 22 of the substrate unit 20 (described later) to the outside of the housing 10. The housing 10 has a third end 10c and a fourth end 10d as a pair of ends separated in the short-side direction (Y direction) of the housing 10.
[0024] The housing 10, for example, has a first main wall 11, a second main wall 12, a first side wall 13, a second side wall 14, and a third side wall 15. The first main wall 11 is a wall along both the X and Y directions. The first main wall 11 is located on the +Z direction side relative to the substrate unit 20. The first main wall 11 extends from the +Z direction side towards the substrate 21 (described laterally). The first main wall 11 is an example of a "first wall". The second main wall 12 is a wall along both the X and Y directions. The second main wall 12 is located on the -Z direction side relative to the substrate unit 20. The second main wall 12 extends from the -Z direction side towards the substrate 21. The second main wall 12 is an example of a "second wall". The first side wall 13, the second side wall 14, and the third side wall 15 are each a wall along the Z direction, extending between the end of the first main wall 11 and the end of the second main wall 12. The first side wall 13 is located at the end of the housing 10 on the -X direction side. The second side wall 14 is located at the end of the housing 10 on the +Y direction side. The third sidewall 15 is located at the end of the housing 10 on the -Y direction side.
[0025] The substrate unit 20 will now be described. Figure 2 This is a partially exploded perspective view of the semiconductor memory device 1. A substrate unit 20 is housed within a housing 10. The substrate unit 20 includes, for example, a substrate 21, a connector 22, a controller 23, multiple DRAM (Dynamic Random Access Memory) 24, multiple NAND flash memory 25 (hereinafter referred to as "NAND 25"), and multiple capacitors (energy storage components) 26. In this embodiment, each capacitor 26 is, for example, a cylindrical capacitor. The multiple capacitors 26 include groups of multiple capacitors 26A arranged in parallel and groups of multiple capacitors 26B also arranged in parallel.
[0026] Substrate 21 is a board component extending along the X and Y directions. Substrate 21 is a printed circuit board, including an insulating substrate and a wiring pattern disposed on the insulating substrate. Substrate 21 has a first surface 21a and a second surface 21b located on the side opposite to the first surface 21a. The first surface 21a extends along both the X and Y directions and faces the +Z direction. The second surface 21b extends along both the X and Y directions and faces the -Z direction.
[0027] The substrate 21 has an opening 21h. The opening 21h is, for example, a rectangular shape with its long side in the Y direction. The opening 21h is a through-hole penetrating the substrate 21 in the Z direction. The opening 21h is an example of a "space portion". A component body (body) 30 of the capacitor 26, described later, is disposed in the opening 21h. In this embodiment, the opening 21h has a size capable of accommodating the component body 30 of a plurality of capacitors 26 arranged in the Y direction.
[0028] Connector 22 is a connection part capable of connecting to a connector of a host device. Connector 22 is also referred to as an edge connector. Connector 22 has multiple metal terminals capable of connecting to a connector of a host device. Connector 22 is disposed at the end of the substrate 21 on the +X direction side.
[0029] The controller 23 is a component that provides unified control over the entire semiconductor memory device 1. The controller 23 may be, for example, a semiconductor package including a SoC (System on a Chip), in which host interface circuitry for the host device, control circuitry for controlling multiple DRAMs 24, and control circuitry for controlling multiple NAND 25 are integrated into a single semiconductor chip. The controller 23 may be disposed, for example, on the second surface 21b of the substrate 21.
[0030] DRAM 24 is a semiconductor package that includes a volatile semiconductor memory chip. DRAM 24 is a data buffer that temporarily stores write data received from a host device or read data read from NAND 25. DRAM 24 is disposed, for example, on the first surface 21a of substrate 21. DRAM 24 may also be disposed inside controller 23.
[0031] NAND 25 is a semiconductor package that includes a non-volatile semiconductor memory chip. NAND 25 is disposed, for example, on a first surface 21a and a second surface 21b of a substrate 21. Multiple NAND 25s are arranged in the X and Y directions. NAND 25 is an example of a "semiconductor memory." Hereinafter, NAND 25 is sometimes referred to as semiconductor memory 25. Furthermore, the term "semiconductor memory" as used in this application is not limited to NAND 25, and may also refer to other types of semiconductor memory such as NOR memory, MRAM (Magnetoresistive Random Access Memory), or resistive variable memory.
[0032] Capacitor 26 is one of the components electrically connected to substrate 21. Capacitor 26 serves, for example, as a power backup function for data protection in the event of an unexpected power outage. In this embodiment, capacitor 26 supplies power to controller 23, multiple DRAMs 24, and multiple NAND 25 for a certain period of time in the event of an unexpected power outage from the host device. Capacitor 26 is, for example, an electrolytic capacitor. More specifically, capacitor 26 is, for example, an aluminum electrolytic capacitor. However, capacitor 26 is not limited to the above examples and also includes impregnated, box-type, and axial-type capacitors.
[0033] Figure 11This refers to an axial capacitor 26'. For example, leads 31 and 32 extend from both ends of the cylindrical component body 30 along its axial direction. The capacitor 26' is configured and mounted in the same manner as the capacitor 26 described later, such that the central axis of the component body 30 converges within the thickness T1 of the substrate 21 in the thickness direction T (see reference). Figure 6 , Figure 7 With the extended tips of the leads 31 and 32 facing the connection portion of the substrate 21 in the extending direction of the leads 31 and 32 extending from the component body 30, the leads 31 and 32 are fixed to the connection portion. Capacitors 26 and 26' are examples of "electronic components".
[0034] Multiple capacitors 26A are disposed relative to multiple capacitors 26B on the +Y direction side. The multiple capacitors 26A are arranged in the X direction. The first lead 31 and the second lead 32 of the capacitors 26A protrude from the component body 30 of the capacitor 26A toward the +Y direction side. The first lead 31 and the second lead 32 of the capacitors 26A are inserted into the first recess 41 and the second recess 42 provided on the +Y direction side of the opening 21h (see reference). Figure 4 ).
[0035] On the other hand, a plurality of capacitors 26B are disposed in the Y direction between the plurality of capacitors 26A and the third sidewall 15 of the housing 10. The plurality of capacitors 26B are arranged in the X direction. The first lead 31 and the second lead 32 of the capacitors 26B protrude from the component body 30 of the capacitors 26B toward the -Y direction side. The first lead 31 and the second lead 32 of the capacitors 26B are inserted into the first recess 41 and the second recess 42 provided on the -Y direction side of the opening 21h (see reference). Figure 4 Furthermore, a gap (e.g., 2 mm) can also be provided between capacitors 26A and 26B arranged in the Y direction to allow the pressure valve 30p to open.
[0036] The plurality of recesses 11r provided on the first main wall 11 include a plurality of recesses 11rA and a plurality of recesses 11rB. The plurality of recesses 11rA are configured at positions corresponding one-to-one with the plurality of capacitors 26A. The recesses 11rA overlap with the component body 30 of the capacitor 26A when viewed from the Z direction. A portion of the component body 30 of the capacitor 26A is disposed inside the recesses 11rA, located on the +Z direction side closer than a portion of the first main wall 11 (e.g., the end on the -Z direction side).
[0037] Multiple recesses 11rB are positioned in a one-to-one correspondence with multiple capacitors 26B. The recesses 11rB overlap with the component body 30 of the capacitors 26B when viewed from the Z direction. A portion of the component body 30 of the capacitors 26B is disposed inside the recesses 11rB, located on the +Z direction side closer than a portion of the first main wall 11 (e.g., the end on the -Z direction side).
[0038] The plurality of recesses 12r provided on the second main wall 12 include a plurality of recesses 12rA and a plurality of recesses 12rB. The plurality of recesses 12rA are configured at positions corresponding one-to-one with the plurality of capacitors 26A. The recesses 12rA overlap with the component body 30 of the capacitor 26A when viewed from the Z direction. A portion of the component body 30 of the capacitor 26A is disposed inside the recesses 12rA, located on the -Z direction side closer than a portion of the second main wall 12 (e.g., the end on the +Z direction side).
[0039] Multiple recesses 12rB are positioned in a one-to-one correspondence with multiple capacitors 26B. The recesses 12rB overlap with the component body 30 of the capacitors 26B when viewed from the Z direction. A portion of the component body 30 of the capacitors 26B is disposed inside the recesses 12rB, located on the -Z direction side closer than a portion of the second main wall 12 (e.g., the end on the +Z direction side).
[0040] The first main wall 11 has a thick-walled portion 11n between recesses 11rA and 11rB. The thick-walled portion 11n is thicker than the portion of the first main wall 11 in which recesses 11rA or 11rB are provided. The thick-walled portion 11n extends along the X direction with a constant thickness, for example. A beam extending along the X direction is formed between recesses 11rA and 11rB through the thick-walled portion 11n.
[0041] Similarly, the second main wall 12 has a thick-walled portion 12n between the recesses 12rA and 12rB. The thick-walled portion 12n is thicker than the portion of the second main wall 12 in which the recesses 12rA or 12rB are provided. The thick-walled portion 12n extends along the X direction with a constant thickness, for example. A beam extending along the X direction is formed between the recesses 12rA and 12rB through the thick-walled portion 12n.
[0042] Figure 3 This is a diagram showing capacitor 26. Capacitor 26, for example, has a component body 30, a first lead 31, and a second lead 32.
[0043] The component body 30 is the part that performs the main function of the electronic component. For example, the component body 30 of the capacitor 26 is the part that stores charge when a DC voltage is applied. The component body 30 includes, for example, a metal that serves as an electrode, a dielectric, and an electrolyte. The component body 30 is cylindrical. The diameter Da of the component body 30 is greater than the thickness T1 in the Z direction of the substrate 21 (see reference). Figure 6 The main body 30 of the component includes, for example, a first end face 30a, a second end face 30b, and a peripheral face 30c.
[0044] The first end face 30a is located on the side opposite to the first lead 31 and the second lead 32. The first end face 30a is circular. A pressure valve (safety valve) 30p is provided on the first end face 30a. The pressure valve 30p opens when the internal pressure of the component body 30 rises above a predetermined reference value in an abnormal situation, releasing the gas inside the component body 30 to the outside of the component body 30. However, the pressure valve 30p is not limited to being mandatory.
[0045] The second end face 30b is located on the opposite side of the first end face 30a. The second end face 30b is circular. The first lead 31 and the second lead 32 protrude from the second end face 30b. The circumferential surface 30c extends in a direction that intersects (e.g., orthogonally) with the first end face 30a and the second end face 30b, spanning the first end face 30a and the second end face 30b. The circumferential surface 30c is annular.
[0046] The first lead 31 is a first terminal for electrical connection. The first lead 31 protrudes from the second end face 30b of the component body 30. The first lead 31 protrudes in a direction intersecting (e.g., orthogonal) with the second end face 30b. The first lead 31 extends in a straight line away from the component body 30. The first lead 31 is cylindrical with a diameter Db. The first lead 31 extends parallel to the axial direction of the component body 30. The front end face (the end face opposite to the second end face 30b in the axial direction of the component body 30) 31a of the first lead 31 in the extension direction is opposite to the inner cover portion 83 of the first conductive portion 43, which will be described later. Hereinafter, the front end face 31a is sometimes referred to as the extension front end 31a.
[0047] The second lead 32 is a second terminal for electrical connection. The second lead 32 protrudes from the second end face 30b of the component body 30. The second lead 32 protrudes in a direction intersecting (e.g., orthogonal) with the second end face 30b. The second lead 32 extends in a straight line away from the component body 30. The second lead 32 is cylindrical with a diameter Db. The second lead 32 extends parallel to the axial direction of the component body 30. The front end face (the end face opposite to the second end face 30b in the axial direction of the component body 30) 32a of the second lead 32 is opposite to the inner cover portion 83 of the second conductive portion 44, which will be described later, in the extension direction. Hereinafter, the front end face 32a is sometimes referred to as the extension front end 32a.
[0048] The mounting structure of capacitor 26 will now be described. First, the structure of substrate 21, which is associated with the mounting structure of capacitor 26, will be described.
[0049] Figure 4 This is a perspective view showing a portion of the substrate 21 adjacent to the opening 21h. The substrate 21 has a third surface 21c. The third surface 21c extends along the Z direction and crosses the first surface 21a and the second surface 21b. The third surface 21c is an end face that defines the thickness of the substrate 21. In this embodiment, the third surface 21c is an end face adjacent to the opening 21h, defining the edge of the opening 21h.
[0050] In this embodiment, the substrate 21 has a first recess 41, a second recess 42, a first conductive portion 43, and a second conductive portion 44 as part of the mounting structure of the capacitor 26.
[0051] A first recess 41 and a second recess 42 are disposed on the third surface 21c. The first recess 41 and the second recess 42 are located, for example, on the +Y direction side relative to the opening 21h. The first recess 41 and the second recess 42 are disposed at different positions in the X direction. The first recess 41 and the second recess 42 are recessed in the +Y direction relative to the third surface 21c. The first recess 41 and the second recess 42 extend along the Z direction. For example, the first recess 41 and the second recess 42 penetrate the substrate 21 in the Z direction, spanning the first surface 21a and the second surface 21b of the substrate 21. In this embodiment, the interior of the first recess 41 and the interior of the second recess 42 are adjacent to the opening 21h. The interior of the first recess 41 and the interior of the second recess 42 communicate with the opening 21h.
[0052] A first conductive portion 43 is disposed on the inner surface of the first recess 41. The first conductive portion 43 is, for example, a metal layer (e.g., a plating layer) formed along the inner surface of the first recess 41. The first conductive portion 43 is, for example, a metal layer with a thickness of 0.05 mm. In addition to the inner surface of the first recess 41, the first conductive portion 43 may also be disposed on at least one of the first surface 21a and the second surface 21b of the substrate 21. The first conductive portion 43 is an end-face through-hole connected to the wiring pattern of the substrate 21.
[0053] The second conductive portion 44 is disposed on the inner surface of the second recess 42. The second conductive portion 44 is, for example, a metal layer (e.g., a plating) formed along the inner surface of the second recess 42. The second conductive portion 44 is, for example, a metal layer with a thickness of 0.05 mm. In addition to the inner surface of the second recess 42, the second conductive portion 44 may also be disposed on at least one of the first surface 21a and the second surface 21b of the substrate 21. The second conductive portion 44 is an end-face through-hole, which connects to the wiring pattern of the substrate 21 in a state of electrical insulation from the first conductive portion 43.
[0054] Figure 5 yes Figure 4 The diagram shows a cross-sectional view of a portion of the substrate 21 along line F5-F5. In this embodiment, the first recess 41 has an arcuate portion 41a and a straight portion 41b. The arcuate portion 41a is located inside the first recess 41. The arcuate portion 41a is, for example, arcuately recessed in a direction away from the opening 21h when viewed from the Z direction. The arcuate portion 41a is, for example, semi-circular in shape when viewed from the Z direction. The straight portion 41b extends in a straight line from both ends of the arcuate portion 41a in the X direction towards the -Y direction. The straight portion 41b spans the arcuate portion 41a and the third surface 21c. The aforementioned first conductive portion 43 is provided on both the arcuate portion 41a and the straight portion 41b.
[0055] The diameter Db of the first lead 31 is, for example, 0.5 mm (with a tolerance of + / - 0.05 mm). The radius of curvature R of the arc portion 41a is, for example, 0.5 mm. The length of the straight portion 41b in the Y direction is, for example, 0.8 mm. In this embodiment, the depth S in the Y direction of the first recess 41 is greater than the diameter Db of the first lead 31. For example, the depth S in the Y direction of the first recess 41 is more than twice the diameter Db of the first lead 31.
[0056] Similarly, the second recess 42 has an arcuate portion 42a and a straight portion 42b. The arcuate portion 42a is located inside the second recess 42. The arcuate portion 42a is, for example, arcuately recessed in the direction away from the opening 21h when viewed from the Z direction. The arcuate portion 42a is, for example, semi-circular in shape when viewed from the Z direction. The straight portion 42b extends in a straight line from both ends of the arcuate portion 42a in the X direction towards the -Y direction. The straight portion 42b spans the arcuate portion 42a and the third surface 21c. The aforementioned second conductive portion 44 is provided on both the arcuate portion 42a and the straight portion 42b.
[0057] The diameter Db of the second lead 32 is, for example, 0.5 mm (with a tolerance of + / - 0.05 mm). The radius of curvature R of the arc portion 42a is, for example, 0.5 mm. The length of the straight portion 42b in the Y direction is, for example, 0.8 mm. In this embodiment, the depth S in the Y direction of the second recess 42 is greater than the diameter Db of the second lead 32. For example, the depth S in the Y direction of the second recess 42 is more than twice the diameter Db of the second lead 32.
[0058] The positional relationship between the substrate 21 and the capacitor 26 will be explained below. Figure 6 This is a diagram illustrating the positional relationship between the substrate 21 and the capacitor 26. As described above, the component body 30 of the capacitor 26 is disposed at the opening 21h. Furthermore, the first end face 30a of the component body 30 is disposed at least 2 mm away from the edge of the opening 21h, at a distance required for the opening of the pressure valve 30p (see reference). Figure 2 ).
[0059] like Figure 6 As shown, the component body 30 overlaps with the third surface 21c of the substrate 21 when viewed in the Y direction. In this embodiment, the central axis CL of the cylindrical component body 30 along the axial direction overlaps with the third surface 21c of the substrate 21 when viewed in the Y direction. The central axis CL of the component body 30 is disposed within the thickness T1 of the substrate 21 in the Z direction (thickness direction T) when viewed in the Y direction. For example, the central axis CL of the component body 30 is disposed on the center surface T2 of the substrate 21 in the Z direction (thickness direction T) when viewed in the Y direction. The central axis CL in the above description is a line segment with the same length as the component body 30 in the axial direction.
[0060] The first lead 31 protrudes from the component body 30 toward the first recess 41. The front end of the first lead 31 is located inside the first recess 41. The first lead 31 is fixed to the first conductive portion 43 in a state where at least a portion overlaps with the first recess 41 when viewed from the Y direction. The first lead 31 is connected to the first conductive portion 43 and is electrically connected to the wiring pattern of the substrate 21 via the first conductive portion 43. The first conductive portion 43 is an example of a "connection portion". Hereinafter, the first conductive portion 43 is sometimes referred to as the connection portion 43.
[0061] In this embodiment, a conductive first bonding portion 51 is provided inside the first recess 41. The first bonding portion 51 is, for example, solder. In this embodiment, the first lead 31 is fixed to the first conductive portion 43 via the first bonding portion 51. In this embodiment, the interior of the first recess 41 is filled by the first bonding portion 51. A portion of the first bonding portion 51 connects to the first lead 31 from the side opposite to the first conductive portion 43.
[0062] Similarly, the second lead 32 protrudes from the component body 30 toward the second recess 42. The front end of the second lead 32 is located inside the second recess 42. The second lead 32 is fixed to the second conductive portion 44 in a state where at least a portion overlaps with the second recess 42 when viewed from the Y direction. The second lead 32 is connected to the second conductive portion 44 and is electrically connected to the wiring pattern of the substrate 21 via the second conductive portion 44. The second conductive portion 44 is an example of a "connection portion". Hereinafter, the second conductive portion 44 will sometimes be referred to as the connection portion 44.
[0063] In this embodiment, a conductive second bonding portion 52 is provided inside the second recess 42. The second bonding portion 52 is, for example, solder. In this embodiment, the second lead 32 is fixed to the second conductive portion 44 via the second bonding portion 52. In this embodiment, the interior of the second recess 42 is filled by the second bonding portion 52. A portion of the second bonding portion 52 connects to the second lead 32 from the side opposite to the second conductive portion 44.
[0064] The structure of the housing 10 will be described below. Figure 7 yes Figure 1 The diagram shows a cross-sectional view of the semiconductor memory device 1 along line F7-F7. In this embodiment, the first main wall 11 of the housing 10 has a plurality of recesses 11r. The plurality of recesses 11r are disposed at positions corresponding one-to-one with the component bodies 30 of the plurality of capacitors 26. The recesses 11r overlap with the component bodies 30 of the capacitors 26 when viewed from the Z direction. The recesses 11r are recessed in a direction away from the capacitors 26, i.e., the +Z direction side. A portion of the component body 30 of the capacitors 26 is disposed inside the recesses 11r, located on the +Z direction side closer than a portion of the first main wall 11 (e.g., the end on the -Z direction side).
[0065] The second main wall 12 of the housing 10 has a plurality of recesses 12r. The recesses 12r are positioned in a one-to-one correspondence with the component bodies 30 of the plurality of capacitors 26. When viewed from the Z direction, the recesses 12r overlap with the component bodies 30 of the capacitors 26. The recesses 12r are recessed in a direction away from the capacitors 26, i.e., the -Z direction side. A portion of the component bodies 30 of the capacitors 26 is disposed inside the recesses 12r, located closer to the -Z direction side than a portion of the second main wall 12 (e.g., the end on the +Z direction side). The recesses 12r of the second main wall 12 have, for example, the same shape as the recesses 11r of the first main wall 11. When viewed from the Z direction, the recesses 12r of the second main wall 12 overlap with the recesses 11r of the first main wall 11.
[0066] Alternatively, a first buffer 61 may be disposed between the recess 11r and the component body 30 of the capacitor 26. The first buffer 61 may be made of, for example, a soft synthetic resin and has greater elasticity than the first main wall 11. The first buffer 61 is sandwiched between, for example, the recess 11r and the component body 30 of the capacitor 26. The first buffer 61 suppresses the direct transmission of impacts input from the outside of the housing 10 to the first main wall 11 to the component body 30 of the capacitor 26.
[0067] Alternatively, a second buffer 62 may be disposed between the recess 12r and the component body 30 of the capacitor 26. The second buffer 62 may be made of, for example, a soft synthetic resin and has greater elasticity than the second main wall 12. The second buffer 62 is sandwiched between, for example, the recess 12r and the component body 30 of the capacitor 26. The second buffer 62 suppresses the direct transmission of impacts input from the outside of the housing 10 to the second main wall 12 to the component body 30 of the capacitor 26.
[0068] like Figure 6 As shown, the first main wall 11 may not have a recess 11r at the location where it overlaps with DRAM 24 and NAND 25 in the Z direction. The first main wall 11 is separated from DRAM 24 and NAND 25. A first space G1 exists between the first main wall 11 and DRAM 24 and NAND 25.
[0069] The second main wall 12 may not have a recess 12r at the position where it overlaps with the controller 23 and NAND 25 in the Z direction. The second main wall 12 is separate from the controller 23 and NAND 25. A second space G2 exists between the second main wall 12 and the controller 23 and NAND 25.
[0070] The manufacturing method of the semiconductor memory device 1 according to this embodiment will be described below. The semiconductor memory device 1 includes at least: a substrate 21; a semiconductor memory 25 disposed on the substrate 21; and an electronic component (capacitor 26), having a component body 30 and leads 31 and 32. The component body 30 has a central axis CL in its outer shape, and the leads 31 and 32 extend from the component body 30 and are connected to the connection portions 43 and 44 of the substrate 21.
[0071] In the first step, the capacitor 26 is arranged such that the central axis CL of the component body 30 converges within the thickness T1 of the substrate 21 in the thickness direction T (see reference). Figure 7 In the second step, the extended front ends 31a and 32a of the leads 31 and 32 are positioned opposite the connecting portions 43 and 44 in the extending direction of the leads 31 and 32 extending from the component body 30 (see reference). Figure 6 In the third step, with the extended front ends 31a and 32a facing the connecting portions 43 and 44, the leads 31 and 32 are fixed to the connecting portions 43 and 44. Through these steps, the substrate 21 is electrically connected to the capacitor 26.
[0072] The effects of using the semiconductor memory device 1 of this embodiment will be explained below.
[0073] In this embodiment, the capacitor 26 is arranged such that the central axis CL of the component body 30 converges within the thickness T1 of the substrate 21 in the thickness direction T. Furthermore, the leads 31 and 32 are fixed to the connecting portions 43 and 44 with their extended tips 31a and 32a facing the connecting portions 43 and 44 in the extending direction of the leads 31 and 32 extending from the component body 30.
[0074] With this configuration, when the extended ends 31a and 32a of the leads 31 and 32 are positioned opposite the connecting portions 43 and 44, the leads 31 and 32 are fixed to the connecting portions 43 and 44. This eliminates the need for bending processes of the leads 31 and 32, making the manufacture of the capacitor 26 and even the semiconductor memory device 1 easier. Furthermore, since the leads 31 and 32 are fixed to the connecting portions 43 and 44 without bending, tilting of the capacitor 26 due to bending deviations of the leads 31 and 32 can be suppressed. Therefore, the required level of processing technology or processing precision for the semiconductor memory device 1 can be reduced.
[0075] In this embodiment, the capacitor 26 is an energy storage component with a cylindrical shape. With this configuration, the cylindrical capacitor 26 is arranged such that its central axis CL is converged within the thickness T1 of the substrate 21, thus suppressing the thickness of the semiconductor storage device 1.
[0076] In this embodiment, the leads 31 and 32 extend axially from the end face of the component body 30 of the capacitor 26 along the central axis CL. With this configuration, the extended front ends 31a and 32a of the leads 31 and 32 extending axially from the component body 30 of the capacitor 26 are fixed to the connection portions 43 and 44 of the substrate 21, thus eliminating the need for bending the leads 31 and 32 and simplifying manufacturing.
[0077] In this embodiment, the leads 31 and 32 are a pair of leads 31 and 32 extending side by side from the end face of the component body 30. With this configuration, it is not necessary to bend multiple leads 31 and 32 to fix them to the substrate 21, thus suppressing the tilting and shifting of the capacitor 26 while making manufacturing easier.
[0078] In this embodiment, the connecting portions 43 and 44 are end face through holes provided in the recesses 41 and 42 where the edge of the opening 21h of the substrate 21 is cut off. With this configuration, by using the end face through holes of the substrate 21 as connecting portions 43 and 44 for the leads 31 and 32 of the capacitor 26, the configuration can be optimized.
[0079] Alternatively, end face through holes can also be provided in the recesses where the outer periphery of the substrate 21 is cut off.
[0080] (Second Implementation)
[0081] The second embodiment will now be described. In this embodiment, the difference from the first embodiment is that anchors 82 formed by laser vias (LVHs) are provided on both the surface and back sides of the substrate 21 within the end-face via. Otherwise, the configuration is the same as that of the first embodiment, except as described below, and detailed descriptions are omitted.
[0082] Figure 8 This is an enlarged top view showing the end face through hole of the substrate 81 in this embodiment. Figure 9 This is an enlarged perspective view showing the state in which the first conductive portion 43 of the end face through hole of the substrate 81 is separated from the substrate 21. In this embodiment, in addition to the structure of the substrate 21 described in the first embodiment, the substrate 81 also has a plurality of anchors 82 provided on the surface side and the back side of the portion where the first conductive portion 43 is provided.
[0083] The first conductive portion 43 includes an inner cover portion 83 and a pair of flange portions 84. The inner cover portion 83 covers the inner side of the recess 41 at the edge of the substrate 81. The pair of flange portions 84 are connected to both sides (surface and back side) of the substrate 81 in the thickness direction T of the inner cover portion 83, and extend along the surface and back side of the substrate 81, respectively. In one embodiment, anchors 82 are provided on both sides of the pair of flange portions 84 to fit into the substrate 81 and fix the first conductive portion 43 to the substrate 81, but it is also possible to provide anchors 82 on at least one side of the pair of flange portions 84.
[0084] With this configuration, the end face through hole can be firmly fixed by the anchor 82, preventing the end face through hole from falling off during lead wire fixing and repair.
[0085] Figure 10 It means Figure 9 An enlarged perspective view of a modified example of the first conductive part 43 (first conductive part 43'). Figure 9 The first conductive part 43 represents an example of a recess without a laser via (Japanese: レーザービア). Figure 10 The first conductive part 43' represents an example of a recess with a laser through-hole.
[0086] Although not shown in the figure, similar to the first conductive part 43 of the end face through hole of the first recess 41, a plurality of anchors 82 are also provided in the second conductive part 44 of the end face through hole of the second recess 42.
[0087] As a comparative example, consider a semiconductor memory device configured without anchors 82 on the first conductive portion 43 and the second conductive portion 44 of the end-face via. In this comparative example, when a pulling force is applied to the end-face vias provided in the recesses 41 and 42 that open to the outer periphery of the substrate 21, the end-face vias may come out of the recesses 41 and 42. In particular, during soldering, the end-face vias are mounted to the substrate at a temperature higher than the substrate Tg (glass transition temperature, approximately 150°C) of the substrate 21 (approximately 350°C). Therefore, the substrate of the substrate 21 softens, and the end-face vias may be pulled out of the recesses 41 and 42 by the pulling force applied to the outer periphery when the solder solidifies, solely due to the anchoring strength of the roughened surface of the copper foil. Furthermore, when it is necessary to repair a capacitor due to misalignment or damage, the solder is solidified and removed by contacting the solder with a high-temperature soldering iron. As a result, the end-face vias may be pulled out or peeled off.
[0088] Compared to the comparative example, in the second embodiment, multiple anchors 82 are disposed on the first conductive portion 43 and the second conductive portion 44 of the end face through hole, thus enabling the interior of the substrate 81 to be structurally fitted with the end face through hole. Therefore, it is possible to suppress the end face through hole from peeling off from the substrate 81 and improve the connection strength between the capacitor 26 and the substrate 81.
[0089] The above describes several implementation methods. However, the implementation methods are not limited to the examples described above. For example, the above implementation methods can also be combined with each other.
[0090] In the above embodiment, the first recess 41 and the second recess 42 are recesses that penetrate the substrate 21 in the Z direction. However, the first recess 41 and the second recess 42 are not limited to the above example, and may also be recesses that are only provided in a portion of the substrate 21 in the Z direction (i.e., recesses that do not penetrate the substrate 21 in the Z direction).
[0091] According to at least one embodiment described above, a semiconductor memory device includes: a substrate; a semiconductor memory disposed on the substrate; and an electronic component having a main body and leads. The main body has a central axis, and the leads extend from the main body and are connected to a connection portion of the substrate. The electronic component is configured such that the central axis of the main body converges within the thickness of the substrate in the thickness direction. The leads are fixed to the connection portion with their extended tips facing the connection portion in the extension direction extending from the main body. With this configuration, the requirements for the processing technology and processing accuracy of the semiconductor memory device can be reduced.
[0092] In this embodiment, the capacitor is arranged such that the central axis of the main body converges within the thickness of the substrate in the thickness direction. Furthermore, the lead is fixed to the connection portion with its extended tip facing the connection portion in the extension direction extending from the main body.
[0093] With this configuration, by fixing the lead to the connector with the extended tip facing the connector, bending of the lead is unnecessary, making the manufacture of electronic components and even semiconductor memory devices easier. Furthermore, since the lead is fixed to the connector without bending, tilting of the electronic component due to lead bending deviations can be suppressed. Therefore, the required level of processing technology or processing precision for semiconductor memory devices can be reduced.
[0094] Several embodiments of the present invention have been described, but these embodiments are given by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments or variations thereof are included within the scope or spirit of the invention, and are also included within the scope of the invention as described in the claims and their equivalents.
[0095] Explanation of reference numerals in the attached figures
[0096] 1… Semiconductor memory device, 21… Substrate, 24… DRAM (semiconductor memory), 25… NAND flash memory (semiconductor memory), 26… Capacitor (energy storage component), 30… Component body (body), 31, 32… Lead wires, 31a, 32a… Extension front end, 43… First conductive part (connection part, end face through hole), 44… Second conductive part (connection part, end face through hole), 82… Anchor, CL… Central axis, T… Thickness direction, T1… Thickness of substrate, T2… Center plane in thickness direction.
Claims
1. A semiconductor memory device comprising: substrate; A semiconductor memory, disposed on the substrate; and An electronic component has a body and leads. The body has a central axis, and the leads extend from the body and are connected to a connection portion of a substrate. The electronic components are arranged such that the central axis of the main body converges within the thickness of the substrate in the thickness direction of the substrate. With the extended tip of the lead facing the connecting portion in the extension direction of the lead extending from the body, the lead is fixed to the connecting portion.
2. The semiconductor memory device according to claim 1, The electronic component is an energy storage component with a cylindrical shape.
3. The semiconductor memory device according to claim 1 or 2, The lead extends from the end face of the body along the axial direction of the central axis into the axial direction.
4. The semiconductor memory device according to claim 3, The lead has a pair of leads extending side by side from the end face of the body.
5. The semiconductor memory device according to claim 1 or 2, The connecting portion is a through hole in the recessed end face where the edge of the substrate has been cut off.
6. The semiconductor memory device according to claim 5, The end face through-hole includes: an inner cover portion that covers the recessed inner side of the edge of the substrate; and a pair of flange portions that connect to the thickness-direction ends of the substrate within the inner cover portion and extend along the surface and back surface of the substrate, respectively. At least one of the pair of flange portions is provided with an anchor that fits into the substrate and fixes the end face through hole to the substrate.
7. A method for manufacturing a semiconductor memory device, the semiconductor memory device comprising: substrate; A semiconductor memory, disposed on the substrate; and An electronic component has a body and leads. The body has a central axis, and the leads extend from the body and are connected to a connection portion of a substrate. The method for manufacturing the semiconductor memory device includes: A process of arranging the electronic component in such a way that the central axis of the main body converges within the thickness of the substrate in the thickness direction of the substrate; The process of positioning the extended tip of the lead against the connecting portion in the extension direction of the lead extending from the body; and The process of fixing the lead wire to the connecting part with the extended front end facing the connecting part.
8. A semiconductor memory device comprising: The substrate has a first surface extending along a first direction, a second surface located on the opposite side of the first surface, and a third surface extending along a second direction orthogonal to the first direction and being the thickness direction of the substrate, the third surface having a connecting portion and spanning the first surface and the second surface; A semiconductor memory is disposed on the first surface; as well as An electronic component having a body and a first lead, the lead extending from the body along a first direction and having a first extended front end; When viewed from the first direction, the center of the main body in the second direction overlaps with the third surface. The first extended front end is fixed opposite to the connecting part.
9. The semiconductor storage device according to claim 8, The electronic component is an electric power storage component having a cylindrical outer shape.
10. The semiconductor storage device according to claim 9, The electronic component further has a second lead wire having a second extended tip fixed opposite to the connection portion.
11. The semiconductor storage device according to claim 10, The main body has a first end surface, The first lead wire and the second lead wire extend from the first end surface.