HVPE thick drift layer high voltage vertical Schottky diode and epitaxial fabrication process
By combining HVPE and metal-organic chemical vapor phase epitaxy, the drift layer design of gallium oxide Schottky diodes is optimized, solving the problems of drift layer crystal quality and doping inhomogeneity in the prior art, and realizing high breakdown voltage and low on-resistance of high voltage gallium oxide Schottky diodes.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 北京昌龙智芯半导体有限公司
- Filing Date
- 2026-06-23
- Publication Date
- 2026-07-31
AI Technical Summary
Existing technologies for fabricating gallium oxide high-voltage vertical Schottky diodes suffer from problems such as deterioration of drift layer crystal quality, inhomogeneous doping, and difficulty in P-type doping, making it difficult to meet the requirements of 6kV-12kV high-voltage application scenarios.
Thick drift layers are grown using the HVPE method and combined with metal-organic chemical vapor phase epitaxy. Through the design of composite drift layers, gradient doping and pulse doping, combined with mesa etching and composite passivation layers or insulating dielectric layers and field plate structures, the longitudinal electric field distribution and terminal protection are optimized.
A high-thickness, high-quality N-type gallium oxide epitaxial layer was achieved, reducing on-resistance, improving breakdown voltage and long-term reliability, and suitable for high-voltage gallium oxide Schottky diodes from 6kV to 12kV.
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Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor power device technology, and more specifically, relates to a high voltage vertical Schottky diode with thick HVPE drift layer and its epitaxial fabrication process. Background Technology
[0002] Gallium oxide (Ga2O3), as an ultra-wide bandgap semiconductor material, has a bandgap of approximately 4.8–4.9 eV and a theoretical breakdown field strength of up to 8 MV / cm. Its Baliga figure of merit is higher than that of silicon-based materials and third-generation semiconductor materials such as silicon carbide and gallium nitride, making it suitable for manufacturing high-voltage power semiconductor devices. Within the gallium oxide material system, β-phase gallium oxide (β-Ga2O3) has become one of the main crystal phase choices in the research and industrialization of gallium oxide power devices due to its excellent thermodynamic stability and the ability to grow large-size single-crystal substrates using the melt method.
[0003] Vertical Schottky diodes are a typical structure for gallium oxide power devices. Their reverse breakdown voltage is related to the thickness of the drift layer, the uniformity of the doping concentration, and the crystal quality. For applications with operating voltages from 6kV to 10kV, the required drift layer thickness is typically in the range of tens of micrometers.
[0004] In existing technologies, metal-organic chemical vapor deposition (MOCVD) is used to prepare gallium oxide epitaxial layers. This process has certain advantages in terms of precise control of doping concentration and surface morphology, but its growth rate is relatively low. When the epitaxial layer thickness increases to meet high voltage requirements, crystal quality deterioration problems such as increased dislocation density and intensified lattice relaxation may occur.
[0005] In addition, to improve device breakdown voltage and reduce reverse leakage current, some existing solutions introduce P-type doped regions, P-wells, or PN junction termination structures. However, due to the problems of deep acceptor levels, low hole mobility, and limited doping activation rate in gallium oxide P-type doping, these solutions still face challenges in terms of process complexity and fabrication consistency. Summary of the Invention
[0006] To address the aforementioned problems in the existing technology, the technical problem to be solved by the present invention is to provide an epitaxial fabrication process for a high-voltage vertical Schottky diode based on a β-phase gallium oxide substrate and using the HVPE method to grow a thick drift layer, so that the device can be adapted to 6kV-12kV high-voltage application scenarios.
[0007] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:
[0008] An epitaxial fabrication process for a high-voltage vertical Schottky diode with a thick HVPE drift layer includes the following steps:
[0009] 1) Substrate preparation: Select an N-type heavily doped β-phase gallium oxide single crystal substrate and clean it;
[0010] 2) Thick drift layer epitaxial growth: On the cleaned substrate, an N-type thick drift layer with a thickness of not less than 10 μm is grown using at least a hydride vapor phase epitaxy process;
[0011] 3) Schottky anode fabrication: A Schottky contact metal layer is deposited on the surface of an N-type thick drift layer, and the anode pattern is defined by photolithography and lift-off processes;
[0012] 4) Ohmic cathode fabrication: An ohmic contact metal layer is deposited on the back side of the substrate and subjected to rapid thermal annealing to form an ohmic contact;
[0013] 5) Termination structure fabrication: An electric field termination structure is formed in the anode edge region to alleviate electric field concentration, thereby fabricating a high-voltage all-N-type vertical Schottky diode device.
[0014] Preferably, in step 1), the substrate is doped with tin, silicon, or germanium, and the doping concentration is 3~5×10⁻⁶. 18 cm -3 .
[0015] Preferably, in step 2), the epitaxial growth process of the thick drift layer is as follows: first, a lower N-type drift layer is grown on the substrate using hydride vapor phase epitaxy, and then an upper N-type fine epitaxial layer is grown on the lower N-type drift layer using metal-organic chemical vapor phase epitaxy; the lower N-type drift layer and the upper N-type fine epitaxial layer together constitute a composite drift layer.
[0016] Preferably, in step 2), during the hydride vapor phase epitaxial growth of the thick drift layer, the doping gas flow rate is adjusted in stages to make the doping concentration of the formed thick drift layer continuously decrease along the thickness direction from the side of the substrate to the side away from the substrate.
[0017] Preferably, in step 2), during the hydride vapor phase epitaxial growth of the thick drift layer, the flow rate of doping gas is periodically introduced and cut off to form a periodic structure in which multiple highly doped sublayers and low doped sublayers are stacked alternately along the thickness direction of the thick drift layer.
[0018] Preferably, after step 2), the method further includes an epitaxial growth of an N-type transition layer on the surface of the thick drift layer, wherein the doping concentration of the N-type transition layer is lower than that of the thick drift layer; and the Schottky anode in step 3) is prepared on the surface of the N-type transition layer.
[0019] Preferably, in step 5), the electric field terminal structure is formed by: using inductively coupled plasma etching in the anode edge region to perform mesa etching, with the mesa etching depth being 20% to 60% of the thickness of the thick drift layer; after etching, silicon oxide and silicon nitride layers are deposited sequentially on the mesa surface and sidewall to form a composite passivation layer.
[0020] Preferably, in step 5), the electric field terminal structure consists of an insulating dielectric layer and a field plate. The insulating dielectric layer is disposed on the surface of the composite drift layer and located outside the anode edge. The field plate is a metal extension formed by the Schottky contact metal layer extending outward from the anode edge to cover the insulating dielectric layer.
[0021] Preferably, the insulating dielectric layer is a silicon oxide layer, a silicon nitride layer, or a composite layer of the two.
[0022] Preferably, in step 3), the Schottky contact metal layer is a platinum layer and a gold layer deposited sequentially; in step 4), the ohmic contact metal layer is a titanium layer, an aluminum layer and a gold layer deposited sequentially.
[0023] Beneficial effects: Compared with the prior art, the present invention has the following advantages:
[0024] 1) This invention grows drift layers using a single process of hydride vapor phase epitaxy or a composite process combining it with metal-organic chemical vapor phase epitaxy, achieving high-thickness and high-quality N-type gallium oxide epitaxial layers. At the same time, by introducing innovative drift layer designs such as composite drift layers, gradient doping, pulse doping, or low-doped transition layers, the vertical electric field distribution inside the device is effectively optimized, reducing the on-resistance while ensuring high breakdown voltage, and successfully realizing high-voltage gallium oxide Schottky diodes covering voltage ratings from 6kV to 12kV.
[0025] 2) For different withstand voltage levels and drift layer structures, this invention flexibly adopts mesa etching combined with silicon oxide / silicon nitride composite passivation layer, or insulating dielectric layer combined with metal field plate terminal protection technology, which significantly suppresses the electric field concentration effect at the anode edge, greatly improves the breakdown voltage and long-term reliability of the device, and the manufacturing process is mature and controllable, suitable for mass production. Attached Figure Description
[0026] Figure 1 This is a schematic cross-sectional view of the overall structure of the high-voltage vertical Schottky diode prepared according to the present invention.
[0027] Figure 2 The graph shows a comparison of the measured breakdown voltages of the devices in Examples 1-5 and Comparative Examples 1-2. Detailed Implementation
[0028] To make the objectives, technical solutions, and advantages of this invention clearer, the invention is further described below with reference to specific embodiments. Unless otherwise specified, the technical means used in the following embodiments are all conventional means well known to those skilled in the art. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer are followed. Where the manufacturers of reagents or instruments are not specified, they are all conventional products that can be purchased commercially.
[0029] This application provides a high-voltage vertical Schottky diode, such as... Figure 1 As shown, its basic structure includes: a back ohmic cathode 3, a substrate 2 located above the back ohmic cathode 3, an N-type thick drift layer 1 formed on the substrate 2, a surface Schottky anode 4 disposed on the upper surface of the N-type thick drift layer 1, and surface passivation and electric field termination 5 disposed near the edge region of the surface Schottky anode 4. The back ohmic cathode 3 is used to achieve cathode lead-out, the substrate 2 is an N-type heavily doped gallium oxide single crystal substrate, the N-type thick drift layer 1 is used to bear the reverse breakdown voltage, the surface Schottky anode 4 forms a rectifying contact, and the surface passivation and electric field termination 5 is used to alleviate the edge electric field concentration effect.
[0030] Example 1
[0031] This embodiment provides a method for fabricating a 6kV withstand voltage gallium oxide vertical Schottky diode, including the following steps:
[0032] (1) Substrate preparation
[0033] A tin-doped (Sn) β-phase gallium oxide (β-Ga2O3) N-type heavily doped single crystal substrate was selected, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 The substrate thickness is 500 μm and the crystal orientation is (001). The selected substrate is subjected to standard RCA cleaning process to remove surface organic contaminants and particles.
[0034] (2) Epitaxial growth of drift layer
[0035] The cleaned substrate was placed in a hydride vapor phase epitaxy (HVPE) reaction chamber. Under conditions of a growth temperature of 1050℃ and a growth pressure of atmospheric pressure, gallium chloride precursor, water vapor as an oxygen source, and tin tetrachloride as an N-type dopant were introduced. Epitaxial growth was performed at a growth rate of 50 μm / h for 12 minutes, forming a 10 μm thick N-type drift layer on the substrate. The doping concentration of this drift layer was 2 × 10⁻⁶. 16 cm -3 ;
[0036] (3) Schottky anode preparation
[0037] On the surface of the drift layer obtained in step (2), a platinum (Pt) layer and a gold (Au) layer are deposited sequentially using an electron beam evaporation method to form a Schottky contact metal layer; then the anode pattern is defined by photolithography and lift-off processes, with an anode diameter of 1 mm;
[0038] (4) Ohmic cathode preparation
[0039] On the back side of the substrate, a titanium (Ti) layer, an aluminum (Al) layer, and a gold (Au) layer are sequentially deposited using an electron beam evaporation method. Then, a rapid thermal annealing process is performed at an annealing temperature of 800℃, an annealing time of 60s, an annealing atmosphere of nitrogen, and a heating rate of 50℃ / s to form an ohmic contact and obtain a back-side ohmic cathode.
[0040] (5) Terminal structure preparation
[0041] In the anode edge region, inductively coupled plasma (ICP) etching is used to etch the mesa to a depth of 6 μm. After etching, silicon oxide and silicon nitride layers are deposited sequentially on the mesa surface and sidewalls to form a composite passivation layer as an electric field termination structure, thus fabricating a 6 kV withstand voltage rating all-N vertical Schottky diode device.
[0042] Example 2
[0043] This embodiment provides a method for fabricating a 10kV withstand voltage gallium oxide vertical Schottky diode. Unlike Embodiment 1, this embodiment uses a composite epitaxial method combining hydride vapor phase epitaxy and metal-organic chemical vapor phase epitaxy to form the composite drift layer, and accordingly employs a field plate termination structure to meet the higher 10kV withstand voltage requirement. The method includes the following steps:
[0044] (1) Substrate preparation
[0045] A silicon-doped β-phase gallium oxide N-type heavily doped single crystal substrate was selected, with a doping concentration of 5 × 10⁻⁶. 18 cm -3 The substrate has a thickness of 600 μm and a crystal orientation of (-201). The substrate is subjected to ultrasonic cleaning with organic solvent, acid washing and deionized water rinsing in sequence to remove surface contaminants and obtain a clean surface.
[0046] (2) Epitaxial growth of the lower drift layer
[0047] The cleaned substrate was placed in a hydride vapor phase epitaxy reaction chamber. Epitaxial growth was carried out at a growth temperature of 1080℃ and a growth pressure of atmospheric pressure, using nitrogen as the carrier gas, gallium chloride precursor, water vapor as the oxygen source, and silicon tetrachloride as the N-type dopant. Epitaxial growth was performed at a growth rate of 70 μm / h for 26 minutes, resulting in a 30 μm thick substrate with a doping concentration of 3 × 10⁻⁶.16 cm -3 The lower N-type drift layer;
[0048] (3) Growth of the upper fine epitaxial layer
[0049] The substrate with completed HVPE growth was cooled to 650°C in a nitrogen atmosphere and then transferred to a metal-organic chemical vapor deposition (MOCVD) reaction chamber. Epitaxial growth was performed at a growth temperature of 650°C and a growth pressure of 30 Torr, using nitrogen as the carrier gas, trimethylgallium as the gallium source, water vapor as the oxygen source, and silane as the silicon source, at a growth rate of 2 μm / h for 150 min. This resulted in a 5 μm thick layer with a doping concentration of 8 × 10⁻⁶. 15 cm -3 The upper N-type fine epitaxial layer; the lower drift layer and the upper fine epitaxial layer together constitute a composite drift layer with a total thickness of 35 μm;
[0050] (4) Schottky anode preparation
[0051] On the surface of the upper fine epitaxial layer obtained in step (3), a platinum layer and a gold layer are deposited sequentially by electron beam evaporation to form a Schottky contact metal layer; then the anode pattern is defined by photolithography and lift-off processes, with an anode diameter of 1 mm;
[0052] (5) Ohmic cathode preparation
[0053] On the back side of the substrate, titanium, aluminum and gold layers are deposited sequentially using electron beam evaporation; then rapid thermal annealing is performed at a temperature of 800°C for 60 seconds in a nitrogen atmosphere at a heating rate of 50°C / s to form ohmic contacts.
[0054] (6) Terminal structure preparation
[0055] An electric field termination structure is formed in the anode edge region. The electric field termination structure consists of an insulating dielectric layer and a field plate. The insulating dielectric layer is disposed on the surface of the composite drift layer and located outside the anode edge. The field plate is a metal extension formed by the Schottky anode metal layer extending outward from the anode edge and covering the insulating dielectric layer. The insulating dielectric layer is a composite stack of silicon oxide and silicon nitride layers with a thickness of 2 μm. The extension length of the field plate is 20 μm. A 10 kV withstand voltage rating fully N-type vertical Schottky diode device is obtained.
[0056] Example 3
[0057] This embodiment provides a method for fabricating an 8kV withstand voltage gallium oxide vertical Schottky diode, including the following steps:
[0058] (1) Substrate preparation
[0059] A germanium-doped β-phase gallium oxide N-type heavily doped single crystal substrate was selected, with a doping concentration of 5 × 10⁻⁶. 18 cm -3 The substrate has a thickness of 500 μm and a crystal orientation of (001). The substrate is subjected to ultrasonic cleaning with organic solvent, acid washing and deionized water rinsing in sequence to remove surface contaminants and obtain a clean surface.
[0060] (2) Epitaxial growth of gradient doped drift layer
[0061] The cleaned substrate was placed in a hydride vapor phase epitaxy reaction chamber. Under the conditions of growth temperature of 1050℃ and growth pressure of atmospheric pressure, nitrogen was used as the carrier gas, gallium chloride precursor, water vapor as oxygen source, and germanium tetrachloride as N-type dopant were introduced. Epitaxial growth was carried out at a growth rate of 50 μm / h for 24 min, and an N-type drift layer with a thickness of 20 μm was formed on the substrate.
[0062] During the epitaxial growth of this drift layer, the doping gas flow rate of germanium tetrachloride was adjusted in stages to achieve a gradient distribution of the doping concentration along the thickness direction. Specifically, the doping concentration near the substrate was 4 × 10⁻⁶. 16 cm -3 The doping concentration on the side closest to the surface of the drift layer is 1×10⁻⁶. 16 cm -3 The doping concentration of the drift layer decreases continuously from the substrate side to the surface side of the drift layer.
[0063] (3) Schottky anode preparation
[0064] On the surface of the drift layer, a platinum layer and a gold layer are sequentially deposited using electron beam evaporation to form a Schottky contact metal layer. Then, the anode pattern is defined by photolithography and lift-off processes, with an anode diameter of 1 mm.
[0065] (4) Ohmic cathode preparation
[0066] On the back side of the substrate, titanium, aluminum and gold layers are deposited sequentially using electron beam evaporation, followed by rapid thermal annealing at a temperature of 800°C for 60 seconds in a nitrogen atmosphere at a heating rate of 50°C / s to form ohmic contacts.
[0067] (5) Terminal structure preparation
[0068] An electric field termination structure is formed in the anode edge region. The electric field termination structure adopts a combination of mesa etching and composite passivation layer. Specifically, mesa etching is performed in the anode edge region using inductively coupled plasma etching process, with a mesa etching depth of 10 μm. After etching, silicon oxide layer and silicon nitride layer are deposited sequentially on the mesa surface and sidewall to form a composite passivation layer. An 8kV withstand voltage rating fully N-type vertical Schottky diode device is obtained.
[0069] Example 4
[0070] This embodiment provides a method for fabricating a 12kV withstand voltage gallium oxide vertical Schottky diode, including the following steps:
[0071] (1) Substrate preparation
[0072] A tin-doped β-phase gallium oxide N-type heavily doped single crystal substrate was selected, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 The substrate thickness is 600μm and the crystal orientation is (001). The substrate is treated with standard RCA cleaning process.
[0073] (2) Epitaxial growth of drift layer
[0074] The cleaned substrate was placed in a hydride vapor phase epitaxy reaction chamber. Under conditions of growth temperature of 1050℃ and growth pressure of atmospheric pressure, gallium chloride precursor, water vapor as oxygen source, and tin tetrachloride as N-type dopant were introduced. Epitaxial growth was carried out at a growth rate of 50 μm / h for 48 min, forming a 40 μm thick substrate with a doping concentration of 2 × 10⁻⁶. 16 cm -3 N-type drift layer;
[0075] (3) Epitaxial growth of the transition layer
[0076] On the surface of the drift layer obtained in step (2), hydride vapor phase epitaxy is continued at a growth rate of 2 μm / h for 10 min to form a layer with a thickness of 0.3 μm and a doping concentration of 1×10⁻⁶. 15 cm -3 The N-type transition layer;
[0077] (4) Schottky anode preparation
[0078] On the surface of the transition layer, a platinum layer and a gold layer are sequentially deposited using electron beam evaporation to form a Schottky contact metal layer; then, the anode pattern is defined by photolithography and lift-off processes, with an anode diameter of 1 mm.
[0079] (5) Ohmic cathode preparation
[0080] On the back side of the substrate, titanium, aluminum and gold layers are deposited sequentially using electron beam evaporation; then rapid thermal annealing is performed at a temperature of 800°C for 60 seconds in a nitrogen atmosphere at a heating rate of 50°C / s to form ohmic contacts.
[0081] (6) Terminal structure preparation
[0082] In the anode edge region, mesa etching is performed using inductively coupled plasma etching process, with a mesa etching depth of 8 μm. After etching, silicon oxide and silicon nitride layers are deposited sequentially on the mesa surface and sidewalls to form a composite passivation layer as an electric field termination structure, thus obtaining a 12 kV withstand voltage rating all-N type vertical Schottky diode device.
[0083] Example 5
[0084] This embodiment provides a method for fabricating a 6.5kV withstand voltage gallium oxide vertical Schottky diode, including the following steps:
[0085] (1) Substrate preparation
[0086] A tin-doped β-phase gallium oxide N-type heavily doped single crystal substrate was selected, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 The substrate thickness is 500μm and the crystal orientation is (001). The substrate is treated with standard RCA cleaning process.
[0087] (2) Epitaxial growth of pulse-doped drift layer
[0088] The cleaned substrate was placed in a hydride vapor phase epitaxial reaction chamber. Under the conditions of growth temperature of 1050℃ and growth pressure of atmospheric pressure, gallium chloride precursor, water vapor as oxygen source, and tin tetrachloride as N-type dopant were introduced. Epitaxial growth was carried out at a growth rate of 50 μm / h for 12 min, forming an N-type drift layer with a thickness of 10 μm on the substrate.
[0089] During the epitaxial growth of the drift layer, the flow rate of the tin tetrachloride doping gas is periodically introduced and cut off to form a periodic structure of alternating highly doped and low-doped sublayers along the thickness direction. Each period has a thickness of 1 μm, and there are a total of 10 periods. The doping concentration of the highly doped sublayers is 4 × 10⁻⁶. 16 cm -3 The doping concentration of the low-doped sublayer is 5 × 10⁻⁶. 15 cm -3 The thickness of each sublayer is uniform;
[0090] (3) Schottky anode preparation
[0091] On the surface of the drift layer, a platinum layer and a gold layer are sequentially deposited using electron beam evaporation to form a Schottky contact metal layer; then, the anode pattern is defined by photolithography and lift-off processes, with an anode diameter of 1 mm.
[0092] (4) Ohmic cathode preparation
[0093] On the back side of the substrate, titanium, aluminum and gold layers are deposited sequentially using electron beam evaporation; then rapid thermal annealing is performed at a temperature of 800°C for 60 seconds in a nitrogen atmosphere at a heating rate of 50°C / s to form ohmic contacts.
[0094] (5) Terminal structure preparation
[0095] In the anode edge region, mesa etching is performed using inductively coupled plasma etching process, with a mesa etching depth of 6 μm. After etching, silicon oxide and silicon nitride layers are deposited sequentially on the mesa surface and sidewalls to form a composite passivation layer as an electric field termination structure, thus obtaining a 6.5 kV withstand voltage rating all-N vertical Schottky diode device.
[0096] Comparative Example 1
[0097] This comparative example provides a method for fabricating a gallium oxide vertical Schottky diode. Unlike Example 1, this comparative example uses a P-type doped region as the termination structure, and includes the following steps:
[0098] (1) Substrate preparation
[0099] A tin-doped β-phase gallium oxide N-type heavily doped single crystal substrate was selected, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 The substrate thickness is 500μm and the crystal orientation is (001). The substrate is treated with standard RCA cleaning process.
[0100] (2) Epitaxial growth of drift layer
[0101] The cleaned substrate was placed in a hydride vapor phase epitaxy reaction chamber. Under conditions of a growth temperature of 1050℃ and a growth pressure of atmospheric pressure, gallium chloride precursor, water vapor as an oxygen source, and tin tetrachloride as an N-type dopant were introduced. Epitaxial growth was carried out at a growth rate of 50 μm / h for 12 minutes, resulting in a 10 μm thick substrate with a doping concentration of 2 × 10⁻⁶. 16 cm -3 N-type drift layer;
[0102] (3) Formation of P-type doped regions
[0103] Magnesium ions were implanted into the edge region of the drift layer surface using an ion implantation process, with an implantation dose of 1×10⁻⁶. 14 cm-2 The energy injected was 50keV, and then rapid thermal annealing was performed at a temperature of 1000℃ for 60s to activate P-type doping and form P-type doped regions.
[0104] (4) Schottky anode preparation
[0105] In the central region of the drift layer surface, a platinum and gold layer is deposited using electron beam evaporation to form a Schottky contact metal layer; the anode diameter is 1 mm.
[0106] (5) Ohmic cathode preparation
[0107] On the back side of the substrate, titanium, aluminum and gold layers are deposited sequentially using electron beam evaporation; then rapid thermal annealing is performed at a temperature of 800°C for 60 seconds in a nitrogen atmosphere at a heating rate of 50°C / s to form ohmic contacts.
[0108] (6) Terminal structure preparation
[0109] A silicon oxide layer and a silicon nitride layer are deposited in the edge region of the anode to form a composite passivation layer.
[0110] Comparative Example 2
[0111] This comparative example provides a method for fabricating a gallium oxide vertical Schottky diode. Unlike Example 1, this comparative example does not include any electric field termination structure and includes the following steps:
[0112] (1) Substrate preparation
[0113] A tin-doped β-phase gallium oxide N-type heavily doped single crystal substrate was selected, with a doping concentration of 3 × 10⁻⁶. 18 cm -3 The substrate thickness is 500μm and the crystal orientation is (001). The substrate is treated with standard RCA cleaning process.
[0114] (2) Epitaxial growth of drift layer
[0115] The cleaned substrate was placed in a hydride vapor phase epitaxy reaction chamber. Under conditions of a growth temperature of 1050℃ and a growth pressure of atmospheric pressure, gallium chloride precursor, water vapor as an oxygen source, and tin tetrachloride as an N-type dopant were introduced. Epitaxial growth was carried out at a growth rate of 50 μm / h for 12 minutes, resulting in a 10 μm thick substrate with a doping concentration of 2 × 10⁻⁶. 16 cm -3 N-type drift layer;
[0116] (3) Schottky anode preparation
[0117] On the surface of the drift layer, a platinum layer and a gold layer are sequentially deposited using electron beam evaporation to form a Schottky contact metal layer; the anode diameter is 1 mm.
[0118] (4) Ohmic cathode preparation
[0119] On the back side of the substrate, titanium, aluminum and gold layers are deposited sequentially using electron beam evaporation. Then, rapid thermal annealing is performed at a temperature of 800°C for 60 seconds in a nitrogen atmosphere at a heating rate of 50°C / s to form ohmic contacts.
[0120] The devices prepared in Examples 1-5 and Comparative Examples 1-2 were subjected to performance testing using a Keysight B1505A power device analyzer and a high-voltage probe station in a fluorocarbon liquid (Fluorinert FC-70) environment to suppress air breakdown. Forward IV measurements were performed with a pulse width of 50 μs and a duty cycle of 0.1% to reduce self-heating effects. Reverse breakdown voltage was defined as a reverse leakage current density reaching 1 mA / cm². 2 The voltage value at that time. The on-resistance R. on,sp From a forward current density of 100 A / cm 2 The differential resistance was extracted at that time. The reverse leakage current @80% BV was taken as the reverse current density of the device at 80% of its breakdown voltage. The ideality factor was obtained by linear fitting of the lnJ-V curve in the low forward current density range. Ten samples were prepared for each embodiment and comparative example, and their electrical parameters were measured under the same conditions. The average values were calculated, and the results are shown in Table 1.
[0121] Table 1. Typical electrical performance parameters of the devices in each embodiment and comparative example.
[0122] Measured breakdown voltage (V) <![CDATA[Forward voltage drop @ 100 A / cm 2 (V)]]> <![CDATA[Specific on-resistance R on,sp (mΩ·cm 2 )]]> <![CDATA[Reverse leakage current @ 80% BV (μA / cm 2 )]]> Ideal factor n Example 1 6320 1.22 2.51 0.9 1.08 Example 2 10180 1.79 4.18 0.5 1.12 Example 3 8140 1.51 3.09 0.8 1.10 Example 4 12260 2.05 4.95 1.1 1.09 Example 5 6630 1.28 2.68 0.9 1.07 Comparative Example 1 1210 1.18 2.38 98.0 1.85 Comparative Example 2 460 1.16 2.19 1250 1.92
[0123] From Table 1 and Figure 2 As can be seen, the measured breakdown voltages of Examples 1-5 of this invention all meet the standards, confirming the decisive role of the mesa composite passivation and the all-N-type termination structure, such as the field plate, in maximizing the breakdown voltage potential of gallium oxide. The reverse leakage current of the examples is generally below 1.1 μA / cm. 2 The ideal factor is close to 1, indicating that the all-N-type process can maintain the high quality of the Schottky interface.
[0124] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. An epitaxial fabrication process of HVPE thick drift layer high voltage vertical Schottky diode, characterized in that, Includes the following steps: 1) Substrate preparation: Select an N-type heavily doped β-phase gallium oxide single crystal substrate and clean it; 2) Thick drift layer epitaxial growth: On the cleaned substrate, an N-type thick drift layer with a thickness of not less than 10 μm is grown using at least a hydride vapor phase epitaxy process; 3) Schottky anode fabrication: A Schottky contact metal layer is deposited on the surface of an N-type thick drift layer, and the anode pattern is defined by photolithography and lift-off processes; 4) Ohmic cathode fabrication: An ohmic contact metal layer is deposited on the back side of the substrate and subjected to rapid thermal annealing to form an ohmic contact; 5) Termination structure fabrication: An electric field termination structure is formed in the anode edge region to alleviate electric field concentration, thereby fabricating a high-voltage all-N-type vertical Schottky diode device.
2. The epitaxial preparation process of HVPE thick drift layer high-voltage vertical Schottky diode according to claim 1, wherein, In the step 1), the doping element of the substrate is tin, silicon or germanium, and the doping concentration is 3-5×10 18 cm -3 .
3. The epitaxial preparation process of HVPE thick drift layer high voltage vertical Schottky diode according to claim 1, wherein, In step 2), the specific process of epitaxial growth of the thick drift layer is as follows: first, a lower N-type drift layer is grown on the substrate using hydride vapor phase epitaxy, and then an upper N-type fine epitaxial layer is grown on the lower N-type drift layer using metal-organic chemical vapor phase epitaxy; the lower N-type drift layer and the upper N-type fine epitaxial layer together constitute a composite drift layer.
4. The epitaxial preparation process of HVPE thick drift layer high voltage vertical Schottky diode according to claim 1, wherein, In step 2), during the hydride vapor phase epitaxial growth of the thick drift layer, the doping gas flow rate is adjusted in stages to make the doping concentration of the formed thick drift layer continuously decrease along the thickness direction from the side of the substrate to the side away from the substrate.
5. The epitaxial preparation process of HVPE thick drift layer high voltage vertical Schottky diode according to claim 1, wherein, In step 2), during the hydride vapor phase epitaxial growth of the thick drift layer, the flow rate of doping gas is periodically introduced and cut off to form a periodic structure in which multiple highly doped sublayers and low doped sublayers are stacked alternately along the thickness direction.
6. The epitaxial preparation process of HVPE thick drift layer high voltage vertical Schottky diode according to claim 1, wherein, After step 2), the method further includes the step of epitaxially growing an N-type transition layer on the surface of the thick drift layer, wherein the doping concentration of the N-type transition layer is lower than that of the thick drift layer; the Schottky anode in step 3) is prepared on the surface of the N-type transition layer.
7. The epitaxial process for the fabrication of HVPE thick-drift high-voltage vertical Schottky diodes according to claim 1, characterized in that, In step 5), the electric field terminal structure is formed by using inductively coupled plasma etching in the anode edge region to perform mesa etching, with the mesa etching depth being 20% to 60% of the thickness of the thick drift layer. After etching, silicon oxide and silicon nitride layers are deposited sequentially on the mesa surface and sidewalls to form a composite passivation layer.
8. The epitaxial preparation process of HVPE thick drift layer high voltage vertical Schottky diode according to claim 1, wherein, In step 5), the electric field terminal structure consists of an insulating dielectric layer and a field plate. The insulating dielectric layer is disposed on the surface of the N-type thick drift layer and located outside the anode edge. The field plate is a metal extension formed by the Schottky contact metal layer extending outward from the anode edge to cover the insulating dielectric layer.
9. The epitaxial fabrication process of the HVPE thick drift layer high-voltage vertical Schottky diode according to claim 8, characterized in that, The insulating dielectric layer is a silicon oxide layer, a silicon nitride layer, or a composite layer of the two.
10. The epitaxial fabrication process of the HVPE thick drift layer high-voltage vertical Schottky diode according to claim 1, characterized in that, In step 3), the Schottky contact metal layer is a platinum layer and a gold layer deposited sequentially; in step 4), the ohmic contact metal layer is a titanium layer, an aluminum layer and a gold layer deposited sequentially.