High electron mobility transistor and its fabrication method

Abstract

This application provides a high electron mobility transistor and its fabrication method. The high electron mobility transistor's structure, from bottom to top, includes a substrate, a nucleation layer, a composite back barrier layer, a channel layer, and a composite barrier layer. The composite back barrier layer is formed by periodically growing hexagonal boron nitride layers and aluminum nitride layers. Therefore, this application solves the problem in related technologies where high electron mobility transistors using traditional GaN buffer layers and traditional AlN insertion layers cannot effectively dissipate the generated heat, leading to heat accumulation and decreased transistor performance. This achieves the effect of improving the thermal conductivity of the high electron mobility transistor.

Description

Technical Field

[0001] This application relates to the field of high-power electronic devices, and more specifically, to a high electron mobility transistor and its fabrication method. Background Technology

[0002] In the field of high-power electronic devices, heat dissipation management is key to improving device performance and reliability. However, as electronic devices become smaller and have higher power densities, traditional heat dissipation materials are no longer sufficient to meet the requirements.

[0003] Typically, in SiC-based high electron mobility transistors (HEMTs), such as Figure 1 As shown, HEMT consists of a SiC (silicon carbide) substrate, an AlN (aluminum nitride) nucleation layer, a GaN (gallium nitride) buffer layer, a GaN channel, an AlN insertion layer, an AlGaN (aluminum gallium nitride) barrier layer, and a GaN cap layer from bottom to top. The device mainly uses the traditional GaN buffer layer and AlN insertion layer for heat dissipation. Although the GaN buffer layer and AlN insertion layer play the roles of insulation and heat dissipation, the following defects still exist due to their relatively low thermal conductivity: (1) Thermal conductivity limitation: Although the thermal conductivity of the AlN insertion layer is higher than that of some traditional insulating materials, under high power density conditions, the AlN insertion layer is not enough to conduct heat quickly, which leads to an increase in the internal temperature of the transistor. (2) Heat accumulation problem: Under high power density conditions, the AlN insertion layer cannot effectively conduct the heat accumulated in the GaN channel when the transistor is working, which affects the performance and reliability of the transistor.

[0004] In summary, no effective solution has yet been proposed in the relevant technologies. Summary of the Invention

[0005] This application provides a high electron mobility transistor and its fabrication method, which at least solves the problem in related technologies where high electron mobility transistors using traditional GaN buffer layers and traditional AlN insertion layers cannot effectively dissipate the generated heat, leading to heat accumulation and transistor performance degradation, thereby achieving the effect of improving the thermal conductivity of high electron mobility transistors.

[0006] According to one embodiment of this application, a high electron mobility transistor is provided, the structure of which, from bottom to top, includes a substrate, a nucleation layer, a composite back barrier layer, a channel layer, and a composite barrier layer, wherein the composite back barrier layer is formed by periodically growing a hexagonal boron nitride layer and an aluminum nitride layer.

[0007] According to another embodiment of this application, a method for fabricating a high electron mobility transistor is provided, the method comprising: epitaxially growing a nucleation layer, a composite back barrier layer, a channel layer and a composite barrier layer sequentially from bottom to top on a substrate, wherein the composite back barrier layer is formed by periodically alternating growth of a hexagonal boron nitride layer and an aluminum nitride layer.

[0008] According to yet another embodiment of this application, an electronic device is also provided, which includes the material elements described in the above-described device embodiments.

[0009] The above embodiments of this application provide a high electron mobility transistor (HEMT). By employing a composite back barrier layer, namely, a hexagonal boron nitride (BN) layer and an aluminum nitride (AN) layer grown periodically and alternately, the large bandgap of the BN and AN layers enhances the HEMT's breakdown capability. Simultaneously, the periodic introduction of the BN layer alleviates stress between the substrate and the channel layer, creating a deeper quantum well and thus a higher electron concentration. Furthermore, the high in-plane thermal conductivity of the BN layer allows the HEMT to dissipate heat during operation. Therefore, this addresses the problem in related technologies where HEMTs using conventional GaN buffer layers and conventional AlN insertion layers fail to effectively dissipate heat, leading to heat accumulation and performance degradation. This achieves the effect of improving the thermal conductivity of the HEMT. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the structure of a high electron mobility transistor in related technologies;

[0011] Figure 2 This is a schematic diagram of the heat dissipation path of a high electron mobility transistor in related technologies;

[0012] Figure 3 This is a schematic diagram of the overall structure of a high electron mobility transistor according to an embodiment of this application;

[0013] Figure 4 This is a schematic diagram of the structure of a high electron mobility transistor according to an embodiment of this application;

[0014] Figure 5 This is a schematic diagram of the heat dissipation path of a high electron mobility transistor according to an embodiment of this application;

[0015] Figure 6 This is a flowchart of a method for fabricating a high electron mobility transistor according to an embodiment of this application. Detailed Implementation

[0016] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0017] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0018] In related technologies, HEMTs often use traditional GaN as a buffer layer and traditional AlN as an insertion layer. Fe (iron) doping or C (carbon) doping of the GaN buffer layer compensates for background carriers during growth. However, although the GaN buffer layer and AlN insertion layer provide insulation and heat dissipation, their relatively low thermal conductivity still results in the following drawbacks:

[0019] (1) Thermal conductivity limitation: Although the thermal conductivity of AlN intercalation layer is higher than that of some traditional insulating materials, under high power density conditions, AlN intercalation layer is not enough to conduct heat quickly, resulting in an increase in the internal temperature of transistor.

[0020] (2) Heat accumulation problem: Under high power density conditions, the AlN insertion layer cannot effectively conduct the heat accumulated in the GaN channel when the transistor is working, which affects the performance and reliability of the transistor.

[0021] (3) Power handling capability: In high-power applications, the AlN insertion layer cannot effectively dissipate the heat generated by the transistor, which limits the power handling capability of the transistor.

[0022] (4) Frequency characteristics: The accumulation of heat affects the frequency characteristics of transistors, especially in high-frequency radio frequency applications, which can lead to signal distortion or performance degradation.

[0023] (5) Reliability and lifespan issues: Long-term operation in high-temperature environments will accelerate transistor aging and reduce reliability and lifespan.

[0024] Figure 2 This is a schematic diagram of the heat dissipation path of a high electron mobility transistor in related technologies, such as... Figure 2 As shown, in high electron mobility transistor structures employing conventional GaN buffer layers and conventional AlN insertion layers, heat is primarily conducted downwards to the SiC substrate via the GaN channel, GaN buffer layer, and AlN nucleation layer. The GaN channel beneath the AlN insertion layer is the main region for electron migration in the device and also the primary source of heat generation. Due to the low thermal conductivity of the upward heat dissipation path in the conventional structure (from the GaN cap layer to the SiN passivation layer), most of the heat is conducted downwards. When operating at high output power or high frequency, heat accumulates in the GaN channel and cannot be quickly dissipated, leading to a temperature increase.

[0025] Based on the above issues, such as Figure 3As shown in the embodiment of this application, a SiC-based high electron mobility transistor employing a composite h-BN (Hexagonal Boron Nitride) / AlN back barrier is proposed, comprising: a wafer, the wafer including a group III nitride heterojunction, the heterojunction interface generating a two-dimensional electron gas through polarization, and its structure sequentially arranged from bottom to top as follows: SiC substrate, AlN nucleation layer, h-BN / AlN composite back barrier layer, GaN channel, and composite barrier layer (h-BN insertion layer, AlGaN barrier layer, GaN cap layer, and h-BN heat dissipation layer). A two-dimensional electron gas is formed between the GaN channel and the composite barrier layer; the source and drain are located at opposite ends above the epitaxial layer; the gate is located between the source and drain, also disposed above the epitaxial layer. Replacing the traditional GaN buffer layer with a periodically grown h-BN / AlN composite back barrier layer, the breakdown capability of HEMTs is enhanced by utilizing the large band gaps of h-BN and AlN (e.g., 6.2 eV for AlN and 5.97 eV for h-BN). Simultaneously, the periodic introduction of the h-BN layer enhances the polarization effect, generating deeper quantum wells and thus higher electron concentration. The introduction of the h-BN / AlN composite back barrier layer enhances the confinement ability of channel electrons, improving transistor performance, and the high in-plane thermal conductivity of h-BN helps dissipate heat during transistor operation.

[0026] Furthermore, a vertically oriented (VO) h-BN insertion layer is used instead of the traditional AlN insertion layer. The high in-plane thermal conductivity of h-BN effectively disperses heat from the GaN channel across the entire plane, thereby improving heat dissipation efficiency and achieving adaptive thermal management. By growing a vertically oriented h-BN insertion layer on the AlGaN barrier layer / GaN channel heterostructure, the transistor can more effectively extract heat from hotspot regions under high power density conditions, reducing operating temperature and improving transistor stability and lifespan.

[0027] Meanwhile, in the HEMT structure, growing a vertically oriented h-BN heat dissipation layer above the GaN cap layer can enhance the efficiency of upward heat dissipation of the transistor. Secondly, the introduction of the vertically oriented h-BN can act as a stress buffer layer, reducing the stress caused by the mismatch of thermal expansion coefficients, thereby reducing the defect density in the transistor.

[0028] Figure 4 This is a schematic diagram of the structure of a high electron mobility transistor according to an embodiment of this application, as shown below. Figure 4 As shown, the high electron mobility transistor structure includes, from bottom to top, a substrate, a nucleation layer, a composite back barrier layer, a channel layer, and a composite barrier layer, wherein the composite back barrier layer is formed by periodically growing a hexagonal boron nitride layer and an aluminum nitride layer.

[0029] For example, the high electron mobility transistor structure includes, from bottom to top, a substrate, a nucleation layer, a composite back barrier layer, a channel layer, and a composite barrier layer. For instance, the substrate is a semi-insulating SiC substrate with a thickness of 500 μm and a crystal form of 4H; the nucleation layer is an AlN nucleation layer with a thickness of 30 nm; the composite back barrier layer is an h-BN / AlN composite back barrier layer, with AlN and h-BN growing alternately periodically; and the channel layer is a GaN channel with a thickness of 200 nm.

[0030] In this embodiment, the composite barrier layer includes, from bottom to top, an insertion layer, a barrier layer, a cap layer, and a heat dissipation layer. The insertion layer includes a hexagonal boron nitride insertion layer epitaxially grown on the channel layer; the barrier layer includes an aluminum gallium nitride barrier layer epitaxially grown on the hexagonal boron nitride insertion layer; the cap layer includes a gallium nitride cap layer epitaxially grown on the aluminum gallium nitride barrier layer; and the heat dissipation layer includes a hexagonal boron nitride heat dissipation layer epitaxially grown on the gallium nitride cap layer.

[0031] For example, the insertion layer is made of h-BN and has a thickness of 1 nm; the barrier layer is made of AlGaN and has a thickness of 20 nm, wherein the Al content in the AlGaN barrier layer is 20%; the cap layer is made of GaN and has a thickness of 1 nm; and the heat dissipation layer is made of h-BN and has a thickness of 1 nm.

[0032] In one embodiment, the number of alternating growth cycles of the hexagonal boron nitride layer and aluminum nitride layer in the composite back barrier layer is 40 to 80 cycles, the total thickness of the composite back barrier layer is 280 to 560 nm, and the thickness of the hexagonal boron nitride layer and aluminum nitride layer in each cycle of the composite back barrier layer is generated according to the growth time.

[0033] For example, in the composite back barrier layer, the AlN layer and the h-BN layer can have an AlN thickness of 5 nm and an h-BN thickness of 2 nm in one cycle, and the total thickness of the AlN layer and the h-BN layer is 7 nm.

[0034] For example, the number of alternating growth cycles of AlN layer and h-BN layer in the composite back barrier layer is 40 to 80, and the total thickness of the composite back barrier layer is 280 to 560 nm. For example, the number of alternating growth cycles of AlN layer and h-BN layer is 60, and the total thickness of the composite back barrier layer is 420 nm.

[0035] For example, the thickness of the hexagonal boron nitride layer and aluminum nitride layer in each cycle of the composite back barrier layer can be determined by the growth time.

[0036] Figure 5 This is a schematic diagram of the heat dissipation path of a high electron mobility transistor according to an embodiment of this application, as shown below. Figure 5 As shown, the heat dissipation path of the SiC-based high electron mobility transistor is as follows:

[0037] (1) Thermal conduction of GaN channel

[0038] The heat generated in the GaN channel is conducted to the composite back barrier layer and then enters the AlN nucleation layer. This rapid downward dispersion of heat improves the thermal management efficiency inside the GaN channel.

[0039] (2) Thermal dispersion of the composite back barrier layer

[0040] Between the GaN channel and the AlN nucleation layer, this embodiment introduces a composite back barrier layer of h-BN and AlN layers. The periodic introduction of the h-BN layer not only alleviates the stress between the SiC substrate and the upper GaN channel, but more importantly, it utilizes its high thermal conductivity to actively disperse heat inside the device, avoiding the formation of localized heat and thus effectively reducing the device's operating temperature.

[0041] (3) Thermal desorption of AlN nucleation layer and SiC substrate

[0042] Heat is conducted downwards to the AlN nucleation layer and finally to the SiC substrate. Although the SiC substrate has a lower thermal conductivity than h-BN, it plays a crucial role in heat dissipation within the overall device structure. Simultaneously, the AlN nucleation layer contributes to more uniform heat distribution, reducing localized heat concentration and further improving overall heat dissipation efficiency.

[0043] (4) Upward heat dissipation path

[0044] This application also provides an upward heat dissipation path, namely, a vertically oriented h-BN heat dissipation layer grown above the GaN cap layer. Its high thermal conductivity and vertical orientation characteristics enable more effective heat dissipation from the top of the device, providing a multi-dimensional heat dissipation pathway.

[0045] The heat dissipation method for high electron mobility transistors (HMTs) in this application embodiment helps to achieve more miniaturized and highly integrated electronic devices. By introducing an h-BN layer into the HEMT and replacing the traditional GaN buffer layer with a periodically grown composite back barrier layer of AlN and h-BN, the high in-plane thermal conductivity of h-BN can disperse heat during transistor operation, reducing the transistor's thermal resistance and thus improving overall heat dissipation efficiency. Simultaneously, the use of the h-BN layer enhances the transistor's ability to withstand high power loads, allowing heat to dissipate more quickly and reducing transistor overheating problems caused by excessive power.

[0046] Figure 6 This is a flowchart of a method for fabricating a high electron mobility transistor according to an embodiment of this application, such as... Figure 6 As shown, the fabrication method of this high electron mobility transistor specifically includes the following steps:

[0047] Step S602: Epitaxially grow a nucleation layer, a composite back barrier layer, a channel layer and a composite barrier layer sequentially on the substrate from bottom to top, wherein the composite back barrier layer is formed by periodically alternating growth of a hexagonal boron nitride layer and an aluminum nitride layer.

[0048] In one embodiment, the composite barrier layer includes, from bottom to top, an epitaxially grown insertion layer, a barrier layer, a cap layer, and a heat dissipation layer.

[0049] In this embodiment, the heat dissipation layer includes a hexagonal boron nitride heat dissipation layer epitaxially grown on the cap layer.

[0050] For example, the composite barrier layer includes an insertion layer, a barrier layer, a cap layer, and a heat dissipation layer arranged sequentially from bottom to top. The insertion layer includes a hexagonal boron nitride insertion layer epitaxially grown on the channel layer; the barrier layer includes an aluminum gallium nitride barrier layer epitaxially grown on the hexagonal boron nitride insertion layer; the cap layer includes a gallium nitride cap layer epitaxially grown on the aluminum gallium nitride barrier layer; and the heat dissipation layer includes a hexagonal boron nitride heat dissipation layer epitaxially grown on the gallium nitride cap layer.

[0051] Specifically, the method for fabricating a high electron mobility transistor includes the following steps:

[0052] Step 1: Perform high-temperature pretreatment on the SiC substrate, and then epitaxially grow an AlN nucleation layer on the SiC substrate.

[0053] Furthermore, before step 1, the process includes: performing a surface cleaning treatment on the SiC substrate.

[0054] The method for cleaning the surface of SiC substrate is as follows: the SiC substrate is placed in a 30% hydrofluoric acid (HF) solution and heated in a water bath at 80°C for 2 minutes. Then, it is ultrasonically cleaned for 5 minutes each with acetone (C3H6O), anhydrous ethanol (C2H5OH), and deionized water, mainly to remove residual inorganic matter on the surface.

[0055] Furthermore, in step 1, the method for high-temperature pretreatment of the SiC substrate is as follows: the SiC substrate is subjected to high-temperature treatment using hydrogen (H2) at 1150°C. The purpose of this high-temperature pretreatment is to remove impurities such as oxides from the surface of the SiC substrate, eliminating the influence of these impurities during the transistor epitaxial growth process.

[0056] Step 2: Epitaxially grow an h-BN / AlN composite back barrier layer on the AlN nucleation layer. For example, in one cycle, the AlN layer and the h-BN layer in the composite back barrier layer have an AlN thickness of 5 nm and an h-BN thickness of 2 nm, with a total thickness of 7 nm. It can be grown for 40 to 80 cycles, with a total thickness of 280 to 560 nm for the composite back barrier layer. For example, if the AlN layer and the h-BN layer are grown alternately for 60 cycles, the total thickness of the composite back barrier layer is 420 nm.

[0057] Furthermore, in step 2, during the epitaxial growth of the h-BN / AlN composite back barrier layer, a pulsed flow rate modulation method is mainly used to reduce the pre-reaction during the growth process. Trimethylaluminum (TMAl) and ammonia (NH3) gas lines are simultaneously opened at 1050℃, with the TMAl flow rate adjusted to 240-260 sccm and the NH3 flow rate to 4000 sccm, resulting in the growth of an AlN layer with a thickness of 5 nm. The reaction chamber temperature is then raised to 1100℃, and the introduction of NH3 into the reaction chamber is stopped during the heating process to avoid excessive NH3 in the reaction chamber reacting strongly with triethylborane (TEB), thus reducing crystal quality. TEB and NH3 are alternately introduced into the reaction chamber at a V / III (Group 5 and Group 3 element) ratio of 6500, and the h-BN layer with a thickness of 2 nm is grown for 6 minutes.

[0058] Step 3: Epitaxially grow a GaN channel on the h-BN / AlN composite back barrier layer. The GaN channel growth temperature is 1050℃, the pressure is 40-50 Tor, and the GaN channel thickness is 200nm.

[0059] Step 4: Epitaxially grow a vertically oriented h-BN insertion layer on the GaN channel. The growth temperature of the h-BN insertion layer is 1100℃. TEB and NH3 are selected as the boron (B) source and nitrogen (N) source, respectively, required for the epitaxial growth of the h-BN insertion layer. NH3 is selected as the carrier gas, with a boron source flow rate of 40 sccm and an ammonia flow rate of 36000 sccm. The thickness of the grown h-BN insertion layer is 1 nm.

[0060] Step 5: Epitaxially grow an AlGaN barrier layer above the h-BN insertion layer. The AlGaN barrier layer has a thickness of 20 nm and an aluminum composition of 20%.

[0061] Step 6: Grow a GaN cap layer on top of the AlGaN barrier layer.

[0062] Step 7: Grow a vertically oriented h-BN heat dissipation layer on top of the GaN cap layer.

[0063] Furthermore, in steps 4 and 7, the method for epitaxially growing the h-BN layer is the pulse flow modulation method, which mainly includes: alternately introducing TEB and NH3 into the reaction chamber at 1100℃, with a V / III (group 5 and group 3 elements) ratio of 6500, growing for 3 minutes, and achieving a thickness of 1 nm.

[0064] The growth thickness of each material in the embodiments of this application can be adjusted according to the actual situation, and no specific limitation is made here.

[0065] By introducing a high thermal conductivity h-BN layer as an insertion layer into a SiC-based high electron mobility transistor (HEMT), compared to the traditional AlN insertion layer in related technologies, the synergistic effect of the h-BN layer and the SiC substrate not only optimizes the heat dissipation performance of the transistor but also improves its thermal conductivity. Furthermore, because the h-BN layer effectively disperses heat, it reduces thermal stress caused by the mismatch of thermal expansion coefficients, significantly improving the stability and lifespan of the transistor in high-temperature environments.

[0066] The high electron mobility transistor of this application embodiment can also be applied to the following scenarios:

[0067] (1) High-frequency and high-power electronic devices: RF power amplifiers for 5G and future communication technologies, high-frequency amplifiers in satellite communication systems, and signal processing in radar systems.

[0068] Specifically, SiC-based high electron mobility transistors, due to their wide bandgap and high breakdown voltage, have become candidate bases for high-frequency and high-power electronic devices. Combined with the high thermal conductivity of h-BN, the performance of these devices can be further improved, and they can be applied to high-frequency and high-power amplifiers in fields such as radar and satellite communications.

[0069] (2) Power systems and communication equipment: high-power converters, traction inverters for electric and hybrid vehicles, and power management systems for renewable energy systems (such as solar inverters).

[0070] Specifically, as power systems and communication equipment become smaller and more integrated, heat dissipation issues are becoming increasingly prominent. SiC-based high electron mobility transistors with h-BN layers can provide better heat dissipation and are suitable for the high-performance requirements of power electronic converters, 5G base stations, and other equipment.

[0071] (3) New energy vehicles: sensors and controllers in advanced driver assistance systems (ADAS), and power management in in-vehicle infotainment systems.

[0072] Specifically, in key components such as the battery management system and motor controller of new energy vehicles, efficient heat dissipation is crucial for ensuring system safety and improving performance. The application of the h-BN layer can improve the system's heat dissipation efficiency, thereby enhancing the overall vehicle performance and reliability.

[0073] (4) Electronic devices operating in high-temperature environments: Electronic devices operating in high-temperature environments, such as industrial furnace control and oil drilling, have extremely high requirements for heat dissipation. SiC-based high electron mobility transistors with h-BN layers can provide better heat dissipation performance, ensuring the stable operation of electronic devices in high-temperature environments.

[0074] (5) Aviation field: high-frequency components in military communication equipment, stable power amplifiers in avionics systems, and navigation and control systems for missiles and unmanned aerial vehicles.

[0075] Specifically, in the aerospace field, electronic devices often need to operate in extreme environments, with very strict requirements for heat dissipation. SiC-based high electron mobility transistors with h-BN layers can provide excellent heat dissipation performance, meeting the aerospace field's demand for high-performance electronic devices.

[0076] (6) Consumer electronics: power management in high-performance smartphones and computers, and high-efficiency power conversion in home appliances.

[0077] (7) Medical equipment: power amplifiers in high-frequency medical imaging equipment (such as MRI and CT scanners), and precision power management in medical instruments.

[0078] (8) Optoelectronics: power management, signal amplification in photodetectors and sensors in high-brightness LED lighting technology.

[0079] The embodiments of this application involve the comprehensive application of multiple fields such as materials science, thermodynamics and electronic engineering, which not only improves the performance of individual devices, but also promotes the development of related technical fields (such as high-power electronics, radio frequency communication and avionics).

[0080] The above embodiments of this application provide a high electron mobility transistor and its fabrication method. By employing a composite back barrier layer, namely a hexagonal boron nitride layer and an aluminum nitride layer grown periodically and alternately, the large bandgap of the hexagonal boron nitride and aluminum nitride layers enhances the breakdown capability of the high electron mobility transistor. Simultaneously, the periodic introduction of the hexagonal boron nitride layer can alleviate the stress between the substrate and the channel layer, generating a deeper quantum well and thus a higher electron concentration. Furthermore, the high in-plane thermal conductivity of the hexagonal boron nitride layer allows the high electron mobility transistor to dissipate heat during operation. Therefore, this method solves the problem in related technologies where high electron mobility transistors using traditional GaN buffer layers and traditional AlN insertion layers cannot effectively dissipate the generated heat, leading to heat accumulation and transistor performance degradation. This achieves the effect of improving the thermal conductivity of the high electron mobility transistor.

[0081] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0082] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when run.

[0083] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0084] Embodiments of this application also provide an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0085] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0086] According to yet another embodiment of this disclosure, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps of the methods described in various embodiments of this disclosure.

[0087] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0088] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0089] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A high electron mobility transistor, characterized in that, Its structure, from bottom to top, includes a substrate, a nucleation layer, a composite back barrier layer, a channel layer, and a composite barrier layer, wherein the composite back barrier layer is formed by periodically growing a hexagonal boron nitride layer and an aluminum nitride layer.

2. The high electron mobility transistor according to claim 1, characterized in that, in, The number of alternating growth cycles of the hexagonal boron nitride layer and aluminum nitride layer in the composite back barrier layer is 40 to 80 cycles.

3. The high electron mobility transistor according to claim 1, characterized in that, in, The total thickness of the composite back barrier layer is 280 to 560 nm, and the thickness of the hexagonal boron nitride layer and aluminum nitride layer in each cycle of the composite back barrier layer is generated according to the growth time.

4. The high electron mobility transistor according to claim 1, characterized in that, in, The composite barrier layer comprises, from bottom to top, an insertion layer, a barrier layer, a cap layer, and a heat dissipation layer.

5. The high electron mobility transistor according to any one of claims 4, characterized in that, in, The insertion layer includes a hexagonal boron nitride insertion layer epitaxially grown on the channel layer; The barrier layer includes an aluminum gallium nitride barrier layer epitaxially grown on the hexagonal boron nitride insertion layer; The cap layer includes a gallium nitride cap layer epitaxially grown on the aluminum gallium nitride barrier layer; The heat dissipation layer includes a hexagonal boron nitride heat dissipation layer epitaxially grown on the gallium nitride cap layer.

6. A method for fabricating a high electron mobility transistor, characterized in that, include: From bottom to top, a nucleation layer, a composite back barrier layer, a channel layer, and a composite barrier layer are epitaxially grown sequentially on the substrate, wherein the composite back barrier layer is formed by periodically alternating growth of a hexagonal boron nitride layer and an aluminum nitride layer.

7. The method according to claim 6, characterized in that, The composite barrier layer comprises, from bottom to top, an epitaxially grown insertion layer, a barrier layer, a cap layer, and a heat dissipation layer.

8. The method according to claim 7, characterized in that, The heat dissipation layer includes a hexagonal boron nitride heat dissipation layer epitaxially grown on the cap layer.

9. An electronic device, characterized in that, Includes the transistor described in any one of claims 1-5 above.

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