A method for manufacturing a battery cell

Abstract

This invention discloses a method for fabricating a solar cell, including obtaining a solar cell substrate; fully depositing a TCO layer on the front, back, and side surfaces of the solar cell substrate; fully depositing a seed layer on the front and back surfaces of the solar cell; fabricating a patterned mask layer on the front and back surfaces of the solar cell; fabricating an edge-binding layer on the side surfaces of the solar cell; electroplating copper metal grid lines at the slotted locations of the patterned mask layer; removing the mask layer and the edge-binding layer; and removing the TCO layer on the side surfaces of the solar cell. This method avoids the problem of severe chemical damage to the silicon layer caused by contact between the alkaline solution and the substrate silicon layer, maximizing edge passivation performance and cell efficiency. Furthermore, it improves the optical anti-reflection and light-trapping effects at the edges of the solar cell, increases the number of photogenerated carriers, maximizes the coverage area of ​​the TCO layer on the front and back surfaces, and minimizes the exposed area of ​​the substrate silicon layer, thereby improving carrier collection efficiency and ultimately significantly enhancing conversion efficiency and reliability.

Description

Technical Field

[0001] This invention belongs to the field of photovoltaic product manufacturing methods, and particularly relates to a method for manufacturing solar cells. Background Technology

[0002] For solar cells that require TCO layers on both the front and back sides, such as HJT cells, the conventional manufacturing process generally involves the following steps: first, fabricating a solar cell substrate to be fabricated with a TCO layer; then, depositing a TCO layer and a seed layer on the front and back sides of the solar cell substrate respectively; next, fabricating a patterned mask layer on the seed layers on the front and back sides; then, electroplating copper metal grid lines; and finally, removing the seed layer covering the mask layer and the non-metallic grid lines.

[0003] In conventional manufacturing processes, because the sides of the solar cell are not edge-sealed before the mask layer ink is developed, the seed layer and TCO layer on the sides are exposed. To prevent the TCO layers on the front and back of the solar cell from connecting and forming a plating loop, the seed layer and TCO layer on the sides are usually etched away by immersion in acid to isolate the front and back TCO layers. However, this has a drawback: the mask layer cannot completely cover the front and back TCO layers, causing the TCO layers at the edges of the front and back to be removed as well. This results in the front and back TCO layers being relatively recessed, meaning there is a certain distance between the outermost TCO layer and the edge of the solar cell.

[0004] To minimize the inward shrinkage distance of the TCO layer, some methods use mask carriers to reduce the back edge area. However, due to fluctuations in silicon wafer size and deformation of the carrier over time, automated design makes it difficult to ensure that the silicon wafers are placed in the same position. Therefore, the back edge area is still relatively large, meaning that the distance between the outermost edge of the TCO layer and the edge of the cell is relatively large, usually greater than 0.5mm.

[0005] The conventional manufacturing method described above significantly reduces the effect of full TCO layer plating, meaning the area of ​​the TCO layer is greatly reduced compared to full plating. Furthermore, because the seed layer and TCO layer on the side are etched away by acid immersion to isolate the front and back TCO layers, the silicon layer at the edge of the cell is exposed. As a result, after the subsequent electroplating of metal grid lines, the alkaline solution used to remove the mask layer will inevitably come into contact with the exposed silicon layer. The time required to remove the mask layer determines the time the alkaline solution is in contact with the exposed silicon layer, which will inevitably lead to severe chemical damage to the exposed silicon layer, thereby affecting the conversion efficiency of the cell. Summary of the Invention

[0006] The purpose of this invention is to overcome the above-mentioned shortcomings and provide a method for manufacturing solar cells, which greatly improves the conversion efficiency and reliability of the solar cells produced by this method.

[0007] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0008] A method for manufacturing a solar cell, applicable to solar cells requiring TCO layers on both the front and back sides, comprising the following steps:

[0009] S1. Obtain the battery cell substrate for which the TCO layer is to be prepared, and fully deposit the TCO layer on the front, back and side of the battery cell substrate.

[0010] S2. The seed layer is fully coated on both the front and back of the battery cell;

[0011] S3. A patterned mask layer is prepared on the front and back surfaces of the solar cell, and an edge-wrapping layer is prepared on the side surface of the solar cell.

[0012] S4. Electroplat copper metal grid lines at the slotted positions of the patterned mask layer on the front and back of the battery cell;

[0013] S5. Remove the mask layer and edge banding;

[0014] S6. Remove the TCO layer from the side of the battery cell;

[0015] S7. Remove the seed layer from the area covered by non-metallic grid lines.

[0016] Preferably, the TCO layer is simultaneously fully deposited on the front, back, and sides of the entire cell substrate using PVD combined with a full-plating substrate.

[0017] Preferably, the seed layer on both the front and back sides of the entire solar cell substrate is simultaneously fully deposited using PVD combined with a full-plate coating method.

[0018] Preferably, in step S1, the thickness of the TCO layer on one side of the front and back of the battery cell substrate is controlled to be 80nm-120nm, and the thickness of the TCO layer on the other side is controlled to be 50nm-120nm.

[0019] Preferably, the TCO layer on the side of the solar cell substrate is thinner than the TCO layers on the front and back sides of the solar cell substrate.

[0020] Preferably, in step S2, the seed layer thickness on one side of the front and back of the battery cell is controlled to be 5nm-150nm, and the seed layer thickness on the other side is controlled to be 5nm-60nm.

[0021] Preferably, in step S2, during the process of fully depositing seed layers on both the front and back sides of the solar cell, multiple spaced third seed layers are also deposited on the side of the solar cell.

[0022] Preferably, in step S6, the TCO layer removed is the side of the battery cell that is not covered by the third seed layer.

[0023] Preferably, in step S6, the TCO layer on the side of the battery cell is removed by immersion in 5% sulfuric acid, or by etching with dilute hydrochloric acid or oxalic acid solution.

[0024] Preferably, in step S7, an acidic etching solution can be used to etch away the seed layer of the non-metallic gate area. The acidic etching solution is phosphoric acid + hydrogen peroxide or citric acid + hydrogen peroxide.

[0025] Because the present invention adopts the above-described technical solution, it has the following beneficial technical effects:

[0026] In this invention, the patterned mask layer is fabricated on the seed layers on the front and back sides, and except for the slotted areas of the mask layer, it completely covers the front and back sides of the solar cell. The TCO layers on the front and back sides are completely covered under the seed layers, and the sides of the solar cell are also fully covered with a cladding before electroplating. Furthermore, the mask layer and cladding are removed first, followed by the removal of the TCO on the sides and the seed layer in the non-metallic gate area. Therefore, when removing the mask layer, the alkaline solution used for etching will not come into contact with the substrate silicon layer and react, and the TCO layer at the edges of the front and back sides will not be removed. This method completely avoids the problem of severe chemical damage to the silicon layer caused by contact between the alkaline solution and the substrate silicon layer, maximizing the edge passivation performance and cell efficiency. Furthermore, it significantly improves the optical anti-reflection and light-trapping effects at the cell edges, increasing the number of photogenerated carriers. In addition, the above preparation method maximizes the coverage area of ​​the TCO layer on both the front and back sides while minimizing the exposed area of ​​the substrate silicon layer, thereby greatly improving carrier collection efficiency, reducing recombination losses, and consequently significantly improving the electrical transport efficiency of photogenerated carriers in the cell. Ultimately, this greatly enhances both the conversion efficiency and reliability of the cell. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of the battery cell obtained after step S1 of the method of the present invention;

[0028] Figure 2 This is a schematic diagram of the battery cell obtained after step S2 of the method of the present invention;

[0029] Figure 3 This is a schematic diagram of the battery cell obtained after step S3 of the method of the present invention;

[0030] Figure 4 This is a schematic diagram of the battery cell obtained after step S4 of the method of the present invention;

[0031] Figure 5 This is a schematic diagram of the battery cell obtained after step S5 of the method of the present invention;

[0032] Figure 6This is a schematic diagram of the battery cell obtained after step S6 of the method of the present invention;

[0033] Figure 7 This is a schematic diagram of a battery cell prepared by the method of the present invention. Detailed Implementation

[0034] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0035] like Figures 1 to 7 As shown, this invention discloses a method for manufacturing a battery cell, applicable to battery cells requiring TCO layers on both the front and back sides. The method for manufacturing the battery cell includes the following steps:

[0036] S1. Obtain the battery cell substrate 1 to be prepared with TCO layer, and fully deposit TCO layer 2 on the front, back and side of the battery cell substrate 1.

[0037] S2. The seed layer is fully coated on both the front and back of the battery cell;

[0038] S3. A patterned mask layer is prepared on the front and back surfaces of the battery cell 4, and an edge-binding layer is prepared on the side surface of the battery cell 5.

[0039] S4. Electroplating metal grid lines 6 at the slot positions 41 of the patterned mask layer 4 on the front and back of the battery cell.

[0040] S5. Remove mask layer 4 and edge banding 5;

[0041] S6. Remove the TCO layer from the side of the battery cell;

[0042] S7. Remove the seed layer from the area covered by non-metallic grid line 6.

[0043] In step S1 above, the solar cell substrate 1 to which the TCO layer is to be prepared can be fabricated by any known and feasible method, and the specific structure of the solar cell substrate 1 to which the TCO layer is to be prepared is not limited, as long as the TCO layer needs to be deposited on both its front and back sides. In this embodiment, HJT solar cell substrate 1 is used as an example for illustration. The HJT solar cell substrate 1 includes an N-type silicon substrate 11, a first intrinsic layer 12 and a second intrinsic layer 13 respectively disposed on the front and back sides of the N-type silicon substrate 11, an N-type doped layer 14 and a P-type doped layer 15 respectively disposed on the first intrinsic layer 12 and the second intrinsic layer 13. The first intrinsic layer 12 and the second intrinsic layer 13 can be intrinsic amorphous silicon layers, the N-type doped layer 14 can be an N-type doped microcrystalline / amorphous silicon layer, and the P-type doped layer 15 can be a P-type doped microcrystalline / amorphous silicon layer. Furthermore, if it is an HJT solar cell substrate 1, before depositing the TCO layer, the preparation of the substrate 1 also includes cleaning and texturing to remove surface impurities and form a light-trapping structure. The preparation method of the HJT solar cell substrate 1 can be any known and feasible method, and since it is not the inventive point of this invention, it will not be described in detail here. The structures and preparation methods of other types of solar cell substrates 1 to which the TCO layer is to be prepared are also not listed here.

[0044] The front, back, and sides of the cell substrate 1 are fully coated with a TCO layer, so that the entire cell substrate 1 is covered by the TCO layer 2 (e.g., Figure 2 (As shown). To achieve this goal, it can be done through stepwise deposition or by using PVD in conjunction with a full-plate substrate to simultaneously deposit the TCO layer on the front, back, and sides of the entire cell substrate 1.

[0045] Furthermore, due to the strong directionality of the PVD process combined with a full-body substrate for simultaneous deposition, the deposition thickness and film formation on the front and back sides of the solar cell substrate 1 differ from those on the sides. Therefore, when simultaneously depositing TCO layers on all sides using PVD with a full-body substrate, the thickness of the TCO layer on the front and back sides can be controlled to ensure that the front, back, and sides of the solar cell substrate 1 are fully coated with TCO layers. Since different thicknesses of TCO layers need to be deposited on the front and back sides of the solar cell, the specific processes required are different. And because different processes will inevitably result in different TCO layer thicknesses and film formation on the sides of the solar cell, this is common knowledge and will not be elaborated upon here.

[0046] In this embodiment, the TCO layer thickness on one side of the front and back of the battery cell substrate is controlled to be 80nm-120nm, and the TCO layer thickness on the other side is controlled to be 50nm-120nm. During deposition, the side requiring a thicker TCO layer faces upwards, and the side requiring a thinner TCO layer faces downwards. Thus, during the deposition of TCO layers of the above thicknesses on the front and back of substrate 1, the sides of substrate 1 are also fully coated with a TCO layer, although the TCO thickness on the sides is thinner than that on the front and back.

[0047] The TCO layer refers to a transparent conductive oxide layer. Transparent conductive oxide is a general term for a category of materials, encompassing various specific materials and referring broadly to all oxide thin film materials that simultaneously possess both transparent and conductive properties. It includes, but is not limited to, thin film materials formed in different proportions of one or a combination of tin-doped indium oxide (ITO), tungsten-doped indium oxide (IWO), aluminum-doped indium oxide (ATO), titanium-doped indium oxide (TIO), cesium-doped indium oxide (CNO), aluminum-doped zinc oxide (ZNO), gallium-doped zinc oxide (ZNO), and aluminum-gallium-doped ZNO, tin oxide (SnOx), etc.

[0048] Preferably, the thickness of the TCO layer on the textured surface of the battery cell substrate 1 can be, but is not limited to, 85nm, 90nm, 95nm, 100nm, 105nm, 110nm, or 115nm. The thickness of the TCO layer on the polished textured surface of the battery cell substrate 1 can be, but is not limited to, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, 105nm, 110nm, or 115nm.

[0049] Once the TCO layer of the aforementioned thickness is fully deposited, the specific operational processes (such as target material, vacuuming, power, temperature, etc.) for full deposit via PVD with a full-deposit substrate are conventional and will not be elaborated here. In other embodiments, the TCO layer covering the entire solar cell substrate 1 can also be obtained through any other known and feasible method. That is to say, the method for preparing the TCO layer covering the entire solar cell substrate 1 is not limited, as long as the TCO layer can cover the entire solar cell substrate 1.

[0050] After step S1 above, the resulting battery cell is as follows: Figure 1 As shown, it includes a battery cell substrate 1 and a TCO layer 2 covering the battery cell substrate 1 therein.

[0051] In step S2 above, the seed layer can also be deposited in a single-sided stepwise manner, that is, first fully deposit the front side, then flip it over and fully deposit the back side; or the Ni seed layer can be fully deposited on both the front and back sides of the cell obtained after step S1 by PVD combined with a full-plating substrate, that is, the Ni seed layer is fully deposited on both the TCO layer on the front side and the TCO layer on the back side of the cell substrate 1.

[0052] The seed layer can be set as a Ni seed layer. Similarly, due to the inherent limitations of the current PVD process with a full-load substrate for simultaneous full-load Ni seed layer deposition, when full-load Ni seed layers are deposited on the front and back sides of the solar cell, seed layers will inevitably be deposited on the sides of the cell as well. However, due to the strong directionality of the PVD process, the seed layer thickness at the top and bottom edges of the sides of the solar cell will be relatively thick, while the seed layer in the middle of the sides of the solar cell will be thin or even absent. Since the seed layer is generally quite thin, when using PVD with a full-load substrate to simultaneously full-load Ni seed layers on both the front and back sides of the solar cell, the thickness and film formation differences of the thin PVD Ni seed layer on the front, back, and sides can be utilized to control the thickness of the seed layer deposition on the front and back sides of the solar cell, ensuring that the sides of the solar cell cannot be fully filmed, thus ensuring that the seed layers deposited on each side of the solar cell are discontinuous.

[0053] Specifically, the seed layer thickness on one side of the solar cell is controlled to be 5nm-150nm, and the seed layer thickness on the other side is controlled to be 5nm-60nm. Similarly, when using PVD with a full-coating substrate for simultaneous full coating, the thinner side faces down and the thicker side faces up.

[0054] Preferably, the thickness of the seed layer on one side can be, but is not limited to, 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 85nm, 90nm, 95nm, 100nm, 105nm, 110nm, 115nm, 120nm, 125nm, 130nm, 135nm, or 140nm. The thickness of the seed layer on the other side can be, but is not limited to, 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, or 55nm.

[0055] The process of applying Ni seed layers to both the front and back sides using PVD and a full-coverage substrate is well-known and will not be elaborated here.

[0056] In other embodiments, the seed layer can also be any other known and feasible metal seed layer, such as a copper seed layer, and correspondingly, a corresponding method is used when removing the metal seed layer.

[0057] After step S2, as Figure 2As shown, the obtained solar cell also includes a first seed layer 31 covering the entire front TCO layer of the solar cell substrate 1, a second seed layer 32 covering the entire back TCO layer of the solar cell substrate 1, and a plurality of mutually spaced third seed layers 33 are provided on the TCO layer on the side of the solar cell.

[0058] In step S3, the patterned mask layer 4 and the edge banding 5 can be prepared by any known and feasible method, and the materials of the mask layer 4 and the edge banding 5 can also be any known and feasible materials. For example, photosensitive ink can be used to first print the mask layer 4, then expose and develop it to obtain the patterned mask layer 4, and then the edge banding 5 is applied. The mask layer 4 can also be prepared using thermosetting adhesive. Furthermore, the mask layer 4 can be prepared first and then the edge banding 5 can be prepared, or the edge banding 5 ink can be simultaneously coated on the side of the battery cell when coating the mask layer 4 material. The materials and specific preparation methods of the mask layer 4 and the edge banding 5 can be any known and feasible technical solutions, and are not the innovative points of the invention, so they will not be elaborated here.

[0059] After step S3, as Figure 3 As shown, the fabricated solar cell further includes a patterned mask layer 4 covering the entire first seed layer 31 and the second seed layer 32, and a edging 5 covering the entire side of the solar cell.

[0060] In step S4 above, the patterned mask layer 4 will have slots 41 formed, and the bottom wall of the slots 41 is the seed layer. Metal grid lines 6 are electroplated at the slot positions of the patterned mask layer 4 on the front and back sides of the solar cell. The method of electroplating the metal grid lines 6 is a conventional technical solution, so it will not be described in detail here.

[0061] Because the front and back of the battery cell are provided with patterned mask layers 4 and the sides are edged 5, during electroplating, only the slotted positions of the patterned mask layer 4 are electroplated with metal grid lines 6, and no circumferential plating is formed.

[0062] After step S4, the resulting solar cell, such as Figure 4 As shown, it also includes metal grid lines 6 electroplated at the slotted positions of the patterned mask layer 4.

[0063] In step S5 above, an alkaline wet process can be used to remove the mask layer 4 and the edge banding 5 because this method causes minimal damage to the seed layer and TCO layer, removes the material thoroughly without residue, and is compatible with the HJT low-temperature process. For example, if the mask layer 4 and the edge banding 5 are prepared using photosensitive ink, to remove them, a 5% KOH solution can be used to etch the mask layer 4 and the edge banding 5 at a temperature of 40-60℃ for 0.5-3 minutes. Specifically, the temperature can be 42℃, 45℃, 48℃, 50℃, 52℃, 55℃, 56℃, or 58℃; the etching time can be 0.8, 1, 1.2, 1.5, 1.8, 2, 2.2, 2.5, or 2.8 minutes.

[0064] After step S5, the resulting solar cell is as follows: Figure 5 As shown, it includes a solar cell substrate 1, a TCO layer 2 enclosing the solar cell substrate 1, a first seed layer 31 covering the entire front TCO layer of the solar cell substrate 1, and a second seed layer 32 covering the entire back TCO layer of the solar cell substrate 1; and metal grid lines 6 are provided on the first seed layer 31 and the second seed layer 32. Furthermore, multiple mutually spaced third seed layers 33 are provided on the TCO layer on the side of the solar cell.

[0065] In step S6 above, the TCO layer on the side of the solar cell is removed, thus isolating the TCO layer on the front side of the solar cell from the TCO layer on the back side without connecting them. The TCO layer on the side of the solar cell can be removed by etching with sulfuric acid immersion, specifically using 5% sulfuric acid for 2-30 minutes. Preferably, the immersion time is 5, 8, 10, 12, 15, 18, 20, 22, 25, 26, or 28 minutes. Alternatively, dilute hydrochloric acid (HCl) or oxalic acid (H2C2O4) solution can be used for etching; laser removal can also be used to remove the TCO layer at a predetermined location. That is to say, any known and feasible method can be used to remove the TCO layer on the side of the solar cell, as long as it effectively removes the TCO layer on the side of the solar cell without affecting other parts.

[0066] Because when the front and back sides of the solar cell are fully plated with Ni seed layers in step S2, seed layers will inevitably be deposited on the sides of the solar cell as well. Therefore, when the TCO layer on the side of the solar cell is removed by etching with sulfuric acid immersion, only the TCO layer not covered by the seed layer is removed. The TCO layer 23 covered by the third seed layer 33 is not removed (e.g., Figure 6 (As shown).

[0067] The battery cell obtained after step S6, such as Figure 6As shown, it includes a solar cell substrate 1, a first TCO layer 21 covering the entire front side of the solar cell substrate 1, a second TCO layer 22 covering the entire back side of the solar cell substrate 1, a first seed layer 31 covering the entire first TCO layer 21, and a second seed layer 32 covering the entire second TCO layer 22. Metal grid lines 6 are provided on both the first seed layer 31 and the second seed layer 32. Because the TCO layer covered by the seed layer on the side of the solar cell is not removed, there is also a third seed layer 33 on the side of the solar cell, and a third TCO layer 23 located between the third seed layer 33 and the side of the solar cell.

[0068] In step S7, the Ni seed layer in the non-metallic gate area can be removed by etching with an acidic etching solution. For example, a mixture of phosphoric acid and hydrogen peroxide can be used to remove the Ni seed layer in the area covered by non-metallic gate 6; a solution of citric acid (5-10%) + H2O2 (3-5%) can also be used, with the etching temperature controlled at 50-60°C and the etching time at 1-3 minutes; a special nickel stripping solution, such as Transene TFE-Ni, can also be used to remove the Ni seed layer; or plasma dry etching can be used to remove the Ni seed layer. That is to say, any known and feasible method that will not cause serious damage to the TCO layer can be used to remove the Ni seed layer in the area covered by non-metallic gate 6.

[0069] After step S7, the final battery cell obtained is as follows: Figure 7 As shown, the entire front side of the solar cell substrate 1 is covered with a first TCO layer 21, and the entire back side is covered with a second TCO layer 22. The third TCO layers on the sides are scattered and spaced apart. That is, the solar cell finally produced by the above manufacturing method includes a solar cell substrate 1, a first TCO layer 21 covering the entire front side of the solar cell substrate 1, and a second TCO layer 22 covering the entire back side of the solar cell substrate 1. The solar cell also includes metal grid lines 6 disposed on the first TCO layers 21, and a seed layer is disposed between each metal grid line 6 and the corresponding first TCO layer 21. If the third TCO layers on the sides of the solar cell are not removed, each side of the final solar cell will have multiple third TCO layers spaced apart. Because the scattered third TCO layers on the sides of the solar cell substrate 1 are discontinuous, the first TCO layer 21 on the front side and the second TCO layer 22 on the back side will not be effectively connected, thus achieving insulation.

[0070] Because the present invention uses the above-mentioned manufacturing method to manufacture the battery cell, a TCO layer is first specially coated on the entire outside of the battery cell substrate 1, and then a seed layer is fully deposited on the TCO layer on the front and back sides of the substrate 1. Then, a patterned mask layer 4 and a cladding 5 are prepared on this basis. The patterned mask layer 4 is prepared on the seed layer on the front and back sides, and except for the slotted position of the mask layer 4, the mask layer 4 completely covers the front and back sides of the battery cell, and the TCO layer on the front and back sides is completely covered under the seed layer. In addition, before electroplating, the sides of the battery cell are also fully covered by the cladding 5. Furthermore, the mask layer 4 and the cladding 5 are removed first, and then the TCO on the side and the seed layer in the area covered by the non-metallic grid lines 6 are removed. Therefore, when removing the mask layer 4, the alkaline solution used for etching and removing the mask layer 4 will not come into contact with the silicon layer of the substrate 1 and react, and the TCO layer at the edge of the front and back sides will not be removed. In this way, the problem of severe chemical damage to the silicon layer caused by contact between the alkaline solution and the silicon layer of the substrate 1 is completely avoided, maximizing the edge passivation performance and the efficiency of the cell. Moreover, it greatly improves the optical anti-reflection and light trapping effect at the edge of the cell, increasing the number of photogenerated carriers. In addition, the above preparation method also maximizes the coverage area of ​​the TCO layer on the front and back sides and minimizes the exposed area of ​​the silicon layer of the substrate 1, thereby greatly improving the carrier collection efficiency, reducing recombination loss, and thus greatly improving the electrical transport efficiency of photogenerated carriers in the cell.

[0071] Furthermore, the aforementioned thickness settings for the front and back TCO layers achieve a balance between thickness and function. A TCO layer that is too thin will have high resistance, while one that is too thick will block light. Before removing the seed layer, the TCO layers not covered by the seed layer on the sides of the battery are etched away, preventing effective connection between the front and back TCO layers and forming insulation.

[0072] In summary, because the present invention employs the above-described manufacturing method, the conversion efficiency and reliability of the final battery cell are greatly improved.

[0073] The following is a comparison of the performance of solar cells prepared by the method of this application and those prepared by conventional methods.

[0074] Example 1 of the method of this application: HJT battery substrate 1, after cleaning and texturing, performs the above steps S1-S7 in sequence, wherein PVD is used with a full-plating substrate when depositing the TCO layer; the thickness of the front and back TCO layers is 100mm, the thickness of the Ni seed layer is 5nm, the metal grid line 6 is an electroplated copper grid line 6, the mask layer 4 and the edge 5 are removed by etching with 5% KOH at a temperature of 45℃ for 1min; the side TCO layer is removed by soaking in 5% sulfuric acid for 5min, and the Ni seed layer is removed by phosphoric acid + hydrogen peroxide.

[0075] Example 2 of the method of this application: HJT battery substrate 1, after cleaning and texturing, performs the above steps S1-S7 in sequence. When depositing the TCO layer, PVD is used with a full-plated substrate, and the thickness of the TCO layer on the front and back sides is 100mm. When depositing the Cu seed layer, PVD is used with a 0.1mm substrate, and the thickness of the Cu seed layer on the front and back sides is 100nm and 60nm, respectively. The metal grid line 6 is an electroplated copper grid line 6. The mask layer 4 and the edge 5 are removed by etching with 5% KOH at a temperature of 45℃ for 1min. The side TCO layer is removed by soaking in 5% sulfuric acid for 5min. The Cu seed layer is removed by phosphoric acid + hydrogen peroxide.

[0076] Comparative Example 1 using conventional methods: Conventional HJT, cleaning-texturing, PECVD, PVD-ITO (with 0.5mm carrier), with ITO layer thickness of 100nm on both the front and back sides, and 6 metal grid lines screen-printed.

[0077] Comparative Example 2 using conventional methods: Conventional HJT, cleaning-texturing, PECVD, PVD-ITO (with 0.5mm carrier), ITO layer thickness of 100nm on both the front and back sides, PVD-CU seed layer (with 0.5mm carrier), seed layer thickness of 100nm on both the front and back sides; printing mask, exposure and development, edge binding, electroplating CU metal grid lines, mask removal (5% KOH, 45℃, 1min), seed layer removal (phosphoric acid + hydrogen peroxide), drying.

[0078] Comparative Example 3 using conventional methods: Conventional HJT, cleaning-texturing, PECVD, PVD-ITO (with a 0.5mm carrier), ITO layer thickness of 100nm on both the front and back sides, PVD-Ni seed layer (with a 0.5mm carrier, and the seed layer thickness of both the front and back sides is 5nm), printing mask, exposure and development, edge banding, electroplating Cu metal grid lines, mask removal (5% KOH, 45℃, 1min), seed layer removal (phosphoric acid + hydrogen peroxide), drying.

[0079] Comparative Example 4 using conventional methods: Conventional HJT, cleaning-texturing, PECVD, PVD-ITO (full-coverage substrate), ITO layer thickness of 100nm on both the front and back sides, PVD-CU seed layer (full-coverage substrate, and seed layer thickness of 100nm on both the front and back sides), printing mask, etching edge TCO with sulfuric acid (5%) and hydrogen peroxide (2%) for 5min, exposure and development, edge banding for 5 minutes, electroplating CU, removing mask (5% KOH, 45℃, 1min), removing seed layer (phosphoric acid + hydrogen peroxide), drying.

[0080]

[0081] As can be seen from the above list, the performance parameters of the battery cells prepared by the method of the present invention are better than those of the battery cells prepared by the conventional methods listed. The conventional methods in Comparative Examples 2 and 3 have poor passivation due to the alkaline corrosion at the edges without TCO, which is consistent with the actual situation that many parameters are poor.

[0082] The terms "up," "down," "left," "right," "front," and "back" mentioned above are relative to the orientation or positional relationship shown in the accompanying drawings. They are only used to facilitate the description of the embodiments of the present invention and to simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the orientation will change accordingly when the visual perspective changes.

[0083] The embodiments of the present invention have been described in detail above, but the content described is only a preferred embodiment of the present invention and should not be considered as limiting the scope of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the patent coverage of the present invention.

Claims

1. A method for manufacturing a solar cell, applicable to solar cells requiring TCO layers on both the front and back sides, characterized in that: The production method includes the following steps: S1. Obtain the battery cell substrate for which the TCO layer is to be prepared, and fully deposit the TCO layer on the front, back and side of the battery cell substrate. S2. The seed layer is fully coated on both the front and back of the battery cell; S3. A patterned mask layer is prepared on the front and back surfaces of the solar cell, and an edge-wrapping layer is prepared on the side surface of the solar cell. S4. Electroplat copper metal grid lines at the slotted positions of the patterned mask layer on the front and back of the battery cell; S5. Remove the mask layer and edge banding; S6. Remove the TCO layer from the side of the battery cell; S7. Remove the seed layer from the area covered by non-metallic grid lines.

2. The method for manufacturing a battery cell according to claim 1, characterized in that: The TCO layer of the entire solar cell substrate is simultaneously fully deposited on the front, back, and sides using PVD combined with a full-plate coating method.

3. The method for manufacturing a battery cell according to claim 2, characterized in that: The seed layer of the entire solar cell substrate is simultaneously fully deposited on both the front and back sides using PVD combined with a full-plate coating method.

4. The method for manufacturing a battery cell according to claim 1, 2, or 3, characterized in that: In step S1, the thickness of the TCO layer on one side of the front and back of the battery cell substrate is controlled to be 80nm-120nm, and the thickness of the TCO layer on the other side is controlled to be 50nm-120nm.

5. The method for manufacturing a battery cell according to claim 4, characterized in that: The TCO layer on the side of the solar cell substrate is thinner than the TCO layers on the front and back sides of the solar cell substrate.

6. The method for manufacturing a battery cell according to claim 1, 2, 3, or 5, characterized in that: In step S2, the seed layer thickness on one side of the front and back of the battery cell is controlled to be 5nm-150nm, and the seed layer thickness on the other side is controlled to be 5nm-60nm.

7. The method for manufacturing a battery cell according to claim 6, characterized in that: In step S2, during the process of fully depositing seed layers on both the front and back sides of the solar cell, multiple spaced third seed layers are also deposited on the side of the solar cell.

8. The method for manufacturing a battery cell according to claim 7, characterized in that: In step S6, the TCO layer that is not covered by the third seed layer on the side of the battery cell is removed.

9. The method for manufacturing a battery cell according to any one of claims 1 to 3, 5, and 7 to 8, characterized in that: In step S6, the TCO layer on the side of the battery cell is removed by etching with 5% sulfuric acid immersion, or by etching with dilute hydrochloric acid or oxalic acid solution.

10. The method for manufacturing a battery cell according to claim 9, characterized in that: In step S7, an acidic etching solution is used to etch away the seed layer of the non-metallic gate area. The acidic etching solution is phosphoric acid + hydrogen peroxide or citric acid + hydrogen peroxide.

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