A manufacturing method of a novel FCBGA core board structure
By replacing vias with copper bumps in the core layer structure of the packaging substrate, and combining photolithography and dielectric material filling processes, the problems of insufficient via density and signal transmission are solved, achieving higher density interconnection and higher reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SUZHOU YIMAI SILICON SEMICON TECH CO LTD
- Filing Date
- 2026-05-20
- Publication Date
- 2026-07-31
AI Technical Summary
Existing technologies have insufficient via density and signal transmission capability in the core layer structure of packaging substrates, and the processes are complex, waste liquid is generated in large quantities, and yield and reliability are difficult to control.
Copper bumps are used to replace the traditional through-hole structure. A high-density copper bump conductive layer is formed by combining a temporary substrate and copper foil composite structure with photolithography, electroplating and dielectric material filling processes, replacing the traditional chemical copper plating and mechanical drilling processes.
The core layer interconnect density has been increased from 50 IO/mm² to 1000 IO/mm², simplifying the process flow, reducing the amount of chemical waste liquid to be treated, and improving the overall functionality and reliability of the packaging substrate.
Smart Images
Figure CN122497329A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of packaging substrate technology, and in particular to a method for fabricating a novel FCBGA core board structure. Background Technology
[0002] Packaging substrates provide electrical connections, protection, support, heat dissipation, and assembly for chips, enabling multi-pin configurations, reduced package size, improved electrical performance and heat dissipation, ultra-high density, or multi-chip modularization. Most of the substrates currently used are semiconductor packaging substrates.
[0003] In the packaging process, as the intermediary layer structure for top and bottom interconnection, the vertical interconnect structure plays an irreplaceable role in the three-dimensional packaging integration capability and the realization of system integration. Among them, through silicon via (TSV), through-hole via (TMV), and through-glass via (TGV) interconnect structures are the most common structures in the field of advanced packaging in recent years. Vertical interconnect improves the high-density interconnect capability of the package.
[0004] Existing technology uses drilling on glass fiber dielectric material (BT material) to obtain the core layer structure, similar to building a wall first and then drilling holes in the wall to install sockets. This destroys the structure of the dielectric material itself, limiting the density of vias to a maximum of 100 IO / mm² under extreme conditions, and the dimensional consistency of vias can only reach 80%. At the same time, the vias cannot be effectively filled with copper, resulting in insufficient current carrying capacity and signal transmission capability of the core board. The process must use a large amount of complex chemical processes such as chemical copper, resin plugging, and grinding, resulting in a large amount of waste liquid treatment. The overall process is very wasteful and complicated, and the yield and reliability are difficult to control.
[0005] Figure 1 The existing BGA substrate has a through-hole structure, which can only achieve metallization of the hole walls. The hole size can only be designed according to the mechanical drilling structure. The minimum hole diameter can only be 100um. Under the highest interconnect density, the through-hole density can only reach 100 IO / mm², which cannot meet the development requirements of chip IO density. Summary of the Invention
[0006] The purpose of this invention is to provide a novel method for manufacturing an FCBGA core board structure, which uses copper bumps to replace the traditional through-hole core layer structure, increases the core layer interconnection density, achieves a higher density conductive layer metal structure, and improves the overall yield and reliability of the central layer structure of the packaging substrate.
[0007] The technical solution adopted in the method for fabricating a novel FCBGA core board structure disclosed in this invention is as follows: A method for fabricating a novel FCBGA core board structure includes the following steps: S1. Prepare a temporary substrate by using glass fiber material or metal material to make the temporary substrate; S2. Bonding copper foil: A layer of micron-sized copper foil is bonded to the surface of a temporary substrate using an adhesive. S3. Fabricate a conductive layer by forming a number of copper bumps on the surface of a copper foil through photolithography, development, electroplating, and film removal processes. The number of copper bumps forms a conductive layer structure. S4. A high-temperature plastic film is formed by filling the spaces between several copper bumps with a dielectric material to create a flat dielectric layer, wherein the dielectric layer is equal to or higher than the height of the copper bumps. S5, Remove the temporary substrate by separating the copper foil from the original temporary substrate, thereby removing the temporary substrate; S6, double-sided polishing, polishes the bottom surface of the copper foil and the surface of the dielectric layer after the temporary substrate is removed to meet the surface roughness and structure required by subsequent processes, thus completing the fabrication of the core layer.
[0008] As a preferred embodiment, in step S1, glass fiber material is used as the reinforcing substrate, and BT resin is used to make a temporary substrate, or an etchable copper or stainless steel material is used to make a temporary substrate.
[0009] As a preferred embodiment, in step S2, the adhesive is a pyrolytic adhesive or a bonding agent, and the copper foil, adhesive, and temporary substrate are bonded and fixed by physical pressing.
[0010] As a preferred embodiment, step S3 specifically involves: laminating photosensitive material onto the surface of the copper foil, exposing it with a photolithography machine, developing and removing the photosensitive material in the non-exposed area by utilizing the chemical properties of the exposed and non-exposed areas, then forming the copper bump structure through an electroplating process, and finally removing the remaining photosensitive material with a strong alkali.
[0011] As a preferred embodiment, step S4 specifically involves: the dielectric material adopting a powder structure, being mechanically spread and evenly distributed on the surface of the copper foil and between several copper bumps, and then subjected to a thermosetting process by pressing and heating with a mold, in which the dielectric material is heated, melted, and then solidified to form a smooth dielectric layer.
[0012] As a preferred embodiment, step S5 specifically involves: using the thermochemical and pressure properties of the adhesive to separate the copper foil from the temporary substrate to obtain a complete core layer.
[0013] As a preferred embodiment, step S6 specifically involves: removing irregular portions of the dielectric layer surface and the bottom surface of the copper foil through mechanical physical polishing.
[0014] The beneficial effects of the novel FCBGA core board structure fabrication method disclosed in this invention are as follows: It replaces the original chemical copper plating method with a composite structure of a temporary substrate and copper foil; it replaces the traditional mechanical drilling and subsequent hole wall metallization process by using high-density copper bumps followed by dielectric material molding and filling; and it improves the overall density and interconnection density of the core layer copper conductive structure by using solid copper bumps instead of the original through-hole wall copper metallization and resin filling method. This breaks the design limitations of the same size conductive structure, reduces the amount of chemical waste liquid to be processed, improves the consistency of the conductive metal fabrication of the copper conductive layer, and ultimately greatly enhances the overall function, application range, and reliability of the core layer structure of the packaging substrate. Attached Figure Description
[0015] Figure 1 This is a schematic diagram of the core board structure of an existing BGA substrate.
[0016] Figure 2 This is a flowchart of a method for manufacturing a novel FCBGA core board structure according to the present invention.
[0017] Figure 3 This is a schematic diagram of step S5 in the method for manufacturing a novel FCBGA core board structure according to the present invention.
[0018] Figure 4 This is a schematic diagram of the copper bump structure of a novel FCBGA core board structure according to the present invention. Detailed Implementation
[0019] The present invention will be further described and illustrated below with reference to specific embodiments and the accompanying drawings: Please refer to Figure 1 A method for fabricating a novel FCBGA core board structure includes the following steps: S1. Prepare a temporary substrate by using glass fiber or metal materials.
[0020] In step S1, glass fiber material is used as the reinforcing substrate, combined with BT resin to make a temporary substrate, or etchable copper or stainless steel material is used to make a temporary substrate. The surface needs to be physically ground or chemically treated to make the surface meet the process requirements.
[0021] S2. Bonding copper foil: A layer of micron-sized copper foil is bonded to the surface of a temporary substrate using an adhesive.
[0022] In step S2, the copper foil, adhesive, and temporary substrate are bonded and fixed together by physical pressing. This physical pressing method replaces the original chemical copper plating, simplifying the production process and making the uncontrollable chemical precipitation process controllable, thereby improving the uniformity and consistency of the copper foil. The adhesive can be a pyrolytic adhesive that reduces its viscosity at a certain high temperature to achieve separation, or it can be a type of adhesive with low viscosity on the copper-clad layer side and high viscosity on the temporary substrate side, allowing for mechanical peeling of the temporary substrate.
[0023] S3. Fabricate the conductive layer by forming several copper bumps on the surface of the copper foil through photolithography, development, electroplating, and film removal. These copper bumps form the conductive layer structure.
[0024] Photosensitive material is laminated onto the surface of copper foil, exposed by a photolithography machine, and the photosensitive material in the non-exposed area is developed and removed by utilizing the chemical properties of the exposed and non-exposed areas. Then, an electroplating process is used to form a copper bump structure. Finally, the remaining photosensitive material is removed with a strong alkali.
[0025] S4. High-temperature plastic film, in which dielectric material is used to fill the spaces between several copper bumps to form a flat dielectric layer, and the dielectric layer is equal to or higher than the height of the copper bumps.
[0026] Traditional injection molding involves injecting molten dielectric material from one end of the mold, which then flows in and covers the copper pillar structure. However, the flow process generates a film flow effect, which affects the original shape of the copper pillars on the product surface and causes problems such as inconsistent stress distribution within the dielectric layer.
[0027] The dielectric material is in powder form and is evenly distributed on the surface of the copper foil and between several copper bumps by mechanical spreading. Then, a thermosetting process is used to heat and melt the dielectric material by pressing it down with a mold, forming a flat dielectric layer.
[0028] The powdered dielectric material can be encapsulated using an epoxy resin system, with 1~55um of silicon dioxide as the filler.
[0029] This process involves first fabricating a high-density copper interconnect structure and then filling it with dielectric material. The resulting copper bumps have the characteristics of a solid copper structure, and the size of the copper bumps can be freely designed to meet the conduction current requirements of different chips, as well as the high-density interconnect structure.
[0030] S5, Remove the temporary substrate by separating the copper foil from the original temporary substrate, thereby removing the temporary substrate.
[0031] Step S5 specifically involves using the thermochemical and pressure properties of the adhesive to separate the copper foil from the temporary substrate, thereby obtaining a complete core layer.
[0032] like Figure 3 As shown in the figure, 1 is the mechanical mold, 2 is the dielectric material, 3 is the copper bump, and 4 is the copper foil. During manufacturing, the mechanical mold 1 presses the dielectric material 2 between the copper pillars 3. The finished packaging substrate can be obtained simply by peeling off the mechanical mold 1. S6, double-sided polishing, polishes the bottom surface of the copper foil and the surface of the dielectric layer after the temporary substrate is removed to meet the surface roughness and structure required by subsequent processes, thus completing the fabrication of the core layer.
[0033] Step S6 specifically involves: using mechanical and physical polishing to remove irregular parts on the surface of the dielectric layer and the bottom of the copper foil, thus completing the fabrication of a high-density basic structure for the subsequent high-density substrate structure.
[0034] It significantly reduces the process flow and innovatively provides a core layer structure that does not require glass materials (BT materials). It eliminates the need for mechanical drilling and uses copper bumps (solid copper structure) to replace the traditional through-hole (hole wall metallization) core layer structure. This increases the core layer interconnect density by a huge leap from 50 IO / mm² to 1000 IO / mm², effectively enabling the processing technology of higher density conductive layer metal structures, while improving the overall yield and reliability of the final packaging substrate's central layer structure.
[0035] Figure 4 The copper bump structure fabricated using the process described in this invention enables a solid copper interconnect structure in the interconnect layer. The same bump can be designed in different sizes to break design rules based on chip requirements. The minimum aperture has been achieved at 15µm, and a via density of 1000 IO / mm² has been achieved under the highest interconnect density conditions. Further improvements are possible with further process development. This invention provides a novel method for fabricating an FCBGA core board structure. It replaces the traditional chemical copper plating method with a composite structure of a temporary substrate and copper foil. Furthermore, it replaces the traditional mechanical drilling and subsequent hole wall metallization process by using high-density copper bumps followed by dielectric material molding and filling. The use of solid copper bumps instead of the traditional through-hole wall copper metallization and resin filling method increases the overall density and improves the interconnect density of the core layer copper conductive structure. It also breaks the design limitations of the same size conductive structure, reduces the amount of chemical waste liquid to be processed, and improves the consistency of the conductive metal fabrication in the copper conductive layer. Ultimately, this greatly enhances the overall functionality, application range, and reliability of the core layer structure of the packaging substrate.
[0036] This significantly reduces the process flow, increases the interconnect density of the core copper conductive structure, breaks the design limitation of the same size of the conductive structure, reduces the amount of chemical waste liquid to be treated, improves the consistency of the conductive metal fabrication of the copper conductive layer, and ultimately greatly improves the overall function, application range and reliability of the core structure of the packaging substrate.
[0037] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the essence and scope of the technical solutions of the present invention.
Claims
1. A method for fabricating a novel FCBGA core board structure, characterized in that, Includes the following steps: S1. Prepare a temporary substrate by using glass fiber material or metal material to make the temporary substrate; S2. Bonding copper foil: A layer of micron-sized copper foil is bonded to the surface of a temporary substrate using an adhesive. S3. Fabricate a conductive layer by forming a number of copper bumps on the surface of a copper foil through photolithography, development, electroplating, and film removal processes. The number of copper bumps forms a conductive layer structure. S4. A high-temperature plastic film is formed by filling the spaces between several copper bumps with a dielectric material to create a flat dielectric layer, wherein the dielectric layer is equal to or higher than the height of the copper bumps. S5, Remove the temporary substrate by separating the copper foil from the original temporary substrate, thereby removing the temporary substrate; S6, double-sided polishing, polishes the bottom surface of the copper foil and the surface of the dielectric layer after the temporary substrate is removed to meet the surface roughness and structure required by subsequent processes, thus completing the fabrication of the core layer.
2. The method for fabricating a novel FCBGA core board structure as described in claim 1, characterized in that, In step S1, glass fiber material is used as the reinforcing substrate, combined with BT resin to make a temporary substrate, or an etchable copper or stainless steel material is used to make a temporary substrate.
3. The method for fabricating a novel FCBGA core board structure as described in claim 1, characterized in that, In step S2, the adhesive is a pyrolytic adhesive or a binder, and the copper foil, adhesive, and temporary substrate are bonded and fixed by physical pressing.
4. The method for fabricating a novel FCBGA core board structure as described in claim 1, characterized in that, Step S3 specifically involves: applying photosensitive material onto the surface of the copper foil, exposing it with a photolithography machine, developing and removing the photosensitive material in the non-exposed area by utilizing the chemical properties of the exposed and non-exposed areas, then performing an electroplating process to form the copper bump structure, and finally removing the remaining photosensitive material with a strong alkali.
5. The method for fabricating a novel FCBGA core board structure as described in claim 1, characterized in that, Step S4 specifically involves the following: the dielectric material is in powder form and is evenly distributed on the surface of the copper foil and between several copper bumps by mechanical spreading. Then, the dielectric material is heated and melted by pressing down with a mold, and then cured by thermosetting to form a flat dielectric layer.
6. The method for fabricating a novel FCBGA core board structure as described in claim 1, characterized in that, Step S5 specifically involves using the thermochemical and pressure properties of the adhesive to separate the copper foil from the temporary substrate, thereby obtaining a complete core layer.
7. The method for fabricating a novel FCBGA core board structure as described in claim 1, characterized in that, Step S6 specifically involves: using mechanical physical polishing to remove irregular portions of the dielectric layer surface and the bottom surface of the copper foil.