Dual geometry base for cooling system
By introducing a dual geometry structure into the base design of the data center and concentrating pressure in the elevated central area, the thermomechanical warping problem caused by material CTE mismatch is solved, resulting in more uniform heat transfer and more stable system performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- MELLANOX TECHNOLOGIES LTD(IL)
- Filing Date
- 2025-12-31
- Publication Date
- 2026-07-31
AI Technical Summary
In data centers, thermomechanical warping caused by the mismatch in the thermal expansion coefficients of the processing unit packaging materials can lead to uneven heat transfer and thermal shutdown, affecting system performance and reliability.
The base adopts a dual-geometry design, which concentrates pressure by setting an elevated central area on the base to counteract thermomechanical deformation and maintain the uniformity and stability of thermal contact, including the design of the contact surface and the offset pressure surface.
It improves thermal management efficiency, ensures the uniformity and stability of heat transfer at high temperatures, prevents thermal shutdown, and enhances the thermal performance and reliability of the system.
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Figure CN122497362A_ABST
Abstract
Description
[0001] Cross-references to related applications
[0002] This application claims the benefit and priority of U.S. Provisional Application Serial No. 63 / 751,721 (titled “PRESSURE-OPTIMIZED THERMAL INTERFACE”), filed January 30, 2025, the entire disclosure of which is incorporated herein by reference for all purposes and teachings thereof. Technical Field
[0003] The embodiments of this disclosure generally relate to thermal solutions for computing hardware, and more specifically to cooling components used in data centers. Background Technology
[0004] As data centers continue to operate at higher speeds (e.g., 100Gb and above) and semiconductor die sizes continue to increase due to growing processing demands, the thermal demands on data center components are also increasing. The heat generated in data centers is primarily due to the electricity used by servers, storage devices, and other hardware components; almost all of the energy consumed is converted into heat as a byproduct of data processing. This means that for every watt of electricity used, one watt of heat is generated. Heat management is crucial; otherwise, data center components can fail under extreme thermal loads. For example, processing units generate heat during operation, which can lead to decreased processing power and, in some cases, even failure of those processing units and the system components connected to them. Summary of the Invention
[0005] The embodiments of this disclosure are intended to address at least some of the problems associated with heat loads in data centers, and more specifically, at least some of the problems associated with heat loads generated by processing units. As the size and power of graphics processing unit (GPU) packages increase, the thermo-mechanical warpage of the package also increases due to the use of different materials with different coefficients of thermal expansion (CTE) within the package. (The same applies to central processing unit (CPU) packages, parallel processing unit (PPU) packages, and other processing unit packages. Throughout this disclosure, it should be understood that references to GPUs and GPU packages also apply to other types of processing units and processing unit packages, including any other types of processing units and processing unit (CPU) packages described herein.) The difference between the flattest state and the maximum warpage state of these devices can reach hundreds of micrometers.
[0006] GPUs and other processing units and related components are made from a variety of materials, which may include, for example, silicon, FR4 (a flame-retardant glass fiber reinforced epoxy resin laminate), aluminum, copper, and tungsten. However, these materials have different coefficients of thermal expansion (CTE). For example, copper expands approximately five times more than silicon: copper has a coefficient of thermal expansion of 16-16.7 ppm, while silicon has a coefficient of thermal expansion of 3-5 ppm (https: / / www.engineeringtoolbox.com / linear-expansion-coefficients-d_95.html).
[0007] One of the challenges of continuing to use copper and / or other materials with a CTE higher or lower than that of silicon in larger and higher-power GPUs is that thermal cycling can cause die warping due to CTE mismatch. More specifically, during thermal operation, temperature-induced planarization occurs on the GPU package substrate due to CTE mismatch between FR4, the integrated circuit package, and the silicon material.
[0008] Semiconductor dies are often connected to cold plates or other heat dissipation devices via thermal interface materials (TIMs), which improves heat transfer from the silicon package. Uniform heat transfer is optimally achieved when the TIM thickness is also uniform. However, as described above, warping caused by thermal cycling often increases the gap between the center of the semiconductor die and the cold plate base, leading to TIM thickening (or even separation) at the die center. This inhibits heat transfer near the die center and results in a suboptimal heat transfer distribution. At room temperature, the pressure between the heat sink and the die is uniform. However, at high temperatures, the pressure drops in the middle, leading to thermal shutdown. Furthermore, pressure loss at the die center also contributes to thermal shutdown.
[0009] Therefore, it is necessary to ensure a more uniform TIM thickness between the silicon package and the attached cold plate, so as to achieve a more uniform heat transfer distribution, even if the silicon package warps over time due to thermal cycling.
[0010] Embodiments of this disclosure provide a solution to this problem, thereby achieving adequate thermal management even for larger, higher-power semiconductor dies. More specifically, embodiments of this disclosure provide a method for addressing the aforementioned CTE mismatch problem by optimizing the pressure distribution on the semiconductor package. Improved pressure distribution helps maintain uniform TIM contact and thickness within the contact area with the semiconductor package, thereby improving the overall system thermal performance.
[0011] Embodiments of this disclosure relate to a system of cooling solutions with a dual-geometry pedestal design. In some embodiments, the pedestal design may include a raised central region extending from a pedestal base surface. This pedestal base surface may correspond to a flat or raised surface.
[0012] Embodiments of this disclosure consider a base geometry that maintains highly concentrated pressure at the center of a semiconductor / silicon package through an elevated central region. This concentrated pressure effectively counteracts thermomechanical deformation and ensures substantially consistent thermal contact over the operating temperature range. The base geometry helps maintain the necessary pressure to prevent thermal shutdown and ensure proper system operation.
[0013] Traditional cooling solutions employ a flat, single-plane base surface, while the embodiments disclosed herein achieve a raised central "coin" with its pressure surface offset from the top of a larger contact surface, which can be flat or raised. While conventional methods rely on material properties and a rigid core to manage warpage, the embodiments disclosed herein utilize geometric improvements to actively control pressure distribution and maintain central contact on the cap.
[0014] One system according to an embodiment of this disclosure may include a base configured to support a semiconductor package, wherein the base is part of a cold plate and includes a first geometry and a second geometry, wherein the first geometry has a contact surface (e.g., a surface that supports the semiconductor package and transfers heat away from the semiconductor package), and the second geometry has a pressure surface (e.g., a surface that applies pressure to a portion of the semiconductor package to improve heat transfer from it, as described herein), the pressure surface being offset from the contact surface (e.g., protruding above the contact surface). The base is a heat sink base that improves thermal performance and can contact a die, silicon, or package. Another plate may also be included on top of the heat sink base, which may further improve the thermal performance of the heat sink (e.g., improve thermal shock by about 2 degrees Celsius).
[0015] A system according to other embodiments of this disclosure may include a cooling system, which in turn includes a plurality of cooling elements and a plate in thermal communication with the plurality of cooling elements. The plate may be a welded plate and includes a contact surface and a pressure surface located on a protrusion extending from the contact surface.
[0016] One embodiment of the system according to this disclosure may be a dual-geometry cooling plate, which includes a first portion having a first geometry and a contact surface, and a second portion including a second geometry and a pressure surface offset from the contact surface. The first and second portions may form an integral cooling plate. The second portion may be welded to the top of a base plate.
[0017] In some embodiments, a cooling system is provided, the system comprising: a base for supporting a semiconductor package, the base including: a first geometry having a contact surface; and at least one second geometry having a pressure surface offset from the contact surface.
[0018] In some respects, the base includes two secondary geometries, each with a pressure surface offset from the contact surface.
[0019] In some respects, the contact surface includes a convex or concave surface.
[0020] In some respects, the pressure surface is parallel to the contact surface.
[0021] In some respects, the pressure surface protrudes and is higher than the contact surface.
[0022] In some respects, the pressure surface includes a convex or concave surface.
[0023] In some respects, the contact surface has a square perimeter.
[0024] In some respects, the contact surface has a rectangular perimeter.
[0025] In some respects, the pressure surface has a circular perimeter.
[0026] In some respects, the pressure surface has a square perimeter.
[0027] In some respects, the pressure surface has a rectangular perimeter.
[0028] In some respects, the pressure surface has a pressure surface area, and the contact surface has a contact surface area, with the pressure surface area being between two and fifteen percent of the contact surface area.
[0029] In some respects, the pressure surface area is between 2% and 2.5% of the contact surface area. As a more specific example, the pressure surface area is between 2.1% and 2.3% of the contact surface area.
[0030] In some respects, the offset between the pressure surface and the contact surface does not exceed 100 micrometers.
[0031] In some respects, the offset between the pressure surface and the contact surface does not exceed fifty micrometers.
[0032] In some respects, the offset between the pressure surface and the contact surface does not exceed 35 micrometers.
[0033] In some respects, the pressure surface is offset from the contact surface by more than 25 micrometers.
[0034] In some respects, the first geometric structure is a right prism.
[0035] In some respects, the second geometric structure is a cylinder.
[0036] In some respects, the second geometric structure is located at the center relative to the first geometric structure.
[0037] In some respects, the pressure surface includes a midpoint that is equidistant from a relative point on the perimeter of the contact surface.
[0038] In some respects, the second geometry extends from the first geometry.
[0039] In some respects, the contact and pressure surfaces are covered with thermal interface materials.
[0040] In some respects, the first geometric structure is similar to the second geometric structure.
[0041] In some respects, the first geometric structure is not similar to the second geometric structure.
[0042] Another embodiment of a cooling system is provided, comprising: a plurality of cooling elements; and a plate in thermal communication with at least one of the plurality of cooling elements, the plate comprising: a contact surface; and a pressure surface located on a protrusion extending from the contact surface.
[0043] In some respects, the height of the pressure surface above the contact surface is less than five percent of the plate height.
[0044] In some respects, the height of the pressure surface above the contact surface is less than two percent of the plate height.
[0045] In some respects, the contact surface has a square geometry, while the pressure surface has a circular geometry.
[0046] In some respects, the plate is a right-angled prism, while the protrusion is cylindrical.
[0047] In some respects, the cooling system also includes: a semiconductor package mounted to the board; and a thermal interface material located between the semiconductor package and the board.
[0048] In some respects, when a semiconductor package is in use, the pressure applied to the semiconductor package by the pressure surface essentially offsets the thermomechanical deformation within the semiconductor package.
[0049] In some respects, the pressure surface maintains central contact with the semiconductor package during its use.
[0050] In some respects, the thermomechanical deformation of a semiconductor package during its use does not disrupt the thermal contact between the pressure surface and the semiconductor package.
[0051] In some respects, the pressure surface generates a pressure distribution that ensures a substantially continuous thermal contact between the semiconductor package and the substrate during the operation of the semiconductor package.
[0052] In another embodiment, a dual-geometry cooling plate is provided, comprising: a first portion having a first geometry and a contact surface; and a second portion having a second geometry and a pressure surface offset from the contact surface, wherein the first portion and the second portion form an integral cooling plate.
[0053] In some respects, milling is used to generate a second geometry.
[0054] In some respects, the first geometry is a plate with a thickness of no more than 2,000 micrometers, while the second geometry is a cylinder with a height of no more than 50 micrometers.
[0055] In some respects, the second part extends from the first part.
[0056] In some respects, the first geometric structure differs from the second geometric structure.
[0057] Any one aspect can be combined with any or more other aspects.
[0058] Any one or more features disclosed herein.
[0059] As is substantially disclosed herein, any one or more features.
[0060] Any one or more features disclosed herein in combination with any one or more other features disclosed herein.
[0061] Any one aspect / feature / implementation method can be combined with any one or more other aspects / features / implementation methods.
[0062] Use any one or more aspects or features as disclosed herein.
[0063] It should be understood that any feature described herein may be required to be combined with any other feature as described herein, regardless of whether these features are derived from the same implementation.
[0064] Details of one or more aspects of this disclosure are set forth in the accompanying drawings and the following description. Other features, objects, and advantages of the technology described in this disclosure will be apparent from the specification, the drawings, and the claims.
[0065] Many other features and advantages of this disclosure will become apparent to those skilled in the art from the following description of the embodiments.
[0066] This article describes other features and advantages, which will be apparent from the following description and figures. Attached Figure Description
[0067] The above is a general description of the contents of this disclosure. Reference will now be made to the accompanying drawings, which are not necessarily drawn to scale:
[0068] Figure 1 This is a perspective view of a cooling system according to at least some embodiments of the present disclosure;
[0069] Figure 2 Based on at least some embodiments of this disclosure Figure 1 A perspective view of a portion of the cooling system;
[0070] Figure 3 Based on at least some embodiments of this disclosure Figure 1 A perspective view of another part of the cooling system;
[0071] Figure 4A Based on at least some embodiments of this disclosure Figure 1 A perspective view of a section of the cooling system;
[0072] Figure 4B This is a perspective view of a section of a cooling system according to at least some embodiments of the present disclosure, and... Figure 4A Similar, but with a variant example shown;
[0073] Figure 5 This is an elevation view of a portion of a cooling system according to at least some embodiments of the present disclosure;
[0074] Figure 6 This is an elevation view of a portion of a cooling system according to at least some embodiments of the present disclosure;
[0075] Figure 7 This is a block diagram of a semiconductor die cooling apparatus according to at least some embodiments of the present disclosure;
[0076] Figure 8 This is an illustration of a part of a dual-geometry cooling system according to at least some embodiments of the present disclosure;
[0077] Figure 9It is a series of heat maps that compare the heat transfer results obtained using the embodiments of this disclosure with the heat transfer results obtained without using the embodiments of this disclosure;
[0078] Figure 10 This is a block diagram illustrating a computer system according to at least some embodiments of the present disclosure;
[0079] Figure 11 This is a block diagram illustrating further details of a data center and its components according to at least some embodiments of the present disclosure;
[0080] Figure 12 This is a block diagram of a system according to at least some embodiments of the present disclosure;
[0081] Figure 13 A data center according to at least some embodiments of the present disclosure is depicted;
[0082] Figure 14 A liquid-cooled server rack according to at least some embodiments of the present disclosure is depicted;
[0083] Figures 15A-15D A block diagram depicts aspects of a data center-level display of a neural network-supporting method for rack liquid cooling, according to at least some embodiments of the present disclosure;
[0084] Figure 16 Block diagrams of systems according to at least some embodiments of the present disclosure are depicted; and
[0085] Figure 17 A block diagram depicts a computing environment according to at least some embodiments of the present disclosure.
[0086] In the various figures, the same reference numerals and labels may denote similar elements. Detailed Implementation
[0087] The following description provides only examples and is not intended to limit the scope, applicability, or configuration of the claims. Rather, it will provide effective instructions for those skilled in the art to implement the described embodiments. It should be understood that various changes can be made to the function and arrangement of the elements without departing from the spirit and scope of the appended claims.
[0088] As used in this article, the phrases “at least one,” “one or more,” “or,” and “and / or” are all open-ended expressions that can function as either conjunctions or disjunctive words. For example, “at least one of A, B, and C,” “at least one of A, B, or C,” “one or more of A, B, and C,” “one or more of A, B, or C,” “A, B, and / or C,” and “A, B, or C” each mean a single A, a single B, a single C, A and B together, A and C together, B and C together, or A, B, and C together.
[0089] This document will describe various aspects of the present disclosure with reference to the accompanying drawings, which are illustrations of idealized structures.
[0090] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Furthermore, it should be understood that terms such as those defined in common dictionaries shall be interpreted as having the same meaning as they have in the relevant technical field and in the context of this disclosure.
[0091] As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly specifies otherwise. Furthermore, it should be understood that the terms “comprising,” “including,” and / or “including”, when used in this specification, specify the presence of the stated feature, integer, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. The term “and / or” includes any and all combinations of one or more related listed items.
[0092] The present disclosure will now be described more fully with reference to the accompanying drawings, which illustrate some, but not all, of the embodiments described herein. In fact, the present disclosure can be implemented in many different forms and should not be construed as being limited to the embodiments described herein.
[0093] In this document, the same numbers refer to the same components. As used herein, terms such as “front,” “rear,” and “top” are used in the examples provided below to describe the location of certain components or portions of components in an installed and operable configuration. As used herein, the term “module” encompasses hardware, software, and / or firmware configured to perform one or more specific functions, including but not limited to the conversion between electrical and optical signals and their transmission. Based on this disclosure, those skilled in the art will understand that the term “substantially” indicates that the referenced components or related descriptions are accurate within applicable engineering tolerances.
[0094] The embodiments of this disclosure are contemplated for deployment in a data center environment. While embodiments will be described in conjunction with certain examples of data center environments, it should be understood that the embodiments of this disclosure are not limited thereto. In fact, embodiments of this disclosure can be deployed in any example environment, including data center environments or any other suitable environment requiring the management of thermal loads generated by computing components.
[0095] An illustrative data center environment and components are shown to aid in understanding the contents of this disclosure, which will now be referenced. Figures 1 to 17 Describe it.
[0096] Figure 1 A perspective view of a system 100, which will be described according to at least some embodiments of the present disclosure, is shown. The system 100 has three main sections 104, 108, and 112, each of which includes one or more cooling elements, such as heat transfer fluid reservoirs, heat exchangers (e.g., which may include heat dissipation devices comprising multiple fins in thermal communication with the heat transfer reservoirs or pipes), and / or heat transfer fluid conduits that enable the heat transfer fluid to circulate between or within the heat transfer fluid reservoirs and / or through one or more heat exchangers.
[0097] Now refer to Figures 1 to 4A The main portion 112 includes a base 128, which includes a raised portion 124, a first geometry 116, and a second geometry 120. The base 128 is configured to support and cool the semiconductor die during its use, particularly designed to facilitate heat extraction from the semiconductor die, heat transfer from the semiconductor die, and ultimately dissipation of that heat to the surrounding environment. As used herein, the term "semiconductor die" encompasses GPUs, CPUs, QPUs, PPUs, ASICs, and any other processing unit or similar silicon package that generates heat during use.
[0098] The raised portion 124 of the base 128, for example, houses a heat transfer fluid reservoir, one or more heat transfer fluid conduits, and / or heat exchangers, each configured to extract heat from the first geometry 116 and transfer it back through the main portions 112, 108, and 104 of the cooling system 100 to facilitate its heat dissipation. The first geometry 116 includes a contact surface 118 configured to at least partially support a semiconductor die or other silicon package. The second geometry 120 includes a pressure surface 122, also configured to at least partially support the semiconductor die, but further configured to apply pressure to the semiconductor die to counteract the adverse effects of thermomechanical warping of the semiconductor die.
[0099] As described above, thermomechanical warpage of a semiconductor die is caused by a mismatch in the CTE (Coefficient of Thermal Expansion) of its components. Thermal cycling during normal use of the semiconductor die causes its components to expand and contract, but the rates of expansion and contraction differ due to variations in their CTE. At smaller sizes, this warpage is less noticeable and has a less significant impact on the effectiveness of thermal management systems designed to cool the semiconductor die. However, with increasing integrated circuit power density and the resulting increase in semiconductor die size (driven by processing demands associated with the development and use of artificial intelligence systems), the effects of thermomechanical warpage become more pronounced and pose significant challenges from a thermal management perspective. One challenge is that thermomechanical warpage of the semiconductor die can lead to thickening, or even separation, of the thermal interface material that facilitates heat transfer between the semiconductor die and the cooling system (in this case, the substrate 128). This, in turn, results in lower and less uniform heat transfer, increasing thermal stress on the semiconductor die and degrading its performance.
[0100] The pressure surface 122 of the second geometry 120 mitigates these negative effects by applying pressure to the semiconductor die in a manner that counteracts its thermomechanical warping and helps maintain a uniform thickness of the TIM between the base 128 and the semiconductor die mounted thereon.
[0101] The contact surface 118 can be flat or convex. Similarly, the pressure surface 122 can be flat or convex. The pressure surface 122 protrudes above the contact surface 118 and can be parallel to the contact surface 118. The contact surface 118 can have a square, rectangular, circular, or elliptical perimeter. Similarly, the pressure surface 122 can have a circular, elliptical, rectangular, or square perimeter. Embodiments of this disclosure cover contact surfaces 118 and 122 having any geometry. Furthermore, the shapes of the contact surfaces 118 and 122 can be similar or dissimilar.
[0102] The pressure surface 122 is significantly smaller than the contact surface 118. For example, the total area of the pressure surface 122 may be less than five percent or three percent of the total area of the contact surface 118. In some embodiments, the total area of the pressure surface 122 may be between two percent and fifteen percent of the total area of the contact surface 118, or possibly between two percent and three percent. In some embodiments, the total area of the pressure surface 122 may be between 2% and 2.5% of the total area of the contact surface 118, or between 2.1% and 2.3% of the total area of the contact surface 118. For clarity, the total area of the contact surface does not include the area of the pressure surface.
[0103] The pressure surface 122 may be offset from the contact surface 118 by no more than 100 micrometers, or no more than 50 micrometers, or no more than 30 micrometers, or no more than 20 micrometers (e.g., it may be located above the contact surface 118 at a height of no more than 100 micrometers, or no more than 50 micrometers, or no more than 30 micrometers, or no more than 20 micrometers).
[0104] The first geometric structure 116 can be, for example, a right prism, a cylinder, or a plate. The second geometric structure 120 can also be, for example, a right prism, a cylinder, or a plate. The first geometric structure 116 can be similar to or dissimilar to the second geometric structure 120.
[0105] The second geometry 120 extends from the first geometry 116. The first geometry 116 and the second geometry 120 can be integrally formed from a single piece of material (e.g., by milling a sheet metal to obtain a pressure surface 122 offset from the contact surface 118), or the first geometry 116 and the second geometry 120 can be formed separately and then joined together. The first geometry 116 and the second geometry 120 can be formed of copper, silver, diamond, graphite, boron nitride, and / or any other thermally conductive material. In some embodiments, the first geometry 116 can be formed of a first material, while the second geometry 120 can be formed of a second material different from the first material. In other embodiments, the first geometry 116 and the second geometry 120 can be formed of the same material.
[0106] For example, such as Figures 1 to 2 and Figure 4A As shown, the second geometry 120 may be located at the center relative to the first geometry 116, such that the pressure surface 118 includes a midpoint that is equidistant from a point on the perimeter of the contact surface 122.
[0107] Although the diagram illustrates a cooling system 100, the first geometry 116 (and its contact surface 118) and the second geometry 120 (and its pressure surface 122) can also be used in other cooling systems that have different components and / or different component arrangements than the cooling system 100.
[0108] Figure 4B Alternative variations of system 100 according to at least some embodiments of the present disclosure are described, and more specifically, alternative variations of base 128. Figure 4B In the embodiment, the main portion 112, the raised portion 124, and the contact surface 116 are with Figures 1 to 4A The same or substantially similar as shown. However, Figure 4BThe embodiment includes two pressure surfaces 420, which are equidistantly spaced along an imaginary centerline extending along the length of the contact surface 116, the centerline being located at the midpoint between two parallel edges of the contact surface 116. Each pressure surface 420 may be identical or similar to pressure surface 120. Using a second pressure surface 420 on the contact surface 116 can improve thermal performance and produce an improvement of approximately 2 degrees Celsius in thermal effect compared to embodiments using a single pressure surface 120.
[0109] Embodiments of this disclosure may utilize one, two, three, four, five, six, or more pressure surfaces, such as pressure surfaces 120 and 420. In embodiments having more than one pressure surface, the multiple pressure surfaces may be arranged, for example, in the same manner as points on a standard hexahedral mold, or in a manner that achieves substantially equal spacing between the pressure surfaces and the sides of the contact surface 116, or in other manner.
[0110] Now for reference Figure 5 The plate 516 for a cooling system (e.g., cooling system 100) may be the same as or similar to the first geometry 116 described above. The plate 516 includes a convex contact surface 518. In other embodiments, the contact surface 518 may be flat. A protrusion 520, which may be the same as or similar to the second geometry 120, extends from the plate 516 over the contact surface 518 and includes a pressure surface 522. The pressure surface 522 is flat.
[0111] Figure 6 The middle section also shows board 516. However, Figure 6 The protrusion 620 in the middle (and its) Figure 5 Like the protrusion 520 in the middle, extending from plate 516 above contact surface 518, it includes a convex pressure surface 622.
[0112] It is worth noting that, Figures 5 to 6 The middle plate 516 and protrusions 520 / 620 are not shown to scale. Possible dimensional combinations of the plates or first geometry (e.g., plate 516 and first geometry 116) and protrusions or second geometry (e.g., protrusions 520 and 620 and second geometry 120). Figure 8 Describe it.
[0113] Figure 7 A block diagram of a cooling system 700 according to an embodiment of the present disclosure is depicted, the cooling system including a semiconductor die 736 mounted to a dual-geometry cooling plate. The system 700 includes a plurality of cooling elements 712, which may be or include heat transfer fluid reservoirs, heat transfer fluid conduits, heat exchangers, fans, pumps, etc. A base 728 (which can be combined with the above) is also shown. Figure 1The described base 128 (identical or similar) includes a raised portion 724, a first portion 716, and a second portion 720. Each raised portion 724 includes one or more cooling elements 712 and is operatively connected to one or more additional cooling elements 712. As an example only, the raised portion 724 may include multiple heat transfer fluid conduits passing through a heat exchanger configured to transfer heat from the upper surface of the raised portion 724 to the heat transfer fluid. Furthermore, the raised portion 724 may be mounted to the housing of a heat transfer fluid reservoir such that the heat transfer fluid circulates from the heat transfer fluid reservoir through the cooling elements in the raised portion 724 and then returns to the heat transfer fluid reservoir. However, other embodiments of this disclosure employ other arrangements, including different arrangements of the same components, and arrangements using more or fewer components and / or one or more different components.
[0114] Part 1, 716 (which can be combined with the above text) Figure 1 The first geometry 116 (which is the same as or similar to the first geometry 716) is mounted to the raised portion 724 and is in thermal communication with the raised portion 724. The second portion 720 extends upward from the first portion 716, and the first portion 716 and the second portion 720 together form a dual-geometry cooling plate.
[0115] The first part 716 defines a first geometry and has a contact surface 718, and the second part 720 defines a second geometry and has a pressure surface 722. The pressure surface 722 is offset from the contact surface 718. The dual-geometry cooling plate, including the base 728, is integrally formed. For example, a copper plate can be milled to define the contact surface 718, the second part 720, and the pressure surface 722. Any other suitable manufacturing process can also be used to form the first part 716 and the second part 720.
[0116] The first portion 716 may be the same as or similar to the first geometry 116 and / or plate 516, and the second portion 720 may be the same as or similar to the second geometry 120 and / or protrusion 520. Like the contact surfaces 118 and 518 and the pressure surfaces 122, 522 and 622, the contact surfaces 718 and 722 may be flat or convex.
[0117] The first geometry of the first portion 716 may be a square or rectangular plate with a thickness or height not exceeding 2000 micrometers. The second geometry of the second portion 720 may be a cylinder with a thickness or height not exceeding 50 micrometers. In some embodiments, the first geometry of the first portion 716 matches the second geometry of the second portion 720; while in other embodiments, the two geometries are different.
[0118] As described elsewhere, semiconductor die 736 can be any GPU, CPU, QPU, PPU, ASIC, or other processing unit. The semiconductor die may contain components with different CTEs, and repeated thermal cycling of the semiconductor die can cause thermomechanical warping of semiconductor die 736.
[0119] The thermal interface material 732 ensures adequate thermal contact between the dual-geometry cooling plate 728 and the semiconductor die 736. Furthermore, the pressure applied to the semiconductor die 736 via the pressure surface 722 of the second portion 720 of the base 728 counteracts the adverse effects of warpage of the semiconductor die 736 on the thermal interface material 732 (such as, for example, thickening of the thermal interface material 732), thereby helping to ensure that the thermal interface material 732 maintains a substantially uniform thickness between the base 728 and the semiconductor die 736 and does not separate from either of the two components.
[0120] Figure 8 A partial illustration of a dual-geometry cooling plate 828 is depicted, the cooling plate including a first geometry 816 (which may be the same as or similar to the first geometry 116, plate 516 and / or first portion 716) and a second geometry 820 (which may be the same as or similar to the second geometry 120, protrusion 520 or 620 and / or second portion 720). Figure 8 The features in the image are not drawn to scale, but rather displayed at an exaggerated scale to facilitate the description of their size.
[0121] More specifically, the height or thickness 817 of the first geometric structure 816 does not exceed 2000 micrometers. The height or thickness 817 may be between 1000 and 2000 micrometers, or between 1200 and 1800 micrometers, or between 1400 and 1700 micrometers. The height or thickness 821 of the second geometric structure 820 does not exceed 100 micrometers. The height or thickness 821 may not exceed 50 micrometers, or not exceed 35 micrometers, or exceed 25 micrometers, or be between 25 and 35 micrometers. The diameter 823 of the second geometric structure 820 is less than 50 millimeters, or less than 40 millimeters, or less than 30 millimeters, or less than 20 millimeters, or is between 5 millimeters and 20 millimeters, or is between 5 millimeters and 15 millimeters.
[0122] In describing embodiments of this disclosure, the second geometry 120, protrusions 520 and 620, the second portion 720, and the second geometry 820 may alternatively be referred to as a coin, a bump, or a disc.
[0123] This article combines Figures 1 to 8 Any of the embodiments described may include one or more features or characteristics described in conjunction with any other one or more embodiments.
[0124] Figure 9 The images include thermal images showing a significant improvement in heat transfer achieved when cooling a semiconductor die using a dual-geometry cooling plate according to embodiments of the present disclosure. More specifically, image 904 shows heat transfer achieved at room temperature using a dual-geometry cooling plate according to embodiments of the present disclosure, while images 908 and 912 show heat transfer achieved at room temperature without using a dual-geometry cooling plate according to embodiments of the present disclosure.
[0125] Similarly, Figure 916 shows heat transfer achieved at approximately 60 degrees Celsius using a dual-geometry cooling plate according to an embodiment of the present disclosure, while Figures 920 and 924 show heat transfer achieved at the same temperature without using a dual-geometry cooling plate according to an embodiment of the present disclosure. It can be seen that the heat transfer improvements using embodiments of the present disclosure are particularly significant at higher temperatures, where effective thermal management is especially crucial to ensuring optimal performance of the cooled semiconductor die.
[0126] Figure 10 A computer system 1000 according to at least one embodiment is shown. In at least one embodiment, the systems and devices described throughout this disclosure may be implemented in conjunction with the computer system 1000.
[0127] In at least one embodiment, the computer system 1000 includes, but is not limited to, at least one central processing unit (“CPU”) 1002 connected to a communication bus 1010, which is implemented using any suitable protocol, such as PCI (“Peripheral Component Interconnect”), Peripheral Component Interconnect High Speed (“PCI-Express”), AGP (“Accelerated Graphics Port”), HT bus (HyperTransport), or any other bus or point-to-point communication protocol. In at least one embodiment, the computer system 1000 includes, but is not limited to, main memory 1004. Control logic (e.g., implemented as hardware, software, or a combination thereof) and data are stored in main memory 1004, which may be in the form of random access memory (“RAM”). In at least one embodiment, a network interface subsystem (“network interface”) 1022 provides an interface to other computing devices and networks for receiving data from and sending data from the computer system 1000 to other systems.
[0128] In at least one embodiment, the computer system 1000 includes, but is not limited to, an input device 1008, a parallel processing system 1012, and a display device 1006, which may employ conventional cathode ray tube (“CRT”), liquid crystal display (“LCD”), light-emitting diode (“LED”), plasma display, or other suitable display technologies. In at least one embodiment, user input is received from the input device 1008, such as a keyboard, mouse, touchpad, microphone, etc. In at least one embodiment, each of the above modules may reside on a single semiconductor platform, thereby forming a processing system.
[0129] In at least one embodiment, a computer program in the form of machine-readable executable code or computer control logic algorithms is stored in main memory 1004 and / or secondary storage devices. If executed by one or more processors, the computer program will enable system 1000 to perform various functions according to at least one embodiment. Memory 1004, secondary storage devices, and / or any other storage devices are possible examples of computer-readable media. In at least one embodiment, secondary storage devices can refer to any suitable storage device or system, such as hard disk drives and / or removable storage drives, representing floppy disk drives, magnetic tape drives, optical disk drives, digital versatile optical disc (“DVD”) drives, recording devices, universal serial bus (“USB”) flash memory, etc. In at least one embodiment, the architecture and / or functionality in the various figures described herein are implemented within the context of CPU 1002; parallel processing system 1012; integrated circuits capable of implementing at least a portion of the functions of both CPU 1002 and parallel processing system 1012; chipsets (e.g., a set of integrated circuits designed to operate and be sold as a unit for performing related functions); and any suitable combination of integrated circuits.
[0130] In at least one embodiment, the architecture and / or functionality of the figures described herein are implemented within the context of general-purpose computer systems, circuit board systems, game console systems for entertainment purposes, dedicated systems, etc. In at least one embodiment, the computer system 1000 may take the form of a desktop computer, laptop computer, tablet computer, server, supercomputer, smartphone (e.g., wireless handheld device), personal digital assistant (“PDA”), digital camera, vehicle, head-mounted display, handheld electronic device, mobile phone, television, workstation, game console, embedded system, and / or any other type of logic.
[0131] In at least one embodiment, the parallel processing system 1012 includes, but is not limited to, multiple parallel processing units (“PPUs”) 1016 and associated memory 1016. In at least one embodiment, the PPUs 1016 are connected to a host processor or other peripheral devices via interconnects 1018 and switches 1020 or multiplexers. In at least one embodiment, the parallel processing system 1012 distributes computational tasks to parallelizable PPUs 1016—for example, as part of a thread block that distributes computational tasks to multiple graphics processing units (“GPUs”). In at least one embodiment, memory may be shared and accessed (e.g., for read and / or write access) among some or all of the PPUs 1016, although such shared memory may incur a performance penalty compared to using local memory and registers residing in the PPUs 1016. In at least one embodiment, the operation of the PPUs 1016 is synchronized using a command such as syncthreads(), which requires all threads in a block (e.g., threads executing across multiple PPUs 1016) to arrive at a specific point of execution in the code before continuing execution.
[0132] Figure 10 Both the CPU 1002 and PPU 1014 shown can be cooled using, for example, embodiments of this disclosure.
[0133] Figure 11 Other components of an example data center 1100 according to at least some embodiments of the present disclosure are shown. The data center 1100 may also include one or more modules having one or more cooling / thermal management functions as described herein.
[0134] In at least one embodiment, data center 1100 includes a data center infrastructure layer 1110, a framework layer 1120, a software layer 1130, and an application layer 1140. In at least one embodiment, the infrastructure layer 1110, framework layer 1120, software layer 1130, and application layer 1140 may be provided, partially or entirely, by computing components located on server racks within a rack in data center 1100 (or another data center). This enables the cooling system of this disclosure to efficiently and effectively direct cooling directly to certain computing and interconnect components. Furthermore, various aspects of data center 1100, including the data center infrastructure layer 1110, framework layer 1120, software layer 1130, and application layer 1140, can be used to support the selection or design of intermediate layers. Therefore, regarding Figure 11 The discussion can be understood as applicable to, for example, the hardware and software features required to implement or support cooling functions.
[0135] In at least one embodiment, such as Figure 11As shown, the data center infrastructure layer 1110 may include a resource coordinator 1112, packet computing resources 1114, and node computing resources (“nodes CR”) 1116(1)-1116(N), where “N” represents any positive integer. In at least one embodiment, nodes CR 1116(1)-1116(N) may include, but are not limited to, any number of central processing units (“CPUs”) or other processors (including accelerators, field-programmable gate arrays (FPGAs), graphics processors, etc.), storage devices (e.g., dynamic read-only memory), storage devices (e.g., solid-state drives or disk drives), network input / output (“NW I / O”) devices, network switches, virtual machines (“VMs”), power modules, and cooling modules, etc. In at least one embodiment, one or more nodes CR 1116(1)-1116(N) may be servers having one or more of the aforementioned computing resources.
[0136] In at least one embodiment, the grouped computing resource 1114 may include individual groups of node CRs located within one or more racks (not shown), or multiple racks housed within data centers (not shown) in different geographical locations. Individual groups of node CRs within the grouped computing resource 1114 may include grouped computing, networking, memory, or storage resources that can be configured or allocated to support one or more workloads. In at least one embodiment, multiple node CRs, including CPUs or processors, may be grouped within one or more racks to provide computing resources to support one or more workloads. In at least one embodiment, one or more racks may also contain any number of power modules, cooling modules, and network switches, in any combination.
[0137] In at least one embodiment, resource coordinator 1112 may be configured or otherwise control one or more nodes CR1116(1)-1116(N) and / or grouped computing resources 1114. In at least one embodiment, resource coordinator 1112 may include a Software Design Infrastructure (“SDI”) management entity for data center 1100. In at least one embodiment, resource coordinator may include hardware, software, or some combination thereof.
[0138] In at least one embodiment, such as Figure 11As shown, framework layer 1120 includes a job scheduler 1122, a configuration manager 1124, a resource manager 1126, and a distributed file system 1128. In at least one embodiment, framework layer 1120 may include a framework for supporting software 1132 of software layer 1130 and / or one or more applications 1142 of application layer 1140. In at least one embodiment, software 1132 or application 1142 may respectively include web-based service software or applications, such as services or applications provided by Amazon Web Services, Google Cloud, and Microsoft Azure. In at least one embodiment, framework layer 1120 may be, but is not limited to, a type of free and open-source software web application framework, such as Apache Spark. TM (Hereinafter referred to as "Spark"), a framework that can leverage the distributed file system 1128 for large-scale data processing (such as "big data"). In at least one embodiment, the job scheduler 1122 may include a Spark driver to facilitate the scheduling of workloads supported by various layers of data center 1100. In at least one embodiment, the configuration manager 1124 may be able to configure different layers, such as software layer 1130 and framework layer 1120, including Spark and distributed file system 1128 for supporting large-scale data processing. In at least one embodiment, the resource manager 1126 may be able to manage computing resources mapped to or allocated to clusters or groups supporting distributed file system 1128 and job scheduler 1122. In at least one embodiment, the computing resources of clusters or groups may include grouped computing resources 1114 of data center infrastructure layer 1110. In at least one embodiment, the resource manager 1126 may coordinate with resource coordinator 1112 to manage these mapped or allocated computing resources.
[0139] In at least one embodiment, the software 1132 included in software layer 1130 may include software used by at least a portion of the nodes CR1116(1)-1116(N) of framework layer 1120, grouped computing resources 1114, and / or distributed file system 1128. One or more types of software may include, but are not limited to, internet web search software, email virus scanning software, database software, and streaming video content software.
[0140] In at least one embodiment, the application 1142 included in the application layer 1140 may include one or more types of applications that are at least partially used by the nodes CR1116(1)-1116(N) of the framework layer 1120, the grouped computing resources 1114, and / or the distributed file system 1128. The one or more types of applications may include, but are not limited to, any number of genomics applications, cognitive computing applications, and machine learning applications, including training or inference software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), or other machine learning applications used in conjunction with one or more embodiments.
[0141] In at least one embodiment, any of the configuration manager 1124, resource manager 1126, and resource coordinator 1112 can implement any number and type of self-modification operations based on any amount and type of data acquired in any technically feasible manner. In at least one embodiment, self-modification operations can help the data center operator of data center 1100 avoid making potentially erroneous configuration decisions and may prevent underutilized and / or poorly performing portions of the data center.
[0142] In at least one embodiment, data center 1100 may include tools, services, software, or other resources for training one or more machine learning models or using one or more machine learning models to predict or infer information according to one or more embodiments described herein. In at least one embodiment, machine learning models can be trained by calculating weight parameters based on a neural network architecture using the software and computing resources described above for data center 1100. In at least one embodiment, the trained machine learning models corresponding to one or more neural networks can be used to infer or predict information using the resources described above for data center 1100 by leveraging weight parameters calculated via one or more training techniques. Deep learning can be advanced using any suitable learning network and the computing power of data center 1100. Therefore, hardware in the data center can be used to support deep neural networks (DNNs), recurrent neural networks (RNNs), or convolutional neural networks (CNNs) simultaneously or concurrently. Once the network is trained and successfully evaluated to identify data in a subset or slice, for example, the trained network can provide similar representative data for use with the collected data.
[0143] In at least one embodiment, the data center 1100 may use a CPU, application-specific integrated circuit (ASIC), GPU, FPGA, or other hardware to utilize the aforementioned resources to perform training and / or inference. Such hardware may be cooled, for example, according to embodiments of this disclosure. Furthermore, one or more of the aforementioned software and / or hardware resources may be configured as a service to allow a user to train or perform inference based on information such as pressure, flow rate, temperature, and location information, or as any other artificial intelligence service.
[0144] Inference and / or training logic 1115 may be used to perform inference and / or training operations associated with one or more embodiments. In at least one embodiment, inference and / or training logic 1115 may be used in data center 1100 (whether in grouped computing resources 1114, in one or more nodes CR1116(1)-1116(N), or elsewhere) or other systems described herein to perform inference or prediction operations based at least in part on weight parameters computed using neural network training operations, neural network functions and / or architecture, or neural network use cases described herein. In at least one embodiment, inference and / or training logic 1115 may include, but is not limited to, hardware logic, wherein computing resources are dedicated or otherwise specifically used for and in conjunction with weight values or other information corresponding to one or more neuron layers in a neural network. In at least one embodiment, inference and / or training logic 1115 may be used in conjunction with application-specific integrated circuits (ASICs), such as those from Google. Processing unit, from Graphcore TM The inference processing unit (IPU) or from Intel. (e.g., "Lake Crest") processor. Such hardware can be cooled, for example, according to embodiments of this disclosure.
[0145] In at least one embodiment, the inference and / or training logic 1115 may be used in conjunction with central processing unit (CPU) hardware, graphics processing unit (GPU) hardware, or other hardware (e.g., field-programmable gate array (FPGA))—all of which can be cooled, for example, using embodiments of this disclosure. In at least one embodiment, the inference and / or training logic 1115 includes, but is not limited to, code and / or data storage modules that can be used to store code (e.g., graph code), weight values, and / or other information, including bias values, gradient information, momentum values, and / or other parameter or hyperparameter information. In at least one embodiment, each code and / or data storage module is associated with a dedicated computing resource. In at least one embodiment, the dedicated computing resource includes computing hardware that further includes one or more ALUs that perform mathematical functions (e.g., linear algebraic functions) only on the information stored in the code and / or data storage modules, and the results are stored in the active storage module of the inference and / or training logic 1115.
[0146] The switches within each layer (e.g., edge layer, aggregation layer, core layer) can be 1U switches. These switches can be electrical switches, optical switches, hybrid electro-optic switches, or any combination thereof. These switches can be implemented using suitable hardware and / or software capable of routing signals within an appropriate domain. For example, an electrical switch may include a receiver that receives optical signals and converts them into electrical signals for routing within the switch. The receiver of an electrical switch may include a transimpedance amplifier (TIA), a photodetector, and a controller, all used to convert optical signals into electrical signals. Each electrical switch may also include a transmitter that converts the electrical signals routed within the switch into optical signals for output to another switch (optical switch or electrical switch) within the system. For example, the transmitter of an electrical switch may include a light source, a modulator, and a controller, with the controller controlling the modulator and the light source. In some embodiments, the receiver / transmitter pair may be integrated into a single transceiver. Each electrical switch may also include internal switching circuitry for routing electrical signals within the switch.
[0147] A switch, whether an electrical switch, photoelectric switch, and / or quantum switch, can include input circuitry and output circuitry linked together via a switch core. In some embodiments, a switch may include multiple inputs and outputs.
[0148] Many such architectures have been proposed, including Next-Generation I / O (NGIO) and Future I / O (FIO), eventually evolving into the InfiniBand architecture, which has been refined by a consortium led by industry leaders including Intel, Sun, HP, IBM, Compaq, Dell, and Microsoft. Storage Area Networks (SANs) provide a similar, packetized, serial, high-speed storage access method, which can also be implemented using the InfiniBand architecture.
[0149] Communication between parallel buses and packet networks typically requires a communication interface to convert bus cycles into appropriate packets and vice versa. For example, a host channel adapter or destination channel adapter can be used to link a parallel bus (e.g., a PCI bus) to an InfiniBand fabric. When the adapter receives data from a device on the PCI bus, it inserts the data into the payload of the InfiniBand packet and then adds appropriate headers and error checking codes, such as Cyclic Redundancy Check (CRC) codes, as needed for network transmission. The InfiniBand packet header includes a routing header and a transport header. The routing header contains information at the data link protocol layer, including fields required for routing packets within and between subnets. The transport header contains higher-level end-to-end transport protocol information. Similar headers are also used in other types of packet networks known in the art, such as Internet Protocol (IP) networks.
[0150] Figure 12 An example network configuration 1200 is shown, comprising components that can be used to implement aspects of various embodiments, such as for providing, generating, modifying, encoding, processing, fusing, and / or transmitting generated image data, calculated measurements, or other such content. In at least one embodiment, client device 1202 may use components of content application 1204 on client device 1202 and data locally stored on that client device to generate or receive session data. In at least one embodiment, content application 1224 running on computer or processor 1220 (e.g., cloud server or control system) may initiate a session associated with at least one client device 1202 (e.g., vehicle or robot), which may use a session manager and user data stored in user database 1236, and may allow content such as liquid coolant or server thermal data to be selected and / or retrieved from repository 1234 for use by test module 1232 to calculate one or more performance metrics for monitoring module 1228, which may provide flow or thermal data to control flow or temperature in an environment where the data is to be used to determine appropriate operation.
[0151] Content manager 1226 can work with these different modules to perform tests and analyses, and may instruct any actions to be taken against performance metrics that fail to meet operational requirements. At least a portion of the data or instruction content can be transmitted to client device 1202 and / or physical device 1270 using appropriate transmission manager 1222 for transmission via download, streaming, or another transmission channel. An encoder can be used to encode and / or compress at least a portion of the data before transmitting it to client device 1202. In at least one embodiment, client device 1202 receiving such content can provide this content to a corresponding content application 1204, which may also or alternatively include a graphical user interface 1210, a traffic monitoring module 1212, and a control module 1214 for providing, compositing, rendering, synthesizing, modifying, or using the content on or through client device 1202 for presentation, navigation, control (or other purposes), such as transmission to physical device 1270.
[0152] In some embodiments, the computer / processor 1220 and the client device 1202 may be able to communicate directly without transmitting data over the network 1240 to avoid issues such as latency and availability. The decoder may also be used to decode data received over the network 1240 for presentation by the client device 1202, such as imaging content or performance metrics via the display device 1206, and presenting audio (e.g., corresponding sound or synthesized speech) via at least one audio playback device 1208 (e.g., a speaker or headphones).
[0153] In at least one embodiment, at least a portion of this content may already be stored on, presented on, or accessible to client device 1202, such that at least that portion of the content does not need to be transmitted over network 1240. For example, the content (e.g., hot data) may have been previously downloaded or locally stored on a hard drive or optical disc. In at least one embodiment, the content may be transmitted from computer / processor 1220 or user database 1236 to client device 1202 using a transmission mechanism such as data streaming. In at least one embodiment, at least a portion of the content may be obtained, enhanced, and / or streamed from another source (such as third-party service 1260 or other client device 1250), which may also include a content application for generating, updating, enhancing, or providing map content. In at least one embodiment, a portion of this functionality may be executed using multiple computing devices or multiple processors within one or more computing devices, for example, a combination of CPU and GPU (graphics processing unit).
[0154] In at least some of these examples, the client device can include any suitable computing device, such as a desktop computer, laptop, set-top box, streaming media device, game console, smartphone, tablet, VR headset, AR glasses, wearable computer, or smart TV. Each client device can submit requests via at least one wired or wireless network, such as the Internet, Ethernet, local area network (LAN), or cellular network.
[0155] In this example, these requests may be submitted to an address associated with a cloud provider that may operate or control one or more electronic resources within the cloud provider's environment, such as data centers or server clusters. In at least one embodiment, the requests may be received or processed by at least one edge server located at the network edge and outside at least one security layer associated with the cloud provider's environment. This reduces latency and improves the security of resources within the cloud provider's environment by allowing client devices to interact with a closer server.
[0156] In at least one embodiment, such a system can be used to monitor or manage the thermal condition of a server, which includes a cold plate as a liquid manifold. In other embodiments, such a system can be used for other purposes, such as controlling the flow of liquid coolant or performing deep learning operations. In at least one embodiment, such a system can be implemented using an edge device or may include one or more virtual machines (VMs). In at least one embodiment, such a system can be implemented at least partially in a data center or at least partially using cloud computing resources.
[0157] According to at least some embodiments of this disclosure, the following can be employed: Figure 13 The exemplary data center 1300 shown has a cooling system improved as described herein. Any one or more of the features described below may be included in the system 100 described above, and / or in any other cooling system or part thereof (including any base) described herein.
[0158] In at least one embodiment, numerous specific details have been set forth for ease of comprehensive understanding, but the concepts herein can be practiced even without considering one or more of these specific details. In at least one embodiment, the data center cooling system is capable of responding to sudden surges in heat dissipation demands caused by variations in computing load in modern computing components. In at least one embodiment, because these demands are variable, or often range from minimum to maximum different cooling requirements, a suitable cooling system must be used to meet these demands economically. In at least one embodiment, a liquid cooling system can be used for medium to high cooling demands. In at least one embodiment, high cooling demands are economically met through localized immersion cooling. In at least one embodiment, these different cooling demands also reflect different thermal characteristics of the data center. In at least one embodiment, the heat generated from these components, servers, and racks is collectively referred to as thermal characteristics or cooling demands, because cooling demands must fully address a particular thermal characteristic.
[0159] In at least one embodiment, a data center liquid cooling system is disclosed. In at least one embodiment, this data center cooling system addresses the thermal characteristics of associated computing or data center equipment (e.g., graphics processing units (GPUs), switches, dual in-line memory modules (DIMMs), or central processing units (CPUs)). In at least one embodiment, these components may be referred to herein as high heat-density computing components. Furthermore, in at least one embodiment, the associated computing or data center equipment may be a processing card having one or more GPUs, switches, or CPUs thereon. In at least one embodiment, GPUs, switches, and CPUs can all serve as heat-generating components of the computing device. In at least one embodiment, a GPU, CPU, or switch may have one or more cores, and each core may be a heat-generating component.
[0160] In at least one embodiment, the cold plate includes adjustable fins that form microchannels through which fluid flows. In at least one embodiment, the fins in the cold plate are capable of transferring heat from at least one associated computing device to fluid flowing through the microchannels formed between multiple fins. In at least one embodiment, the fins of the cold plate can be dynamically adjusted in real time to transfer more heat from at least one computing device to the fluid flowing through the finned cold plate. In at least one embodiment, such fins can be regulated by a processor or processorless system in part based on a determined (e.g., sensed) cold plate temperature. In at least one embodiment, the temperature can be associated with at least one computing device, the workload of at least one computing device, or the fluid at different time periods and at the inlet and outlet of the cold plate. In at least one embodiment, the processorless system can rely on the thermal properties of at least two materials used to form the fins of the cold plate, such that the fins can react without a processor, thereby exposing more surface area to the fluid. In at least one embodiment, the fins can include overlapping portions, which can be exposed by the action of a control mechanism or by the properties of the at least two materials associated together to constitute the fins.
[0161] In at least one embodiment, the cold plate has a top plate, a bottom plate, and fins located between the top plate and the bottom plate. In at least one embodiment, the bottom plate may be the bottom of the cold plate. In at least one embodiment, the top plate may be an intermediate portion between a cover plate of the cold plate and the bottom plate or substrate of the cold plate. In at least one embodiment, the fins may be coupled to the bottom plate or substrate and the top plate such that the top plate can be moved to expose the overlapping portion of each fin and expose the overlapping portion of each fin to fluid flowing through the cold plate. In at least one embodiment, the exposure of the overlapping portion of each fin results in the previously covered surface area being exposed to the fluid, and provides additional cooling to the fins of the cold plate and, consequently, additional cooling to the associated computing device.
[0162] In at least one embodiment, multiple fins form microchannels for fluid flow therethrough. In at least one embodiment, these fins are capable of actively or passively responding to thermal feedback by altering the microchannels, enabling the fluid to absorb more heat from at least one computing device. In at least one embodiment, the active response can be implemented by at least one processor that can expose more surface area of the fins by expanding the overlapping portions of the fins. In at least one embodiment, the passive response can be implemented by the thermal properties of the material associated with each of the fins that constitutes the material allowing the expansion of the fins.
[0163] In at least one embodiment, this paper addresses the problem of cold plates being static devices through intelligent dynamic cold plates. In at least one embodiment, the intelligent dynamic cold plate allows the cold plate (through its internal structure) to respond to temperatures sensed or determined from at least one computing device. In at least one embodiment, the intelligent aspects of the intelligent dynamic cold plate, compared to a static cold plate, allow the use of sensor input to modify the fins of such a cold plate. In at least one embodiment, the microchannels formed by such fins can be altered to change the fluid path or increase the interaction surface between the fluid and each such fin. In at least one embodiment, these aspects allow more fluid to flow through certain areas, or allow more fluid to flow through certain areas and allow heat removal in those areas where high heat density is generated in at least one computing device.
[0164] In at least one embodiment, a static cold plate for liquid cooling of GPUs, CPUs, switches, and other high heat-density components may have static microchannels that allow fluid to flow through them to remove heat from such heat dissipation components in a data center. In at least one embodiment, the static cold plate incorporates designs and methods for heat removal that are independent of or do not respond to the heat density or heat dissipation of the computing components. In at least one embodiment, the thermal behavior of some cold plates may vary due to computing, environmental, and other properties that require dynamic behavior to achieve optimal heat removal capabilities for available resources in a liquid-cooled environment.
[0165] In at least one embodiment, the liquid-cooled indirect cooling plate may be composed of components therein. In at least one embodiment, two components may be provided such that the bottom or base layer or component provides a rigid mechanical connection and also acts as a highly thermally conductive medium to conduct heat from computing components (GPUs, switches, and CPUs) to multiple fins forming microchannels on the bottom or base plate or component. In at least one embodiment, these fins are constructed in a base metal and may be associated with a plate or component on top of or above an intermediate plate or component. In at least one embodiment, the plate or component on top of or above the intermediate plate or component is non-conductive and made of a non-conductive material. In at least one embodiment, a cover plate (together with side plates) encloses these components within the smart dynamic cooling plate.
[0166] In at least one embodiment, a top or upper plate or component, by functioning as an intermediate plate or component, can dynamically modify the microchannel fluid paths of the substrate, partially based on the instantaneous thermal behavior of the heating component associated with the smart dynamic cold plate. In at least one embodiment, utilizing smart sensing, inference, and adaptive modification, the microchannels forming the fluid paths can be dynamically adjusted so that more fluid (for heat removal) goes to or rushes towards areas of high heat density within the smart dynamic cold plate. In at least one embodiment, these features can also simultaneously reduce fluid flow, thereby blocking microchannels used to determine or sense areas with less demand for heat removal from the substrate of the smart dynamic cold plate. In at least one embodiment, overlapping portions of fins provided within the smart dynamic cold plate can be used to block or restrict microchannels by thickening the overlapping portions between the fins of the smart dynamic cold plate. In at least one embodiment, multiple top plates can be provided as intermediate plates, and each top plate can be associated with different fins. In at least one embodiment, movement of different top plates achieves different blocking, restriction, or fluid redirection within the smart dynamic cold plate.
[0167] In at least one embodiment, the following can be used: Figure 13The exemplary data center 1300 shown herein has a cooling system improved as described herein. In at least one embodiment, the data center 1300 may be one or more rooms 1302, each room having racks 1310 and auxiliary equipment for accommodating one or more servers on one or more server racks. In at least one embodiment, the data center 1300 is supported by a cooling tower 1304 located outside the data center 1300. In at least one embodiment, the cooling tower 1304 dissipates heat within the data center 1300 by acting on a primary cooling circuit 1306. In at least one embodiment, a cooling distribution unit (CDU) 1312 is used between the primary cooling circuit 1306 and a second or secondary cooling circuit 1308 to absorb heat from the second or secondary cooling circuit 1308 into the primary cooling circuit 1306. In at least one embodiment, in one aspect, the secondary cooling circuit 1308 may have various piping connections to the server racks as needed. In at least one embodiment, circuits 1306, 1308 are shown in line diagram form, but those skilled in the art will recognize that one or more piping features may be used. In at least one embodiment, flexible polyvinyl chloride (PVC) pipes may be used with associated piping to allow fluid to move along each provided loop 1306; 1308. In at least one embodiment, one or more coolant pumps may be used to maintain a pressure differential within the coolant loops 1306, 1308 to allow coolant movement based on temperature sensors located at different locations, including in a room, in one or more racks 1310, and / or in server chassis or server trays within one or more racks 1310.
[0168] In at least one embodiment, the coolant in the primary cooling circuit 1306 and the secondary cooling circuit 1308 may contain at least water and an additive. In at least one embodiment, the additive may be ethylene glycol or propylene glycol. In operation, in at least one embodiment, each of the primary and secondary cooling circuits may have its own coolant. In at least one embodiment, the coolant in the secondary cooling circuit may be proprietary due to the component requirements of the server rack or associated rack 1310. In at least one embodiment, the CDU 1312 is capable of fine control of the coolant within the configured cooling circuits 1306, 1308, either independently or concurrently. In at least one embodiment, the CDU may be adapted to control the flow rate of the coolant such that the coolant is appropriately distributed to absorb heat generated within the associated rack 1310. In at least one embodiment, a more flexible conduit 1314 is provided from the secondary cooling circuit 1308 to each server rack to provide coolant to the electrical and / or computing components therein.
[0169] Heat transfer fluids typically include water, aqueous solutions (e.g., propylene glycol-water), brine, antifreeze, mixtures of antifreeze and water, oil, alcohol, mercury or similar substances, or any other suitable heat-conducting fluid. The heat transfer fluid can be a conductive coolant and may contain water, deionized water, or a coolant (e.g., R-134a), a mixture of water and additives (e.g., a mixture of water and ethylene glycol or a mixture of water and propylene glycol, such as 25% propylene glycol in deionized water). The heat transfer fluid can also be a single dielectric fluid (e.g., water-free for the purposes of this disclosure), or a combination of water and additives containing at least one dielectric fluid, such as one or more of deionized water, ethylene glycol, and / or propylene glycol. In at least one embodiment, the heat transfer fluid can be an absorption cooler whose working fluid is a mixed solution containing lithium bromide as an absorbent and water as a carrier material. The heat transfer fluid can also be a two-phase coolant with a boiling point below the expected operating temperature of the electronic device. Exemplary two-phase coolants include 2,3,3,3-tetrafluoropropylene, 1,1,1,2-tetrafluoroethane, and water.
[0170] In at least one embodiment, the conduit 1318 forming part of the secondary cooling circuit 1308 may be referred to as a room manifold. Separately, in at least one embodiment, an additional conduit 1316 extends from the manifold conduit 1318 and may also form part of the secondary cooling circuit 1308, but may be referred to as a manifold. In at least one embodiment, the coolant conduit 1314 enters the rack as part of the secondary cooling circuit 1308, but may be referred to as a rack cooling manifold within one or more racks. In at least one embodiment, the manifold 1316 extends to all racks along a row in the data center 1300. In at least one embodiment, the piping of the secondary cooling circuit 1308, including coolant manifolds 1318, 1316, and 1314, can be improved by at least one embodiment herein. In at least one embodiment, a cooler 1320 may be provided in the main cooling circuit of the data center 1302 to support cooling prior to the cooling tower. In at least one embodiment, an additional cooling circuit, which may exist in the main control circuit and provides cooling to the outside of the rack and the secondary cooling circuit, may be combined with the main cooling circuit and distinguished from the secondary cooling circuit in this disclosure.
[0171] In at least one embodiment, during operation, heat generated within the server trays of the provided rack 1310 can be transferred via a flexible conduit of the manifold 1314 of the second cooling circuit 1308 to coolant leaving one or more racks 1310. In at least one embodiment, a second coolant from the CDU 1312 for cooling the provided racks 1310 (in the secondary cooling circuit 1308) moves to one or more racks 1310 via the provided conduit. In at least one embodiment, the second coolant from the CDU 1312 is transferred from one side of the room manifold with conduit 1318 to one side of the rack 1310 via manifold 1316, and passes through one side of the server tray via different conduits 1314. In at least one embodiment, used or returned second coolant (or departing second coolant carrying heat from the computing components) exits from the other side of the server tray (e.g., enters the left side of the rack and exits from the right side of the server tray after circulating through the server tray or through the components on the server tray). In at least one embodiment, the used second coolant exiting the server rack or cabinet 1310 exits from a different side (e.g., the outlet side) of the conduit 1314 and moves to a parallel but also outlet side of the manifold 1316. In at least one embodiment, the used second coolant moves from the manifold 1316 along a parallel portion of the room manifold 1318 and travels in the opposite direction to the incoming second coolant (which may also be a newer second coolant) and flows to the CDU 1312.
[0172] In at least one embodiment, the used second coolant exchanges its heat with the main coolant in the main cooling circuit 1306 via CDU 1312. In at least one embodiment, the used second coolant can be refreshed (e.g., relatively cooled compared to the temperature of the used second coolant stage) and prepared to be circulated back to one or more computing components via the second cooling circuit 1308. In at least one embodiment, various flow and temperature control features in CDU 1312 can enable control of the heat exchanged from the used second coolant or the flow rate of the second coolant into and out of CDU 1312. In at least one embodiment, CDU 1312 can also control the flow rate of the main coolant in the main cooling circuit 1306.
[0173] Now for reference Figure 14In at least one embodiment, the neural network can be embedded in various devices to enable these devices to predict future states and perform proactive adjustments based at least in part on these predictions. In at least one embodiment, this can include a neural network-enabled device directly mounted in the liquid-cooled server rack 1400. In at least one embodiment, the rack 1400 can include several liquid-cooled servers 1402 or other such devices. In at least one embodiment, the rack 1400 may include a rack manifold 1404 supporting the neural network to provide a liquid flow to each liquid-cooled server 1402 via an inlet valve 1408 and return liquid with heat removed from the server 1402 via an outlet valve 1410. In at least one embodiment, the rack manifold 1404 may include several secondary liquid distribution control panels 1406 supporting the neural network. In at least one embodiment, there may be one such control panel 1406 for each inlet valve 1408 and outlet valve 1410 for each server. In at least one embodiment, rack 1400 may further include a rack power distribution unit (PDU) 1412 supporting neural networks, which may include multiple outlets designed to distribute power to computers or networking equipment within rack 1400. In at least one embodiment, a neural network-supporting power distribution control board 1414 may be present associated with each outlet of PDU 1412. In at least one embodiment, sensors may capture information about temperature, airflow, or other such aspects of the internal and / or external computing environment of rack 1400 (including the internal and / or external environments of any individual servers 1402 located therein). In at least one embodiment, liquid cooling may remove a certain amount of heat from server 1402, but temperatures at different locations may vary due to factors such as load variations and external temperature fluctuations, and may reach or exceed temperature limits that allow these devices to continue operating normally. In at least one embodiment, efforts may be made to ensure that temperatures at specific locations remain below acceptable limits, where these locations may be related to the junction or core temperature of the processor (e.g., CPU or GPU), memory module, or power supply.
[0174] In at least one embodiment, the neural networks in these control boards 1406, 1414 can be assigned tasks to predict values such as coolant flow or airflow and temperatures at these different locations at one or more future time points. In at least one embodiment, corresponding boards, manifolds, PDUs, or other similar devices can utilize the predictions from these networks to make adjustments to ensure appropriate temperatures and flow rates and maintain proper operation of the equipment. In at least one embodiment, these adjustments can include adjusting the amount of fluid or air flowing into or out of the server or device, and the temperature of that fluid or air. In at least one embodiment, this can also include adjusting the electrical power supplied to one or more of these devices. In at least one embodiment, this can include adjustments similar to those made in other data centers, but based on future predictions rather than observed states, thereby enabling such a system to operate proactively rather than reactively. In at least one embodiment, such monitoring can be continuous, or at least at regular intervals, to ensure continuous normal operation.
[0175] In at least one embodiment, each neural network in each type of component can be specifically trained for that type of component and can receive updated network parameters that can be generated by further training or continuous learning. In at least one embodiment, inference results generated by the individual devices can also be shared with other devices in the data center, which helps to make more accurate predictions. In at least one embodiment, each control board 1406, 1414 can be a board supporting neural networks, an ASIC, or other such component. In at least one embodiment, the control board can include components of a general-purpose computer, including at least one processor (e.g., Figure 10 CPU 1002 and memory (e.g.) Figure 10The system includes a main memory 1004 and related circuitry. In at least one embodiment, a Jetson board from NVIDIA, a complete system-on-module (SPM) containing a CPU, GPU, PMIC, DRAM, and flash memory, can be used. In at least one embodiment, such a module is also scalable to provide additional functionality or capabilities. In at least one embodiment, each such board can be used as a small computer supporting artificial intelligence (AI) or machine learning. In at least one embodiment, multiple such boards can be used in parallel, such as on a rack manifold 1404, to concurrently process data from multiple high-resolution sensors. In at least one embodiment, these different neural networks can make predictions that can be shared between servers, racks, or data centers, for example, to provide accurate predictions at different locations at one or more future points in time. In at least one embodiment, appropriate adjustments can then be made as needed to maintain temperature and other parameters at appropriate levels or values. In at least one embodiment, the liquid distribution control board 1406 can make predictions that can be used to adjust controls only for relevant flow values, or these predictions can be shared so that other adjustments are also made, at least in part, based on these predictions. In at least one embodiment, the control system for the data center can collect predictive results from these various boards or networks to make adjustments more suitable for the entire data center. In at least one embodiment, these adjustments can then be made at the server, rack, pod, data center, or other such level.
[0176] In at least one embodiment, a data center-level method for supporting neural networks for rack liquid cooling can utilize... Figure 15A The components of the system 1500 shown. In at least one embodiment, an external cooling unit 1502 can provide liquid at a determined temperature to a data center cooling distribution unit 1504. In at least one embodiment, the unit 1504 may include a set of distribution unit control boards 1506 supporting neural networks, which can perform inference and adjust based on inferred future values. In at least one embodiment, this may include adjusting the temperature of the liquid to be received from the external cooling unit 1502, or adjusting the flow rate of the liquid into and / or out of the external unit 1502. In at least one embodiment, this may also include adjusting the flow rate into a manifold 1508 of a row of liquid-cooled racks 1512, and the flow rates into and out of these racks, which may be determined at least in part based on inference results from the neural network-supporting control board 1510 built into the manifold 1510. In at least one embodiment, different levels of inflow and outflow flow rates may exist for different liquid-cooled racks. In at least one embodiment, the flow rate into each server in the rack may also be different, such as for... Figure 14The method described above can be applied to air-cooled data centers in at least one embodiment. In at least one embodiment, temperature and airflow can be measured, and future values can be predicted at times such as 30 seconds, 1 minute, 5 minutes, or 1 hour. This allows adjustments to air temperature, airflow, power distribution, and other such aspects to be made. In at least one embodiment, these predictions can be made using various types of input data, such as server load, current temperature, current pressure, flow rate, power consumption, and other relevant data from different locations within the data center.
[0177] In at least one embodiment, these neural network-enabled boards can control the flow, supply, and return of liquid at various locations, such as racks, servers, or GPU levels. In at least one embodiment, these boards can be used to predict, control, and create optimal solutions for such data centers to maintain desired operating conditions without equipment failure or downtime due to temperature issues or thermal events. In at least one embodiment, this can be based on current and anticipated loads and measured or detected network conditions. In at least one embodiment, the method can also be applied to other types of devices, such as UPS power supplies. In at least one embodiment, any device with a logic board or component can have such small neural network code injected for these and other such purposes. In at least one embodiment, such a network can access all available equipment in a unit or device, such as in devices like PDUs, where boards can regulate or completely cut off power to server nodes, for example, in the event of a detected or predicted leak and potential damage to the associated equipment if it continues to operate. In at least one embodiment, operation can be gracefully terminated or power turned off to avoid damage. In at least one embodiment, an executing program can be terminated to at least prevent data loss.
[0178] In at least one embodiment, the cooling system can utilize, for example... Figure 15AThe direct return design is shown. In at least one embodiment, coolant from CDU 1504 is directed to the respective server racks along supply manifold 1508. In at least one embodiment, the first server rack (A) will receive liquid first along this flow, and the last server rack (E) will receive liquid last along this flow. In at least one embodiment, return manifold 1510 will be used to receive the heated liquid passed from these racks and return the heated liquid to CDU 1504. In at least one embodiment, the heated liquid returning from the first server rack (A) will have the shortest return path, while the last server rack (E) will have the longest return path. In at least one embodiment, this results in the overall liquid path 1514 of the first server rack (A) being much shorter than the overall liquid path 1516 of the last server rack (E) 1516. In at least one embodiment, there may be significant differences in various aspects (e.g., pressure and flow rate) in the cooling system loop. In at least one embodiment, this may include lower pressure near the ends of the cooling loop and higher pressure in the middle portion of the loop. In at least one embodiment, this unbalanced design can lead to unacceptable variations in flow rates in data centers or other environments because different path lengths result in varying pressure, temperature, and other environmental factors affecting these flows. In at least one embodiment, the different amounts of time required for the liquid to travel along these different paths also contribute to flow rate variations.
[0179] In at least one embodiment, a reverse-return-based design may be employed, such as... Figure 15B The system 1520 is illustrated. In at least one embodiment, the system includes a reverse return manifold 1522 that receives heated liquid from the first server rack (A) and the last server rack (E), but instead of directing the flow directly back to CDU 1506, the liquid flows from the first server to the last server (or... Figure 15B (From right to left), and then returns to CDU1504 via the second section. As shown, the liquid for each server rack will flow along a path 1524 of similar length, at least through the corresponding manifold. In at least one embodiment, these path lengths can be effectively equal, allowing for minor variations based on factors such as location and component type. In at least one embodiment, the liquid for each server rack will flow through almost the entire length of the supply manifold and this return manifold, rather than as... Figure 15AThe liquid flows through different sections as in a direct return design. In at least one embodiment, this can be used to ensure that the liquid in all server racks experiences the same variations in temperature, pressure, and other environmental parameters encountered throughout the entire operation of the manifold. In at least one embodiment, this balancing design can help reduce variations in the flow rate of the liquid delivered to different locations in the cooling system. In at least one embodiment, this can help ensure that flow rate variations remain within the desired range or below a maximum variation threshold. In at least one embodiment, this balancing design can help ensure that equal and sufficient amounts of liquid are delivered to all servers and racks in the data center through the appropriate cooling components of the liquid cooling system.
[0180] In at least one embodiment, all supply and return fluid lines between one or more CDUs in an immersion liquid-cooled blade and one or more direct-to-chip (D2C) cold plate cooling loops or heat exchangers may employ reverse return rather than direct return in various data center manifolds, exhaust manifolds, and rack manifolds. In at least one embodiment, electronic valve controls at each outlet from these manifolds, exhaust manifolds, and rack manifolds are capable of monitoring and controlling the flow of primary and / or secondary fluids into and out of these CDUs, which lead to components such as CPUs, GPUs, and switches, as well as other D2C liquid-cooled components and cold plates of the blade immersion server. In at least one embodiment, the liquid cooling system may employ a combination of self-balancing flow design in all primary and secondary loops with electronic monitoring and control utilizing AI or machine learning, at least in part based on data received from various flow rate, pressure, temperature, power, and other environmental or operational sensors. In at least one embodiment, this approach can provide improved or optimized liquid distribution for liquid-cooled components such as servers and processors in environments such as data centers.
[0181] In at least one embodiment, neural network-based flow control can be used in conjunction with such designs to provide further variability minimization or flow consistency. In at least one embodiment, self-balancing combined with electronic monitoring and control can provide a highly balanced and optimized coolant flow to each of servers, racks, processors, or other similar components without the need for interference between these components or complex control schemes. In at least one embodiment, flow controllers can be located at various points in the cooling system, for example, to guide coolant inflow and outflow from components such as racks, servers, and electronic components, where the coolant can be supplied via paths such as manifolds and rack manifolds. In at least one embodiment, these flow controllers can allow incremental control (e.g., partial opening and closing) to provide an accurate self-balancing approach. In at least one embodiment, a self-balancing design with finely adjustable control can provide accurate balance of liquid flow between the various (if not all) outlets of the liquid cooling system. In at least one embodiment, this method can be used to provide, for example, a flow rate of 50 liters per minute (lpm) with a tolerance, threshold, or range of variation of + / - 5 lpm. Designs without this method may have a flow rate of about 60 lpm at one location and about 40 lpm at another location due to differences such as pressure gradients and gravity effects, which could be an unacceptable flow imbalance in the entire system.
[0182] In at least one embodiment, the control system 1540 can be as follows: Figure 15CThe implementation is shown. In at least one embodiment, a reverse-return manifold design may be used to provide pressure and flow balance in the system. In at least one embodiment, the controllable flow valve 1546 may be used at various inlet and / or outlet locations, such as the inlet and outlet of each rack on the manifold. In at least one embodiment, the flow manager 1542 may receive data from various sensors, devices, or data sources in the relevant environment. In at least one embodiment, the flow manager 1542 may provide at least a portion of this data as input to one or more neural networks (e.g., deep neural networks (DNNs)) of the inference module 1544. In at least one embodiment, the sensors and valves may be calibrated for the type of fluid used. In at least one embodiment, there may be only one flow manager 1542 for the entire data center or environment, or each row, rack, or server may have a flow manager. In at least one embodiment, the neural network may also be used at each individual flow control valve and may communicate with one or more independent flow controllers. In at least one embodiment, the flow manager 1542 may receive one or more inference results from the inference module 1544, wherein these inference results may include adjustments or settings for the individual flow control valves. In at least one embodiment, the flow manager 1542 may then send this data or instructions or related data or instructions to these individual flow control valves 1546 or other such components for minor adjustments, thereby helping to balance the flow across the entire system.
[0183] In at least one embodiment, this method can be applied at the rack level or the server level, such as... Figure 15D The system 1560 is shown in the diagram. In at least one embodiment, the liquid-cooled rack may have a rack manifold with a reverse-return design, such that the liquid path length for each server in the rack remains equivalent. In at least one embodiment, the size of the manifold may be much smaller than the size of the corresponding rack, such as... Figure 15D An exploded view is shown for clarity. In at least one embodiment, the flow manager 1562 may utilize the inference module 1564 to determine adjustments to be made to the various flow control valves 1566 within the rack to balance flow between the servers in the rack. In at least one embodiment, the flow manager may also provide such instructions to flow control valves or components within the servers, for example, to direct coolant to specific cold plates, processors, or other internal server components. In at least one embodiment, using these intelligent control valves can provide balanced piping distribution and good controllability. In at least one embodiment, each of these intelligent control valves 1566 can be appropriately fine-tuned under the guidance of the flow manager. In at least one embodiment, these flow valves may employ PID or PIV servo control, where PIV allows control based on both position and velocity errors.
[0184] In at least one embodiment, one or more neural networks can be trained to infer the amount of liquid cooling required for various components under different conditions. In at least one embodiment, this may include determining how much additional cooling a GPU might require to increase its operating power from a more typical 300 watts to 500 watts, which might require 1.7 lpm instead of 1.0 lpm. In at least one embodiment, the neural network can infer the adjustments that need to be made to the liquid flow of the component and is able to make proactive and accurate adjustments to avoid significant temperature fluctuations. In at least one embodiment, one or more operation tables may exist, which may correlate factors such as proportional flow rate with power dissipation, and these operation tables can be used to train the models or to determine adjustments based on inferred state data. In at least one embodiment, these tables can also be used for different types of components, or different models of the same type of component, to account for the inherent differences between the components themselves. In at least one embodiment, inference at different levels of granularity can be performed, from the entire data center level to the level of internal server components (e.g., GPUs). In at least one embodiment, data may be collected by a component such as a board management controller (BMC) or a server and provided to a flow manager via a network port, which may send instructions to one or more flow controllers to make one or more appropriate adjustments.
[0185] In at least one embodiment, the neural network can predict the fluid state at different locations at one or more future times, at least in part, based on available information. In at least one embodiment, this can include a snapshot of current information or at least some recent data from the past. In at least one embodiment, these predictions can be used to adjust aspects such as flow rate. In at least one embodiment, the cooling distribution unit can adjust the liquid flow rate or coolant temperature. In at least one embodiment, such equipment can utilize these predictions and is proactive in preventing any adverse events from occurring before the predictions occur. In at least one embodiment, various sensors can provide information about the current state of the computing environment. In at least one embodiment, this can include the use of sensors such as temperature sensors, load sensors, flow sensors, or pressure sensors, which can collect data instantaneously or historically. In at least one embodiment, predictions based on data from these sensors can be compared with one or more thresholds, ranges, or other operating criteria to determine whether any changes should be made. In at least one embodiment, this can include adjustments to prevent unacceptable temperature rises at specific locations in data centers or other such environments. In at least one embodiment, this can include closing valves or increasing coolant flow, adjusting coolant temperature, issuing alarms, and other such remedial measures.
[0186] In integrated circuit (IC) chip packaging, various packaging schemes are employed, including traditional two-dimensional (2D) IC packaging and the 2.5D and 3D IC packages introduced in recent years. In 2D IC packaging, multiple chips are mounted on a printed circuit board, with high-performance logic, low-performance logic, memory, analog / RF functions, and other functional components packaged as discrete devices within different chip packages. In contrast, in 2.5D and 3D IC packages, multiple IC chips are mounted on a silicon interposer, rather than a conventional packaging substrate. Because the manufacturing process used to form conductive traces is the same as the process used to form metal interconnects in the metallization layer of a silicon chip, the silicon interposer, typically on a silicon wafer, allows for the formation of very fine and high-density conductive traces between multiple IC chips.
[0187] Compared to 2.5D IC and 3D IC packages, circuit boards with individually packaged chips (such as 2D IC packages) have several disadvantages. For example, 2D IC packages are typically larger, heavier, and consume more power, and they are also slower than equivalent 2.5D IC or 3D IC packages because signals propagate from one chip to another on the circuit board relatively slowly. Furthermore, 2D IC packages have more potential points of failure because solder joints on the circuit board are more prone to failure than electrical connections formed within the interposer. That said, troubleshooting 2D IC packages is relatively simple after the different chips have been mounted on the circuit board. In particular, the conductive traces that transmit I / O signals between the individual chips on the circuit board are readily accessible, and these traces can be used to measure specific I / O signals during troubleshooting.
[0188] In contrast, troubleshooting 2.5D or 3D IC packages presents far more challenges because I / O signals transmitted between different chips are typically embedded in the silicon interposer, making direct physical access impossible. Furthermore, due to the high bandwidth and density of 2.5D and 3D IC packages, implementations often contain thousands of conductive traces routed between different chips. An example of such implementations is the memory bus between a processor and a high-bandwidth memory chip. In this implementation, even if probes could be used to physically access these traces through the silicon interposer, accurately and reliably selecting specific conductive traces or combinations of conductive traces for IC package troubleshooting is difficult, if not impossible.
[0189] In at least one embodiment, one or more parallel processors (e.g., parallel processing unit 1014 of parallel processing system 1012) include circuitry optimized for graphics and video processing, including, for example, video output circuitry, and constitute a graphics processing unit (“GPU”). In at least one embodiment, one or more parallel processors include circuitry optimized for general-purpose processing. In at least one embodiment, components of a computing system (e.g., computer system 1000) may be integrated with one or more other system elements on a single integrated circuit. For example, in at least one embodiment, one or more parallel processors, a memory hub (e.g., main memory 1004 of computer system 1000), one or more processors (e.g., CPU 1002 of computer system 1000), and an I / O hub (which facilitates communication with, for example, one or more display devices 1006, one or more input devices 1008, and / or network interfaces 1022 of a system such as computer system 1000) may be integrated into a system-on-a-chip (SoC) integrated circuit. In at least one embodiment, components of such a computing system can be integrated into a single package to form a system-in-package (SIP) configuration. In at least one embodiment, at least a portion of the components of such a computing system can be integrated into a multi-chip module (“MCM”), which can be interconnected with other MCMs to form a modular computing system. In at least one embodiment, an I / O subsystem and any display device are omitted from such a computing system.
[0190] Figure 16 This diagram schematically illustrates a computing system 1600, such as a data center or high-performance computing (HPC) cluster, according to embodiments described herein. According to at least one embodiment, system 1600 includes multiple subsystems, such as multiple processing devices, multiple network devices, and multiple networks coupled to each other. The computing system 1600 is designed with multiple integrated circuits (referred to as processing devices), each of which may contain one or more CPUs and GPUs, forming a powerful and flexible architecture.
[0191] Various processing devices are interconnected via NVLink or other high-speed interconnects to enable high-speed communication between subsystems, and are also connected via NICs or DPUs to ensure efficient data transmission within computing system 1600 and to one or more external networks 1630, 1636. In this example, system 1600 includes a packet switch 1648 that connects NIC / DPU 1628 to network 1630 and a packet switch 1650 that connects NIC / DPU 1632 to network 1636.
[0192] NVLink coupling of processing devices enables seamless data exchange and parallel processing, thereby improving overall computing performance. Processing devices connect to multiple networks via one or more Network Interface Controllers (NICs) or Data Processing Units (DPUs), enabling the system to handle complex multi-network tasks with high bandwidth and low latency. This configuration is ideal for demanding applications requiring significant processing power, such as artificial intelligence (AI), machine learning (ML), and data-intensive computing, while ensuring robust connectivity and scalability in a variety of networked environments. The integrated circuits of the Computing System 1600 can contain one or more CPUs and one or more GPUs.
[0193] Figure 16 An example architecture of a multi-GPU architecture is also demonstrated. As shown in the figure, computing system 1600 includes a processing device 1602 employing a multi-GPU architecture. Specifically, processing device 1602 may be a system-on-a-chip (SoC) and includes multiple subsystems, such as CPU 1606, GPU 1608, and GPU 1610. CPU 1606 may be coupled to GPU 1608 via die-to-die (D2D) or chip-to-chip (C2C) interconnects 1612 (e.g., ground reference signal interconnects (GRS interconnects)). CPU 1606 may be coupled to GPU 1610 via D2D or C2C interconnects 1614. CPU 1606 may also be coupled to GPU 1608 and GPU 1610 via PCIe interconnects.
[0194] The CPU 1606 can be coupled to one or more NICs or DPUs, which in turn can be coupled to one or more networks. For example, as Figure 16 As shown, CPU 1606 is coupled to a first NIC / DPU 1626, which is coupled to network 1630. CPU 1606 is also coupled to a second NIC / DPU 1628, which is coupled to network 1630 via switch 1648. NIC / DPU 1626 and NIC / DPU 1628 can be coupled to network 1630 via, for example, Ethernet (ETH), NVLINK, or InfiniBand (IB) connections.
[0195] The computing system 1600 also includes a processing device 1604 employing a multi-GPU architecture. Specifically, the processing device 1604 includes multiple subsystems, including a CPU 1616, a GPU 1618, and a GPU 1620. The CPU 1616 may be coupled to the GPU 1618 via a D2D or C2C interconnect 1622. The CPU 1616 may be coupled to the GPU 1620 via a D2D or C2C interconnect 1624. The CPU 1616 may also be coupled to the GPU 1618 and GPU 1620 via a PCIe interconnect. The CPU 1616 may be coupled to one or more NICs or DPUs, and the NICs or DPUs may be coupled to one or more networks. For example, as... Figure 16 As shown, CPU 1616 is coupled to a first NIC / DPU 1632, which is coupled to network 1636. CPU 1616 is also coupled to a second NIC / DPU 1634, which is coupled to network 1636 via switch 1650. NIC / DPU 1632 and NIC / DPU 1634 can be coupled to network 1636 via Ethernet (ETH), NVLINK, or InfiniBand (IB) connections.
[0196] In at least one embodiment, processing device 1602 and processing device 1604 can communicate with each other via NIC / DPU 1638, for example, via PCIe interconnect. Processing device 1602 and processing device 1604 can also communicate with each other via high-bandwidth communication interconnect 1640, for example, via NVLink interconnect or other high-speed interconnect. Figure 16 The packet switches in the diagram may include, for example, Nvidia Quantum-2 switches. The NIC / DPU in the diagram may include, for example, Nvidia Bluefield DPUs.
[0197] Cooling systems, such as those mentioned above Figure 1 The described system 100 (including a cooling system having a base (such as base 128) having a contact surface (such as contact surface 116) and at least one pressure surface (such as pressure surface 120)) can be used to cool one or more components of system 1600. For example, such a cooling system can be used to cool one or more CPUs 1606 and 1616, one or more GPUs 1608, 1610, 1618 and 1620, an entire superchip containing CPUs 1606 and GPUs 1608 and 1610, and / or an entire superchip containing CPUs 1616 and GPUs 1618 and 1620, and / or any other physically heat-generating components of system 1600.
[0198] Figure 17An example computing environment 1700 according to at least one embodiment of the present disclosure is illustrated, wherein forward pass-off to available memory can be performed according to at least one embodiment. It should be understood that embodiments of the present disclosure can also be used with reference to alternative environments, and specific discussions of components are provided by way of non-limiting examples and may include equivalent components. Furthermore, various features are omitted for clarity and brevity. Additionally, the system and method can be used with a variety of different architectures. Example computing environment 1700 may include server 1702, which can be used to perform HPC workloads such as AI training or machine learning model training. In one embodiment, server 1702 may be an application instance or a compute node. Server 1702 may include CPU 1710 associated with switch 1720 (e.g., a Peripheral Component Interconnect High Speed (PCIe) switch), which can control at least some data transmissions via communication paths interconnecting various components. In one embodiment, CPU 1710 may include a root complex processor.
[0199] PCIe switch 1720 may also be associated with GPU 1730 and DPU 1740, and can transfer data between at least some of CPU 1710, G7PU 130, DPU 1740, and other components. In one embodiment, PCIe switch 1720 may be associated with more than one GPU or more than one DPU. In another embodiment, PCIe switch 1720 may be located inside DPU 1740. PCIe switch 1720 can manage the transfer of at least some data between CPU 1710, GPU 1730, and DPU 1740. In another embodiment, the number of GPUs associated with PCIe switch 1720 may be equal to the number of DPUs associated with PCIe switch 1720. In at least one embodiment, server 1702 may include, but is not limited to, any number of CPU 1710, PCIe switch 1720, and GPU 1730.
[0200] and / or DPU 1740, and in any combination. For example, in at least one embodiment, server 1702 may include 8, 16, 32, and / or more GPUs 1730. In at least one embodiment, interconnection... Figure 17 The communication paths of various components (including but not limited to CPU 1710, PCIe switch 1720, GPU 1730 and DPU 1740) can be implemented using any suitable protocol, such as peripheral component interconnect (PCI) based protocols (e.g. PCIe), or other bus or point-to-point communication interfaces and / or protocols, such as NV-Link high-speed interconnect or interconnect protocols.
[0201] The DPU 1740 may include a network interface controller (NIC) 1742, DDR memory 1744, and a non-volatile memory high-speed (NVMe) device 1746. The NIC 1742 may be able to interface with a network 1704, which may also interface with other NVMe devices available to the DPU 1740 (e.g., via fiber optics). In one embodiment, the DPU 1740 may not include the NVMe device 1746. In another embodiment, the NVMe device 1746 may reside on a server 1702 instead of the DPU 1740. In yet another embodiment, the computing environment 1700 may include more than one NVMe device 1746, such as a first NVMe device in the DPU 1740 and a second NVMe device located on the server 1702 and directly associated with the PCIe switch 1720. In one embodiment, the DPU 1740 may not include the DDR memory 1744 and may include a compute storage service (CSS) to replace or supplement the DDR memory 1744. For example, computing environment 1700 may include DPU compute storage (CS) memory 1706, which is available to DPU 1740 as part of the CSS. Network 1704 may interface with DPU CS memory 1706 via NIC 1742 according to any suitable interface protocol, such as Remote Direct Memory Access over Ethernet (RDMA), InfiniBand, Fibre Channel, etc.
[0202] The total memory available for data storage in the computing environment 1700 can be expanded via DPUs 1740 on the system nodes. DPUs 1740 can access existing memory pools 1750 on the server 1702, such as Double Data Rate (DDR) memory, onboard NVMe devices, NVMe devices via fabric, and CS. Memory pool 1750 may contain at least one of DDR memory 1744, NVMe 1746, and DPU CS memory 1706. DPUs 1740 can also access available memory from other DPUs that are part of pool 1750, and other DPUs can access available memory from DPU 1740, such as pool 1750. This available memory can be accessed and used for data storage without increasing computing resources (e.g., compute nodes), whereas other solutions require additional computing resources. The available pool 1750, accessible to the DPU 1740, can be provided to the server 1702 to expand the total memory available for data storage, for example, to reduce the data storage load on the CPU 1710 or GPU 1730, thereby improving the utilization of their memory for processing. For example, during AI training, model states, residual states, activation functions, and checkpoints can be stored or offloaded to the pool 1750 accessible to the DPU 1740.
[0203] Embodiments of this disclosure may include any suitable materials known in the art (e.g., carbon steel, aluminum, polymers, ceramics, etc.), particularly materials with high thermal conductivity. For example, the components described herein may be manufactured by extrusion and / or machining processes. In such examples, a single body with a fixed cross-sectional area may be produced by an extrusion process.
[0204] Benefiting from the teachings presented in the foregoing description and associated drawings, those skilled in the art will conceive of numerous modifications and other embodiments of the disclosure set forth herein. Although the drawings illustrate only certain components of the apparatuses and systems described herein, it should be understood that various other components (e.g., components of printed circuit boards, transceivers, cables, etc.) may be used in conjunction with the components described herein. Therefore, it should be understood that this disclosure is not limited to the specific embodiments disclosed, and that modifications and other embodiments are intended to be included within the scope of the appended claims.
[0205] It should be understood that any feature described herein may be used in combination with any other feature described herein, regardless of whether such features are derived from the same described embodiment.
[0206] Specific details are provided in this specification to provide a full understanding of the embodiments. However, those skilled in the art will understand that these embodiments can be practiced even without these specific details. In other instances, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail to avoid obscuring the embodiments.
[0207] While exemplary embodiments of the present disclosure have been described in detail herein, it should be understood that the inventive concept may be embodied and used differently in other ways, and the appended claims are intended to be construed as including such variations, except as limited by the prior art.
Claims
1. A cooling system, comprising: A base for supporting a semiconductor package, the base comprising: The first geometry having a contact surface; and At least one second geometry having a pressure surface offset from the contact surface.
2. The cooling system as claimed in claim 1, wherein, The base includes two second geometric structures, each having a pressure surface offset from the contact surface.
3. The cooling system as claimed in claim 1, wherein, The contact surface may be convex or concave.
4. The cooling system as claimed in claim 1, wherein, The pressure surface is parallel to the contact surface.
5. The cooling system as claimed in claim 1, wherein, The pressure surface protrudes and is higher than the contact surface.
6. The cooling system as claimed in claim 1, wherein, The pressure surface may be convex or concave.
7. The cooling system as claimed in claim 1, wherein, The contact surface has a rectangular perimeter.
8. The cooling system as claimed in claim 1, wherein, The pressure surface has a circular perimeter.
9. The cooling system as claimed in claim 1, wherein, The pressure surface has a rectangular perimeter.
10. The cooling system of claim 1, wherein, The pressure surface has a pressure surface area, the contact surface has a contact surface area, and the pressure surface area is between two percent and fifteen percent of the contact surface area.
11. The cooling system of claim 1, wherein, The offset between the pressure surface and the contact surface shall not exceed 100 micrometers.
12. The cooling system of claim 1, wherein, The pressure surface includes a center point equidistant from a point on the perimeter of the contact surface.
13. The cooling system of claim 1, wherein, The contact surface and the pressure surface are covered with a thermal interface material.
14. A cooling system, comprising: Multiple cooling elements; as well as A plate in thermal communication with at least one of the plurality of cooling elements, the plate comprising: Contact surface; as well as The pressure surface is located on the protrusion extending from the contact surface.
15. The cooling system of claim 14, wherein, The pressure surface is at a height less than five percent of the height of the plate above the contact surface.
16. The cooling system of claim 14, wherein, The contact surface has a square geometry, and the pressure surface has a circular geometry.
17. The cooling system of claim 14, further comprising: Semiconductor packages mounted on the board; as well as Thermal interface material located between the semiconductor package and the plate.
18. The cooling system of claim 14, wherein, When the semiconductor package is in use, the pressure applied to the semiconductor package by the pressure surface substantially counteracts the thermomechanical deformation in the semiconductor package.
19. A dual-geometry cooling plate, comprising: The first part has a first geometric structure and a contact surface; as well as The second part has a second geometry and a pressure surface offset from the contact surface. The first part and the second part constitute an integrated cooling plate.
20. The dual-geometry cooling plate as described in claim 19, wherein, The second geometry is produced by milling, wherein the first geometry is a plate with a thickness not exceeding 2000 micrometers, and the second geometry is a cylinder with a height not exceeding 50 micrometers, wherein the second portion extends from the first portion, and wherein the first geometry is different from the second geometry.