A method for bonding large chips of power devices and a fixing device thereof.

Abstract

This application discloses a bonding method and fixing device for large chips in power devices, relating to the field of semiconductor device packaging technology. It solves the problems of unreliable bonding, chip damage, and short-circuit failure caused by insufficient space for the pressure fingers on both sides of the chip during large-size chip packaging. The specific solution includes: providing a lead frame with a chip mounted on it; providing a pad with a limiting groove on its upper surface and a vacuum adsorption hole within the limiting groove; placing the lead frame on the pad, embedding it into the limiting groove, and applying vacuum adsorption force through the vacuum adsorption hole to fix the lead frame; and performing wire bonding on the chip on the lead frame with the pressure fingers removed.

Description

Technical Field

[0001] This application relates to the field of semiconductor device packaging technology, and in particular to a method for bonding large chips of power devices and a fixing device thereof. Background Technology

[0002] Semiconductor chip packaging involves dicing a tested wafer into individual chips, attaching the chips to a lead frame carrier using die bonding material, and then electrically connecting the chips to the lead frame using wire bonding. Finally, the product is packaged through processes such as molding, electroplating, lead trimming, and testing. During bonding, to ensure effective ultrasonic energy transfer and stable soldering, pressure fingers are used to reliably fix the lead frame carrying the chip, preventing displacement or movement under ultrasonic vibration. The conventional approach is to place pressure fingers on the carrier areas on both sides of the chip and on the carrier area below the chip, pressing the frame firmly against the support pads from above, thus achieving complete frame fixation.

[0003] With the popularization of new energy vehicles and the development of intelligent and automated technologies in various industries, the application scope of power devices is expanding, placing higher demands on their voltage and current ratings. To meet the needs of high-power applications, the size of chips bonded to leadframe carriers in the same package form is becoming increasingly larger. When the chip size increases to near the edge of the carrier, the space available for placing bonding fingers on both sides of the chip is extremely limited, or even completely disappears. At this point, traditional bonding methods face the following prominent problems: First, insufficient bonding space leads to unreliable bonding. The inability to place bonding fingers on both sides of the chip or the inability of the bonding fingers to effectively press against the carrier results in the leadframe being in a partially fixed state during bonding, leading to ultrasonic energy transfer loss and the inability to form sufficient covalent connections at the bonding interface, resulting in insufficient bonding strength and failure to meet the requirements for product electrical performance and reliability. Second, bonding fingers being too close to the chip causes chip damage. When bonding fingers are placed in the limited remaining space, the distance between the bonding fingers and the chip edge is extremely close. The pressure and ultrasonic vibration generated by the bonding fingers during bonding may directly act on the chip edge, causing mechanical damage such as cracks or chipping. Third, spillage of the bonding material can lead to electrical failure. The die bonding material itself has a certain degree of fluidity, and during the bonding process of large chips, it is prone to overflowing around the chip under the influence of heat and pressure. When the die bond is too close to the chip, the squeezing action will push the overflowed die bonding material onto the chip surface, forming an unexpected conductive path, which can lead to chip short circuit failure.

[0004] Therefore, in order to address the problem of insufficient space for pin placement in large-size chip packages, there is an urgent need for a method that can ensure reliable fixation of the lead frame and high-quality bonding even when the pins on both sides of the chip are eliminated or reduced. Summary of the Invention

[0005] This application provides a bonding method and fixing device for large chips of power devices, which can solve the problems of unreliable bonding, chip damage and short circuit failure caused by insufficient space for placing the pressure fingers on both sides of the chip during large-size chip packaging.

[0006] To achieve the above objectives, this application adopts the following technical solution: A first aspect of this application provides a method for bonding large chips of power devices, the method comprising: A lead frame is provided, on which a chip is mounted; A pad is provided, wherein a limiting groove is formed on the upper surface of the pad, and a vacuum adsorption hole is formed in the limiting groove; The lead frame is placed on the pad, so that the lead frame is embedded in the limiting slot, and a vacuum adsorption force is applied to the lead frame through the vacuum adsorption hole to fix the lead frame. With the pressure fingers on both sides of the chip removed, the chip on the lead frame is wire bonded.

[0007] As one possible implementation, the shape of the limiting slot is adapted to the outer contour of the lead frame to limit the displacement of the lead frame in the horizontal direction.

[0008] As one possible implementation, there are multiple vacuum adsorption holes distributed on the bottom surface of the limiting slot.

[0009] As one possible implementation, the wire bonding is ultrasonic cold welding, and the wire used is aluminum wire or aluminum strip.

[0010] As one possible implementation, after wire bonding of the chips on the lead frame, the method further includes: performing tensile testing and crater testing on the bonded wires.

[0011] A second aspect of this application provides a fixing device for bonding large chips of power devices, applied to the method described in the first aspect of this application, characterized in that the fixing device comprises: The pad body has a limiting groove on its upper surface, which is used to accommodate and limit the displacement of the lead frame. A vacuum adsorption hole is formed on the bottom surface of the limiting slot and is used to connect an external vacuum source to apply an adsorption force to the lead frame.

[0012] As one possible implementation, the depth of the limiting slot is matched with the thickness of the lead frame.

[0013] As one possible implementation, the fixing device is only configured with pressure fingers located below the chip carrier at the bonding station, with no pressure fingers configured on the sides of the chip.

[0014] In a third aspect of this application, a semiconductor power device is provided, which is fabricated using a large-chip bonding method for power devices as described in the first aspect of this application.

[0015] The beneficial effects of the technical solutions provided in this application include at least the following: The method for bonding large chips for power devices provided in this application includes: providing a lead frame on which a chip is mounted; providing a pad with a limiting groove on its upper surface and a vacuum adsorption hole within the limiting groove; placing the lead frame on the pad so that it is embedded in the limiting groove, and applying a vacuum adsorption force to the lead frame through the vacuum adsorption hole to fix it; and performing wire bonding on the chip on the lead frame with the pressure fingers on both sides of the chip removed.

[0016] This application replaces the traditional method of fixing the chip by pressing it from above with pressure fingers on both sides by setting limiting slots and vacuum adsorption holes on the pad. This allows the lead frame to be fitted and positioned from the bottom and subjected to vacuum adsorption force, even when large chips occupy space on both sides of the carrier and pressure fingers cannot be configured. It still provides a stable and reliable frame fixation for ultrasonic bonding, ensuring effective transfer of ultrasonic energy and enabling sufficient metal covalent bonding at the bonding interface. This significantly improves bonding strength and consistency, guaranteeing long-term reliable operation of the product under high voltage and high current conditions.

[0017] In addition, this application removes the pressure fingers on both sides of the chip during actual bonding operations, completely eliminating the problem of the pressure fingers being too close to the chip edge caused by the forced placement of pressure fingers due to space constraints. It physically eliminates the possibility of pressure fingers and ultrasonic vibrations acting directly or indirectly on the chip edge, effectively avoiding mechanical damage such as chip cracks and edge chipping, and improving the packaging yield and finished product quality.

[0018] Meanwhile, since the pressure fingers on both sides of the chip are eliminated, no external pressure is applied to the overflowing die-attach material during the bonding process. This eliminates the risk of the die-attach material overlapping onto the chip surface after being squeezed, forming an unexpected conductive path. This fundamentally solves the problem of electrical short-circuit failure caused by the overflow of solder wire or other die-attach material in large chip packaging, ensuring the electrical performance safety of the device.

[0019] Furthermore, this application only requires structural modifications to the existing pad, adding a limiting slot and vacuum adsorption hole, and removing the pressure fingers on both sides of the chip. No major alterations to the bonding equipment are needed, resulting in extremely low implementation costs. The modified pad structure is compatible with existing equipment interfaces and can be quickly deployed on the production line, demonstrating high engineering practicality and economic efficiency. Attached Figure Description

[0020] Figure 1 A flowchart of a method for bonding large chips of power devices provided in this application embodiment; Figure 2 This is a schematic diagram of a pad provided in an embodiment of this application. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0022] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0023] In addition, the use of “based on” or “according to” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” or “according to” one or more conditions or values ​​can in practice be based on additional conditions or values ​​beyond those conditions.

[0024] This application provides a method for bonding large chips of power devices, such as... Figure 1 As shown, the method includes the following steps: Step 101: Provide a lead frame, on which a chip is mounted; Step 102: Provide a pad, wherein a limiting groove is formed on the upper surface of the pad, and a vacuum adsorption hole is formed in the limiting groove; Step 103: Place the lead frame on the pad, so that the lead frame is embedded in the limiting slot, and apply vacuum adsorption force to the lead frame through the vacuum adsorption hole to fix the lead frame. Step 104: With the pressure fingers on both sides of the chip removed, perform wire bonding on the chip on the lead frame.

[0025] This application provides a method for bonding large chips for power devices, which includes a lead frame on which chips are mounted using a die-attach material, such as solder paste, die-attach adhesive, or flexible solder. Figure 2 As shown, a modified pad is provided. The upper surface of the pad has a limiting slot, and multiple vacuum adsorption holes are formed within the limiting slot. A lead frame is placed on the pad, allowing its outer contour to fall into and embed into the limiting slot. The sidewalls of the limiting slot provide a horizontal physical constraint on the lead frame. Simultaneously, an external vacuum source is connected through the vacuum adsorption holes, applying a downward vacuum adsorption force to the bottom surface of the lead frame, firmly adsorbing it vertically onto the pad surface. During bonding operations, all pressure fingers located on both sides above the chip are removed, leaving only the pressure fingers below the chip carrier or other areas that do not obstruct the operation. With the lead frame fixed solely by the limiting slot and vacuum adsorption force, wire bonding is performed on the chip on the lead frame.

[0026] This application replaces the traditional method of fixing the chip by pressing it from above using a limiting groove at the bottom of the pad in conjunction with vacuum adsorption. Even when a large chip almost completely fills the carrier surface space, leaving no room for pressing fingers on either side, this application still provides a stable and reliable framework for bonding through bottom positioning and adsorption, thus achieving high-quality bonding without side pressure. It completely solves the problem of reliably fixing large chips due to the lack of space for pressing fingers on the sides; eliminates the risk of pressure damage caused by the pressing fingers being too close to the chip; avoids short circuits caused by die material overflowing and overlapping the chip due to compression; and the method itself requires minimal modification to existing bonding equipment, demonstrating outstanding engineering feasibility and economic efficiency.

[0027] Optionally, the shape of the limiting slot is adapted to the outer contour of the lead frame to limit the displacement of the lead frame in the horizontal direction.

[0028] The shape of the limiting slot is adapted to the outer contour of the lead frame, meaning the planar contour of the slot is basically consistent with the bottom contour of the lead frame, with a necessary fitting clearance between them. This ensures that the lead frame can be smoothly inserted and removed, while also limiting the horizontal displacement of the lead frame within allowable tolerances after insertion. This adaptation can be achieved by designing corresponding pads for different lead frame models, or by setting an adjustable limiting structure on a universal pad.

[0029] This application, through precise contour fitting, can effectively suppress the horizontal swaying of the lead frame under ultrasonic vibration without relying on the pressure finger, thereby improving bonding positioning accuracy and ensuring the consistency of bonding point positions and the stability of bonding quality.

[0030] Optionally, there are multiple vacuum adsorption holes distributed on the bottom surface of the limiting slot.

[0031] Multiple adsorption pores can be arranged in an array, ring, or symmetrical pattern on the bottom surface of the slot, covering the main stress area of ​​the lead frame carrier to ensure uniform adsorption force distribution. The pore diameter and spacing of each adsorption pore can be optimized according to the size, weight, and required adsorption force for bonding of the lead frame. The adsorption pores are connected to an external vacuum generator through an internal air channel or a bottom interface, and the vacuum level can be adjusted online.

[0032] This application employs multiple distributed adsorption pores to provide a uniform adsorption force field, preventing uneven local stress on the lead frame that could lead to warping or adsorption failure. This ensures that the frame remains in a tight, flat, and fixed state throughout the entire bonding cycle, providing a stable foundation for ultrasonic bonding of large areas with multiple solder joints.

[0033] Optionally, the wire bonding is ultrasonic cold welding, and the wire used is aluminum wire or aluminum strip.

[0034] Wire bonding employs ultrasonic cold welding, using aluminum wire or aluminum strip. Ultrasonic cold welding involves pressing the aluminum wire or strip onto the metal layer on the chip surface. Under predetermined pressure and specific frequency of ultrasonic vibration, the aluminum wire softens and diffuses with the metal atoms on the chip surface, forming a covalent bond. Aluminum wire and aluminum strip are the most commonly used bonding wires in power device packaging, offering advantages such as good conductivity, low cost, and mature technology. This solution is also applicable to other bonding wires such as copper wire, gold wire, and aluminum-clad copper wire. The width and thickness of the aluminum strip can be selected according to the current carrying capacity requirements.

[0035] This application can be directly implemented under the existing mainstream ultrasonic cold welding process without the need to develop new bonding technologies. It is compatible with the current production line's process equipment and parameter system, making it easy to promote and apply quickly.

[0036] Optionally, after wire bonding of the chips on the lead frame, the method further includes: performing tensile testing and crater testing on the bonded wires.

[0037] After wire bonding of the chips onto the leadframe, the process includes tensile testing and crater testing of the bonded wires. Tensile testing involves applying a specified tensile force to each bonded wire and determining the bond strength based on the force value and failure mode. Crater testing involves completely peeling the bonded wires from the chip pads and observing the peeling condition of the metal layer on the chip surface under a high-powered microscope to check for excessive peeling of the metal layer or damage to the chip itself.

[0038] These two inspection steps can be performed during first article verification or as an online process for full inspection of each product. By setting the ALC Pull Test inspection mode of the bonding equipment to Always, automated online tensile testing can be achieved.

[0039] By introducing a systematic testing and verification process, defective products with insufficient bonding strength or chip surface damage can be effectively screened out, ensuring the bonding reliability and chip integrity of each device leaving the factory, and meeting the quality requirements of high-reliability applications such as automotive-grade devices.

[0040] This application also provides a fixing device for bonding large chips of power devices, applied to the bonding method for large chips of power devices described in this application. The fixing device includes: The pad body has a limiting groove on its upper surface, which is used to accommodate and limit the displacement of the lead frame. A vacuum adsorption hole is formed on the bottom surface of the limiting slot and is used to connect an external vacuum source to apply an adsorption force to the lead frame.

[0041] The pad body has a limiting groove on its upper surface, the contour of which matches the outer contour of the lead frame to accommodate the lead frame and limit its horizontal displacement. It also has a vacuum adsorption hole on the bottom surface of the limiting groove, which is connected to an external vacuum source via an internal air channel or a bottom interface to apply a downward vacuum adsorption force to the bottom surface of the lead frame during bonding. This fixing device, as a standalone replaceable fixture, can directly replace the conventional flat pad on existing bonding equipment. During installation, a blank lead frame can be used for positioning and calibration.

[0042] In one embodiment, the depth of the limiting slot matches the thickness of the lead frame.

[0043] In one embodiment, the fixing device is only configured with pressure fingers located below the chip carrier at the bonding station, and no pressure fingers are configured in the upper two sides of the chip.

[0044] In one embodiment, there are multiple vacuum adsorption holes distributed on the bottom surface of the limiting slot.

[0045] In one embodiment, the wire bonding is ultrasonic cold welding, and the wire used is aluminum wire or aluminum strip.

[0046] This application also provides a semiconductor power device, which is fabricated using a large-chip bonding method for power devices as described in this application.

[0047] This semiconductor power device includes a lead frame, a large-size chip mounted on the lead frame, and bonding wires connected by a wire bonding process after removing the pressure fingers on both sides of the chip. The device can be various semiconductor power devices such as MOSFETs, IGBTs, and silicon carbide power modules, and its package type can be 263-2L / 3L, 220FB, 263-6L / 7L, 263LV, 263US, TO-247, TO-264, power modules, and other package types requiring large chip packaging.

[0048] Semiconductor power devices prepared using this method have high bonding strength, no chip edge damage, and no short-circuit defects in the die-attached material. They can carry higher voltage and current levels and are particularly suitable for applications with stringent requirements for power device reliability and high current capability, such as new energy vehicles, industrial drives, and smart grids.

[0049] This embodiment provides a method for bonding ultra-large chips for power device products. This method addresses the problems of unreliable bonding, chip damage, and short-circuit failure caused by insufficient space on both sides of the chip during large-size chip packaging by modifying the support pad structure in the bonding equipment and adjusting the finger configuration. The specific implementation steps of this embodiment are as follows: Step 1: Design a new pad based on the lead frame structure.

[0050] Based on the specific structural dimensions of the lead frame used in the product to be packaged, design a new pad to fit it. For example... Figure 2 As shown, the main structure of the new pad is a planar support body with a limiting groove on its upper surface. The contour of the limiting groove matches the outer contour of the lead frame, allowing the lead frame to fit precisely into the limiting groove, thus restricting the horizontal movement of the lead frame. Multiple vacuum adsorption holes are also provided on the bottom surface of the limiting groove, distributed directly below the lead frame carrier, to apply a downward vacuum adsorption force to the lead frame during bonding. The depth of the limiting groove matches the thickness of the lead frame to ensure that the upper surface of the lead frame is approximately flush with the upper surface of the pad after insertion, or set at a predetermined height difference, facilitating subsequent bonding operations.

[0051] Step 2: Communicate with the fixture manufacturer to discuss the feasibility of producing the new pad block and complete the pad block manufacturing.

[0052] The design scheme completed in Step 1 is communicated with the fixture manufacturer to confirm the feasibility of the manufacturing process and clarify the detailed control requirements for key dimensional tolerances, surface roughness, and the diameter and positional accuracy of the vacuum adsorption holes during production. Based on the final confirmed drawings and process requirements, the fixture manufacturer manufactures the new pads through machining and other methods.

[0053] Step 3: Install the pad and adjust the pressure finger.

[0054] Remove the existing standard pads from the bonding equipment. Using an empty lead frame (i.e., a frame without a chip attached) as a positioning reference, accurately determine the installation position of the new pads, and then fix the new pads onto the bonding station of the bonding equipment. Simultaneously, adjust the finger configuration: based on the original finger configuration, remove all fingerings located in the carrier areas on both sides of the chip. Only retain fingerings below the chip carrier or other areas that do not obstruct the large chip area, as needed. The adjusted finger configuration no longer applies pressure to the carrier areas on both sides of the chip.

[0055] Step 4: Use an empty frame to verify the effect of the pad block and set process parameters.

[0056] Set up the wire bonding program for the bonding equipment. After creating the program, select "Always" for the ALC Pull Test mode. This enables online pull testing of all bonded wires, ensuring that each product undergoes wire clamp pull testing after processing. After program setup, first perform an automatic wire bonding test using an empty lead frame. After the first frame is wire bonded, collect push and pull test data. Once both push and pull data meet the preset pass criteria and the bonding pattern is normal, process at least one more box using an empty frame, monitoring the entire wire bonding process for any bonding failures or other abnormalities. This step aims to verify whether the new pad's limiting slots and vacuum suction force can provide sufficient stability for the lead frame, ensuring that the frame will not shift or wobble, affecting bonding quality, even after removing the pressure fingers on both sides of the chip.

[0057] Step 5: Perform final verification using the actual product.

[0058] The wire bonding program is set up using a leadframe product with a chip mounted on it. The ALC Pull Test mode is set to "Always," and the online pull test function is enabled. After setup, automatic wire bonding is performed using the actual product. After the first leadframe is bonded, push and pull test data are collected, and a crater test is performed on the bonding points to evaluate the connection quality of the bonding interface and whether there is any damage to the chip surface metal layer. Once the push, pull, and crater test results all meet the preset acceptance criteria, the actual product is continuously processed for several days. The entire wire bonding process is monitored under continuous production conditions to confirm no bonding failures, no chip damage, no spillage of die material, and no other abnormalities. After successful continuous production verification, this solution is officially put into mass production.

[0059] In this embodiment, the wire bonding employs ultrasonic cold welding. The bonding wires used are aluminum wires or aluminum strips, and the chip surface metal layer is a metal material that can form covalent bonds with aluminum. The die-attachment material used can be solder paste, die-attachment adhesive, or soft solder, etc. The vacuum adsorption port is connected to an external vacuum generator through a pipe, and the magnitude of the vacuum adsorption force can be adjusted according to the size, weight, and bonding parameters of the lead frame.

[0060] It should be noted that the distribution, number, and aperture of the aforementioned vacuum adsorption holes, the specific shape and size of the limiting slot, and the specific configuration of the pressure fingers can all be adjusted according to the actual lead frame and chip size used. Such adaptive adjustments should all fall within the protection scope of this invention.

[0061] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0062] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for bonding large chips of power devices, characterized in that, The method includes: A lead frame is provided, on which a chip is mounted; A pad is provided, wherein a limiting groove is formed on the upper surface of the pad, and a vacuum adsorption hole is formed in the limiting groove; The lead frame is placed on the pad, so that the lead frame is embedded in the limiting slot, and a vacuum adsorption force is applied to the lead frame through the vacuum adsorption hole to fix the lead frame. With the pressure fingers on both sides of the chip removed, wire bonding is performed on the chip on the lead frame.

2. The method according to claim 1, characterized in that, The shape of the limiting slot is adapted to the outer contour of the lead frame to limit the displacement of the lead frame in the horizontal direction.

3. The method according to claim 1, characterized in that, The vacuum adsorption holes are multiple and distributed on the bottom surface of the limiting slot.

4. The method according to claim 1, characterized in that, The wire bonding is ultrasonic cold welding, and the wire used is aluminum wire or aluminum strip.

5. The method according to claim 1, characterized in that, After wire bonding of the chips on the lead frame, the method further includes: performing tensile testing and crater testing on the bonded wires.

6. A fixing device for bonding large chips of power devices, applied to the bonding method for large chips of power devices according to any one of claims 1 to 5, characterized in that, The fixing device includes: The pad body has a limiting groove on its upper surface, which is used to accommodate and limit the displacement of the lead frame. A vacuum adsorption hole is formed on the bottom surface of the limiting slot and is used to connect an external vacuum source to apply an adsorption force to the lead frame.

7. The fixing device according to claim 6, characterized in that, The depth of the limiting slot matches the thickness of the lead frame.

8. The fixing device according to claim 6, characterized in that, The fixing device is only equipped with pressure fingers located below the chip carrier at the bonding station, and there are no pressure fingers configured in the upper two sides of the chip.

9. A semiconductor power device, characterized in that, The semiconductor power device is prepared using a large-chip bonding method for power devices as described in any one of claims 1-5.

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