Calibration method, system, device, storage medium and program for wafer bonding alignment deviation measuring machine

By using calibration wafers with the same characteristics as the product wafers and calibration marks on the same process layer, the problem of insufficient calibration depth in the prior art is solved, enabling rapid, reliable and comprehensive calibration of the wafer bonding alignment deviation measurement machine, thus improving measurement accuracy and efficiency.

CN122497413APending Publication Date: 2026-07-31SWAYSURE TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SWAYSURE TECHNOLOGY CO LTD
Filing Date
2026-05-25
Publication Date
2026-07-31

AI Technical Summary

Technical Problem

Existing wafer bonding alignment deviation measurement equipment cannot simulate the complex structure and material properties of product wafers when using standard calibration pieces, resulting in insufficient calibration depth and affecting measurement accuracy; while TEM destructive analysis has a long cycle, low efficiency and high cost, and cannot fully verify the performance of the equipment.

Method used

A calibration wafer with the same characteristics as the bonding product wafer is used, a calibration mark with a known reference value is set, and first and second patterned parts are formed on the same process layer. By measuring and analyzing the deviation between the reference value and the measured value, the machine abnormality is identified and calibration is performed.

Benefits of technology

It improves the reliability and accuracy of calibration results, shortens calibration time and cost, supports multi-dimensional diagnosis and optimization, and achieves fast and reliable in-depth calibration.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application belongs to the field of semiconductor technology, specifically relating to a calibration method, system, device, storage medium, and program for a wafer bonding alignment deviation measurement instrument. The method includes: providing a calibration chip with at least one calibration mark; the calibration mark includes a first pattern portion and a second pattern portion, the first and second pattern portions being formed on the same process layer of the calibration chip; measuring the at least one calibration mark using a wafer bonding alignment deviation measurement instrument to obtain an image of the calibration mark and a measured value between the first and second pattern portions of the calibration mark; analyzing the reference value and measured value and / or image of the calibration mark to determine abnormal results of the wafer bonding alignment deviation measurement instrument. This application improves calibration accuracy while shortening calibration time, reducing calibration costs, and supporting multi-dimensional diagnostics of instrument performance, thereby achieving rapid, reliable, and comprehensive deep calibration of the wafer bonding alignment deviation measurement instrument for bonding offset.
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Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, specifically relating to calibration methods, systems, equipment, storage media, and programs for wafer bonding alignment deviation measurement equipment. Background Technology

[0002] With the development of 3D chip stacking technology, alignment accuracy in wafer bonding processes is crucial to chip performance and yield. Bonding offset measurement equipment is a key device for measuring the alignment deviation between two wafers to be bonded. Its measurement accuracy directly affects product quality, therefore, regular calibration is necessary.

[0003] Currently, during the installation or routine maintenance of wafer bonding alignment deviation measurement equipment, standard calibration discs provided by the equipment manufacturer are typically used for calibration to meet the verification requirements of the equipment's basic performance.

[0004] However, there are significant differences between product wafers and standard calibration wafers used in actual production. Standard calibration wafers are characterized by a simple structure and idealized materials, such as uniform silicon layer thickness, no doping, and a smooth bonding interface, which facilitates light transmission and imaging. In contrast, product wafers have a thicker silicon layer, a higher doping concentration, and complex bonding interface morphology. These differences severely interfere with light transmission, resulting in a narrower measurement window and reduced measurement accuracy for wafer bonding alignment deviation measurement equipment on the product wafer. Therefore, using only standard calibration wafers cannot meet the in-depth calibration requirements for specific products.

[0005] It is evident that how to perform rapid, reliable, and comprehensive in-depth calibration of bonding offset wafer bonding alignment deviation measurement equipment is a problem that urgently needs to be solved. Summary of the Invention

[0006] The calibration method, system, equipment, storage medium, and program for the wafer bonding alignment deviation measurement machine provided in this application not only improve calibration accuracy but also shorten calibration time, reduce calibration costs, and support multi-dimensional diagnosis and optimization of machine performance, thereby enabling rapid, reliable, and comprehensive in-depth calibration of the wafer bonding alignment deviation measurement machine for measuring bonding offset.

[0007] In a first aspect, this application provides a calibration method for a wafer bonding alignment deviation measurement machine. The method includes: providing a calibration piece having at least one calibration mark; wherein the calibration piece is a bonding product wafer or a complementary wafer with the same characteristics as the bonding product wafer; the calibration mark includes a first pattern portion and a second pattern portion, the first and second pattern portions being formed on the same process layer of the calibration piece, the second pattern portion being located around the first pattern portion, and the design between the first and second pattern portions having a known reference value, the reference value including a reference offset and a reference spacing; measuring the at least one calibration mark using the wafer bonding alignment deviation measurement machine to obtain an image of the calibration mark and a measurement value between the first and second pattern portions of the calibration mark, the measurement value including a measurement offset and a measurement spacing value; analyzing the reference value and the measurement value and / or image of the calibration mark to determine abnormal results of the wafer bonding alignment deviation measurement machine, and calibrating the wafer bonding alignment deviation measurement machine according to the abnormal results.

[0008] Optionally, providing a calibration piece with at least one calibration mark includes: setting an offset calibration mark on the calibration piece; analyzing the reference value and measured value of the calibration mark to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrating the wafer bonding alignment deviation measurement machine according to the abnormal results, including: comparing the reference offset and the measured offset of the offset calibration mark to obtain an offset difference; comparing the offset difference with a preset offset threshold; if the offset difference is within the preset offset threshold, no calibration is required; otherwise, the offset measurement accuracy of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0009] Optionally, providing a calibration sheet with at least one calibration mark includes: the calibration sheet having multiple linear calibration marks having the same graphic structure; wherein the reference offsets corresponding to the multiple linear calibration marks change in a stepwise manner according to a preset step size; analyzing the reference offsets and measurement offsets of the calibration marks to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrating the wafer bonding alignment deviation measurement machine according to the abnormal results includes: linearly fitting the multiple measurement offsets obtained by the wafer bonding alignment deviation measurement machine from the multiple linear calibration marks to the corresponding multiple reference offsets, and calculating the linearity index; if the linearity index meets the preset linearity condition, no calibration is required; otherwise, the linearity of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0010] Optionally, providing a calibration sheet with at least one calibration mark includes: a light path perpendicularity calibration mark is provided on the calibration sheet; wherein the first graphic portion and the second graphic portion of the light path perpendicularity calibration mark are formed of different materials, and / or the light path perpendicularity calibration mark has a graphic composed of dense lines and alternating spacing; analyzing the image of the calibration mark to determine the abnormal result of the wafer bonding alignment deviation measurement machine, and calibrating the wafer bonding alignment deviation measurement machine according to the abnormal result includes: obtaining the first edge contrast corresponding to the first graphic portion and the second edge contrast corresponding to the second graphic portion based on the image captured by the wafer bonding alignment deviation measurement machine of the light path perpendicularity calibration mark; comparing the first edge contrast and the second edge contrast with a preset edge contrast respectively; if both the first edge contrast and the second edge contrast are higher than the preset edge contrast, no calibration is required; otherwise, the light path perpendicularity of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0011] Optionally, providing a calibration piece with at least one calibration mark includes: setting an algorithm calibration mark on the calibration piece; the spacing between the first graphic portion and the second graphic portion of the algorithm calibration mark is unequal in the X direction and has a known reference spacing, and / or the spacing between the first graphic portion and the second graphic portion is unequal in the Y direction and has a known reference spacing; analyzing the reference value of the calibration mark and the measured value to determine the abnormal result of the wafer bonding alignment deviation measurement machine, and calibrating the wafer bonding alignment deviation measurement machine according to the abnormal result includes: calculating the algorithm deviation between the measured spacing of the algorithm calibration mark and the reference spacing; wherein, the measured spacing is obtained by processing the image of the algorithm calibration mark by the image detection algorithm of the wafer bonding alignment deviation measurement machine; comparing the algorithm deviation with a preset algorithm threshold, if the algorithm deviation is within the preset algorithm threshold, then no calibration is required; otherwise, the image detection algorithm of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0012] Optionally, the calibration wafer is formed by bonding a bottom wafer and a top wafer, and the calibration mark is located in the bottom wafer or the top wafer.

[0013] Optionally, the first graphic part has a first center point, and the second graphic part has a second center point; the reference offset and measurement offset of the calibration mark are the coordinate differences between the first center point and the second center point in the design mode and the measurement mode, respectively.

[0014] Secondly, this application provides a calibration system for a wafer bonding alignment deviation measurement machine. The calibration system includes: a data acquisition module, used to acquire a reference value of at least one calibration mark on a calibration wafer, and to acquire an image and measurement value of the calibration mark obtained after the wafer bonding alignment deviation measurement machine measures the at least one calibration mark; wherein, the calibration wafer is a product wafer or a complementary wafer with the same characteristics as the product wafer; the calibration mark includes a first graphic portion and a second graphic portion, the second graphic portion being located around the first graphic portion, and the first graphic portion and the second graphic portion being formed on the calibration wafer. On the same process layer, and the design between the first patterned portion and the second patterned portion has a known reference value, the reference value including reference offset and reference spacing; the measured value is the measurement value between the first patterned portion and the second patterned portion measured by the wafer bonding alignment deviation measurement machine, the measured value including measurement offset and measurement spacing value; an anomaly determination module, connected to the data acquisition module, is used to analyze the reference value and measured value and / or image of the calibration mark, determine the anomaly result of the wafer bonding alignment deviation measurement machine, and calibrate the wafer bonding alignment deviation measurement machine according to the anomaly result.

[0015] Thirdly, this application provides an electronic device, including: one or more processors; and a storage device for storing one or more programs, which, when executed by the one or more processors, cause the electronic device to implement the above-described calibration method for a wafer bonding alignment deviation measuring machine.

[0016] Fourthly, this application provides a computer storage medium storing a computer program / instruction, which, when executed by a processor, provides the calibration method for the aforementioned wafer bonding alignment deviation measuring machine.

[0017] Fifthly, this application provides a computer program, including computer program / instructions, which, when executed by a processor, implements the calibration method of the wafer bonding alignment deviation measuring machine.

[0018] The calibration method for the wafer bonding alignment deviation measuring machine provided in this application has at least the following beneficial effects:

[0019] (1) This application uses bonded product wafers or complementary wafers with the same characteristics as calibration wafers as calibration wafers, and makes calibration marks with known reference values ​​on the calibration wafers, so that the calibration conditions are highly consistent with the actual production conditions, overcoming the problem of insufficient calibration depth of traditional standard calibration wafers, thereby improving the reliability and accuracy of calibration results in actual product measurement.

[0020] (2) By forming the first and second graphic portions of the calibration mark on the same process layer of the calibration sheet, the reference value between the first and second graphic portions can be obtained accurately by photolithography without relying on destructive analysis to obtain the true value. This not only greatly shortens the calibration cycle, but also makes the calibration sheet reusable and non-destructive, thus improving calibration efficiency and operability.

[0021] (3) During the measurement process, this application simultaneously acquires the image of the calibration mark and the measurement value between the first graphic part and the second graphic part. By comprehensively analyzing the deviation between the reference value and the measured value, as well as multi-dimensional information such as image quality, it can identify a variety of abnormalities that may exist in the wafer bonding alignment deviation measurement machine, thereby improving the comprehensiveness of the calibration. Attached Figure Description

[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0023] Figure 1 The diagram shows a calibration schematic of a wafer bonding alignment deviation measurement machine for related technologies.

[0024] Figure 2 The diagram shown is a schematic flowchart of a calibration method for a wafer bonding alignment deviation measuring machine provided in an embodiment of this application.

[0025] Figure 3 The diagram shown is a schematic diagram of a calibration chip with calibration marks set on it according to an embodiment of this application.

[0026] Figure 4 The diagram shown is a schematic diagram of a calibration mark provided in an embodiment of this application.

[0027] Figure 5 The following is an embodiment of this application. Figure 1 A flowchart illustrating the first implementation of step S300.

[0028] Figure 6 The following is an embodiment of this application. Figure 1 A flowchart illustrating the second implementation of step S300.

[0029] Figure 7 The diagram shown is a schematic diagram of a plurality of linear calibration marks provided in an embodiment of this application.

[0030] Figure 8 The following is an embodiment of this application. Figure 1A flowchart illustrating the third implementation of step S300.

[0031] Figure 9 The diagram shown is a schematic diagram of a shadow area under oblique illumination and a schematic diagram of optical path perpendicularity calibration marks provided in an embodiment of this application.

[0032] Figure 10 The following is an embodiment of this application. Figure 1 A flowchart illustrating the fourth implementation of step S300.

[0033] Figure 11 The diagram shown is a schematic diagram of an algorithm calibration mark provided in an embodiment of this application.

[0034] Figure 12 The diagram shown is a flowchart illustrating the serial execution of multiple exception determinations provided in an embodiment of this application.

[0035] Figure 13 The diagram shown is a flowchart illustrating the parallel execution of multiple exception determinations according to an embodiment of this application.

[0036] Figure 14 The diagram shown is a structural schematic of a calibration system for a wafer bonding alignment deviation measuring machine provided in an embodiment of this application.

[0037] Figure 15 The diagram shown is a structural schematic of a computer system for an electronic device provided in an embodiment of this application.

[0038] Explanation of reference numerals in the attached figures: TW, top wafer; BW, bottom wafer; M, calibration mark; M1, first pattern section; M2, second pattern section; C1, first center point; C2, second center point. Detailed Implementation

[0039] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0040] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0041] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0042] With the development of 3D chip stacking technology, the alignment accuracy in wafer bonding processes directly affects the electrical performance, reliability, and production yield of chips. Wafer bonding alignment deviation measurement equipment is a key device for measuring the alignment deviation between two wafers to be bonded; its measurement accuracy is crucial and requires regular calibration.

[0043] Currently, image-based measurement methods are used for calibrating measurement equipment. Specifically, wafer bonding alignment deviation measurement equipment uses an optical system to acquire images of alignment marks on the top and bottom wafers, either separately or simultaneously. Image processing algorithms are then used to calculate the relative positional offset between the two marks, thus obtaining the bonding offset. For example... Figure 1 As shown in Figure A, the top wafer TW and the bottom wafer BW are bonded together via a bonding interface. A first patterning section M1 is provided on the top wafer, and a second patterning section M2 is provided on the bottom wafer. The light emitted by the wafer bonding alignment deviation measurement instrument must penetrate at least one wafer layer to simultaneously acquire images of both layers of markings.

[0044] During the installation or routine maintenance of wafer bonding alignment deviation measurement equipment, standard calibration pieces provided by the equipment manufacturer are typically used for calibration. These standard calibration pieces have an idealized structure: uniform silicon layer thickness, no doping, a smooth bonding interface, and simple alignment marks. Using these standard calibration pieces allows the wafer bonding alignment deviation measurement equipment to obtain clear images of the marks, thus enabling rapid verification of basic performance.

[0045] However, there are significant differences between bonded product wafers in actual production and standard calibration wafers: the product wafers have a thicker silicon layer, a higher doping concentration, and a complex bonding interface morphology. These differences severely interfere with light transmission, resulting in blurred edges and reduced contrast in the marked image, such as... Figure 1 As shown in B, the wafer bonding alignment deviation measurement machine calibrated using the standard calibration piece often exhibits significant deviations when measuring actual bonded product wafers, indicating an insufficient calibration depth using the standard calibration piece.

[0046] In order to obtain the true bonding offset value of the bonding product wafer, the inventors of this application have discovered that a destructive analysis can be performed using a transmission electron microscope (TEM). This involves cutting a small sample from the bonding product wafer, thinning it with a focused ion beam (FBI), and then observing it under a TEM. The actual positional deviation of the metal marks in the upper and lower wafers can be directly measured, and this can be used as a benchmark to calibrate the wafer bonding alignment deviation measurement equipment. Although this method can obtain the true value, it has the following drawbacks: (1) The TEM sample preparation and measurement cycle takes several days, which cannot meet the rapid calibration requirements of the production line; (2) The sample preparation process damages the wafer, and the measured wafer cannot be reused or used for secondary verification; (3) TEM can only provide the true value of the offset at individual positions and cannot evaluate the comprehensive performance of the wafer bonding alignment deviation measurement equipment, such as the optical path perpendicularity, measurement linearity, and robustness of the image detection algorithm.

[0047] Therefore, the existing calibration scheme for bonding alignment deviation measurement equipment has the following problems: (1) Using standard calibration pieces for calibration cannot simulate the complex structure and material properties of the product wafer, resulting in insufficient calibration depth and difficulty in ensuring the accuracy of actual measurements; (2) TEM destructive analysis is time-consuming, inefficient, costly, and cannot fully verify the performance of the instrument's optical path, linearity, algorithm, etc. To address the aforementioned problems, this application provides a calibration method for a wafer bonding alignment deviation measurement machine, specifically including the following embodiments: Figure 2 The diagram shown is a schematic flowchart of a calibration method for a wafer bonding alignment deviation measuring machine provided in an embodiment of this application; as follows: Figure 2 As shown, the calibration method in this embodiment specifically includes the following steps: Step S100: Provide a calibration piece having at least one calibration mark; the calibration mark includes a first graphic portion and a second graphic portion, the first graphic portion and the second graphic portion are formed on the same process layer of the calibration piece, the second graphic portion is located around the first graphic portion, and the design between the first graphic portion and the second graphic portion has a known reference value.

[0048] It should be noted that the calibration wafer in this embodiment is formed by bonding a bottom wafer and a top wafer. It can be a bonded product wafer in actual production, or a specially made auxiliary wafer with the same characteristics as the bonded product wafer. The purpose of using a bonded product wafer or auxiliary wafer here is to make the calibration environment as close as possible to the real production scenario, thereby avoiding the problem of insufficient calibration depth caused by using an idealized standard wafer.

[0049] In this embodiment, at least one calibration mark M is provided on the calibration chip. This calibration mark M can be located on the top wafer TW of the calibration chip, such as... Figure 3As shown in 3A; the calibration mark M can also be set on the bottom wafer BW of the calibration chip, such as... Figure 3 As shown in 3B; wherein, the calibration mark M has the following structural features: (1) Having a first graphic portion M1 and a second graphic portion M2: The calibration mark includes two mutually referential first graphic portions M1 and second graphic portions M2, and the second graphic portion M2 is located around the first graphic portion M1; the reference pattern of the calibration mark is as follows Figure 4 As shown, Figure 4 4A in the text is a square-shaped calibration mark. Figure 4 4B in the text is a bar grid type calibration mark. Figure 4 4C in the text refers to a composite calibration mark; in the square, bar, and composite marks, the inner frame is the first graphic part M1, and the outer frame is the second graphic part M2. Figure 4 The ranges of the first graphic portion and the second graphic portion are marked with different fill marks.

[0050] (2) Formed on the same process layer: The first and second patterned portions of the same calibration mark are formed on the same process layer of the calibration wafer. The same process layer means that the marking material, photoresist, and photolithography process are performed on the same layer of the calibration wafer in the same step. Therefore, this is completely different from the traditional overlay marking where the inner and outer alignment marks belong to different layers, and also different from the actual bonding products where the inner and outer bonding alignment marks belong to different wafers. Because the first and second patterned portions are on the same layer, their relative positions are entirely determined by the exposure accuracy of the photolithography machine and are not affected by interlayer alignment errors, thus ensuring that accurate known reference values ​​can be obtained.

[0051] (3) Known reference values: When designing calibration marks, the positional relationship between the first graphic portion and the second graphic portion is preset, which is the reference value; in this embodiment, the reference values ​​include the reference offset and the reference spacing. Specifically, such as Figure 4 As shown in Figure A, the first graphic unit M1 has a first center point C1, and the second graphic unit M2 has a second center point C2. The reference offset is the coordinate difference between the first center point C1 and the second center point C2 in the design mode. For example, if the reference offset is (0, 0), it means that the centers of the first graphic unit and the second graphic unit are perfectly aligned; if the reference offset is (+10 nm, 0), it means that the center of the second graphic unit is offset to the right by 10 nanometers relative to the center of the first graphic unit in the X direction. Furthermore, the reference spacing refers to the design distance between the two graphic units, which is the distance from the edge of the inner alignment mark to the edge of the outer alignment mark.

[0052] Therefore, this step ensures that subsequent calibration steps can reflect the optical and structural complexity under real production conditions by using a calibration wafer with characteristics consistent with the bonded product wafer and by creating calibration marks with known reference values ​​on the same process layer, while providing a reliable calibration reference standard.

[0053] Step S200: Use a wafer bonding alignment deviation measurement machine to measure at least one calibration mark, obtain an image of the calibration mark, and the measured value between the first graphic portion and the second graphic portion of the calibration mark.

[0054] It should be noted that after preparing the calibration piece, a wafer bonding alignment deviation measurement instrument is used to perform a measurement operation on the calibration marks on the calibration piece to obtain the following information: (1) Image of calibration mark: The camera on the wafer bonding alignment deviation measurement machine will take an image of the calibration mark. The image records the actual shape of the mark, edge clarity, brightness contrast and other information, which can be used to determine whether the optical path is perpendicular and whether the lens has aberrations and other abnormal results.

[0055] (2) Measurement value between the first and second graphic parts: The image processing algorithm built into the wafer bonding alignment deviation measuring machine analyzes the image of the calibration mark, automatically extracts the edges or centers of the first and second graphic parts, and then calculates the actual positional relationship between them, which is the measurement value. Similar to the reference value mentioned above, the measurement value in this embodiment also includes the measurement offset and the measurement spacing value. Among them, the measurement offset is the coordinate difference between the first center point and the second center point in the measurement mode of the wafer bonding alignment deviation measuring machine, that is, the actual measured center deviation.

[0056] Step S300: Analyze the reference value and measured value and / or image of the calibration mark to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrate the wafer bonding alignment deviation measurement machine according to the abnormal results.

[0057] It should be noted that after obtaining the reference value, measured value, and image of the calibration mark, this step compares the reference value with the measured value / image to determine whether there is an abnormality in the wafer bonding alignment deviation measurement equipment, and the type of abnormality. Specifically: (1) If the measured offset differs significantly from the reference offset, it indicates that the basic measurement accuracy of the wafer bonding alignment deviation measuring machine is abnormal. The zero-point compensation value or system offset parameter inside the wafer bonding alignment deviation measuring machine can be adjusted.

[0058] (2) If the measured spacing value does not match the reference spacing value, it is determined that there is an abnormality in the measurement spacing of the wafer bonding alignment deviation measuring machine. The conversion coefficient between the pixel size and the actual physical size of the wafer bonding alignment deviation measuring machine can be calibrated.

[0059] (3) If the image captured has blurry edges and low contrast, it can be determined that the optical path system of the wafer bonding alignment deviation measuring machine is not perpendicular or the illumination is uneven. The focal length or optical path angle can be readjusted.

[0060] In summary, the calibration method for the wafer bonding alignment deviation measuring machine provided in this application has the following technical advantages: (1) This application uses bonded product wafers or complementary wafers with the same characteristics as calibration wafers as calibration wafers, and makes calibration marks with known reference values ​​on the calibration wafers, so that the calibration conditions are highly consistent with the actual production conditions, overcoming the problem of insufficient calibration depth of traditional standard calibration wafers, thereby improving the reliability and accuracy of calibration results in actual product measurement.

[0061] (2) By forming the first and second graphic portions of the calibration mark on the same process layer of the calibration sheet, the reference value between the first and second graphic portions can be obtained accurately by photolithography without relying on destructive analysis to obtain the true value. This not only greatly shortens the calibration cycle, but also makes the calibration sheet reusable and non-destructive, thus improving calibration efficiency and operability.

[0062] (3) During the measurement process, this application simultaneously acquires the image of the calibration mark and the measurement value between the first graphic part and the second graphic part. By comprehensively analyzing the deviation between the reference value and the measured value, as well as multi-dimensional information such as image quality, it can identify a variety of abnormalities that may exist in the wafer bonding alignment deviation measurement machine, thereby improving the comprehensiveness of the calibration.

[0063] Therefore, the wafer bonding alignment deviation measurement equipment calibration method of this application not only improves calibration accuracy, but also shortens calibration time, reduces calibration cost, and supports multi-dimensional diagnosis and optimization of equipment performance, thereby enabling rapid, reliable, and comprehensive in-depth calibration of the wafer bonding alignment deviation measurement equipment for measuring bonding offset.

[0064] Figure 5 The following is an embodiment of this application. Figure 1 A flowchart illustrating the first embodiment of step S300; as shown. Figure 5 As shown, this embodiment analyzes the reference value and measured value of the calibration mark to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrates the wafer bonding alignment deviation measurement machine according to the abnormal results, specifically including the following steps: Step S311: Compare the reference offset of the offset calibration mark with the measured offset to obtain the offset difference.

[0065] Step S312: Compare the offset difference with the preset offset threshold. If the offset difference is within the preset offset threshold, no calibration is required. Otherwise, the offset measurement accuracy of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0066] It should be noted that the calibration mark on the calibration piece in this embodiment is a dedicated offset calibration mark for offset accuracy detection. During design, this mark has a known reference offset. For ease of judgment, the reference offset of the offset calibration mark is typically set to 0 during design, meaning that the first center point of the first graphic element and the second center point of the second graphic element completely coincide in the design mode.

[0067] Further, following the method in step S200 above, the measured offset of the offset calibration mark is obtained. Then, the offset difference is obtained based on the difference between the reference offset and the measured offset. The offset difference is compared with a preset offset threshold. If the offset difference is within the preset offset threshold range (e.g., offset difference ≤ 1nm), it indicates that the offset measurement accuracy of the wafer bonding alignment deviation measurement machine meets the requirements and no calibration is needed. If the offset difference exceeds the preset offset threshold range, it indicates that the offset measurement accuracy of the wafer bonding alignment deviation measurement machine is abnormal and the offset measurement accuracy of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0068] This embodiment calibrates the offset measurement accuracy of the wafer bonding alignment deviation measurement machine, including adjusting the zero-point offset compensation value in the measurement algorithm of the wafer bonding alignment deviation measurement machine, recalibrating the pixel equivalent of the optical system of the wafer bonding alignment deviation measurement machine, and mechanically adjusting the stage or optical path of the machine to eliminate systematic deviations.

[0069] Figure 6 The following is an embodiment of this application. Figure 1 A flowchart illustrating the second implementation of step S300; as shown. Figure 6 As shown, this embodiment analyzes the reference value and measured value of the calibration mark to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrates the wafer bonding alignment deviation measurement machine according to the abnormal results, specifically including the following steps: Step S321: The wafer bonding alignment deviation measurement instrument measures multiple measurement offsets obtained from multiple linear calibration marks and performs linear fitting with the corresponding multiple reference offsets to calculate the linearity index.

[0070] Step S322: If the linearity index meets the preset linearity condition, no calibration is required; otherwise, the linearity of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0071] It should be noted that the calibration marks on the calibration plate in this embodiment are linear calibration marks specifically used for linearity testing; such as Figure 7 As shown, the linear calibration mark has the following characteristics: (1) The calibration sheet has multiple linear calibration marks, which have the same graphic structure, such as Figure 7 The linear calibration marks shown are in the shape of a square, and each linear calibration mark has the same size, line width, and material.

[0072] (2) The reference offsets corresponding to multiple linear calibration marks vary in a stepwise manner according to a preset step size. The stepwise variation indicates that the reference offsets between adjacent marks differ by a fixed step size value. For example, if the step size is 10nm, the reference offsets of multiple marks are as follows: -30nm, -20nm, -10nm, 0, +10nm, +20nm, +30nm; for example: Figure 7 The 7A in the figure indicates a reference offset of -10nm. Figure 7 7B in the figure indicates that the reference offset is 0. Figure 7 The 7C indicates a reference offset of +10nm.

[0073] It is worth noting that the step change of the reference offset in this embodiment can be a unilateral change or a bilateral change. Specifically: (1) Unilateral variation indicates that a stepped offset is set only along the X direction or only along the Y direction. Figure 7 The three linear calibration marks shown are a set of marks specifically for testing linearity in the X direction. Their reference offset changes stepwise in the X direction, while remaining 0 in the Y direction. Conversely, the set of marks specifically for testing linearity in the Y direction changes stepwise in the Y direction, while remaining 0 in the X direction.

[0074] (2) Bilateral variation means that a stepped offset is set simultaneously along the X and Y directions, or two sets of markers are made, one set to test linearity in the X direction and the other set to test linearity in the Y direction. In this embodiment, it is preferable to make two independent sets of markers to avoid mutual interference between the measurement signals in the two directions.

[0075] Furthermore, after obtaining the measurement offset of each linear calibration mark according to the method in step S200 above, the analysis and calibration process in this embodiment includes: (1) Linear fitting: Multiple measured offsets are linearly fitted with their corresponding multiple reference offsets. Specifically, with the reference offset as the X-axis and the measured offset as the Y-axis, multiple sets of data points (reference offsets and measured offsets) are plotted on the coordinate system, and a straight line is fitted using methods such as the least squares method, resulting in the fitted straight line equation Y = aX + b.

[0076] (2) Calculate the linearity index: The linearity index can include the coefficient of determination R² and the linearity error; where the coefficient of determination R² measures the closeness of the data points to the fitted line, and the closer R² is to 1, the stronger the linear relationship; the linearity error W represents the absolute value of the maximum deviation between each measurement point and the fitted line.

[0077] (3) Determine whether the preset linearity condition is met: If the linearity index meets the preset linearity condition, for example, R² ≥ 0.99 and W ≤ 1nm (the specific threshold can be adjusted according to the process requirements), it means that the measurement linearity of the wafer bonding alignment deviation measurement machine meets the requirements and no calibration is required; if the linearity index does not meet the preset linearity condition, it means that the linearity of the wafer bonding alignment deviation measurement machine is abnormal and the linearity of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0078] The linear calibration of the wafer bonding alignment deviation measurement machine in this embodiment may include adjusting the nonlinear compensation parameters of the measurement system of the wafer bonding alignment deviation measurement machine, calibrating the distortion coefficient of the machine's optical system, and recalibrating the sensor response curve.

[0079] Figure 8 The following is an embodiment of this application. Figure 1 A flowchart illustrating the third implementation of step S300; as shown. Figure 8 As shown, this embodiment analyzes the reference value and measured value of the calibration mark to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrates the wafer bonding alignment deviation measurement machine according to the abnormal results, specifically including the following steps: Step S331: Based on the image captured by the wafer bonding alignment deviation measuring machine of the optical path perpendicularity calibration mark, calculate the first edge contrast corresponding to the first graphic part of the optical path perpendicularity and the second edge contrast corresponding to the second graphic part.

[0080] Step S332: Compare the first edge contrast and the second edge contrast with the preset edge contrast respectively. If both the first edge contrast and the second edge contrast are higher than the preset edge contrast, no calibration is required; otherwise, the optical path perpendicularity of the wafer bonding alignment deviation measuring machine needs to be calibrated.

[0081] It should be noted that the calibration mark on the calibration plate in this embodiment is a dedicated optical path perpendicularity calibration mark for optical path perpendicularity detection. The optical path perpendicularity calibration mark in this embodiment has at least one of the following characteristics: (1) Material Differences: The first and second graphic parts of the optical path perpendicularity calibration mark are formed of different materials. For example, the first graphic part is made of a metallic material, such as copper or aluminum; the second graphic part is made of a dielectric material, such as silicon oxide. Because different materials have different reflectivities and absorptivity for obliquely incident light, when the optical path is not perpendicular, the difference in imaging brightness between the two will change significantly, reflected in the edge contrast of the image. Figure 9 As shown, Figure 9 9A in the diagram represents a schematic of the alignment mark having a shadowed area under oblique lighting. Figure 9 9B in the diagram represents a schematic diagram showing the presence of line shadows in the image formed by markings on the first and second graphic parts made of different materials. The line shadows are as follows: Figure 9 The dashed box in B is shown.

[0082] (2) High contrast: The optical path perpendicularity calibration mark has a pattern composed of dense lines and alternating spacing. For example, the mark is designed as a grating structure with sub-micron line width and spacing to form a periodic pattern with high spatial frequency. This structure is extremely sensitive to optical path perpendicularity: when the light is incident perpendicularly, the image is clear and the line edges are sharp; when the light is incident obliquely, ghosting and blurring will occur, and the overall contrast will drop sharply.

[0083] Furthermore, after obtaining the image of the optical path perpendicularity calibration mark according to the method in step S200 above, the analysis and calibration process in this embodiment is as follows: (1) Calculate edge contrast: Based on the optical path perpendicularity calibration mark image captured by the wafer bonding alignment deviation measurement machine, extract the first edge contrast corresponding to the first graphic part and the second edge contrast corresponding to the second graphic part. The edge contrast can be calculated by extracting the gray-level distribution curve along the direction perpendicular to the edge and calculating the maximum gradient value of gray level at the edge.

[0084] (2) Compare with preset edge contrast: Compare the calculated first edge contrast and second edge contrast with the preset edge contrast threshold respectively.

[0085] (3) Determine whether calibration is required: If the first edge contrast and / or the second edge contrast are lower than the preset edge contrast, it indicates that there is a perpendicularity deviation in the optical path system of the wafer bonding alignment deviation measuring machine, and the optical path perpendicularity of the wafer bonding alignment deviation measuring machine needs to be calibrated; if both are not lower than the preset edge contrast, the optical path perpendicularity is normal and no calibration is required.

[0086] This embodiment adjusts the optical path perpendicularity of the wafer bonding alignment deviation measurement machine by: adjusting the angle of the reflector or beam splitter in the optical system so that the incident light path is perpendicular to the wafer surface; or recalibrating the automatic focusing system of the wafer bonding alignment deviation measurement machine to ensure that the imaging surface is conjugate with the wafer surface; or fine-tuning the position or illumination angle of the light source to eliminate the oblique illumination effect.

[0087] Figure 10 The following is an embodiment of this application. Figure 1 A flowchart illustrating the fourth implementation of step S300; as shown. Figure 10 As shown, this embodiment analyzes the reference value and measured value of the calibration mark to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrates the wafer bonding alignment deviation measurement machine according to the abnormal results, specifically including the following steps: Step S341: Calculate the algorithm deviation between the measurement spacing and the reference spacing of the algorithm calibration mark; wherein, the measurement spacing is obtained by processing the image of the algorithm calibration mark by the image detection algorithm of the wafer bonding alignment deviation measuring machine.

[0088] Step S342: Compare the algorithm deviation with the preset algorithm threshold. If the algorithm deviation is within the preset algorithm threshold, no calibration is required. Otherwise, the image detection algorithm of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0089] It should be noted that the calibration marks on the calibration plate in this embodiment are algorithm calibration marks specifically used to detect anomalies in the image detection algorithm; such as Figure 11 As shown, the algorithm calibration mark in this embodiment has the following characteristics: (1) It has asymmetry: the spacing between the first graphic part and the second graphic part is not equal in the X direction, or not equal in the Y direction, or not equal in both directions. For example Figure 11 As shown, the left side distance L1 and the right side distance L2 of the first graphic part and the second graphic part are not equal, and the upper side distance H1 and the lower side distance H2 of the first graphic part and the second graphic part are also not equal.

[0090] (2) It has a known reference spacing; for example, the reference spacing of the left side spacing L1 is set to 200nm, the reference spacing of the right side spacing L2 is set to 80nm, the reference spacing of the upper side spacing H1 is set to 150nm, and the reference spacing of the lower side spacing H2 is set to 60nm.

[0091] It should be explained here that the reason for adopting the asymmetric spacing design in this embodiment is as follows: For traditional symmetric patterns (such as a regular double-square), the image detection algorithm can rely on symmetry to automatically correct some deviations. Even if the algorithm has certain defects, it may still give results close to the correct ones. However, for asymmetric patterns, the image detection algorithm cannot use symmetry for compensation and must accurately identify the graphic feature points (such as edges and corners) to measure correctly.

[0092] Further, after obtaining the measured values of the algorithm calibration marks according to the method of step S200 above, the analysis and calibration process of this embodiment is as follows: (1) Calculate the algorithm deviation: Compare the measured spacing automatically extracted by the image detection algorithm of the wafer bonding alignment deviation measurement machine with the known reference spacing, and calculate the difference between the two, which is called the algorithm deviation. Specifically: If the asymmetric design of the mark is in the X direction (unequal left and right spacings), calculate the deviation between the left measured spacing and the left reference spacing, and the deviation between the right measured spacing and the right reference spacing respectively. If the asymmetric design of the mark is in the Y direction (unequal upper and lower spacings), calculate the deviation between the upper measured spacing and the upper reference spacing, and the deviation between the lower measured spacing and the lower reference spacing respectively.

[0093] (2) Compare with the preset algorithm threshold: Compare the calculated algorithm deviation with the preset algorithm threshold.

[0094] (3) Determine whether calibration is needed: If the algorithm deviation is within the preset algorithm threshold range (i.e., less than or equal to the threshold), it means that the image detection algorithm of the wafer bonding alignment deviation measurement machine can accurately process asymmetric patterns, and the algorithm performance is normal, so no calibration is needed. If the algorithm deviation exceeds the preset algorithm threshold range, it means that the image detection algorithm of the wafer bonding alignment deviation measurement machine has deviations when processing asymmetric patterns, and the algorithm performance is abnormal, and the image detection algorithm of the wafer bonding alignment deviation measurement machine needs to be calibrated.

[0095] Calibrating the image detection algorithm of the wafer bonding alignment deviation measurement machine in this embodiment can include optimizing the edge detection parameters in the algorithm to improve the recognition accuracy of asymmetric patterns.

[0096] It should be noted that in the above embodiments, the methods for judging and calibrating the offset abnormality, linearity abnormality, optical path perpendicularity abnormality, and detection algorithm abnormality of the wafer bonding alignment deviation measurement machine are respectively elaborated. In practical applications, according to the specific usage situation of the wafer bonding alignment deviation measurement machine, historical calibration records, or the urgency of the production line, the calibration items to be executed can be flexibly selected.

[0097] Specifically, the determination and calibration steps of the above various abnormal types can be executed in any order, such as Figure 12 As shown, after exposing various calibration marks on the calibration film, the following steps are performed: First, offset anomaly detection is performed to determine if any offset anomalies exist. If an offset anomaly is found, offset calibration is performed. If no offset anomaly is found, linearity anomaly detection is performed to determine if any linearity anomalies exist. If a linearity anomaly is found, linear calibration is performed. If no linearity anomaly is found, optical path perpendicularity anomaly detection is performed to determine if any optical path perpendicularity anomalies exist. If an optical path perpendicularity anomaly is found, optical path perpendicularity calibration is performed. If no optical path perpendicularity anomaly is found, detection algorithm anomaly detection is performed to determine if any detection algorithm anomalies exist. If a detection algorithm anomaly is found, detection algorithm calibration is performed. If no detection algorithm anomaly is found, calibration is complete. It should be noted that there is no fixed order between the above anomaly detection steps, and the order can be adjusted according to the actual application scenario.

[0098] Furthermore, to improve calibration efficiency, at least two anomaly type determination steps can be executed in parallel. For example... Figure 13 As shown, when the wafer bonding alignment deviation measurement machine measures the same calibration piece, it can simultaneously acquire images of multiple calibration marks, and then calculate the offset difference, linearity index, edge contrast and algorithm deviation in parallel. At the same time, it can determine whether there are offset anomalies, linear anomalies, optical path perpendicularity anomalies and detection algorithm anomalies. When a corresponding anomaly is found, the corresponding calibration can be performed. When all branches do not require calibration, the calibration process ends. This can significantly shorten the overall calibration time.

[0099] It should be noted that, in Figure 12 and Figure 13 In the calibration sheet, the various calibration marks exposed include at least one offset calibration mark, multiple linear calibration marks, one optical path perpendicularity calibration mark, and one algorithm calibration mark. This is necessary to meet the requirement that offset anomaly determination, linear anomaly determination, optical path perpendicularity anomaly determination, and detection algorithm anomaly determination be executed serially or in parallel in any order.

[0100] Figure 14 The diagram shown is a structural schematic of a calibration system for a wafer bonding alignment deviation measuring machine provided in an embodiment of this application; as follows: Figure 14 As shown, the calibration system provided in this embodiment specifically includes: The data acquisition module 100 is used to acquire the reference value of at least one calibration mark on the calibration wafer, and to acquire the image and measurement value of the calibration mark obtained after the wafer bonding alignment deviation measuring instrument measures the at least one calibration mark; wherein, the calibration wafer is a product wafer or a complementary wafer with the same characteristics as the product wafer; the calibration mark includes a first graphic portion and a second graphic portion, the second graphic portion is located on the periphery of the first graphic portion, the first graphic portion and the second graphic portion are formed on the same process layer of the calibration wafer, and the design between the first graphic portion and the second graphic portion has a known reference value, the reference value including reference offset and reference spacing; the measurement value is the measurement value between the first graphic portion and the second graphic portion measured by the wafer bonding alignment deviation measuring instrument, the measurement value including measurement offset and measurement spacing value.

[0101] The anomaly determination module 200, connected to the data acquisition module 100, is used to analyze the reference value and measured value and / or image of the calibration mark, determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrate the wafer bonding alignment deviation measurement machine according to the abnormal results.

[0102] It should be noted that the data acquisition module 100 in this embodiment can acquire the above information through a data interface (such as network communication, file import, or direct connection) with the wafer bonding alignment deviation measurement instrument, or it can read pre-stored reference values ​​and measurement data from a database. The anomaly determination module 200 in this embodiment can employ... Figure 5 , Figure 6 , Figure 8 and Figure 10 The judgment logic shown determines whether there are offset anomalies, linearity anomalies, optical path perpendicularity anomalies, and detection algorithm anomalies. Then, based on the judgment results, the anomaly determination module 200 outputs corresponding calibration instructions, such as offset calibration instructions, linearity calibration instructions, optical path calibration instructions, or algorithm calibration instructions.

[0103] The calibration system in this embodiment can be integrated into the control system of the wafer bonding alignment deviation measuring machine, or it can run as an independent computer program module in a host computer that communicates with the wafer bonding alignment deviation measuring machine.

[0104] In one embodiment of this application, Figure 15 The diagram shown is a structural schematic of a computer system for an electronic device according to an embodiment of this application; it should be noted that, Figure 15 The computer system 1000 of the electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0105] like Figure 15As shown, the computer system 1000 includes a Central Processing Unit (CPU) 1001, which can perform various appropriate actions and processes based on programs stored in Read-Only Memory (ROM) 1002 or programs loaded from storage portion 1008 into Random Access Memory (RAM) 1003, such as performing the methods described in the above embodiments. Various programs and data required for system operation are also stored in RAM 1003. The CPU 1001, ROM 1002, and RAM 1003 are interconnected via bus 1004. An Input / Output (I / O) interface 1005 is also connected to bus 1004.

[0106] The following components are connected to I / O interface 1005: an input section 1006 including a keyboard, mouse, etc.; an output section 1007 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 1008 including a hard disk, etc.; and a communication section 1009 including a network interface card such as a LAN (Local Area Network) card, modem, etc. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to I / O interface 1005 as needed. Removable media 1011, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., are installed on drive 1010 as needed so that computer programs read from them can be installed into storage section 1008 as needed.

[0107] Specifically, according to embodiments of this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program including a computer program for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 1009, and / or installed from removable medium 1011. When the computer program is executed by central processing unit (CPU) 1001, it performs various functions defined in the system of this application.

[0108] It should be noted that the computer-readable medium shown in the embodiments of this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, optical fiber, portable compact disc read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying a computer-readable computer program. The transmitted data signal can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The computer-readable signal medium can also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The computer program contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to wireless, wired, etc., or any suitable combination thereof.

[0109] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. Each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0110] The units described in the embodiments of this application can be implemented in software or hardware, and the described units can also be located in a processor. The names of these units do not necessarily limit the specific unit itself.

[0111] The above description is merely a preferred exemplary embodiment of this application and is not intended to limit the implementation of this application. Those skilled in the art can easily make corresponding modifications or alterations based on the main concept and spirit of this application. Therefore, the scope of protection of this application should be determined by the scope of protection claimed in the claims.

Claims

1. A calibration method for a wafer bonding alignment deviation measuring machine, characterized in that, The method includes: A calibration wafer with at least one calibration mark is provided; wherein the calibration wafer is a bonded product wafer or a complementary wafer with the same characteristics as the bonded product wafer; the calibration mark includes a first pattern portion and a second pattern portion, the first pattern portion and the second pattern portion are formed on the same process layer of the calibration wafer, the second pattern portion is located outside the first pattern portion, and the design between the first pattern portion and the second pattern portion has a known reference value, the reference value including a reference offset and a reference spacing; The at least one calibration mark is measured using a wafer bonding alignment deviation measurement machine to obtain an image of the calibration mark and a measurement value between the first graphic portion and the second graphic portion of the calibration mark, the measurement value including the measurement offset and the measurement spacing value; Analyze the reference values ​​and measured values ​​and / or images of the calibration marks to identify abnormal results of the wafer bonding alignment deviation measurement instrument, and calibrate the wafer bonding alignment deviation measurement instrument according to the abnormal results.

2. The calibration method for the wafer bonding alignment deviation measuring machine according to claim 1, characterized in that, The provision of a calibration piece having at least one calibration mark includes: an offset calibration mark being provided on the calibration piece; The analysis of the reference and measured values ​​of the calibration marks determines the abnormal results of the wafer bonding alignment deviation measurement machine, and the wafer bonding alignment deviation measurement machine is calibrated based on the abnormal results, including: The offset difference is obtained by comparing the reference offset and the measured offset of the offset calibration mark; The offset difference is compared with a preset offset threshold. If the offset difference is within the preset offset threshold, no calibration is required. Otherwise, the offset measurement accuracy of the wafer bonding alignment deviation measurement machine needs to be calibrated.

3. The calibration method for the wafer bonding alignment deviation measuring machine according to claim 1, characterized in that, The provision of a calibration plate having at least one calibration mark includes: the calibration plate having multiple linear calibration marks having the same graphic structure; wherein the reference offset corresponding to the multiple linear calibration marks varies in a stepwise manner according to a preset step size; The analysis of the reference offset and measurement offset of the calibration marks determines the abnormal results of the wafer bonding alignment deviation measurement machine. Based on these abnormal results, the wafer bonding alignment deviation measurement machine is calibrated, including: The wafer bonding alignment deviation measurement instrument measures the multiple measurement offsets obtained from the multiple linear calibration marks and performs linear fitting with the corresponding multiple reference offsets to calculate the linearity index; If the linearity index meets the preset linearity condition, no calibration is required; otherwise, the linearity of the wafer bonding alignment deviation measurement machine needs to be calibrated.

4. The calibration method for the wafer bonding alignment deviation measuring machine according to claim 1, characterized in that, The provision of a calibration plate having at least one calibration mark includes: a light path perpendicularity calibration mark being disposed on the calibration plate; wherein the first graphic portion and the second graphic portion of the light path perpendicularity calibration mark are formed of different materials, and / or the light path perpendicularity calibration mark has a graphic consisting of dense lines and alternating spacing; The analysis of the calibration mark image determines the abnormal results of the wafer bonding alignment deviation measurement machine, and the wafer bonding alignment deviation measurement machine is calibrated according to the abnormal results, including: Based on the image captured by the wafer bonding alignment deviation measuring machine on the optical path perpendicularity calibration mark, the first edge contrast corresponding to the first graphic part and the second edge contrast corresponding to the second graphic part are obtained respectively. The first edge contrast and the second edge contrast are compared with the preset edge contrast. If both the first edge contrast and the second edge contrast are higher than the preset edge contrast, no calibration is required; otherwise, the optical path perpendicularity of the wafer bonding alignment deviation measurement machine needs to be calibrated.

5. The calibration method for the wafer bonding alignment deviation measuring machine according to claim 1, characterized in that, The provision of a calibration piece having at least one calibration mark includes: setting an algorithm calibration mark on the calibration piece; the spacing between the first graphic portion and the second graphic portion of the algorithm calibration mark is unequal in the X direction and has a known reference spacing, and / or the spacing between the first graphic portion and the second graphic portion is unequal in the Y direction and has a known reference spacing; The process of analyzing the reference value of the calibration mark and the measured value to determine the abnormal results of the wafer bonding alignment deviation measurement machine, and calibrating the wafer bonding alignment deviation measurement machine according to the abnormal results, includes: The algorithm deviation between the measured spacing and the reference spacing of the algorithm calibration mark is calculated; wherein, the measured spacing is obtained by processing the image of the algorithm calibration mark by the image detection algorithm of the wafer bonding alignment deviation measurement machine. The algorithm deviation is compared with a preset algorithm threshold. If the algorithm deviation is within the preset algorithm threshold, no calibration is required. Otherwise, the image detection algorithm of the wafer bonding alignment deviation measurement machine needs to be calibrated.

6. The calibration method for the wafer bonding alignment deviation measuring machine according to claim 1, characterized in that, The calibration wafer is formed by bonding a bottom wafer and a top wafer, and the calibration mark is located in the bottom wafer or the top wafer.

7. The calibration method for the wafer bonding alignment deviation measuring machine according to claim 6, characterized in that, The first graphic part has a first center point, and the second graphic part has a second center point; the reference offset and measurement offset of the calibration mark are the coordinate differences between the first center point and the second center point in the design mode and the measurement mode, respectively.

8. A calibration system for a wafer bonding alignment deviation measuring machine, characterized in that, The calibration system includes: A data acquisition module is used to acquire a reference value for at least one calibration mark on a calibration wafer, and to acquire an image and measurement value of the calibration mark obtained by a wafer bonding alignment deviation measurement instrument after measuring the at least one calibration mark; wherein, the calibration wafer is a product wafer or a complementary wafer with the same characteristics as the product wafer; the calibration mark includes a first graphic portion and a second graphic portion, the second graphic portion being located around the first graphic portion, the first graphic portion and the second graphic portion being formed on the same process layer of the calibration wafer, and the design between the first graphic portion and the second graphic portion having a known reference value, the reference value including a reference offset and a reference spacing; the measurement value is the measurement value between the first graphic portion and the second graphic portion measured by the wafer bonding alignment deviation measurement instrument, the measurement value including a measurement offset and a measurement spacing value; An anomaly determination module, connected to the data acquisition module, is used to analyze the reference value and measured value and / or image of the calibration mark, determine the anomaly result of the wafer bonding alignment deviation measurement machine, and calibrate the wafer bonding alignment deviation measurement machine according to the anomaly result.

9. An electronic device, characterized in that, include: One or more processors; A storage device for storing one or more programs, which, when executed by one or more processors, cause the electronic device to implement the calibration method of the wafer bonding alignment deviation measuring machine as described in any one of claims 1 to 7.

10. A computer storage medium storing computer programs / instructions thereon, characterized in that, When the computer program / instruction is executed by the processor, it implements the calibration method of the wafer bonding alignment deviation measuring machine according to any one of claims 1 to 7.

11. A computer program, comprising computer programs / instructions, characterized in that, When the computer program / instruction is executed by the processor, it implements the calibration method of the wafer bonding alignment deviation measuring machine according to any one of claims 1 to 7.