Rogowski current sensor comprising a printed circuit board
By designing a specific arrangement of top and bottom traces and return traces on the printed circuit board, the sensitivity of the Rogovsky current sensor to external electromagnetic interference was solved, achieving higher measurement accuracy and anti-interference capability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SAFRAN ELECTRICAL & POWER SUPPLY SHATTO
- Filing Date
- 2024-10-21
- Publication Date
- 2026-07-31
AI Technical Summary
Rogowski current sensors are sensitive to external electromagnetic interference, which affects measurement accuracy.
The design employs a Rogowski current sensor on a printed circuit board. By setting specific arrangements of top and bottom traces and return traces on the printed circuit board, the influence of external electromagnetic interference is limited. This includes multi-turn coils of wires and via connections to ensure electromagnetic field isolation.
It effectively reduces the impact of external electromagnetic interference on the measurement, and improves the measurement accuracy and anti-interference capability.
Smart Images
Figure CN122497878A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of current measurement at electrical components, particularly at Rogowski sensors or coils. Background Technology
[0002] It is known that the current flowing through an electrical element can be measured in various ways. This can be achieved, for example, by a measuring shunt suitable for measuring the current flowing through the element. Hall effect measuring sensors can also be used, which are inserted into a magnetic circuit or coupled to a magnetic flux concentrator; or Neel effect measuring sensors can be used, which consist of a superparamagnetic circuit, a measuring coil, and electronics for spectral analysis of the measurement.
[0003] Another way to measure the current at an electrical component is to use a Rogowski measuring sensor, which consists of a winding and a high-impedance load to measure changes in current passing through the sensor. A Rogowski sensor comprises a helical winding of wire, for example, wound around a toroidal tube. One end of the wire returns through the center of the winding to the other end, so the two ends of the winding are adjacent. The Rogowski measuring sensor is positioned around the electrical conductor (i.e., the electrical component) from which the current is to be measured.
[0004] Rogowski measurement sensors have many advantages, such as their low weight and wide bandwidth.
[0005] Alternatively, the annular tube of the Rogowski sensor can be replaced by a printed circuit board. The sensor's coil windings are deposited on the surface of the printed circuit board through holes passing through it.
[0006] If a change in current passes through the cross-section of the sensor perpendicular to the plane formed by all the turns of the wire, then this change in current generates an electromagnetic field parallel to the plane formed by all the turns of the wire. This electromagnetic field produces a measurable voltage between the terminals or ends of the Rogowski sensor.
[0007] However, any electromagnetic field outside the Rogowski sensor that is perpendicular to the electromagnetic field generated by the current change becomes a source of interference for the Rogowski current sensor. This is because the external electromagnetic field is superimposed on the sensor-specific electromagnetic field and generated by the current change passing through the sensor, thus altering the measurable voltage between the sensor's terminals. Therefore, this Rogowski current sensor is highly sensitive to electromagnetic interference in its environment. Summary of the Invention
[0008] The purpose of this invention is to provide a Rogowski current sensor fabricated on a printed circuit board or PCB that is insensitive or almost insensitive to electromagnetic interference.
[0009] Therefore, the present invention relates to a Rogowski sensor configured to measure the current flowing through an electrical element, the sensor comprising a printed circuit board including at least two upper traces extending in a first plane. The sensor also includes at least one lower track extending in a second plane parallel to the first plane, an upper track and the at least one lower track configured to surround an electrical element; and a via connecting the upper track to the at least one lower track. The sensor further includes wires comprising a plurality of coils, each coil comprising an upper portion, a lower portion and a middle portion connecting the upper portion to the lower portion, the upper portion of each coil extending above the upper surface of one of the upper tracks, the lower portion of each coil extending above the lower surface of one of the at least one lower track, and the middle portion passing through a via connecting the upper track to the lower track. The sensor is characterized in that each of the at least one lower track comprises: a first portion facing one of the at least two upper tracks and a second portion facing an upper track adjacent to the upper track.
[0010] This arrangement of bottom and top traces has the advantage of allowing the bottom traces to overlap with the top traces, and vice versa, to limit any electromagnetic interference oriented perpendicular to the top and bottom traces.
[0011] According to one aspect of the invention, the sensor includes a return track between the at least two upper traces and the at least one lower trace, the return track extending in a third plane parallel to the first and second planes, the return track being configured to surround an electrical element, and a wire passing through the return track.
[0012] According to one aspect of the invention, a first portion of at least one lower trace occupies two-thirds of at least one lower trace, and a second portion of at least one lower trace occupies one-third of at least one lower trace.
[0013] According to one aspect of the invention, the first portion and the second portion each occupy half of at least one lower wiring.
[0014] According to one aspect of the invention, at least one lower trace and one upper trace are identical to each other.
[0015] According to one aspect of the invention, at least one first portion of the lower trace includes a first via in the via, and at least one second portion of the lower trace includes a second via in the via.
[0016] According to one aspect of the invention, at least one bottom trace includes four vertices, with a first via and a second via located near two non-adjacent vertices.
[0017] According to one aspect of the invention, the lower wiring includes four sides, two of which are straight and two of which are curved, with one curved side connecting two straight sides.
[0018] According to one aspect of the invention, at least two upper traces are spaced apart from at least one lower trace by a distance of less than 5 mm, preferably by a distance equal to 1.5 mm.
[0019] According to one aspect of the invention, at least two upper traces and at least one lower trace are made of copper. Attached Figure Description
[0020] The invention will be better understood by reading a detailed description of an embodiment given as an example, and other advantages will become apparent, as illustrated in the accompanying drawings, in which:
[0021] Figure 1 A schematic plan view of a Rogowski sensor according to an embodiment of the present invention is shown;
[0022] Figure 2 yes Figure 1 A simplified schematic side view showing the wire loops passing through the printed circuit board of the sensor;
[0023] Figure 3 It shows something similar to Figure 2 The view shows the return traces of the sensor;
[0024] Figure 4 This is a schematic plan view of a portion of the sensor, showing the wire turns passing through the printed circuit board;
[0025] Figure 5 An exploded schematic diagram of a portion of the sensor is shown, illustrating the wire turns passing through the printed circuit board;
[0026] Figure 6 It shows Figure 5 The exploded diagram of this part of the sensor is repeated twice; and
[0027] Figure 7 It shows Figure 6 A schematic side view.
[0028] For clarity, the same elements are represented by the same reference numerals in the various figures. Detailed Implementation
[0029] Figure 1A schematic plan view of a Rogowski current sensor 1 configured to measure the current flowing through an electrical element is shown. The current sensor 1 at least partially surrounds the electrical element. The current sensor 1 is preferably in contact with the electrical element. In a preferred configuration, the current sensor 1 surrounds the electrical element, and therefore the surface surrounded by the measuring sensor 1 in the first plane P1 corresponds to the current measuring section 2 of the electrical element. In other words, the measuring section 2 is the surface adjacent to the current measuring sensor 1 in the first plane P1 parallel to the measuring sensor 1.
[0030] Current measuring sensor 1 includes Figure 2 The printed circuit board 10 is shown more precisely in the image. The printed circuit board 10 is configured to surround the electrical components to define the measurement section 2.
[0031] The printed circuit board 10 includes: at least two upper traces extending in a first plane P1, namely at least a first upper trace 12' and a second upper trace 12''; and at least one lower trace 14' extending in a second plane P2 parallel to the first plane P1, wherein the upper traces 12' and 12'' and the at least one lower trace 14' are configured to surround an electrical component.
[0032] Thus, the printed circuit board 10 extends from the first plane P1 to the second plane P2. The upper traces 12' and 12'' are therefore superimposed on the at least one lower trace 14'.
[0033] The printed circuit board 10 also includes at least one via 16 connecting the upper traces 12' and 12'' to the at least one lower trace 14'. The at least one via 16 takes the form of an opening extending into one of the at least two upper traces 12' and 12'' and the at least one lower trace 14', toward the other of the at least two upper traces 12' and 12'' and the at least one lower trace 14'. The printed circuit board 10 has at least one via 16 passing through it.
[0034] The current measuring sensor 1 includes a wire 18, which includes a plurality of wire turns 19. Each wire turn 19 includes an upper portion 182, a lower portion 186, and an intermediate portion 184 connecting the upper portion 182 to the lower portion 186. The upper portion 182 extends over the upper surface 122 of at least two upper traces 12' and 12'' (e.g., the first upper trace 12'), as shown below. Figure 2 As shown. The lower portion 186 extends over the lower surface 142 of the lower trace in at least one lower trace 14'. In addition, the middle portion 184 passes through one of the vias 16.
[0035] The wire turns 19 surround the printed circuit board 10, and each wire turn is adjacent to at least one other wire turn 19, and thus the wire turns 19 form a coil winding 20 surrounding the printed circuit board 10.
[0036] Therefore, when current flows through the electrical element (especially the measuring section 2) perpendicular to plane P1, an electromagnetic field is generated in the coil winding 20 perpendicular to the plane formed by each turn 19. CE .
[0037] In a preferred configuration, at least two upper traces 12' and 12'' comprise a defined number of upper traces greater than or equal to two in plane P1. Furthermore, at least one lower trace 14' comprises a defined number of lower traces greater than or equal to one in a second plane P2 parallel to plane P1.
[0038] Each of the at least one lower trace 14' includes: a first portion 146 facing one of the at least two upper traces (e.g., the first upper trace 12'), and a second portion 148 facing the upper trace adjacent to the upper trace (e.g., the second upper trace 12'').
[0039] In other words, the first lower trace 14' is arranged between the first upper trace 12' and the second upper trace 12''. Therefore, the projection of the first lower trace 14' in the first plane P1 lies between the first upper trace 12' and the second upper trace 12''. Thus, the first lower trace 14' is offset relative to the first upper trace 12' by rotation, with the center of this rotation substantially close to the center of the section 2 to be measured.
[0040] Furthermore, similarly, the printed circuit board 10 may include a second lower trace 14'' in addition to the first lower trace 14''. The first lower trace 14'' and the second lower trace 14'' are located in a second plane P2 parallel to the plane P1 that coincides with the lower trace 14'. Similarly, each of the at least two upper traces 12' and 12'' includes: a first portion 126 facing one of the at least two lower traces, and a second portion 128 facing the lower trace adjacent to the at least two lower traces.
[0041] In other words, the second upper trace 12'' is arranged between the first lower trace 14' and the second lower trace 14'', as shown below. Figure 1 As shown. In addition, the first portion 126 of the second upper trace 12'' faces the first lower trace 14', while the second portion 128 of the second upper trace 12'' faces the second lower trace 14''.
[0042] Therefore, the projection of the second upper trace 12'' in the second plane P2 lies between the first lower trace 14' and the second lower trace 14''. Thus, the second upper trace 12'' is offset relative to the second lower trace 14'' by rotation, with the center of this rotation being substantially close to the center of the section 2 to be measured.
[0043] Furthermore, in the same manner, the printed circuit board 10 may include a third upper trace 12''', which, along with the first upper trace 12' and the second upper trace 12'', is located in a first plane P1. Additionally, a second lower trace 14'' can thus be arranged between the second upper trace 12'' and the third upper trace 12'''. Furthermore, as described above, a first portion of the second lower trace 14'' faces the second upper trace 12'', while a second portion of the second lower trace 14'' faces the third upper trace 12'''.
[0044] Therefore, the projection of the second lower trace 14'' can be located between the second upper trace 12'' and the third upper trace 12''', and thus there is an offset.
[0045] The first upper trace 12' is far away from the second upper trace 12''. In other words, there is a gap 13 between the first upper trace 12'' and the second upper trace 12''.
[0046] like Figure 3 As shown, the printed circuit board 10 may further include a return trace 17 extending in a third plane P3 parallel to the first plane P1 and the second plane P2. The return trace 17 is configured to surround an electrical component. The third plane P3 lies between the first plane P1 and the second plane P2 in a fourth plane P4 perpendicular to the first plane P1, the second plane P2, and the third plane P3. A conductor 18 passes through the return trace 17.
[0047] The return trace 17 is a layer in which the conductor 18 of the printed circuit board 10 extends. The return trace 17 also has conductors 18 passing through it, and thus the middle portion 188 of conductor 18 lies between the upper portion 182 and the lower portion 186 of the conductor in the fourth plane P4. The coil winding 20 includes two ends 202 and 204, the first end 202 being connected to the wire turn 19. The second end 204 is connected to the return trace 17. The return trace 17 allows the conductor 18 to return to allow for the measurement of voltage and current in the measuring sensor 1.
[0048] exist Figure 3In the plane P4 shown, the return trace 17 is narrower than at least two upper traces 12' and 12'' and at least one lower trace 14'. Therefore, the via 16 is located on either side of the return trace 17, thereby allowing the conductor 18 to be routed through the printed circuit board 10 without passing through the return trace 17.
[0049] Typically, each of at least one of the lower traces 14' is arranged opposite to the gap 13. In addition, each of at least two upper traces 12' and 12'' is arranged opposite to the gap 13.
[0050] Advantageously, a first portion 146 of at least one lower trace 14' occupies half of at least one lower trace 14', and a second portion 148 of at least one lower trace 14' occupies the other half of at least one lower trace 14'. As a variation, the first portion 146 of at least one lower trace 14' may occupy two-thirds of at least one lower trace 14', and the second portion 148 of at least one lower trace 14' may occupy one-third of at least one lower trace 14'.
[0051] Furthermore, at least two upper traces 12' and 12'' and at least one lower trace 14' thus have the advantage of magnetically isolating the printed circuit board 10 from any electromagnetic fields outside the current measuring sensor 1. More specifically, the traces passing through the printed circuit board 10 and perpendicular to the first plane P1 (i.e., orthogonal to the electromagnetic field) CE Any interfering magnetic flux CEP If the interference electromagnetic flux is blocked by one of the at least two upper traces 12' and 12'', CEP It must pass through one of the two upper traces 12' and 12'' before passing through the printed circuit board 10; or be blocked by at least one lower trace 14' if the interference electromagnetic flux... CEP At least one lower trace 14' must pass through the printed circuit board 10. Therefore, at least two upper traces 12' and 12'' and at least one lower trace 14' provide magnetic isolation in the fourth plane P4.
[0052] More precisely, the interfering electromagnetic flux perpendicularly passing through plane P1 at current measuring sensor 1. CEP The offset architecture is blocked by at least one of the at least two upper traces 12' or 12'', or by at least one lower trace 14', so as not to interfere with the measurement sensor 1. This offset architecture also has the advantage of reducing the size of the at least two upper traces 12 and at least one lower trace 14'.
[0053] At least two upper traces 12 and / or at least one lower trace 14 may also be conductive traces to facilitate electrical connection between each via 16. Therefore, it is conceivable that at least two upper traces 12 and / or at least one lower trace 14 are made of a material including copper, which is an excellent magnetic insulator and a good electrical conductor, thereby allowing at least two upper traces 12' and 12'' and / or at least one lower trace 14' to perform both magnetic insulation relative to an electromagnetic field outside the current measuring sensor 1 and electrical conduction around the printed circuit board 10. The printed circuit board 10 may also include an electrical insulator between at least two upper traces 12' and 12'' and at least one lower trace 14'.
[0054] like Figure 4 As shown, the offset between the first upper trace 12' and the first lower trace 14' causes the upper portion 182 arranged against the first upper trace 12' to be misaligned with the lower portion 186 arranged against the first lower trace 14'.
[0055] like Figure 5 As shown, each of at least two upper traces 12' and 12'', such as a first upper trace 12' or a second upper trace 12'', and each of at least one lower trace 14', such as a first lower trace 14' or a second lower trace 14'', includes two vias 16 to allow the wire turns 19 to be connected together. Therefore, it is possible to repeat the same basic pattern, i.e., as shown... Figure 6 The wire coil 19 of the conductor 18 shown.
[0056] As described above, the measuring sensor 1 surrounds the electrical component. Preferably, the measuring sensor 1 has an annular shape.
[0057] Furthermore, each of at least one of the lower traces 14' (e.g., the first lower trace 14' or the second lower trace 14'') and each of at least two upper traces (e.g., the first upper trace 12' or the second upper trace 12'') is identical.
[0058] In the annular structure of the measuring sensor 1, the first upper trace 12' can have a trapezoidal or solid arc shape in the first plane P1. The first lower trace 14' can also have a trapezoidal or arc shape in the first plane P1. As a variation, the measuring sensor 1 can be elliptical or strip-shaped. However, any other geometry, such as a triangle, is conceivable.
[0059] A solid arc is understood to refer to at least one lower trace 14' in the second plane P2 including four sides 1400, 1401, 1402, and 1403, as shown below. Figure 1As shown. Two sides 1400 and 1402 of the four sides 1400, 1401, 1402 and 1403 are straight, and two sides 1401 and 1403 of the four sides 1400, 1401, 1402 and 1403 are curved. In addition, one curved side, such as the first curved side 1401, is adjacent to the two straight sides 1400 and 1402.
[0060] Similarly, at least two lower traces 12' or 12'' in the first plane P1 include four sides 1200, 1201, 1202, and 1203. Two sides 1200 and 1202 of the four sides 1200, 1201, 1202, and 1203 are straight, and two sides 1201 and 1203 of the four sides 1200, 1201, 1202, and 1203 are curved. Furthermore, one curved side, such as the first curved side 1201, is adjacent to two straight sides 1200 and 1202.
[0061] As described above, each of the at least two upper traces 12' or at least one lower trace 14' includes two vias 16. A first portion of at least one lower trace 14' may include a first via 16', and a second portion of at least one lower trace 14' includes a second via 16''. Similarly, a first portion of one of the at least two upper traces 12' may include a first via, and a second portion of one of the at least two upper traces 12' includes a second via.
[0062] At least one via of the first portion of the lower trace 14', namely the first via 16', is arranged adjacent to the first straight side 1400 of the two straight sides and the first curved side 1401 of the two curved sides, and at least one via of the second portion of the lower trace 14', namely the second via 16'', is arranged adjacent to the other straight side 1402 of the two straight sides (i.e. the second straight side 1402) and the other curved side 1403 of the two curved sides (i.e. the second curved side 1403).
[0063] In other words, each of at least one bottom trace 14' comprises four vertices 1410, 1412, 1414, and 1416. A first via 16' and a second via 16'' are located near two vertices that are not adjacent to each other. As an illustrative example, the first via 16' could be located near a first side 1410, and the second via 16'' could thus be located near a third side 1414 that is not adjacent to the first side 1410. "Not adjacent" is understood to mean that the two vertices are not consecutive.
[0064] Similarly, each of the at least two top traces includes four vertices. The first via and the second via of the top trace are located near two non-adjacent vertices.
[0065] like Figure 7 As shown, the first upper trace 12' contacts the gap 13 along the first straight side 1200, and contacts another gap 13' along the second straight side 1202. In addition, the first lower trace 14' contacts the third gap 13'' along the first straight side 1400, and contacts the fourth gap 13''' along the second straight side 1402.
[0066] In other words, each of the upper traces of at least two upper traces 12' and 12'' is arranged between two gaps 13 in the first plane P1, and each of the lower traces of at least one lower trace 14' is arranged between two gaps 13 in the second plane P2.
[0067] Now, as mentioned above, the surfaces of the first part and the second part are the same.
[0068] In other words, each gap 13 is arranged to be opposite to the center of one of the at least two upper traces 12' or 12'' (e.g., the first upper trace 12'), or opposite to the center of one of the at least one lower trace 14' (e.g., the first lower trace 14').
[0069] Therefore, the second gap 13' arranged between the first upper trace 12' and the second upper trace 12'' faces the center of the first lower trace 14'. Furthermore, the fourth gap 13''' arranged between the first lower trace 14' and the second lower trace 14'' also faces the center of the second upper trace 12'' in the first plane P1. At least one lower trace 14' and at least two upper traces 12' comprise an average angular length. , It is defined as the average length of the sum of the two curved sides 1402 and 1404. Therefore, the length of the offset between at least two upper traces 12' (e.g., a first upper trace 12' or a second upper trace 12'') and at least one lower trace (e.g., a first lower trace 14' or a second lower trace 14'') is equal to .
[0070] The first lower trace 14' is offset from the first upper trace 12' by an arc (with an arc equal to...) The length). It can be envisioned along a path with a defined length (e.g., the length). or Any other offset of the arc of the circle.
[0071] Advantageously, the distance between the first plane P1 (and therefore at least two upper traces 12' and 12'') and the second plane P2 (and therefore at least one lower trace 14') is less than 5 mm, and therefore the thickness of the measuring sensor 1 defined by this distance between the first plane P1 and the second plane P2 is small. Very advantageously, the distance between the first plane P1 and the second plane P2 is less than 2 mm, preferably equal to 1.5 mm, and therefore the thickness of the measuring sensor 1 is small.
[0072] The measuring sensor 1 surrounding the electrical element can advantageously include an inner diameter R1 between 20 mm and 200 mm (thus defining the measuring section 2) and an outer diameter R2 between 40 mm and 400 mm, and thus the measuring sensor is suitable for a wide range of sizes of electrical elements.
[0073] The first upper routing 12', the second upper routing 12'', the first lower routing 14', or the second lower routing 14'' advantageously include an average angular length between 10 mm and 1.5 mm. Therefore, the number of wire turns 19 surrounding the printed circuit board 10 can be limited.
[0074] The diameter of at least one via 16 can also be between 0.3 mm and 5 mm.
[0075] Advantageously, it can be envisioned that each of at least one lower trace 14' and each of at least two upper traces 12' and 12'' are identical. This facilitates the processing of each trace.
[0076] Therefore, the offset arrangement of the upper trace 12 and the lower trace 14 has the advantage of one trace overlapping with another to reduce the electromagnetic sensitivity of the measuring sensor 1.
Claims
1. A Rogowski sensor (1) configured to measure current flowing through an electrical element, the sensor (1) comprising a printed circuit board (10) including: At least two upper traces (12', 12'') extending in the first plane (P1); At least one lower trace (14') extending in a second plane (P2) parallel to the first plane (P1), the upper trace (12', 12'') and the at least one lower trace (14') are configured to surround the electrical component; and The upper trace (12', 12'') is connected to the via (16, 16', 16'') of the at least one lower trace (14'). The sensor (1) further includes a wire (18) comprising a plurality of coils (19), each coil (19) comprising an upper portion (182), a lower portion (186), and a middle portion (184) connecting the upper portion (182) to the lower portion (186). The upper portion (182) of each coil (19) extends over the upper surface (122) of one of the upper traces (12', 12'') of the upper traces (12', 12''), and the lower portion (186) of each coil (19) extends over the lower portion of one of the at least one lower traces (14'). The sensor (1) extends over the lower surface (142) of the trace (14') and the intermediate portion (184) passes through one of the vias (16, 16', 16'') that connect the upper trace (12', 12'') to the lower trace (14'), characterized in that each of the at least one lower trace (14') includes: a first portion (146) facing one of the at least two upper traces (12', 12'') of the upper trace (12') and a second portion (148) facing the upper trace (12'') adjacent to the upper trace (12').
2. The Rogowski current sensor (1) according to claim 1, comprising: A return trace (17) between the at least two upper traces (12', 12'') and the at least one lower trace (14), the return trace (17) extending in a third plane (P3) parallel to the first plane (P1) and the second plane (P2), the return trace (17) being configured to surround the electrical component, and the conductor (18) passing through the return trace (17).
3. The Rogowski current sensor (1) according to any one of claims 1 and 2, wherein The first portion (146) of the at least one lower trace (14') accounts for two-thirds of the at least one lower trace (14'), and the second portion (148) of the at least one lower trace (14') accounts for one-third of the at least one lower trace (14').
4. The Rogowski current sensor (1) according to any one of claims 1 and 2, wherein The first portion (146) and the second portion (148) each occupy half of the at least one lower trace (14').
5. The Rogowski current sensor (1) according to one of claims 1 to 4, wherein The at least one lower trace (14') and the upper trace (12', 12'') are identical to each other.
6. The Rogowski current sensor (1) according to one of claims 1 to 5, wherein The first portion (146) of the at least one lower trace (14') includes a first via (16') among the vias (16, 16', 16''), and the second portion (148) of the at least one lower trace (14') includes a second via (16'') among the vias (16, 16', 16'').
7. The Rogowski current sensor (1) according to one of claims 1 to 6, wherein The at least one lower trace (14') includes four vertices, with the first via (16') and the second via (16'') located near two non-adjacent vertices.
8. The Rogowski current sensor (1) according to claim 5, wherein The at least one lower trace (14') includes four sides (1400, 1401, 1402, 1403), two of the four sides (1400, 1402) are straight, and two of the four sides (1401, 1403) are curved, with a curved side (1401) connecting the straight two sides (1400, 1402).
9. The Rogowski current sensor (1) according to one of the preceding claims, wherein The at least two upper traces (12', 12'') are spaced from the at least one lower trace (14') by a distance of less than 5 mm, preferably by a distance of 1.5 mm.
10. The Rogowski current sensor (1) according to one of the preceding claims, wherein The at least two upper traces (12', 12'') and the at least one lower trace (14') are made of copper.