Boosting circuit and electronic device

Abstract

This application provides a boost circuit and electronic device, relating to the field of circuit technology, which can improve the problem of device damage under surge voltage scenarios. The boost circuit includes: a first inductor and a second inductor; at least two first switching transistors connected in series between the second terminal of the second inductor and the positive terminal of the bus; at least two second switching transistors connected in series between the second terminal of the second inductor and the negative terminal of the bus; a first capacitor electrically connected between a first node and a corresponding second node; at least one of the at least two first switching transistors and at least two second switching transistors is connected in parallel with a corresponding variable resistor, the variable resistor being a device that changes from a high-resistance state to a conducting state when the voltage difference across it exceeds a voltage threshold; the at least two first switching transistors and at least two second switching transistors are used to cut off when the current on the second inductor exceeds a current threshold.

Description

Boost circuit and electronic device TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit, and particularly relates to a boost circuit and an electronic device. BACKGROUND

[0002] A power supply is an important component of a data center. In a traditional power supply, a boost circuit has large device loss. In order to reduce the loss, the traditional boost circuit evolves into a multi-level boost circuit based on a flying capacitor (FC). The multi-level boost circuit replaces a high-voltage metal-oxide-semiconductor field-effect transistor (MOSFET) in the traditional boost circuit with a plurality of low-voltage transistors in series, thereby reducing switching loss. Compared with the traditional boost circuit, the required power inductance has a reduced inductance value and a reduced current ripple, and therefore magnetic loss is also reduced. However, the voltage resistance of the transistors in the multi-level boost circuit using the flying capacitor is relatively low, which leads to the fact that, in a scenario of a surge voltage such as a lightning strike, an instantaneous rise of a bus voltage is likely to cause the transistors to be damaged by breakdown.

[0003] SUMMARY

[0004] The technical scheme of the present application provides a boost circuit and an electronic device, which can improve the problem that devices are easily damaged in a surge voltage scenario.

[0005] In a first aspect, a boost circuit is provided, comprising: a first inductor, a first end of the first inductor being electrically connected to a positive pole of an input terminal; a second inductor, a first end of the second inductor being electrically connected to a second end of the first inductor; at least two first switch tubes being connected in series between the second end of the second inductor and a positive pole of a bus, a connection node between any two adjacent first switch tubes being a first node; each first switch tube having a first parasitic diode, a conduction direction of the first parasitic diode being from the second end of the second inductor to the positive pole of the bus; an output capacitor being electrically connected between the positive pole of the bus and a negative pole of the bus; at least two second switch tubes being connected in series between the second end of the second inductor and the negative pole of the bus, a connection node between any two adjacent second switch tubes being a second node, the number of the at least two first switch tubes being the same as the number of the at least two second switch tubes, the first node corresponding to the second node one by one along a direction from the second end of the second inductor to the positive pole of the bus and along a direction from the second end of the second inductor to the negative pole of the bus; each second switch tube having a second parasitic diode, a conduction direction of the second parasitic diode being from the negative pole of the bus to the second end of the second inductor; a first capacitor being electrically connected between each first node and a corresponding second node; a first unidirectional conducting device and a second unidirectional conducting device being connected in series between the positive pole of the bus and the negative pole of the bus, wherein a second end of the first unidirectional conducting device is electrically connected to the positive pole of the bus, a first end of the first unidirectional conducting device is electrically connected to a second end of the second unidirectional conducting device, a first end of the second unidirectional conducting device is electrically connected to the negative pole of the bus, the first end of the first unidirectional conducting device is electrically connected to a negative pole of the input terminal, a conduction direction of the first unidirectional conducting device is from the negative pole of the input terminal to the positive pole of the bus, a conduction direction of the second unidirectional conducting device is from the negative pole of the bus to the negative pole of the input terminal; a fourth unidirectional conducting device, a first end of the fourth unidirectional conducting device being electrically connected to the negative pole of the bus, a second end of the fourth unidirectional conducting device being electrically connected to the first end of the second inductor, a conduction direction of the fourth unidirectional conducting device being from the negative pole of the bus to the first end of the second inductor; a sixth unidirectional conducting device, a first end of the sixth unidirectional conducting device being electrically connected to the first end of the second inductor, a second end of the sixth unidirectional conducting device being electrically connected to the positive pole of the bus, a conduction direction of the sixth unidirectional conducting device being from the first end of the second inductor to the positive pole of the bus; at least one switch tube of the at least two first switch tubes and the at least two second switch tubes being connected in parallel with a corresponding variable resistance device, the variable resistance device being a device that changes from a high resistance state to a conduction state when a voltage difference between two ends exceeds a voltage threshold; the at least two first switch tubes and the at least two second switch tubes being configured to be turned off when a current on the second inductor exceeds a current threshold.

[0006] The boost circuit in the embodiment of the present application has a corresponding variable resistance device connected in parallel to at least one switch tube between the flying capacitor and the bus, so that, in a non-inrush scenario, the bus voltage is the working voltage of the load, and the voltage across each switch tube is low due to the voltage division effect of multiple series switch tubes, that is, the voltage across any switch tube does not exceed the voltage threshold, at this time, the variable resistance device is in a high resistance state and does not affect the normal operation of the circuit, at this time, the resistance of the variable resistance device is infinite and has no loss. In an inrush scenario, as the bus voltage rises, when the current on the second inductor rises to exceed the current threshold, all the first switch tubes and the second switch tubes are cut off to reduce damage to the switch tubes caused by sudden current changes. The second unidirectional conduction device and the sixth unidirectional conduction device are used to form a current path under forward inrush, and the first unidirectional conduction device and the fourth unidirectional conduction device are used to form a current path under reverse inrush. Since each switch tube has a corresponding parasitic diode, the voltage across at least some of the first switch tubes and the second switch tubes is further increased due to the conduction effect of the parasitic diode. When the voltage across the switch tube connected in parallel with the variable resistance device exceeds the voltage threshold, the variable resistance device changes from a high resistance state to a conduction state, thereby charging the flying capacitor and hindering the voltage difference across at least some of the switch tubes connected in parallel with the variable resistance device from rising, that is, the through-flow effect of the variable resistance device maintains the voltage across at least some of the switch tubes connected in parallel with the variable resistance device from being too high, thereby reducing the probability of at least some of the first switch tubes and the second switch tubes being damaged by inrush overvoltage.

[0007] In some possible implementations, the boost circuit further includes: a third unidirectional conduction device, a first end of the third unidirectional conduction device being electrically connected to the bus negative pole, a second end of the third unidirectional conduction device being electrically connected to the input end negative pole, and a conduction direction of the third unidirectional conduction device being from the bus negative pole to the input end negative pole; and a fifth unidirectional conduction device, a first end of the fifth unidirectional conduction device being electrically connected to the input end negative pole, a second end of the fifth unidirectional conduction device being electrically connected to the bus positive pole, and a conduction direction of the fifth unidirectional conduction device being from the input end negative pole to the bus positive pole. The third unidirectional conduction device is configured to provide an additional current path from the bus negative pole to the input end negative pole under forward inrush, and the fifth unidirectional conduction device is configured to provide an additional current path from the input end negative pole to the bus positive pole under reverse inrush, so as to buffer the inrush current through the additional current path.

[0008] In some possible embodiments, the turn-on voltage threshold of the variable resistance device is less than the voltage resistance of the switch tube connected in parallel therewith, and it is to be noted that the voltage threshold of the variable resistance device in the embodiments of the present application refers to the turn-on voltage threshold. Since the voltage threshold of the variable resistance device is lower than the voltage resistance of the switch tube connected in parallel therewith, by such a configuration, the variable resistance device connected in parallel with the switch tube can protect the switch tube before the voltage difference between the two ends of the switch tube rises to the voltage resistance of the switch tube and the switch tube is damaged due to surge overvoltage.

[0009] In some possible embodiments, in a surge scenario, the voltage of the bus positive electrode or the bus negative electrode changes more rapidly, and therefore the first switch tube closest to the bus positive electrode and the second switch tube closest to the bus negative electrode are most likely to be damaged due to the rapid change of the voltage of the bus positive electrode or the bus negative electrode in the surge scenario, and therefore one of the at least two first switch tubes closest to the bus positive electrode and one of the at least two second switch tubes closest to the bus negative electrode can be connected in parallel with corresponding variable resistance devices, so as to improve the first switch tube and the second switch tube most likely to be damaged by the variable resistance devices.

[0010] In some possible embodiments, each of the at least two first switch tubes and the at least two second switch tubes is connected in parallel with a corresponding variable resistance device. In this way, when the voltage between any one of the first switch tubes and the second switch tubes rises in a surge scenario, the voltage between the switch tube and the variable resistance device connected in parallel therewith is clamped, and the voltage between each first switch tube and each second switch tube is prevented from being too high, so that each first switch tube and each second switch tube can be protected, and the boost circuit can be protected to the greatest extent in a surge scenario.

[0011] In some possible implementation manners, the second end of the second inductor is connected with the bus positive pole through a corresponding variable resistance device; each first node is connected with the bus positive pole through a corresponding variable resistance device, so that the first switch tube closest to the bus positive pole can be individually protected through the variable resistance device between the first node closest to the bus positive pole and the bus positive pole, the first switch tube second closest to the bus positive pole can be individually protected through the variable resistance device between the first node second closest to the bus positive pole and the bus positive pole, and so on, and the first switch tube farthest from the bus positive pole can be individually protected through the variable resistance device between the second end of the second inductor and the bus positive pole. Although independent variable resistance devices are not connected in parallel at both ends of each first switch tube, each first switch tube still has an individually protected variable resistance device, so that the protection of each first switch tube can be implemented, so as to maximize the protection of the boost circuit in a surge scenario. The second end of the second inductor is connected with the bus negative pole through a corresponding variable resistance device; each second node is connected with the bus negative pole through a corresponding variable resistance device, so that the second switch tube closest to the bus negative pole can be individually protected through the variable resistance device between the second node closest to the bus negative pole and the bus negative pole, the second switch tube second closest to the bus negative pole can be individually protected through the variable resistance device between the second node second closest to the bus negative pole and the bus negative pole, and so on, and the second switch tube farthest from the bus negative pole can be individually protected through the variable resistance device between the second end of the second inductor and the bus negative pole. Although independent variable resistance devices are not connected in parallel at both ends of each second switch tube, each second switch tube still has an individually protected variable resistance device, so that the protection of each second switch tube can be implemented, so as to maximize the protection of the boost circuit in a surge scenario.

[0012] In some possible implementation manners, the unidirectional conduction device is a diode, the first end of the unidirectional conduction device is an anode of the diode, and the second end of the unidirectional conduction device is a cathode of the diode, that is, an independent diode can be used as the unidirectional conduction device to realize the unidirectional conduction function; or the unidirectional conduction device is a first type switch tube, the first type switch tube has a parasitic diode, and the parasitic diode of the first type switch tube is used to realize the unidirectional conduction function. The first type switch tube is, for example, a silicon-based MOSFET. Since the silicon-based MOSFET has a parasitic diode, the parasitic diode of the silicon-based MOSFET can be used to realize the unidirectional conduction function. For the silicon-based MOSFET, it can be controlled to be always in an off state, or it can be controlled as needed, as long as the unidirectional conduction function can be realized. Or, the unidirectional conduction device is a second type switch tube, and the second type switch tube is a gallium nitride (GaN) switch tube. The gallium nitride switch tube is used to realize the unidirectional conduction function. In the specific embodiments below, only the case that the unidirectional conduction device is a diode is taken as an example for description.

[0013] In some possible embodiments, the second end of the fifth unidirectional conducting device is electrically connected to the bus positive pole through a current buffer device, and the current buffer device can buffer the inrush current to reduce the probability of damage of the device due to the impact.

[0014] In some possible embodiments, the voltage boosting circuit further comprises: a first input capacitor electrically connected between the input positive pole and the input negative pole; and a second input capacitor electrically connected between the first end of the second inductor and the input negative pole.

[0015] In some possible embodiments, the voltage boosting circuit further comprises: a surge absorption circuit electrically connected between the input positive pole and the input negative pole, and the surge absorption circuit can prevent the surge by absorption before the surge impacts the main devices of the voltage boosting circuit.

[0016] In some possible embodiments, the variable resistance device comprises a bidirectional transient voltage suppression diode or a varistor.

[0017] In some possible embodiments, the voltage boosting circuit further comprises: a controller configured to control the at least two first switch tubes and the at least two second switch tubes to be turned off when the current on the second inductor exceeds a current threshold.

[0018] In a second aspect, an electronic device is provided, comprising the voltage boosting circuit described above. BRIEF DESCRIPTION OF DRAWINGS

[0019] FIG. 1 is a structural schematic diagram of a voltage boosting circuit in the related art;

[0020] FIG. 2 is a structural schematic diagram of another voltage boosting circuit in the related art;

[0021] FIG. 3 is a voltage waveform curve schematic diagram of the structure in FIG. 2 in a surge scenario;

[0022] FIG. 4 is a structural schematic diagram of a voltage boosting circuit in an embodiment of the present application;

[0023] FIG. 5a is a waveform curve schematic diagram of part of nodes of the structure in FIG. 4 in a surge scenario;

[0024] FIG. 5b is a waveform curve schematic diagram of part of nodes of the structure in FIG. 4 in another surge scenario;

[0025] FIG. 6 is a current path schematic diagram of the structure in FIG. 4;

[0026] FIG. 7 is another current path schematic diagram of the structure in FIG. 4;

[0027] FIG. 8 is still another current path schematic diagram of the structure in FIG. 4;

[0028] FIGS. 9-18 are schematic diagrams of structures of some different boost circuits in embodiments of the present application. DETAILED DESCRIPTION

[0029] The terms used in the embodiments section of the present application are used only to explain the specific embodiments of the present application, and are not intended to limit the present application.

[0030] Before the embodiments of the present application are described, the related art and its technical problems are first described. As shown in FIG. 1, a conventional boost circuit can be a power factor correction circuit (PFC) that provides input through an alternating current input terminal, has an inductor L, a capacitor Co, and four switching tubes Q1-Q4, and is used to supply power to a load R. It can be understood that a switching tube refers to a transistor used to realize a switching function. The PFC can support a continuous conduction mode (CCM) and a triangular current mode (TCM). The circuit switching loss of the CCM is large, and generally a volume is traded for efficiency, and both are difficult to achieve. The circuit magnetic loss of the TCM is large, the single-channel conversion power is limited, the filter needs two stages, the volume is large, and the power density is difficult to improve. Based on the development trend of miniaturization and high efficiency, the boost circuit is evolved to that shown in FIG. 2, which is a multi-level PFC that applies flying capacitors. The switching tube Q1 in FIG. 1 is replaced by a plurality of switching tubes Q1-Q6 in series in FIG. 2, the switching tube Q2 in FIG. 1 is replaced by a plurality of switching tubes Q7-Q10 in series in FIG. 2, and the switching tube Q3 in FIG. 1 is replaced by a plurality of switching tubes Q11-Q14 in series in FIG. 2. C1-C5 flying capacitors are introduced, and other structures are similar. Since the switching tube with high voltage resistance in FIG. 1 is replaced by a plurality of switching tubes with low voltage resistance in series in FIG. 2, the structure shown in FIG. 2 reduces switching loss compared to the structure shown in FIG. 1. In addition, the inductance of the structure shown in FIG. 2 is reduced, the current ripple is reduced, and therefore the magnetic loss is also reduced, and the volume of the front-stage filter (not shown in FIG. 2) can be reduced, thereby achieving a balance between high efficiency and small volume. 12 In addition, the input scenario of the boost circuit is diverse, and it is required to adapt to scenarios such as lightning surges. As shown in FIG. 3, V in is an input voltage waveform curve, and V BUS+The bus positive voltage curve refers to the voltage of the positive electrode of the bus, where the bus refers to the main power conductor in the boost circuit for power output, the bus is used to connect the load, the bus positive electrode refers to the positive electrode of the voltage after the boost of the boost circuit, that is, the positive electrode of the voltage of the load end, the bus positive electrode voltage is the positive electrode voltage of the load end, similarly, the bus negative electrode refers to the negative electrode of the voltage after the boost of the boost circuit, that is, the negative electrode of the voltage of the load end, the bus negative electrode voltage is the negative electrode voltage of the load end, in the surge scenario, the mutation of the input voltage will cause the bus positive electrode voltage to mutate by about 200V within tens of microseconds, that is, the bus positive electrode voltage is increased from 400V to 600V. The switch tube selected in FIG. 1 is generally 650V voltage-resistant, and in the surge scenario shown in FIG. 3, it can withstand the instantaneous rise of the bus voltage. However, Q1-Q 12 The voltage resistance of these switch tubes is 150V, and the voltage difference across the flying capacitor C5 is 330V. When the bus positive electrode voltage is instantaneously increased from 400V to 600V, the outermost switch tube Q 12 needs to withstand a voltage difference of 600-330=270V, which exceeds its voltage resistance and is easily damaged by breakdown.

[0031] The embodiments of the present application can solve the above problems, and the embodiments of the present application will be described below.

[0032] As shown in FIG. 4, the embodiments of the present application provide a boost circuit, which comprises: a first inductor L1, a first end (left end) of the first inductor L1 is electrically connected to the positive electrode V in+The first end (left end) of the second inductor L2 is electrically connected to the second end (right end) of the first inductor L1. The connection node between the first inductor L1 and the second inductor L2 is point A. At least two first switch tubes are connected in series between the second end (right end) of the second inductor L2 and the bus positive pole BUS+, for example, six first switch tubes Q1-Q6 are connected in series between the second inductor L2 and the bus positive pole BUS+ in a seven-level boost circuit. The switch tube can be a MOSFET, for example, which has a source, a drain and a gate, and the gate is the control end. The series connection between the MOSFETs means that the sources and drains of the MOSFETs are connected end to end in sequence. Taking the first switch tube as an N-type for example, the left end is the source and the right end is the drain. The source of the first first switch tube Q1 is electrically connected to the second end of the second inductor L2, and the source of each first switch tube is electrically connected to the drain of the previous first switch tube. The drain of the sixth first switch tube Q6 is electrically connected to the bus positive pole BUS+. The connection node between any two adjacent first switch tubes is a first node, and there are five first nodes between the six first switch tubes Q1-Q6, which are A1-A5 in the left-to-right direction. Each first switch tube has a first parasitic diode d1, and the conduction direction of the first parasitic diode d1 is from the second end of the second inductor L2 to the bus positive pole BUS+, i.e. from left to right. The anode of the first parasitic diode d1 is electrically connected to the left end of the corresponding first switch tube, and the cathode of the first parasitic diode d1 is electrically connected to the right end of the corresponding first switch tube. The output capacitor C o In addition, the bus positive pole BUS+ and the bus negative pole BUS- are also used to be electrically connected to the load R to supply power to the load R.

[0033] At least two second switch tubes are connected in series between the second end (right end) of the second inductor L2 and the bus negative pole BUS-, for example, six second switch tubes Q7-Q 12 Taking the second switch tube as an N-type for example, the upper end is the drain and the lower end is the source. The drain of the first second switch tube Q7 is electrically connected to the second end of the second inductor L2, and the drain of each second switch tube is electrically connected to the source of the previous second switch tube. The drain of the sixth second switch tube Q 12The source of each second switch tube is electrically connected to the bus negative electrode BUS-. Each second switch tube has a second parasitic diode d2, the conduction direction of the second parasitic diode d2 being from the bus negative electrode BUS- to the second end of the second inductor L2, that is, the conduction direction of the second parasitic diode d2 being from bottom to top, the anode of the second parasitic diode d2 being electrically connected to the lower end of the corresponding second switch tube, and the cathode of the second parasitic diode d2 being electrically connected to the upper end of the corresponding second switch tube. The number of first switch tubes connected in series between the second inductor L2 and the bus positive electrode BUS+ is the same as the number of second switch tubes connected in series between the second inductor L2 and the bus negative electrode BUS-. The connection node between any two adjacent second switch tubes is a second node, and there are six second switch tubes Q7-Q 12 , five second nodes B1-B5 in the direction from top to bottom. Along the direction from the second end of the second inductor L2 to the bus positive electrode BUS+ and along the direction from the second end of the second inductor L2 to the bus negative electrode BUS-, the first node corresponds to the second node one by one, that is, A1 corresponds to B1, A2 corresponds to B2, and so on, A1-A5 and B1-B5 correspond one by one in the order of arrangement. The first capacitors electrically connected between each first node and the corresponding second node, that is, the first capacitor C1 electrically connected between A1 and B1, the first capacitor C2 electrically connected between A2 and B2, the first capacitor C3 electrically connected between A3 and B3, the first capacitor C4 electrically connected between A4 and B4, and the first capacitor C5 electrically connected between A5 and B5, are the flying capacitors. The first diode D1 and the second diode D2 connected in series between the bus positive electrode BUS+ and the bus negative electrode BUS-, wherein the cathode of the first diode D1 is electrically connected to the bus positive electrode BUS+, the anode of the first diode D1 is electrically connected to the cathode of the second diode D2, the anode of the second diode D2 is electrically connected to the bus negative electrode BUS-, and the anode of the first diode D1 is electrically connected to the input negative electrode V in- , that is, the connection node between the first diode D1 and the second diode D2 is electrically connected to the input negative electrode V in- , the connection node between the first diode D1 and the second diode D2 is the B point. The third diode D3, the anode of the third diode D3 being electrically connected to the bus negative electrode BUS-, and the cathode of the third diode D3 being electrically connected to the input negative electrode V in- ; the fourth diode D4, the anode of the fourth diode D4 being electrically connected to the bus negative electrode BUS-, and the cathode of the fourth diode D4 being electrically connected to the first end (left end) of the second inductor L2. The fifth diode D5, the anode of the fifth diode D5 being electrically connected to the input negative electrode V in-The cathode of the fifth diode D5 is electrically connected to the positive bus BUS+. The anode of the sixth diode D6 is electrically connected to the first end (left end) of the second inductor L2, and the cathode of the sixth diode D6 is electrically connected to the positive bus BUS+. At least one of the first switch Q1-Q6 and the second switch Q7-Q 12 The corresponding variable resistance device is a device that changes from a high resistance state to a conductive state when the voltage difference between two ends exceeds a voltage threshold, that is, when the voltage difference between the two ends of the variable resistance device is small, that is, does not exceed the voltage threshold, it has a higher resistance, and is in a high-resistance non-conductive state, and when the voltage difference between the two ends of the variable resistance device is large, that is, exceeds the voltage threshold, it has a lower resistance, and is in a low-resistance conductive state. The variable resistance device is, for example, a bidirectional transient voltage suppressor (TVS). In the structure shown in FIG. 4, Q1 is connected in parallel with the corresponding TVS1, Q2 is connected in parallel with the corresponding TVS2, and so on. Each of the first switch Q1-Q6 and the second switch Q7-Q 12 is connected in parallel with the corresponding bidirectional TVS. The first switch Q1-Q6 and the second switch Q7-Q 12 For example, the boost circuit further comprises a controller W1 (which can be various control circuits with processing functions, including but not limited to various processors such as CPUs, DSPs, FPGAs, ASICs, CPLDs, and control circuits realized based on discrete devices), which is used to control the first switch Q1-Q6 and the second switch Q7-Q 12Cutoff. For example, in the structure shown in Figure 4, the voltage can be obtained through a sampling circuit. The sampling circuit may include a sampling resistor r connected in series between the second inductor L2 and point A. The sampling circuit also includes a subtractor W2, whose first input terminal is electrically connected to one end of the sampling resistor r, and whose second input terminal is electrically connected to the other end of the sampling resistor r. The sampling circuit also includes a comparator W3, whose first input terminal is electrically connected to the output terminal of the subtractor W2, and whose second input terminal is electrically connected to the reference voltage terminal ref. The output terminal of the comparator W3 is electrically connected to the controller W1. The voltage value across the sampling resistor r can be obtained through the sampling resistor r. The subtractor W2 can subtract the voltage value across the sampling resistor r to obtain the voltage difference across the sampling resistor r. Since the resistance value of the sampling resistor r is known, the voltage difference across the sampling resistor r can reflect the current value across the sampling resistor r, that is, the current value across the second inductor L2. The voltage value at the reference voltage terminal ref reflects the current threshold. Comparator W3 can compare the voltage difference across the sampling resistor r with the reference voltage value and output the comparison result. For example, if the voltage difference across the sampling resistor r is greater than the reference voltage value, it means that the current in the second inductor L2 exceeds the current threshold, and comparator W3 outputs 1. At this time, controller W1 controls the first switching transistors Q1 to Q6 and the second switching transistors Q7 to Q8. 12 If the voltage difference across the sampling resistor r is not greater than the reference voltage value, it indicates that the current through the second inductor L2 has not exceeded the current threshold, and comparator W3 outputs 0. At this time, controller W1 will operate according to the normal boost circuit logic, controlling the first switching transistors Q1-Q6 and the second switching transistors Q7-Q6. 12 Control is performed to ensure the boost circuit operates normally. Understandably, the current sampling circuit can have other variations. For example, the sampling resistor r can be connected in series not only to the left of the second inductor L2 but also to the right, as long as current sampling of the second inductor L2 can be achieved. Alternatively, an amplifying device can be added to the current sampling circuit to improve sampling accuracy. Other current sampling methods based on different principles can also be used, such as using a Hall effect device to obtain the current on the second inductor L2. This application does not limit the method of obtaining the current on the second inductor L2 in its embodiments.

[0034] Specifically, in non-surge scenarios, the first switching transistors Q1 to Q6 and the second switching transistors Q7 to Q6... 12 The voltage difference across either of them will not exceed the voltage threshold; therefore, the voltage difference between TVS1 and TVS1 mentioned above will not exceed the voltage threshold. 12 All remain in a high-impedance state, which will not affect the normal operation of the boost circuit. Furthermore, the current in the second inductor L2 will not exceed the current threshold. The first switching transistors Q1-Q6 and the second switching transistors Q7-Q6... 12The voltage boosting control is performed according to normal logic control. The working process of the voltage boosting circuit in the surge scenario is described below. As shown in FIG. 5a and FIG. 5b, FIG. 5a shows three signal curve relationships of the circuit in FIG. 4 in a 3000V voltage surge scenario, including a voltage VBUS+ curve representing the positive bus BUS+, a voltage VC5 curve of the first capacitor C5, and a current iL2 curve of the second inductor L2, and FIG. 5b shows three signal curve relationships of the circuit in FIG. 4 in a 6000V voltage surge scenario, including a voltage VBUS+ curve representing the positive bus BUS+, a voltage VC5 curve of the first capacitor C5, and a voltage VC4 curve of the first capacitor C4. As shown in FIG. 6, taking the surge scenario shown in FIG. 5a as an example, from the t1-t2 time period, a forward surge is injected from the input end, the voltage at point A rises, and the current iL2 of the second inductor rises. Assuming that the voltage VBUS+ of the positive bus rises from 400V to 450V, when the current iL2 of the second inductor rises to exceed the current threshold, the first switch Q i ~Q6 and the second switch Q7~Q 12 are turned off to achieve clamping. At this time, the circuit in FIG. 4 is in the on state shown in FIG. 6, where the dashed line represents the path of the turned-off switch. The rise of the voltage VBUS+ of the positive bus charges the output capacitor C o , and there are two current charging paths from point A to the positive bus BUS+, one path is through the second inductor L2 and each first parasitic diode d1 in turn, and the surge will not damage the diode; the other path is through the sixth diode D6. The conduction of the two paths causes the current loop to exist continuously. There are also two paths for the current loop from the negative bus BUS- to point B, one is through the second diode D2, and the other is through the third diode D3. The arrows on the signal lines in FIG. 6 and FIG. 7 point to the current flow direction in the current loop.

[0035] As shown in FIG. 7, from the t2-t3 time period, because the voltage difference across the first parasitic diode d1 is small, the voltage difference across each first switch can be approximately clamped to 0V. As a result, due to the action of the first capacitor C5, the voltage difference from B5 to the negative bus BUS- rises rapidly.

[0036] Assuming that Q 12 is not connected in parallel with a corresponding TVS 12 across its two terminals, the voltage VBUS+ of the positive bus rises to 500V, and the voltage across the first capacitor C5 is 330V, then the voltage difference from B5 to the negative bus BUS- rises to 500-330=170V, which exceeds the withstand voltage 150V of Q 12 .

[0037] In the embodiment of the present application, however, Q 12 is connected in parallel with a corresponding TVS12 TVS 12 The voltage threshold of TVS 12 may be set to 100V. During the process of the voltage VBUS+ of the positive bus rising, if the voltage difference between B5 and the negative bus BUS- rises to more than 100V, TVS 12 will change from high resistance state to conduction state, thereby charging the first capacitor C5 to hinder the voltage difference between the two ends of TVS 12 rising. The voltage difference between B5 and the negative bus BUS- continues to rise, which will further reduce the resistance value of TVS 12 , i.e. further improve the current carrying capacity of TVS 12 . Through the current carrying effect of TVS 12 , the voltage difference between the two ends of Q 12 will not exceed the withstand voltage 150V of Q

[0038] Similarly, the voltage threshold of TVS 11 may also be set to 100V. During the process of the voltage VBUS+ of the positive bus rising, if the voltage difference between B4 and B5 rises to more than 100V, TVS 11 will change from high resistance state to conduction state, thereby charging the first capacitor C4 to hinder the voltage difference between the two ends of Q 11 rising. The voltage difference between B4 and B5 continues to rise, which will further reduce the resistance value of TVS 11 , i.e. further improve the current carrying capacity of TVS 11 . Through the current carrying effect of TVS 11 , the voltage difference between the two ends of Q 11 will not exceed the withstand voltage 150V of Q 11 , for example, maintaining about 130V. By analogy, TVS 12 ~TVS7 can protect Q 12 ~Q7 by charging the corresponding first capacitors C5~C1, thereby reducing the probability of Q

[0039] In the examples shown in FIGS. 5-7, the input is a forward surge. The following will be described by taking input of a reverse surge as an example.

[0040] As shown in Fig. 8, when a reverse surge is injected from the input end, the voltage at point B rises, and there are two current charging paths from point B to the positive bus BUS+, one through the fifth diode D5 and the other through the first diode D1. There are also two current loops from the negative bus BUS- to point A, one through the fourth diode D4 and the other through the second parasitic diode d2 and the second inductor L2 in sequence. When the current of the second inductor L2 rises to exceed the current threshold, the first switches Q1-Q6 and the second switches Q7-Q12 will be turned on, and the current of the second inductor L2 will flow through the first capacitor C5 and the first switch Q6 to the positive bus BUS+. 12 When the first switch Q6 is turned off, the circuit is cut off to achieve wave trapping, at this time, the circuit in Fig. 4 is in the on state shown in Fig. 8, where the dashed line represents the cut-off path, and the current direction of the second inductor L2 in Fig. 8 is opposite to that of the second inductor L2 in Fig. 6. Since the voltage difference across the second parasitic diode d2 is small, the voltage difference across each second switch can be approximately clamped to 0V, so that the voltage difference from the positive bus BUS+ to A5 will rapidly rise due to the action of the first capacitor C5.

[0041] Since the corresponding TVS6 is connected in parallel across Q6, the voltage threshold of TVS6 can be set to 100V. During the rise of the voltage VBUS+ of the positive bus, if the voltage difference from the positive bus BUS+ to A5 rises to exceed 100V, TVS6 will change from the high resistance state to the on state, thereby charging the first capacitor C5 to hinder the rise of the voltage difference across Q6. The continuous rise of the voltage VBUS+ of the positive bus will further reduce the resistance value of TVS6, i.e. further improve the current carrying capacity of TVS6. Through the current carrying action of TVS6, the voltage difference across Q6 will not exceed the withstand voltage of Q6, e.g. be maintained at about 130V.

[0042] Similarly, the voltage threshold of TVS5 can also be set to 100V. During the rise of the voltage VBUS+ of the positive bus, if the voltage difference from A5 to A4 rises to exceed 100V, TVS5 will change from the high resistance state to the on state, thereby charging the first capacitor C4. The continuous rise of the voltage VBUS+ of the positive bus will further reduce the resistance value of TVS5, i.e. further improve the current carrying capacity of TVS5. Through the current carrying action of TVS5, the voltage difference across Q5 will not exceed the withstand voltage of Q5, e.g. be maintained at about 130V. By analogy, TVS6-TVS1 can protect the first switches Q6-Q1 by charging the corresponding first capacitors C5-C1, thereby reducing the probability of damage due to surge overvoltage.

[0043] In addition, according to the working process of the boost circuit in the above surge scenario, it can be known that the fifth diode D5 and the sixth diode D6 are unnecessary, and the current loop in the surge scenario can also be realized even without the two diodes, and therefore in some possible embodiments, the two diodes D5 and D6 can be omitted.

[0044] In the boost circuit in the embodiments of the present application, the corresponding variable resistance device is connected in parallel with at least one switch tube between the flying capacitor and the bus, so that in the non-surge scenario, the bus voltage is the working voltage of the load, and through the voltage division effect of the plurality of series switch tubes, the voltage across each switch tube is relatively low, that is, the voltage across any switch tube does not exceed the voltage threshold, at this time, the variable resistance device is in a high resistance state and does not affect the normal operation of the circuit, at this time, the resistance of the variable resistance device is infinite and has no loss, in the surge scenario, as the bus voltage rises, when the current on the second inductor rises to exceed the current threshold, all the first switch tubes and the second switch tubes are cut off to reduce the damage to the switch tubes caused by the sudden change of current, the second diode and the sixth diode are used to form a current path under forward surge, and the first diode and the fourth diode are used to form a current path under reverse surge, since each switch tube has a corresponding parasitic diode, through the conduction effect of the parasitic diode, the voltage across at least part of the first switch tubes and the second switch tubes is further increased relative to the non-surge scenario, when the voltage across the switch tube connected in parallel with the variable resistance device exceeds the voltage threshold, the variable resistance device changes from the high resistance state to the conduction state, thereby charging the flying capacitor, and further hindering the voltage difference across at least part of the switch tubes connected in parallel with the variable resistance device from rising, that is, through the current flowing effect of the variable resistance device, the voltage across at least part of the switch tubes connected in parallel with the variable resistance device is maintained from being too high, thereby reducing the probability of at least part of the first switch tubes and the second switch tubes being damaged by breakdown due to surge overvoltage.

[0045] In some embodiments, the voltage threshold of the variable resistance device is less than the voltage resistance of the switch tube connected in parallel therewith, for example, in the above example, the voltage resistance of Q6 is 150V, and the voltage threshold of TVS6 can be set to 100V which is less than 150V, since the voltage threshold of the variable resistance device is lower than the voltage resistance of the expected parallel switch tube, through such a setting, the variable resistance device can protect the switch tube connected in parallel therewith through the conduction state of the variable resistance device before the voltage difference across the switch tube rises and reaches its voltage resistance, so as to prevent the switch tube from being damaged by breakdown due to surge overvoltage.

[0046] In some embodiments, in a surge scenario, the positive bus or the negative bus will change in voltage more quickly, so the first switch tube closest to the positive bus and the second switch tube closest to the negative bus are most likely to be damaged due to the rapid change in voltage of the positive bus or the negative bus in a surge scenario, so one of the first switch tubes Q6 closest to the positive bus BUS+ and one of the second switch tubes Q7 closest to the negative bus BUS- among the above-mentioned first switch tubes Q1-Q6 and the second switch tubes Q7-Q 12 12 respectively in parallel with the corresponding variable resistance devices, that is, in some possible implementations, TVS1-TVS5 and TVS6-TVS 11 These variable resistance devices can be omitted, and only the outermost TVS6 and TVS 12 . According to the above description of FIGS. 4-8, it can be known that in the boost circuit, the switch tubes most likely to be damaged by surges are the outermost Q6 and Q 12 Therefore, the variable resistance devices corresponding to the two switch tubes in parallel can be preferentially set to preferentially improve the probability of breakdown damage of the two switch tubes while reducing costs.

[0047] In some embodiments, as shown in FIG. 4, each of the above-mentioned first switch tubes Q1-Q6 and the second switch tubes Q7-Q 12 is connected in parallel with a corresponding variable resistance device, and the variable resistance devices include TVS1-TVS 12 The variable resistance devices corresponding to each of the switch tubes Q1-Q 12 are connected in parallel, so that the voltage across any one of all the first switch tubes Q1-Q6 and the second switch tubes Q7-Q 12 will be clamped by the variable resistance device connected in parallel when the voltage rises in a surge scenario, avoiding excessive voltage across each first switch tube and each second switch tube, and protecting each first switch tube and each second switch tube to the greatest extent in a surge scenario.

[0048] In some embodiments, as shown in FIGS. 6 and 7, the cathode of the fifth diode D5 is connected to the positive bus BUS+ through a current buffering device, which can be an equivalent series inductance (ESL) of a signal line on a circuit board, or an additional inductance or small resistance. The current buffering device plays a role of current buffering in a surge scenario, which can prevent the current in the path between the second inductor L2 and the positive bus BUS+ from being too large to reduce the impact of the current on the device.

[0049] ​In some embodiments, the voltage boosting circuit further comprises: a first input capacitor C1 electrically connected between the input positive terminal V in+ and the input negative terminal V in- ; and a second input capacitor C2 electrically connected between the first end (left end) of the second inductor L2 and the input negative terminal V in- .

[0050] In some embodiments, the voltage boosting circuit further comprises: a surge absorbing circuit electrically connected between the input positive terminal V in+ and the input negative terminal V in- , the surge absorbing circuit is used to absorb the surge when the surge voltage comes to the input terminal, but there may still be a surge after the absorption, and the surge that the surge absorbing circuit cannot absorb is further protected by using the variable resistance device to further protect the first diode and the second diode.

[0051] In the above embodiments, the variable resistance device is a bidirectional transient voltage suppression diode (TVS), and in other possible embodiments, the variable resistance device can also be a pressure-sensitive resistor, which has a similar principle to the bidirectional TVS, and will not be described here.

[0052] The first diode D1, the second diode D2, the third diode D3, the fourth diode D4, the fifth diode D5, and the sixth diode D6 in the above embodiments are respectively a first unidirectional conduction device, a second unidirectional conduction device, a third unidirectional conduction device, a fourth unidirectional conduction device, a fifth unidirectional conduction device, and a sixth unidirectional conduction device. That is, the above six unidirectional conduction devices can be other types of devices in addition to independent diodes, for example, in some embodiments, the first unidirectional conduction device, the second unidirectional conduction device, the third unidirectional conduction device, the fourth unidirectional conduction device, the fifth unidirectional conduction device, and the sixth unidirectional conduction device are respectively six switch tubes, each switch tube has a parasitic diode, at this time, the unidirectional conduction function is realized through the parasitic diode, so D 1～6 , for example, the first diode D1 can be the parasitic diode of the switch tube Q 13 , the second diode D2 can be the parasitic diode of the switch tube Q 14 , that is, the voltage boosting circuit comprises two switch tubes Q - and Q 13 connected in series between the bus positive terminal BUS+ and the bus negative terminal BUS 14, the parasitic diode of the two switch tubes are the first diode D1 and the second diode D2 respectively. Similarly, any one of the third diode D3 to the sixth diode D6 can also be the parasitic diode of the switch tube, as shown in FIG. 9, which shows the specific structure of D3-D6 as the parasitic diode of the switch tube, the boost circuit further comprises a switch tube Q in- , the parasitic diode of which is the third diode D3, the boost circuit further comprises a switch tube Q 15 , the parasitic diode of which is the fourth diode D4, the boost circuit further comprises a switch tube Q 16 , the parasitic diode of which is the fourth diode D4, the boost circuit further comprises a switch tube Q in- , the parasitic diode of which is the fifth diode D5, the boost circuit further comprises a switch tube Q 17 , the parasitic diode of which is the fifth diode D5, the boost circuit further comprises a switch tube Q 18 , the parasitic diode of which is the sixth diode D6. In the working process of the above-mentioned circuit, for the diodes D1-D6, when they are turned on, the corresponding switch tubes can be controlled to be turned on at the same time, and when they are turned off, the corresponding switch tubes can be controlled to be turned off at the same time, so as to improve the current transmission efficiency. The above-mentioned switch tube with a parasitic diode can be a silicon-based MOSFET. In addition, in addition to realizing the unidirectional conduction function through a separate diode or the parasitic diode of the switch tube, the unidirectional conduction function can also be realized directly by using a switch tube, such as a GaN switch tube.

[0053] In addition, the input end of the above-mentioned boost circuit can input alternating current or direct current, that is, it can be applied in an alternating current to direct current power supply or a direct current to direct current power supply. In the alternating current to direct current power supply, the above-mentioned boost circuit can be called a power factor correction circuit (PFC). In the above-mentioned embodiment, only the switch tube is taken as an example of MOSFET, and the switch tube can also be a triode or an insulate-gate bipolar transistor (IGBT) or other types of transistors.

[0054] In the above embodiments, the multi-level voltage boosting circuit structure with five flying capacitors (first capacitors) is taken as an example for illustration, it can be understood that the number of flying capacitors is not limited in the embodiments of the present application, the number of flying capacitors is related to the number of first switch tubes and second switch tubes, for example, the voltage boosting circuit with three flying capacitors has four first switch tubes and four second switch tubes, and the voltage boosting circuit with two flying capacitors has three first switch tubes and three second switch tubes. The number of flying capacitors is at least one, that is, there are at least two first switch tubes and two second switch tubes, as shown in FIG. 10, which illustrates a voltage boosting circuit structure of one flying capacitor, including two first switch tubes Q1 and Q2 connected in series between the second end of the second inductor L2 and the positive bus BUS+, and two second switch tubes Q3 and Q4 connected in series between the second end of the second inductor L2 and the negative bus BUS-, A1 node is between Q1 and Q2, B1 node is between Q3 and Q4, and a first capacitor C1 is connected between A1 node and B1 node. On this basis, TVS1 can be arranged in parallel with Q2, and TVS2 can be arranged in parallel with Q4.

[0055] In the above embodiments, only the variable resistance device connected in parallel between the source and drain of a single switch tube is taken as an example for illustration, in other possible embodiments, the variable resistance device can also be connected in parallel between the two ends of two or more switch tubes connected in series. For example, as shown in FIG. 11, the difference between the circuit structure shown in FIG. 11 and that shown in FIG. 4 is that the number of variable resistance devices is reduced, and the connection mode of the variable resistance devices is changed. In the structure shown in FIG. 11, TVS1 and TVS2 are included, TVS1 is connected in parallel between Q5 and Q6 adjacent to each other and connected in series, that is, the two ends of TVS1 are electrically connected to A4 and the positive bus BUS+ respectively, and TVS2 is connected in parallel between Q 11 and Q 12 adjacent to each other and connected in series, that is, the two ends of TVS2 are electrically connected to B4 and the negative bus BUS- respectively. That is, the variable resistance device can be connected in parallel between multiple switch tubes adjacent to each other and connected in series. The working principle of the structure in FIG. 11 under the forward surge scenario is described below. The forward surge is injected from the input end, the voltage at A point rises, the first switch tubes Q1-Q6 and the second switch tubes Q7-Q 12 are turned off. Since the voltage difference across the first parasitic diode d1 is small, the voltage difference across each first switch tube can be approximately clamped to 0V, so that the voltage difference from A4 to the negative bus BUS- will rapidly rise, and due to the action of C4, the voltage rise at A4 will cause the voltage at B4 to rise. Since the two ends of the series branch of Q 11 and Q 12 are connected in parallel with the corresponding TVS2, the voltage threshold of TVS2 can be set to be less than that of Q 11 and Q 12The withstand voltage after series connection is such that, during the voltage rise at the positive terminal BUS+ of the bus, if the voltage difference between B4 and the negative terminal BUS- of the bus exceeds the voltage threshold, TVS2 will change from a high-resistance state to a conducting state, thereby charging the first capacitor C4 and hindering Q. 11 The voltage difference across the terminals increases. This is because, through the current-carrying effect of TVS2, Q... 11 The voltage difference between the two ends is kept below the withstand voltage, thereby reducing Q. 11 The probability of Q5 being damaged due to surges is reduced. For reverse surges, the probability of Q5 being damaged due to surges can be reduced through a similar principle. The specific principle is similar to that in the above embodiments and will not be repeated here.

[0056] In some embodiments, besides the method of connecting a variable resistor in parallel across a single switching transistor as described above, multiple variable resistors can also be connected in parallel across a single switching transistor. For example, as shown in Figure 12, the first switching transistor Q2 has two variable resistors, TVS1 and TVS2, connected in series, connected in parallel across it, and the second switching transistor Q4 has two variable resistors, TVS3 and TVS4, connected in series, connected in parallel across it. As another example, as shown in Figure 13, the first switching transistor Q2 has TVS1 connected in parallel and then TVS2 connected in parallel across it, and the second switching transistor Q4 has TVS3 connected in parallel and then TVS4 connected in parallel across it, meaning multiple variable resistors are connected in parallel across a single switching transistor. Furthermore, multiple variable resistors can also be connected in parallel across multiple switching transistors, as shown in Figure 14, where the first switching transistors Q5 and Q6 have TVS1 and TVS2 connected in series, and the second switching transistor Q... 11 and Q 12 Two variable resistors, TVS3 and TVS4, are connected in parallel across the two ends and are in series. For example, as shown in Figure 15, the first switching transistors Q5 and Q6 have TVS1 connected in parallel, and then TVS2 is connected in parallel across them. The second switching transistor Q... 11 and Q 12 TVS3 is connected in parallel across the two ends, and TVS4 is also connected in parallel across the two ends. Alternatively, various combinations can be used to configure the variable resistor, as shown in Figure 16. TVS1 is connected in parallel across the first switching transistor Q6, and TVS3 is connected in parallel across the first switching transistors Q4 and Q5, in addition to TVS2. The second switching transistor Q... 12 A TVS4 is connected in parallel at both ends, and the second switching transistor Q is... 10 and Q 11 Two variable resistors, TVS6 and TVS7, are connected in parallel at both ends and are connected in series.

[0057] In some embodiments, as shown in FIG. 17, which is similar to FIG. 11, the difference is that, on the basis of the structure shown in FIG. 11, a variable resistance device TVS3 is connected in parallel across the first switch tube Q6, and a variable resistance device TVS4 is connected in parallel across the second switch tube Q 12 Thus, on the basis of the protection of Q5 by TVS1 and the protection of Q 11 by TVS2, the protection of Q6 by TVS3 and the protection of Q 12 by TVS4 can also be achieved.

[0058] In some embodiments, as shown in FIG. 18, the second end (right end) of the second inductor L2 is connected to the bus positive pole BUS+ through a corresponding variable resistance device, such as TVS1; each first node is connected to the bus positive pole BUS+ through a corresponding variable resistance device, for example, the first node A1 is connected to the bus positive pole BUS+ through a corresponding TVS2, the first node A2 is connected to the bus positive pole BUS+ through a corresponding TVS3, the first node A3 is connected to the bus positive pole BUS+ through a corresponding TVS4, the first node A4 is connected to the bus positive pole BUS+ through a corresponding TVS5, and the first node A5 is connected to the bus positive pole BUS+ through a corresponding TVS6; the second end (right end) of the second inductor L2 is connected to the bus negative pole BUS- through a corresponding variable resistance device, such as TVS7; each second node is connected to the bus negative pole BUS- through a corresponding variable resistance device, for example, the second node B1 is connected to the bus negative pole BUS- through a corresponding TVS8, the second node B2 is connected to the bus negative pole BUS- through a corresponding TVS9, the second node B3 is connected to the bus negative pole BUS- through a corresponding TVS 10 , the second node B4 is connected to the bus negative pole BUS- through a corresponding TVS 11 , and the second node B5 is connected to the bus negative pole BUS- through a corresponding TVS 12 . The structures of FIG. 18 and FIG. 4 are different, but the principles of overvoltage protection for each switch tube are similar. In the forward surge scenario, Q 12 ~Q7 can be protected by TVS 12 6~TVS7 respectively, and in the reverse surge scenario, Q6~Q1 can be protected by TVS6~TVS1 respectively.

[0059] The embodiments of the present application also provide an electronic device comprising the boost circuit in any of the above embodiments. The electronic device can be a base station, a server, a vehicle, or a power supply device, etc.

[0060] In the embodiments of the present application, "at least one" refers to one or more, and "multiple" refers to two or two or more. The "and / or" describes the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Wherein A, B can be singular or plural. The character " / " generally represents that the associated objects before and after are in an "or" relationship. "At least one of the following" and the like means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b and c can represent: a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, c can be single or multiple.

[0061] The above is only the preferred embodiment of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A boost circuit, characterized by comprising: The application relates to a power supply circuit, comprising: a first inductor, a first end of the first inductor being electrically connected to a positive pole of an input end; a second inductor, a first end of the second inductor being electrically connected to a second end of the first inductor; at least two first switch tubes are connected in series between the second end of the second inductor and a positive pole of a bus bar, and a connection node between any two adjacent first switch tubes is a first node; each first switch tube has a first parasitic diode, and the conduction direction of the first parasitic diode is from the second end of the second inductor to the positive pole of the bus bar; an output capacitor is electrically connected between the positive pole of the bus bar and a negative pole of the bus bar; at least two second switch tubes are connected in series between the second end of the second inductor and the negative pole of the bus bar, and a connection node between any two adjacent second switch tubes is a second node, the number of the at least two first switch tubes is the same as that of the at least two second switch tubes, the first node corresponds to the second node in the direction from the second end of the second inductor to the positive pole of the bus bar and in the direction from the second end of the second inductor to the negative pole of the bus bar; each second switch tube has a second parasitic diode, and the conduction direction of the second parasitic diode is from the negative pole of the bus bar to the second end of the second inductor; a first capacitor is electrically connected between each first node and the corresponding second node; a first unidirectional conducting device and a second unidirectional conducting device are connected in series between the positive pole of the bus bar and the negative pole of the bus bar, the second end of the first unidirectional conducting device is electrically connected to the positive pole of the bus bar, the first end of the first unidirectional conducting device is electrically connected to the second end of the second unidirectional conducting device, the first end of the second unidirectional conducting device is electrically connected to the negative pole of the bus bar, the first end of the first unidirectional conducting device is electrically connected to a negative pole of the input end, the conduction direction of the first unidirectional conducting device is from the negative pole of the input end to the positive pole of the bus bar, and the conduction direction of the second unidirectional conducting device is from the negative pole of the bus bar to the negative pole of the input end; a fourth unidirectional conducting device, the first end of the fourth unidirectional conducting device being electrically connected to the negative pole of the bus bar, the second end of the fourth unidirectional conducting device being electrically connected to the first end of the second inductor, and the conduction direction of the fourth unidirectional conducting device being from the negative pole of the bus bar to the first end of the second inductor; a sixth unidirectional conducting device, the first end of the sixth unidirectional conducting device being electrically connected to the first end of the second inductor, the second end of the sixth unidirectional conducting device being electrically connected to the positive pole of the bus bar, and the conduction direction of the sixth unidirectional conducting device being from the first end of the second inductor to the positive pole of the bus bar; at least one switch tube in the at least two first switch tubes and the at least two second switch tubes is connected in parallel with a corresponding variable resistance device, the variable resistance device is a device that changes from a high resistance state to a conduction state when the voltage difference between two ends exceeds a voltage threshold value; the at least two first switch tubes and the at least two second switch tubes are used to be turned off when the current on the second inductor exceeds a current threshold value.

2. The boost circuit of claim 1, wherein The application further comprises: a third unidirectional conducting device, a first end of the third unidirectional conducting device is electrically connected to the bus negative electrode, a second end of the third unidirectional conducting device is electrically connected to the input negative electrode, and a conducting direction of the third unidirectional conducting device is from the bus negative electrode to the input negative electrode; a fifth unidirectional conducting device, a first end of the fifth unidirectional conducting device is electrically connected to the input negative electrode, a second end of the fifth unidirectional conducting device is electrically connected to the bus positive electrode, and a conducting direction of the fifth unidirectional conducting device is from the input negative electrode to the bus positive electrode.

3. The voltage boosting circuit according to claim 1, wherein the voltage threshold of the variable resistance device is less than the voltage resistance of the switch tube connected in parallel with the variable resistance device.

4. The voltage boosting circuit according to claim 1, wherein one of the at least two first switch tubes closest to the bus positive electrode and one of the at least two second switch tubes closest to the bus negative electrode are respectively connected in parallel with corresponding variable resistance devices.

5. The voltage boosting circuit according to claim 1, wherein each of the at least two first switch tubes and the at least two second switch tubes is connected in parallel with a corresponding variable resistance device.

6. The voltage boosting circuit according to claim 1, wherein a corresponding variable resistance device is connected between the second end of the second inductor and the bus positive electrode; a corresponding variable resistance device is connected between each of the first nodes and the bus positive electrode; a corresponding variable resistance device is connected between the second end of the second inductor and the bus negative electrode; a corresponding variable resistance device is connected between each of the second nodes and the bus negative electrode.

7. The voltage boosting circuit according to claim 1, wherein the unidirectional conducting device is a diode, a first end of the unidirectional conducting device is an anode of the diode, and a second end of the unidirectional conducting device is a cathode of the diode; alternatively, the unidirectional conducting device is a first type switch tube, the first type switch tube has a parasitic diode, and the parasitic diode of the first type switch tube is used to realize the unidirectional conducting function; alternatively, the unidirectional conducting device is a second type switch tube, the second type switch tube is a gallium nitride switch tube, and the gallium nitride switch tube is used to realize the unidirectional conducting function.

8. The voltage boosting circuit according to claim 2, wherein the second end of the fifth unidirectional conducting device is electrically connected to the bus positive electrode through a current buffer device.

9. The boost circuit of claim 1, wherein, Further comprising: a first input capacitor electrically connected between the input positive electrode and the input negative electrode; a second input capacitor electrically connected between the first end of the second inductor and the input negative electrode.

10. The boost circuit of claim 1, wherein, Further comprising: a surge absorbing circuit electrically connected between the input positive electrode and the input negative electrode.

11. The voltage boosting circuit according to claim 1, wherein the variable resistance device comprises a bidirectional transient voltage suppression diode or a varistor.

12. The boost circuit of claim 1, wherein, Further comprising: a controller for controlling the at least two first switching tubes and the at least two second switching tubes to be turned off when the current on the second inductor exceeds the current threshold.

13. An electronic device, comprising: A boost circuit comprising the boost circuit according to any one of claims 1 to 12.

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