Light detection device

Abstract

This disclosure relates to a photodetector that enables both improved quantum efficiency and flicker suppression. The photodetector includes a pixel array in which a plurality of pixels are arranged two-dimensionally on a semiconductor substrate. Each pixel includes: a photoelectric conversion unit formed on the semiconductor substrate to perform photoelectric conversion in response to incident light; a light-concentrating unit to focus the incident light onto the photoelectric conversion unit; and a light-guiding unit formed inside the photoelectric conversion unit. The technology disclosed herein can be applied, for example, to a photodetector that receives light in the infrared region and generates a signal.

Description

Technical Field

[0001] This disclosure relates to optical detection devices, and more specifically, to optical detection devices capable of achieving both improved quantum efficiency and flicker suppression. Background Technology

[0002] In Patent Document 1, the applicant proposed a pixel structure that achieves both improved quantum efficiency (Qe) and flicker suppression. Patent Document 1 discloses a structure in which the incident light, converged by an on-chip lens, passes through a pinhole, and the light path length is extended by a diffraction and scattering structure; and a structure in which light reflected or scattered by an element isolation portion disposed at the pixel boundary and a reflective portion disposed on a surface opposite to the light-receiving surface of the photoelectric conversion unit is confined within the photoelectric conversion unit. Patent Documents 2 and 3 disclose a technique in which an element isolation portion disposed at the pixel boundary is formed by using anisotropic crystal etching, the anisotropic crystal etching utilizing the characteristic that the etching rate varies according to the planar orientation.

[0003] Reference List

[0004] Patent documents

[0005] Patent document 1: International Publication No. WO 2022 / 153583

[0006] Patent Document 2: Japanese Patent Application Publication No. 2020-77650

[0007] Patent Document 3: International Publication No. WO 2021 / 111818 Summary of the Invention

[0008] The problem to be solved by the present invention

[0009] To achieve both improved quantum efficiency and flicker suppression, further improvements to the pixel structure are desired.

[0010] This disclosure is made in view of this situation, and by guiding the incident light into the photoelectric conversion unit and increasing the optical path length, both improved quantum efficiency and flicker suppression can be achieved.

[0011] Solution to the problem

[0012] A light detection device according to one aspect of the present disclosure includes: a pixel array section, wherein a plurality of pixels are arranged in two dimensions on a semiconductor substrate; Each pixel includes: A photoelectric conversion unit is formed on a semiconductor substrate and performs photoelectric conversion corresponding to incident light. The focusing section concentrates the incident light onto the photoelectric conversion section, and The light guide is formed inside the photoelectric conversion unit.

[0013] In one aspect of this disclosure, a pixel array portion in which a plurality of pixels are arranged in two dimensions is disposed on a semiconductor substrate, and the pixel includes: a photoelectric conversion portion formed on the semiconductor substrate and performing photoelectric conversion according to incident light; a light-concentrating portion that concentrates the incident light onto the photoelectric conversion portion; and a light-guiding portion formed inside the photoelectric conversion portion.

[0014] The optical detection device can be a standalone device or a module integrated into another device. Attached Figure Description

[0015] Figure 1 This is a block diagram illustrating a configuration embodiment of a light detection device according to a first embodiment of the technology of this disclosure.

[0016] Figure 2 This is a diagram illustrating an embodiment of the circuit configuration of a pixel.

[0017] Figure 3 This is a cross-sectional view showing a first configuration embodiment of the pixels.

[0018] Figure 4 It is along Figure 3 The planar diagram intercepted by line X-X' in the diagram.

[0019] Figure 5 This is a perspective view of the diffuser section.

[0020] Figure 6 This is a cross-sectional view showing a modified example of the diffusion portion of a pixel according to the first configuration embodiment.

[0021] Figure 7 This is a simplified diagram used to illustrate the features of pixels according to the first configuration embodiment.

[0022] Figure 8 This is a diagram illustrating a method for manufacturing a light detection device having pixels in a first configuration embodiment.

[0023] Figure 9 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0024] Figure 10 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0025] Figure 11 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0026] Figure 12 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0027] Figure 13 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0028] Figure 14 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0029] Figure 15 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0030] Figure 16 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0031] Figure 17 This is a diagram illustrating a method for manufacturing a pixel-based light detection device according to a first configuration embodiment.

[0032] Figure 18 This is a cross-sectional view showing a second configuration embodiment of the pixels.

[0033] Figure 19 A diagram illustrating the planar layout of the trench and diffuser portions in a second configuration embodiment is shown.

[0034] Figure 20 This is a diagram illustrating the planar layout of the groove and diffuser portions in the second configuration embodiment.

[0035] Figure 21 A diagram illustrating the planar layout of the trench and diffuser portions in the second configuration embodiment is shown.

[0036] Figure 22 A diagram illustrating the planar layout of the trench and diffuser portions in the second configuration embodiment is shown.

[0037] Figure 23 This is a schematic diagram used to illustrate the back bonds on the crystal surface of a silicon substrate.

[0038] Figure 24 This is a cross-sectional view showing a third configuration embodiment of the pixels.

[0039] Figure 25 This is a plan view showing an embodiment of the column array.

[0040] Figure 26 A plan view illustrating an embodiment of the arrangement of columns based on pixel positions is shown.

[0041] Figure 27 This is a cross-sectional view showing an embodiment of a configuration combining metasurface elements and on-chip lenses.

[0042] Figure 28 This is a cross-sectional view showing an embodiment of a configuration combining metasurface elements and internal lenses.

[0043] Figure 29 A plan view is shown, illustrating an embodiment of a column with prism and lens functions.

[0044] Figure 30 This is a cross-sectional view showing a fourth configuration embodiment of the pixels.

[0045] Figure 31 It shows along Figure 30 The planar diagram intercepted by line X-X' in the diagram.

[0046] Figure 32 This is a perspective view of the diffuser section.

[0047] Figure 33 Cross-sectional views of a first and second variant of a pixel according to a fourth configuration embodiment are shown.

[0048] Figure 34 Cross-sectional views of a third and fourth variant of a pixel according to a fourth configuration embodiment are shown.

[0049] Figure 35 This is a cross-sectional view of a fifth variation of the pixels according to the fourth configuration embodiment.

[0050] Figure 36 It shows along Figure 35 The planar diagram intercepted by line X-X' in the diagram.

[0051] Figure 37 This is a cross-sectional view of a sixth variation of the pixels according to the fourth configuration embodiment.

[0052] Figure 38 This is a cross-sectional view of a seventh variation of the pixels according to the fourth configuration embodiment.

[0053] Figure 39 This is a cross-sectional view of an eighth variation of the pixels according to the fourth configuration embodiment.

[0054] Figure 40 This is a cross-sectional view of a ninth variation of the pixels according to the fourth configuration embodiment.

[0055] Figure 41 This is a cross-sectional view of the tenth variation of the pixels according to the fourth configuration embodiment.

[0056] Figure 42 This is a cross-sectional view of the eleventh variation of the pixels according to the fourth configuration embodiment.

[0057] Figure 43This is a cross-sectional view of the eleventh variation of the pixels according to the fourth configuration embodiment.

[0058] Figure 44 This is a cross-sectional view of the twelfth variation of the pixels according to the fourth configuration embodiment.

[0059] Figure 45 A schematic diagram is shown of an example of a pixel array in which visible light pixels and invisible light pixels are mixed and mounted.

[0060] Figure 46 This is a schematic diagram illustrating a configuration embodiment of an image processing system according to a second embodiment of the technology applicable to this disclosure.

[0061] Figure 47 This is a block diagram illustrating a configuration embodiment of a distance measurement system according to a third embodiment, which applies the technology of this disclosure.

[0062] Figure 48 This is a block diagram illustrating an embodiment of a general structure of a vehicle control system.

[0063] Figure 49 This is an explanatory diagram showing an embodiment of the installation positions of the vehicle exterior information detection unit and the camera unit. Detailed Implementation

[0064] In the following description, modes for implementing the technology of this disclosure (hereinafter referred to as embodiments) will be described with reference to the accompanying drawings. The description will be given in the following order.

[0065] 1. Configuration Example of Optical Detection Device

[0066] 2. First configuration embodiment of pixels

[0067] 3. A method for manufacturing pixels according to a first configuration embodiment.

[0068] 4. Second configuration embodiment of pixels

[0069] 5. Third configuration embodiment of pixels

[0070] 6. Fourth configuration embodiment of pixels

[0071] 7. A variation of the pixel according to the fourth configuration embodiment

[0072] 8. Example of a hybrid array of visible and invisible light pixels

[0073] 9. Configuration Examples of Image Processing Systems

[0074] 10. Configuration Example of Distance Measurement System

[0075] 11. Examples of applications of moving bodies

[0076] Note that in this specification and the accompanying drawings, identical or similar parts are indicated by identical or similar reference numerals, and redundant descriptions will be omitted as appropriate. The drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, etc., may differ from reality. Furthermore, the drawings may include parts with different dimensional relationships and ratios in some cases.

[0077] Furthermore, the definitions of directions such as up and down in the following description are merely for ease of explanation and do not limit the technical concept of this disclosure. For example, when the object to be observed is rotated 90°, the top and bottom become the left and right sides, and when the object to be observed is rotated 180°, the top and bottom are reversed.

[0078] The technology disclosed herein can be applied to all light detection devices including pixel arrays in which pixels are arranged in a matrix in a two-dimensional manner, wherein each pixel detects incident light, photoelectrically converts the incident light, and outputs a pixel signal. The light detected by the light detection device can be light in the visible light region, including wavelengths such as red (R), green (G), and blue (B), or light in the invisible light region, such as infrared light. Alternatively, light from both the visible and invisible light regions can be used. The light detection device can be used as a solid-state imaging device that generates and outputs an image signal corresponding to the amount of incident light, or as a light receiving device (distance measurement sensor) in a distance measurement system that receives infrared light emitted as active light and measures the distance to an object using a direct ToF method or an indirect ToF method, etc.

[0079] <1. Configuration Example of Optical Detection Device>

[0080] Figure 1 This is a block diagram illustrating a configuration embodiment of a light detection device according to a first embodiment of the technology of this disclosure.

[0081] Figure 1 The light detection device 1 shown includes a pixel array unit 10, a vertical driving unit 20, a column signal processing unit 30, and a control unit 40.

[0082] The pixel array unit 10 includes a plurality of pixels 50 arranged in two dimensions. Each pixel 50 includes a photoelectric conversion unit that generates a charge corresponding to incident light and generates a pixel signal corresponding to the incident light. The light received and photoelectrically converted by the pixel 50 can be visible light or invisible light, such as infrared light. In addition, the pixel 50 includes a pixel circuit that generates a pixel signal based on the charge generated by the photoelectric conversion unit. This pixel circuit is controlled by a control signal generated by the vertical drive unit 20.

[0083] In the pixel array section 10, signal lines 11 and 12 are arranged in a grid pattern. Signal line 11 is a signal line that transmits control signals of the pixel circuits in the pixel 50, and is arranged for each row of the pixel array section 10, and is generally routed to the pixels 50 arranged in each row. Signal line 12 is a signal line that transmits pixel signals generated by the pixel circuits of the pixel 50, and is arranged for each column of the pixel array section 10, and is generally routed to the pixels 50 arranged in each column.

[0084] The vertical drive unit 20 generates control signals for controlling the pixel circuitry of pixel 50 and transmits these control signals to pixel 50 via signal line 11. The column signal processing unit 30 acquires and processes the pixel signals generated by pixel 50 via signal line 12. The column signal processing unit 30 includes, for example, an A / D conversion circuit for each column of pixels 50 and performs A / D conversion processing to convert the analog pixel signals generated in each row of pixels 50 into digital pixel signals. The pixel signals processed by the column signal processing unit 30 are output as signals of the light detection device 1. The control unit 40 controls the light detection device 1 as a whole. The control unit 40 controls the light detection device 1 by generating control signals for controlling the vertical drive unit 20 and the column signal processing unit 30 and outputting these control signals to both the vertical drive unit 20 and the column signal processing unit 30. The control signals generated by the control unit 40 are supplied to each of the vertical drive unit 20 and the column signal processing unit 30 via signal lines 41 and 42.

[0085] The optical detection device 1 having the above structure has a structure called the column AD method, in which A / D conversion circuits are arranged in each column. The wavelength of the light for photoelectric conversion by the optical detection device 1 (hereinafter referred to as the target wavelength) can be any wavelength in the visible light region, the invisible light region, or both, but the target wavelength is set to 780 to 1000 nm below. The optical detection device 1 receives light (infrared light) in the infrared region, generates a signal, and outputs it to the outside of the device.

[0086] <Pixel Circuit Configuration>

[0087] Figure 2 An embodiment of the circuit configuration for pixel 50 is shown.

[0088] Pixel 50 includes a photoelectric conversion unit 71, a charge retention unit 72, and MOS transistors 73 to 76. The photoelectric conversion unit 71 includes, for example, a photodiode and performs photoelectric conversion corresponding to incident light to generate charge. The anode of the photodiode, which is part of the photoelectric conversion unit 71, is grounded, and the cathode of the photodiode is connected to the source of the MOS transistor 73. The MOS transistor 73 has a drain connected to the source of the MOS transistor 74, the gate of the MOS transistor 75, and one end of the charge retention unit 72. The other end of the charge retention unit 72 is grounded. MOS transistors 74 and 75 have drains that are commonly connected to the power supply voltage Vdd, and MOS transistor 75 has a source connected to the drain of the MOS transistor 76. The source of the MOS transistor 76 is connected to the output signal line OUT. MOS transistors 73, 74, and 76 have gates that are respectively connected to the transmission signal line TR, the reset signal line RST, and the select signal line SEL. The transmission signal line TR, the reset signal line RST, and the select signal line SEL constitute signal line 11. Furthermore, the output signal line OUT constitutes signal line 12. The charge holding section 72 and MOS transistors 73 to 76 constitute the pixel circuit described above.

[0089] MOS transistor 73 is a transfer transistor that transfers the charge generated by photoelectric conversion in photoelectric conversion unit 71 to charge holding unit 72. The transfer of charge in MOS transistor 73 is controlled by a signal transmitted via the transfer signal line TR. Charge holding unit 72 is a capacitor that holds the charge transferred by MOS transistor 73. MOS transistor 75 is an amplification transistor that amplifies and generates a signal based on the charge held in charge holding unit 72. MOS transistor 76 is a selection transistor that outputs the signal generated by MOS transistor 75 as a pixel signal to output signal line OUT via a signal transmitted via selection signal line SEL. MOS transistor 74 is a reset transistor that resets charge holding unit 72 by discharging the charge held in charge holding unit 72 to the power supply voltage Vdd. The reset performed by MOS transistor 74 is controlled by a signal transmitted via reset signal line RST and is performed before the charge is transferred by MOS transistor 73. Note that during this reset, photoelectric conversion unit 71 can also be reset by turning on MOS transistor 73. As described above, the pixel circuit converts the charge generated by photoelectric conversion unit 71 into a pixel signal and outputs the pixel signal to output signal line OUT. The pixel signal output to the output signal line OUT is input to the column signal processing unit 30. After A / D conversion and other processing are performed in the column signal processing unit 30, it is output from the input / output terminal (not shown) of the light detection device 1.

[0090] <2. First Configuration Example of Pixels>

[0091] Figure 3This is a cross-sectional view showing a first configuration embodiment of pixels 50 that can be configured in the pixel array section 10 of the light detection device 1. Figure 4 It is along Figure 3 The planar diagram intercepted by line X-X' in the diagram.

[0092] Pixel 50 includes a semiconductor substrate (silicon substrate) 101 using, for example, silicon (Si) as the semiconductor and a wiring layer 102 formed on a first surface of the semiconductor substrate 101. Figure 3 The first surface of the semiconductor substrate 101 of the lower wiring layer 102 is the front surface side of the semiconductor substrate 101. Figure 3 The second surface of the upper side of the semiconductor substrate 101 is the rear surface side of the semiconductor substrate 101 and is the light receiving surface (light incident surface) on which light is incident. Therefore, the light detection device 1 including the pixel 50 is a back-illuminated light detection device in which light is incident from the rear side of the semiconductor substrate 101.

[0093] A substrate surface layer 105, an insulating film 106, a light-shielding film 107, an on-chip lens (OCL) 110, an anti-reflective film 111, etc., are formed on the light-receiving surface side, which is the back side of the semiconductor substrate 101. The substrate surface layer 105 is composed of a stacked film of a fixed charge film 103 and an anti-reflective film 104. The light-shielding film 107 includes a stacked film of a first metal film 108 and a second metal film 109.

[0094] The structure of pixel 50 will be described in detail below.

[0095] A photoelectric conversion unit 71 is formed on the semiconductor substrate 101, and the photoelectric conversion unit 71 is isolated for each pixel 50 by an element isolation portion 135 formed at the pixel boundary portion. The photoelectric conversion unit 71 is formed over the entire thickness of the semiconductor substrate 101. The photoelectric conversion unit 71 is, for example, composed of a pn junction photodiode (PD), which has an n-type semiconductor region having a first conductivity type of n-type formed on the substrate, and a p-type semiconductor region having a second conductivity type formed opposite to the front and back sides of the semiconductor substrate 101. Figure 3 In the diagram, the boundary between the n-type semiconductor region and the p-type semiconductor region of the pn junction is represented by a dashed line. The p-type semiconductor regions facing the front and rear surfaces of the semiconductor substrate 101 also serve as hole charge accumulation regions for suppressing dark current.

[0096] A light guide portion 133, surrounded by dashed lines, is formed inside the photoelectric conversion unit 71. The light guide portion 133 guides the light focused by the on-chip lens 110 into the interior of the photoelectric conversion unit 71, while suppressing sensitivity loss caused by interface reflection. Specifically, the light guide portion 133 has: a trench portion 131, formed by drilling into the interior of the photoelectric conversion unit 71 from the light-receiving surface side of the semiconductor substrate 101 in the depth direction; and a diffusion portion 132, disposed at the front end of the trench portion 131 in the depth direction. A fixed charge film 103 is formed on the sidewall of the light guide portion 133, and a lens material 110A, which is the material of the on-chip lens 110, is embedded inside the fixed charge film 103. Figure 4 As shown in the plan view, the groove portion 131 of the light guide portion 133 is formed in the approximately central portion of the photoelectric conversion portion 71, and has approximately the same shape in the longitudinal and transverse directions, for example, a rectangular planar shape or a hole shape. By forming a planar area larger than its planar area on the deep side near the diffuser portion 132, the end of the light guide portion 133 on the light receiving surface side can have a positive conical shape in the cross-sectional view. Because the end is formed as a positive conical shape, the lens material 110A is easily embedded, and the effect of easily introducing focused light into the light guide portion 133 is obtained.

[0097] like Figure 5 As shown in the perspective view, the diffusion portion 132 has a plane larger than the trench portion 131 and is formed as a protrusion having a three-dimensional polygon comprising multiple different planes. The multiple planes constituting the diffusion portion 132 are formed by planes oriented along the crystal planes of the semiconductor substrate 101. Specifically, planar orientation selective etching is performed on the semiconductor substrate 101 having a silicon (100) surface as the front surface, exposing the (111) surface with a low etching rate. Thus, a... Figure 5 The approximate rhomboid shape is shown. Therefore, for example, when a trench is formed by vertically excavating the semiconductor substrate 101, the (111) plane is formed at an angle of 54.7° relative to the bottom surface of the (100) plane. That is, the diffusion portion 132 has a surface that is inclined along the orientation of the (111) plane of the silicon crystal constituting the semiconductor substrate 101. The shape of the plane-intersecting diffusion portion 132 has the effect of localizing the propagating light, and has the effect of enhancing the diffusion through diffusion caused by diffraction phenomena after localization.

[0098] The depth of the light guide portion 133 is preferably less than 3 / 4 of the depth of the photoelectric conversion portion 71, and more preferably less than 2 / 3, so as to obtain the optical path length of the incident light after it escapes from the light guide portion 133.

[0099] like Figure 3As shown, a gap 134 is formed inside the diffuser 132. The refractive index of the gap 134 is lower than that of the lens material 110A embedded in the light guide 133, and due to the refractive index difference between the air (refractive index 1) in the gap 134 and the lens material 110A in the light guide 133, light is easily scattered. In this case, the shape of the gap 134 is preferably a raindrop shape. Because the shape of the gap 134 is a raindrop shape, so-called cross-light propagation is generated where the light guided by the light guide 133 to the photoelectric conversion unit 71 is isolated by the raindrop shape. Therefore, the component that propagates upward in the direction of the on-chip lens 110 in the light guide 133 can be reduced. That is, the reflection loss of light escaping from the photoelectric conversion unit 71 to the light receiving surface side can be reduced, and ultimately the reflection component of the light detection device 1 that causes a light spot can be suppressed.

[0100] Note that the diffuser 132 does not need to have a corner formed at an acute angle, and the corner can be as follows: Figure 6 The rounding shown is achieved by isotropic wet etching using an acidic mixture of, for example, hydrofluoric acid, nitric acid, and acetic acid. Figure 6 A modified example of the diffusion portion 132 of the pixel 50 according to the first configuration embodiment is shown, and the shape of the diffusion portion 132 is formed as a generally circular or approximately spherical shape. Because the diffusion portion 132 is formed as a generally circular or approximately spherical shape, crystal defects and cracks in the semiconductor substrate 101 caused by stress concentration at the corners can be suppressed. As described above, the diffusion portion 132 may have a shape and thickness different from those of the trench portion 131.

[0101] like Figure 4 As shown in the plan view, the element isolation portion 135 is formed at the pixel boundary between the photoelectric conversion portions 71 of the pixel 50. Figure 3As shown in the cross-sectional view, the device isolation portion 135 has a full trench structure penetrating the thickness direction of the semiconductor substrate 101. A fixed charge film 103 is formed on the sidewalls of the device isolation portion 135 with the full trench structure, and an insulating film 106, such as SiO2, is embedded inside the fixed charge film 103. Because the fixed charge film 103 is formed on the sidewalls, damage caused by trench processing can be reinforced by the negative fixed charge. As a result, degradation of properties in the dark can be suppressed. The device isolation portion 135 can effectively suppress crosstalk relative to light scattered by the diffuser portion 132 and crosstalk diffused in various directions. The device isolation portion 135 may have a configuration in which a metal material, such as tungsten, aluminum, silver, or copper, is further embedded inside the insulating film 106. Furthermore, if necessary, a film of a highly adhesive material (e.g., Ti or TiN) with a thickness of approximately several nm to tens of nm can be formed before forming these metals. The metal material is embedded in the device isolation portion 135, thus further enhancing the effect of light-shielding crosstalk. Furthermore, the device isolation portion 135 may have gaps within the insulating film 106. In this case, crosstalk of light caused by interface reflection due to refractive index differences can be suppressed. Alternatively, the device isolation portion 135 may be formed in, for example, a P-type semiconductor region and grounded. In this case, crosstalk caused by charge rollover can be suppressed. The device isolation portion 135 may be formed as a deep trench isolation (DTI) having a trench structure extending to a predetermined depth into the semiconductor substrate 101, rather than a full trench structure penetrating along the thickness direction of the semiconductor substrate 101.

[0102] A wiring layer 102 formed on the first surface of a semiconductor substrate 101 has multiple layers of metal wiring 121 and an insulating film (interlayer insulating film) 122 formed therebetween. The metal wiring 121 is formed using a metal film of a metal material such as Al, Ag, Au, Cu, Pt, Mo, Cr, Ti, Ni, W, or Fe, or an alloy containing these metals. Each layer of metal wiring 121 is connected to another metal wiring 121 above and below at predetermined locations using via plugs such as W, Cu, etc. The insulating film 122 is, for example, composed of a SiO2 film, a Low-k film (low dielectric constant insulating film), a SiOC film, etc. Signal lines for transmitting signals to be applied to pixel circuits are formed in the wiring layer 102, for example, such as transmission signal lines TR, reset signal lines RST, select signal lines SEL, output signal lines OUT, etc.

[0103] A reflective layer 123 is provided in the wiring layer 102. The reflective layer 123 is disposed on a surface opposite to the light-receiving surface of the semiconductor substrate 101, reflecting light attempting to exit to the wiring layer 102 and confining the light within the photoelectric conversion section 71. The reflective layer 123 is formed with openings in portions of vias connecting the upper and lower metal wiring 121 and vias connecting to pixel transistors or diffusion layers formed on the front surface of the semiconductor substrate 101. The reflective layer 123 can be formed using the same wiring material as the metal wiring 121, or it can be formed from a different metal film. The reflective layer 123 can be formed as a stacked structure of multiple metal films. The reflective layer 123 can be formed using multilayer films of dielectrics with different refractive indices. For example, the reflective layer 123 can be formed by setting the film thickness to selectively reflect light with a target wavelength and alternately stacking low-refractive-index films with low refractive indices and high-refractive-index films with high refractive indices. For example, silicon oxide films are suitable as low-refractive-index films. For high refractive index films, silicon nitride (SiN), titanium oxide (TiO2), aluminum oxide (Al2O3), tantalum oxide (Ta2O5), amorphous silicon (α-Si), etc., can be used.

[0104] Although not shown, pixel transistors such as MOS transistors 73 to 76 of the pixel circuit are formed on the front surface side of the semiconductor substrate 101, and wiring layer 102 is formed on the front surface side of the semiconductor substrate 101. The pixel transistors are formed such that an n-type source region and a drain region are formed in a p-type semiconductor well region formed on the front surface side of the semiconductor substrate 101, and a gate electrode is formed on the front surface of the substrate between the source region and the drain region via a gate insulating film.

[0105] A substrate surface layer 105, formed by stacking a fixed charge film 103 and an anti-reflection film 104, is formed on the back side of the semiconductor substrate 101, i.e., the light-receiving surface side. The fixed charge film 103 has a negative fixed charge due to the oxygen dipole and serves to enhance the pinning of the photoelectric conversion section 71. The fixed charge film 103 and the anti-reflection film 104 may include, for example, an oxide or nitride containing at least one of hafnium, aluminum, zirconium, thallium, or titanium. Alternatively, the fixed charge film and the anti-reflection film may be formed by an oxide or nitride containing at least one of lanthanum, cerium, neodymium, thulium, samarium, europium, gadolinium, terbium, dysprosium, holmium, thulium, ytterbium, lutetium, or yttrium. Furthermore, the fixed charge film 103 may be formed by hafnium oxynitride or aluminum oxynitride. Additionally, silicon or nitrogen may be added to the fixed charge film 103 in an amount that does not impair insulation. Therefore, heat resistance, etc., can be improved. The fixed charge film 103 is intended to function as an antireflective film for a semiconductor substrate 101 with a high refractive index by controlling the film thickness or stacking multiple layers, taking into account wavelength and refractive index. The film thicknesses of the fixed charge film 103 and the antireflective film 104 are designed to increase the transmittance of light with a target wavelength relative to the refractive index and extinction coefficient of the material.

[0106] An insulating film 106 is disposed between the substrate surface layer film 105 and the light-shielding film portion 107, and suppresses the deterioration of properties in the dark. From the viewpoint of antireflection, the insulating film 106 preferably has a refractive index lower than that of the film constituting the substrate surface layer film 105, and can be, for example, SiO2 and composite materials containing SiO2 as the main component (SiON, SiOC, etc.). A fixed charge film 103 and a lens material 110A are formed on the insulating film 106.

[0107] A light-shielding film 107 is located between the photoelectric conversion unit 71 and the on-chip lens 110, and has an opening 112 through which incident light focused by the on-chip lens 110 passes. The light-shielding film 107 is disposed on the light-receiving surface side of the semiconductor substrate 101 and blocks stray light leaking to adjacent pixels 50. It is preferable that the light-shielding film 107 is a multilayer film with two or more layers, with the lowermost film on the photoelectric conversion unit 71 side being configured as a reflective film and the uppermost film on the light incident side being configured as an anti-reflective film. The lowermost film of the light-shielding film 107 is used as a reflective film, so that light reflected by the reflective layer 123 of the wiring layer 102 can be returned to the photoelectric conversion unit 71, which helps to improve sensitivity. In addition, the uppermost film of the light-shielding film 107 is used as an anti-reflective film, and therefore, the light reflected by the light-shielding film 107 can be reduced from escaping from the opening 112, and glare and ghosting can be suppressed.

[0108] exist Figure 3In the first configuration embodiment, the light-shielding film portion 107 comprises a stacked film of two layers: a first metal film 108 and a second metal film 109. For example, a metal material with low reflectivity (such as tungsten (W) or titanium (Ti), its alloys, its nitrides, its oxides, or its carbides) can be used as the upper first metal film 108 to act as an anti-reflective film. Alternatively, a multilayer film (dielectric multilayer film) that prevents reflection can be used instead of the first metal film 108, employing a stacked structure of dielectrics with different refractive indices. These films can be formed using methods such as CVD, ALD, sputtering, etc. Furthermore, an organic film containing an absorbent material such as carbon black can be formed by spin-coating onto the upper first metal film 108. The lower second metal film 109, which functions as a reflective film, is formed, for example, using a metal material with high reflectivity such as aluminum (Al), copper (Cu), gold (Au), silver (Ag), molybdenum (Pt), or its alloys. Alternatively, a multilayer film (dielectric multilayer film) that reflects light through a stacked structure of dielectrics with different refractive indices can be used instead of the second metal film 109. These films can be formed using methods such as CVD, ALD, sputtering, etc.

[0109] The on-chip lens 110 has a curved lens shape and is a focusing portion that focuses incident light on the photoelectric conversion unit 71. The on-chip lens 110 may include a lens material 110A, for example, made of organic materials such as styrene resin, acrylic resin, styrene-acrylic copolymer resin, or siloxane resin. Alternatively, the lens material 110A may also be formed from inorganic materials such as silicon nitride (SiN) or silicon oxynitride (SiON). Alternatively, the lens material 110A may be formed from silicon, for example, a material with a high refractive index. As silicon, amorphous silicon (hereinafter appropriately described as α-Si) or polycrystalline silicon can be used. α-Si has a large absorption relative to light with wavelengths in the visible region, but it is suitable that it does not have an extinction coefficient k of approximately 0 for light with wavelengths in the infrared region. Polycrystalline silicon has a wavelength region in the infrared region with an extinction coefficient k of approximately 0.01, but has very small absorption and can also be used as a lens. In silicon, the refractive index n at a wavelength of 940 nm in the near-infrared region is n = 3.5 to 3.8, while in SiN and oxide film (SiO2), the refractive indices n at 940 nm are n = 1.82 and n = 1.45, respectively, with silicon having a much higher refractive index n. Therefore, when using silicon with a high refractive index n as the on-chip lens 110, the beam waist relative to the incident light can be narrowed. An antireflective film 111 is formed on the upper surface of the surface serving as the incident side of the on-chip lens 110. When the refractive index of the material is n and the target wavelength is λ, the antireflective film 111 is formed to have a film thickness of approximately λ / (4n) or an integer multiple thereof. For example, when using SiN as the material for the antireflective film 111, it is preferable that the film thickness of the antireflective film 111 is approximately 130 nm relative to the wavelength of 940 nm. The antireflective film 111 can be formed by stacking multiple films with different refractive indices.

[0110] Lens material 110A, which is the material of the on-chip lens 110, is embedded in at least a portion of the light guide portion 133 formed in the semiconductor substrate 101. The same material is used inside both the on-chip lens 110 and the light guide portion 133, thus eliminating losses due to interface reflections from the semiconductor substrate 101. As a result, light can be effectively guided into the interior of the photoelectric conversion unit 71. A fixed charge film 103 is formed on the sidewall of the light guide portion 133, and a void 134 is formed inside the lens material 110A in the diffuser portion 132. The refractive index of the fixed charge film 103, excluding the lens material 110A formed in the light guide portion 133 and the void portion 134, is lower than that of the lens material 110A. Therefore, the light guide portion 133 includes a portion in which the lens material 110A is embedded and a portion having a refractive index lower than that of the lens material 110A. Therefore, due to the difference in refractive index of the lens material 110A in the light guide portion 133, light is easily scattered.

[0111] Further below the wiring layer 102, a support substrate (not shown) is bonded using plasma bonding or an adhesive material. The support substrate is, for example, a silicon substrate, and the support semiconductor substrate 101 is reinforced during the manufacturing process of the photodetector 1. Alternatively, below the wiring layer 102, a logic substrate, including the wiring layer on which logic circuits are formed and the semiconductor substrate, can be bonded using plasma bonding or an adhesive material. By stacking the semiconductor substrate 101, on which the photoelectric conversion section 71 is formed, and the logic substrate, the photodetector 1 can be constructed, allowing various peripheral circuits to be stacked vertically. As a result, the chip size can be reduced.

[0112] Pixel 50 according to the first configuration embodiment has the above configuration.

[0113] Reference Figure 7 The features of pixel 50 according to the first configuration embodiment are described.

[0114] The incident light is narrowed by the on-chip lens 110, passes through the light-shielding film portion 107, and is guided to the light guide portion 133. The light incident on the light guide portion 133 is diffused by the diffuser portion 132. In the case where the light guide portion 133 only includes the trench portion 131, there are no components that allow light reflected from the plane of the lowest surface of the trench portion 131 to propagate upward through the light guide portion 133 and escape to the outside of the semiconductor substrate 101 (on-chip lens side). However, since the diffuser portion 132, which has a three-dimensional polygon, is provided at the top of the trench portion 131, its complex shape can suppress upward propagation. As a result, it is possible to suppress the return light to the light-receiving surface side. As the material of the on-chip lens 110, as described above, organic or inorganic materials can be used, and for example, silicon such as α-Si can be used as a material with a high refractive index. Silicon has the following disadvantages: it absorbs light greatly in the visible light region, but no absorption occurs in the infrared region when the extinction coefficient is 0, and therefore silicon is suitable when the wavelength in the infrared region is used as the target wavelength. Furthermore, because silicon has a high refractive index, the waist of the beam at the focal point can be thinned, such as... Figure 7 As shown in the image.

[0115] The light guide section 133 guides light into the photoelectric conversion section 71. Because the lens material 110A of the on-chip lens 110 is embedded inside the light guide section 133, there is no difference in refractive index, and interface reflection that occurs when different materials are used to form the semiconductor substrate 101 and its upper surface is suppressed, thereby improving quantum efficiency. Furthermore, interface reflection is suppressed, and therefore, ghosting of light spots can be suppressed.

[0116] Furthermore, the diffuser 132 constituting the light guide 133 can scatter light passing through the trench 131 in various directions and can extend the optical path length of the incident light. Increasing the optical path length can help improve quantum efficiency.

[0117] like Figure 7 As indicated by the arrows inside the photoelectric conversion unit 71, light scattered by the diffuser 132 is reflected by the element isolation portion 135 formed at the pixel boundary and returns to the interior of the photoelectric conversion unit 71. Furthermore, light attempting to escape to the wiring layer 102 side is reflected by the reflective layer 123 and returns to the interior of the photoelectric conversion unit 71. A portion of the light to escape to the light-receiving surface side of the semiconductor substrate 101 is reflected by the substrate surface layer film 105 and returns to the interior of the photoelectric conversion unit 71. A portion of the light escaping from the substrate surface layer film 105 is reflected by the interface of the lens material 110A and returns to the photoelectric conversion unit 71 side. Light escaping from the interface of the lens material 110A and striking the light-shielding film portion 107 is absorbed by the light-shielding film portion 107 or reflected towards the semiconductor substrate 101.

[0118] In this embodiment, the light incident on pixel 50 and photoelectrically converted can be visible light or invisible light such as infrared light. However, for example, when the incident light is infrared light, in the silicon substrate used as semiconductor substrate 101, due to the wavelength dependence of the light absorption coefficient of Si, the light absorption coefficient per unit thickness decreases as the wavelength increases, and for light in the infrared region, no absorption occurs when the extinction coefficient k is essentially 0. Therefore, due to the infrared light incident on the silicon layer of semiconductor substrate 101, many photons pass through the silicon layer.

[0119] As described above, in the pixel 50 according to the first configuration embodiment, light incident via the light guide portion 133 is confined within the pixel by the substrate surface layer 105, the light-shielding film portion 107, the element isolation portion 135, the reflective layer 123, etc., and therefore, crosstalk caused by light scattered by the diffusion portion 132 leaking to adjacent pixels and sensitivity loss caused by light escaping to the light receiving surface side can be suppressed. That is, the incident light can be guided into the photoelectric conversion portion 71 to obtain the optical path length, and both quantum efficiency improvement and flash suppression are achieved.

[0120] <3. Method for manufacturing pixels according to the first configuration embodiment>

[0121] Next, see Figures 8 to 17 This describes a method for manufacturing a light detection device 1 that includes the pixel 50 of the first configuration embodiment.

[0122] First, such as Figure 8 As shown in A, the process continues until a photoelectric conversion unit 71 is formed for each pixel 50 on the semiconductor substrate 101 and a wiring layer 102, such as logic circuits, is formed on the front surface side of the semiconductor substrate 101.

[0123] Specifically, by using a photoresist as a mask to ion implant desired impurities from the surface side of the substrate, and using silicon (Si) as the semiconductor, an n-type semiconductor region and a p-type semiconductor region are formed in a predetermined region of each pixel 50 of the semiconductor substrate (silicon substrate) 101. The n-type semiconductor region is formed further inside the substrate than the region near the interface on the front and rear surfaces, and the p-type semiconductor region is formed facing the front and rear surfaces of the semiconductor substrate 101. Furthermore, a p-type semiconductor well region is formed in the region near the front surface of the semiconductor substrate 101, and a plurality of pixel transistors (such as MOS transistors 73 to 76) are formed in the p-type semiconductor well region. The pixel transistor includes a source region and a drain region, a gate insulating film, and a gate electrode. In addition, a wiring layer 102 including a plurality of metal wiring layers 121 and an insulating film 122 formed therebetween is formed on the front surface side of the semiconductor substrate 101 on which the plurality of pixel transistors are formed. The wiring layer 102 is formed by sequentially stacking an insulating film 122, such as a silicon oxide film, and metal wiring 121 formed using aluminum, copper, etc., and electrically connecting the metal wiring 121 of each layer via plugs (through holes) as needed. When metal wiring 121 is formed on the upper surface of the insulating film 122, the upper surface of the insulating film 122 is planarized by chemical mechanical polishing (CMP), and then the metal wiring 121 is formed on the upper surface. After forming the wiring layer 102 including multiple layers of metal wiring 121, a support substrate is bonded to the surface of the wiring layer 102 opposite to the surface on the semiconductor substrate 101 side by means of plasma bonding or the like, and the semiconductor substrate 101 is inverted to become the upper surface. Then, from the upper surface (back side) side of the semiconductor substrate 101, the semiconductor substrate 101 is thinned to a desired thickness by means of, for example, wet etching, dry etching, CMP, etc. The thickness of the semiconductor substrate 101 varies according to the target wavelength of the incident light, assumed to be... For example, when the target wavelength is only a wavelength in the visible light region, the thickness of the semiconductor substrate 101 is expected to be in the range of 2 μm to 6 μm. Alternatively, when the target wavelength also includes wavelengths in the near-infrared region, the thickness of the semiconductor substrate 101 is expected to be in the range of, for example, 3 to 15 μm.

[0124] Figure 8 Figure A shows a state in which a photoelectric conversion unit 71 is formed in each pixel 50 of the semiconductor substrate 101, a wiring layer 102 is formed on the front surface side of the semiconductor substrate 101, and the semiconductor substrate 101 is thinned. The crystal orientation of the front and rear surfaces of the semiconductor substrate 101 is (100) plane. In addition, a reflective layer 123 is provided for each pixel 50 in a portion of the wiring layer 102.

[0125] Next, as Figure 8As shown in Figure B, dry etching, such as the Bosch process, is performed by using a photoresist 201 patterned on a semiconductor substrate 101 as a mask, thereby forming trenches 202 penetrating the semiconductor substrate 101 at the pixel boundary. After the trenches 202 are formed, the photoresist 201 and processing residues are removed by ashing, wet cleaning, etc.

[0126] Next, as Figure 9 As shown in Figure A, a fixed charge film 103, which is part of the substrate surface layer film 105, is formed on the upper surface of the back side of the semiconductor substrate 101, inside the trench 202. For example, CVD, sputtering, atomic layer deposition (ALD) and the like can be used as methods for forming the fixed charge film 103, but it is desirable to use ALD, which can achieve good coverage at the atomic layer level. Therefore, the fixed charge film 103 is also formed within the trench 202 formed at the pixel boundary. The fixed charge film 103 is formed of an oxide or nitride, for example, containing at least one of hafnium, aluminum, zirconium, thallium or titanium.

[0127] Next, as Figure 9 As shown in Figure B, an antireflective film 104, which is part of the substrate surface layer film 105, is formed on the upper surface of the fixed charge film 103 on the back side of the semiconductor substrate 101. The method for forming the antireflective film 104 is not particularly limited, but the antireflective film 104 does not need to be buried in the trench 202; it can simply be formed on the upper surface of the back side of the semiconductor substrate 101. As a result, sputtering can be used. When using sputtering, the film formation time can be shortened, and since the trench width can be designed to be narrower when no film is formed on the sidewalls of the trench 202, it is advantageous to greatly ensure the photoelectric conversion section 71. The antireflective film 104 can be a film designed to prevent reflection relative to the target wavelength of the incident light, and can be formed using a material with a refractive index different from that of the fixed charge film 103, which has a film thickness that eliminates reflection due to interference effects.

[0128] Next, as Figure 10 As shown in Figure A, an insulating film 106 is formed on the upper surface of the antireflective film 104 on the back side of the semiconductor substrate 101 and within the trench 202 using CVD, ALD, or similar methods with good coverage. Alternatively, the insulating film 106 can be omitted, and the entire interior of the trench 202 can be buried, creating a void (air gap). In this case, the refractive index difference between the insulating film 106 and the void in the trench 202 can enhance the confinement effect. For example, an ALD-formed SiO2 film can be used as the insulating film 106. However, if the SiO2 film is thin, film peeling due to bubbling is likely to occur; therefore, the thickness of the SiO2 film is preferably 20 nm or more, and preferably 50 nm or more. Furthermore, considering the following... Figure 12The etching process in step A results in film loss, leading to a thicker insulating film 106 on the upper surface of the antireflective film 104. In addition to the insulating film 106, metal material can be embedded in the trench 202 via CVD or similar methods. Embedding metal material improves the ability to block stray light. For example, tungsten, aluminum, silver, and copper can be used as the embedded metal material. To enhance adhesion, a high-melting-point material, such as Ti or TiN, can be deposited first. In the case of embedded metal material, the metal material formed on the upper surface of the insulating film 106 needs to be removed by deep etching, CMP, or similar methods.

[0129] Next, as Figure 10 As shown in Figure B, the insulating film 106 is dry-etched using a photoresist 211 patterned on it using photolithography as a mask, and the semiconductor substrate 101 is dry-etched using a Bosch process or similar method. As a result, a trench 212, reaching a depth to the middle of the semiconductor substrate 101, is formed in the central portion of the pixel. After forming the trench 212, the photoresist 211 and processing residue are removed by ashing, wet cleaning, or similar methods. Note that by shifting the focus position during the photolithography process, the insulating film 106 can be processed into a positive cone shape, or the photoresist 211 can be formed into a positive cone shape by adding a thermal reflow process, and the corners on the light-receiving surface side of the semiconductor substrate 101 can be rounded.

[0130] Next, as Figure 11 As shown in Figure A, a hard mask 213 is formed using a method with good coverage, such as CVD or ALD. The hard mask 213 is preferably a silicon-selective film on the semiconductor substrate 101; for example, a SiN film may be used. The hard mask 213 is formed on an insulating film 106 on the back side of the substrate and inside trenches 212 (sidewalls and bottom).

[0131] Next, as Figure 11 As shown in B, the bottom surface of the trench 212 and the hard mask 213 on the insulating film 106 on the back side of the substrate are removed by complete back etching such as anisotropic dry etching.

[0132] Next, as Figure 12As shown in A, a three-dimensional polygon 221 conforming to the crystal orientation is formed on the bottom surface of trench 212 by planar orientation selective etching. For example, wet etching using a predetermined alkaline aqueous solution is used as planar orientation selective etching. As long as the alkaline aqueous solution is an inorganic solution, KOH, NaOH, CsOH, etc. can be used as alkaline aqueous solutions. As long as the alkaline aqueous solution is an organic solution, ethylenediamine catechol aqueous solution (EDP), hydrazine (N2H4), ammonium hydroxide (NH4OH), tetramethylammonium hydroxide (TMAH), etc. can be used as alkaline aqueous solutions. Planar orientation selective etching is an anisotropic etching in which the etching rate varies according to the planar orientation of the front surface of semiconductor substrate 101. In the case where the surface of semiconductor substrate 101 is a (100) plane, such as Figure 5 As shown, the three-dimensional polygon 221 is formed in a roughly rhomboid shape. The sidewalls of the trench 212 are not etched because they are protected by a hard mask 213.

[0133] Next, as Figure 12 As shown in Figure B, the hard mask 213 on the sidewall of trench 212 is removed. If the hard mask 213 is formed of, for example, a SiN film, it can be removed by wet etching using hot phosphoric acid. Note that the method of embedding the necessary material into trench 212 after removing the hard mask 213 has the following advantages: it can reduce the width of the light guide portion 133 and allow for a larger photoelectric conversion portion 71, while retaining the hard mask 213 on the sidewall of trench 212 to reduce the number of processes.

[0134] Next, as Figure 13 As shown in Figure A, a fixed charge film 103 is formed on the upper surface of the insulating film 106, the sidewalls of the trench 212, and the three-dimensional polygon 221 using CVD, sputtering, ALD, etc. Similar to... Figure 9 The fixed charge film 103 can be formed by using, for example, an ALD that can achieve good coverage at the atomic level, as described in A.

[0135] Next, as Figure 13As shown in Figure B, the lens material 110A of the on-chip lens 110 is embedded in the upper surface of the fixed charge film 103 on the back side of the substrate, as well as inside the trench 212 and the three-dimensional polygon 221. Thus, a light guide portion 133 including a trench portion 131 and a diffusion portion 132 is completed. When the lens material 110A is an organic material, for example, the lens material 110A is embedded in the light guide portion 133 by spin coating and then cured by heat treatment. When the lens material 110A is an inorganic material, the lens material 110A is embedded in the light guide portion 133 using methods such as CVD, ALD, or sputtering. The lens material 110A can be embedded such that a void 134 is formed inside the three-dimensional polygon 221. The formation of the void 134 improves the light diffusion effect. Furthermore, a film with a refractive index different from that of the fixed charge film 103 and the lens material 110A, such as a SiO2 film, can be formed between the fixed charge film and the lens material. By configuring films with different refractive indices, the controllability of light at interfaces with different refractive indices can be improved. As a result, at the corners of the three-dimensional polygon 221, the effect of localizing light while diffracting escaping light can be achieved. The materials embedded in the groove 212 and the three-dimensional polygon 221 are not limited to the lens material 110A of the on-film lens 110, and can be different materials. In this case, it is preferable to use a material with a refractive index close to that of the material of the on-film lens 110 and an extinction coefficient of 0 or close to 0.

[0136] Next, as needed, the lens material 110A formed on the upper surface of the back side of the substrate is planarized by CMP, and then, as... Figure 14 As shown in Figure A, a light-shielding film portion 107 is formed by forming a stacked film comprising a first metal film 108 and a second metal film 109. The light-shielding film portion 107 is formed sequentially using the second metal film 109 and the first metal film 108. The upper first metal film 108 is formed, for example, from a metal material with low reflectivity such as tungsten (W) or titanium (Ti), and functions as an anti-reflective film. The lower second metal film 109 is formed, for example, from a metal material with high reflectivity such as aluminum (Al), copper (Cu), gold (Au), silver (Ag), or platinum (Pt), and functions as a reflective film.

[0137] In addition, such as Figure 14As shown in Figure B, in the outer region of the effective pixel area, plasma damage may occur when the metal film is processed in an electrically levitated state. An opening 223 is formed by dry etching or wet etching. This opening 223 has a width of several μm, obtained by removing the substrate surface layer film 105 and lens material 110A formed on the semiconductor substrate 101. The first metal film 108 and the second metal film 109 are formed to be connected to the semiconductor substrate 101. The region of the semiconductor substrate 101 connecting the first metal film 108 and the second metal film 109 is, for example, a p-type semiconductor region with a ground potential, and the first metal film 108 and the second metal film 109 are formed to be grounded. In addition, the light-shielding film portion 107 formed in the outer region of the effective pixel area also serves as a light shield for the pixel that determines the optical black level, and also serves as a light shield for preventing noise to the peripheral circuit area.

[0138] As described above, instead of being formed by a stacked film consisting of the first metal film 108 and the second metal film 109, the light-shielding film portion 107 can be formed by a stacked film including a first dielectric multilayer film on the side of the on-chip lens 110 and a second dielectric multilayer film on the side of the photoelectric conversion portion 71. In this case, the first dielectric multilayer film is also formed by a film having a lower reflectivity than the second dielectric multilayer film.

[0139] Next, as Figure 15 As shown in Figure A, dry etching is performed using a photolithography technique to pattern a resist 225 on the light-shielding film 107 as a mask, thereby removing a portion of the light-shielding film 107 to form the opening 112. The light-shielding film 107 is also removed from the pad portion, scribing portion, etc. (not shown). After forming the opening 112, the resist 225 and processing residues are removed by ashing, wet cleaning, etc.

[0140] Next, as Figure 15 As shown in Figure B, the lens material 110B of the on-chip lens 110 is formed on the upper surface of the lens material 110A in the opening 112 and on the upper surface of the light-shielding film portion 107. The lens material 110B is formed using the same material as the lens material 110A described above, and the forming method is also similar. For example, organic materials such as styrene resin, acrylic resin, styrene-acrylic copolymer resin, or siloxane resin, or inorganic materials such as silicon nitride (SiN), silicon oxynitride (SiON), or silicon can be used as lens materials 110A and 110B.

[0141] Next, as Figure 16 As shown in Figure A, after spin-coating the resist 231 onto the upper surface of the lens material 110B, patterning is performed using an exposure machine, followed by thermal reflow. As a result, the resist 231 is formed into a curved lens shape.

[0142] Next, as Figure 16As shown in Figure B, a resist 231 with a curved lens shape is transferred to lens material 110B by dry etching, thus forming an on-chip lens 110. The gap between the on-chip lenses 110 can be reduced by setting rich deposition conditions during the transfer.

[0143] Next, as Figure 17 As shown, an anti-reflective film 111 with a thickness of λ / (4n) is formed on the upper surface of the on-chip lens 110. The anti-reflective film 111 may include, for example, a SiO2 film, a SiN film, a SiON film, an Al2O3 film, a TiO2 film, a HfO2 film, a Ta2O5 film, etc. The anti-reflective film 111 may also serve as a passivation film, which is a measure of reliability.

[0144] As described above, a light detection device 1 comprising pixels of the first configuration embodiment can be manufactured.

[0145] <4. Second Configuration Example of Pixels>

[0146] Figure 18 This is a cross-sectional view showing a second configuration embodiment of pixels 50 that can be configured in the pixel array section 10 of the light detection device 1.

[0147] exist Figure 18 In, and in Figure 3 In the first configuration embodiment shown, the corresponding parts are denoted by the same reference numerals. Figure 18 In the description of the second configuration embodiment, the description will be consistent with... Figure 3 The first configuration embodiment shown in the figure has some different parts.

[0148] Figure 18 The second configuration embodiment shown in the figure is similar to Figure 3 The difference in the first configuration embodiment shown is the shape of the diffuser 132. Furthermore, in the first configuration embodiment, the fixed charge film 103 and the lens material 110A are formed between the light-shielding film 107 and the insulating film 106, but in the second configuration embodiment, the light-shielding film 107 is formed on the insulating film 106. Also, in the first configuration embodiment, the light-receiving surface side of the groove 131 of the light guide 133 is formed in the vertical direction. In contrast, the groove 131 of the light guide 133 in the second configuration embodiment is formed in a forward-conical shape that widens towards the light-receiving surface side. As described above, the light guide 133 has a positive conical shape on the light-receiving surface side of the groove 131, and therefore, the width of the light guide 133 is wider. This allows more light to be captured into the light guide 133.

[0149] exist Figure 3In the first configuration embodiment shown, a silicon substrate with the crystal plane orientation of the front and rear surfaces being (100) planes is used as the semiconductor substrate 101. Conversely, in the second configuration embodiment, a silicon substrate with the crystal plane orientation of the front and rear surfaces being (111) planes is used.

[0150] In a semiconductor substrate 101 having a (111) plane as the front surface, which is an orientation of the crystal plane, <110> The etching rate in the direction is sufficiently higher than <111> The etching rate in the X direction. Therefore, for example, in the case of planar orientation selective etching using an alkaline aqueous solution, although etching in the X direction of the semiconductor substrate 101 occurs, etching in the Y and Z directions is almost non-existent. Thus, as... Figure 18 As shown, the space communicating with the trench portion 131 expands along the X direction inside the semiconductor substrate 101, and the diffusion portion 132 has a plate-shaped three-dimensional polygon that expands along the plane direction of the semiconductor substrate 101. At this time, an etch stop layer can be formed along the X direction where etching of the diffusion portion 132 occurs, and etching can be stopped by the etch stop layer. The etch stop layer is formed by forming a trench from the wiring layer 102 side and embedding the material used as the etch stop layer into the trench. Therefore, etching can be easily controlled. <110> Progress in a certain direction.

[0151] In the second configuration embodiment of pixel 50, as in Figure 18 As indicated by the arrows written inside the photoelectric conversion unit 71, light scattered by the diffuser 132 is reflected by the element isolation portion 135 formed at the pixel boundary and returns to the interior of the photoelectric conversion unit 71. Furthermore, light attempting to exit to the wiring layer 102 side is reflected by the reflective layer 123 and returns to the interior of the photoelectric conversion unit 71. A portion of the light to exit to the light-receiving surface side of the semiconductor substrate 101 is reflected by the substrate surface layer film 105 and returns to the interior of the photoelectric conversion unit 71. A portion of the light escaping from the substrate surface layer film 105 and striking the light-shielding film portion 107 is absorbed by the light-shielding film portion 107 or reflected towards the semiconductor substrate 101. In the second configuration embodiment of the pixel 50, incident light can be guided into the photoelectric conversion unit 71 to obtain the optical path length, achieving both improved quantum efficiency and flicker suppression.

[0152] <Planar layout of trenches and diffusers>

[0153] Reference Figures 19 to 22 The planar layout of the groove portion 131 and the diffuser portion 132 in the second configuration embodiment is described.

[0154] Figure 19 Figures A to D show a planar layout embodiment of the diffuser 132 when the planar shape of the groove 131 is formed as a linear shape.

[0155] Figure 19A indicates an embodiment in which the planar shape of the groove portion 131 is formed as a straight line and the planar shape of the diffuser portion 132 is formed as a rhombus (quadrilateral).

[0156] Figure 19 The planar shape in A is formed as follows. First, a resist pattern is formed such that the trench portion 131 is a linear shape, and dry etching is performed. As a result, the semiconductor substrate 101 is processed perpendicularly in the substrate depth direction. Then, as described in the first configuration embodiment, a hard mask (e.g., a SiN film) is formed with good coverage using methods such as CVD or ALD, and the entire surface is etched back. Therefore, as... Figure 11 As shown in B, the hard mask is retained only on the sidewalls of the trench portion 131. Then, face orientation selective etching is performed using a prescribed alkaline aqueous solution until a third crystalline plane with a planar index (111) appears, and the planar shape of the diffuser portion 132 is formed into a rhombus shape. Note that over-etching may occur when etching continues further, and the shape may differ from the rhombus shape.

[0157] Figure 19 B and D show embodiments in which the planar shape of the groove portion 131 is formed as a linear shape and the planar shape of the diffuser portion 132 is formed as a hexagonal shape.

[0158] When planar oriented selective etching is performed after the formation of the trench 131, and a forced stop is performed before the appearance of the third crystal plane with a planarity index (111), the planar shape of the diffusion portion 132 becomes the etched shape, and as... Figure 19 As shown in B or D, the planar shape can be a hexagon with rounded corners at two opposite vertices of a rhombus. Depending on the etching time, the planar shape may differ from... Figure 19 B or D.

[0159] Figure 19 C shows an example where the planar shape of the groove 131 is formed as a linear shape and the planar shape of the diffuser 132 is formed as a circle or an ellipse.

[0160] In planar orientation selective etching (wet etching), when an acidic mixed solution of hydrofluoric acid, nitric acid, and acetic acid is used instead of an alkaline aqueous solution, the planar shape of the diffuser 132 can be as follows, since the etching is isotropic. Figure 19 The circle or ellipse shown in C.

[0161] Figure 20 An example of the planar layout of the diffuser 132 is shown when the planar shape of the groove 131 is formed as an I-shape.

[0162] like Figure 20As shown, when the planar shape of the trench 131 is type I, planar oriented selective etching is performed until a third crystal plane with a planarity index (111) appears. Therefore, the planar shape of the diffusion portion 132 can be a hexagonal shape with rounded corners at the two opposite vertices of a rhombus. Depending on the length of the etching time, the planar shape may differ from... Figure 20 The planar shape in the middle.

[0163] Figure 21 An embodiment of the planar layout of the diffuser portion 132 is shown when the planar shape of the groove portion 131 is formed into a T-shape.

[0164] like Figure 21 As shown in Figure A, when the planar shape of the trench portion 131 is T-shaped, the planar shape of the diffusion portion 132 can be rhomboid. In this case, through subsequent planar orientation selective etching, the ends of the T-shaped trench portion 131 are corners. However, when etching is forcibly stopped in the middle, a... Figure 21 The shape shown in B, or other planar shapes may be obtained.

[0165] Figure 22 An embodiment of the planar layout of the diffuser portion 132 is shown when the planar shape of the groove portion 131 is formed into an H shape.

[0166] The planar shape of the groove 131 is as follows Figure 22 In the case of the H-shape in A, the planar shape of the diffuser 132 can be hexagonal, wherein the leading end portion of the H-shaped trench 131 is a corner portion through subsequent planar orientation selective etching. However, in the case of forced etch stop in the middle, or in the case of over-etching, it is possible to obtain Figure 22 The shape shown in B can be used, or other planar shapes can be obtained.

[0167] As described above, the diffusion portion 132 is formed by anisotropic etching of crystals with an etching rate that varies depending on the planar orientation of the Si{111} substrate. Here, the Si{111} substrate in this disclosure is a substrate or wafer comprising a single silicon crystal and having a crystal plane represented by {111} in Miller indices. The Si{111} substrate in this disclosure also includes substrates or wafers whose crystal orientation is offset by a few degrees (e.g., offset by a few degrees from the {111} plane in the nearest

[110] direction). Furthermore, it also includes single silicon crystals grown on part or all of the surface of these substrates or wafers by epitaxial methods or the like.

[0168] Furthermore, in the notation of this disclosure, the {111} plane is a collective term for the (111) plane, (-111) plane, (1-11) plane, (11-1) plane, (-1-11) plane, (-11-1) plane, (1-1-1) plane, and (-1-1-1) plane, which are crystal planes that are equivalent to each other in terms of symmetry. Therefore, for example, the description of the Si {111} substrate in the specification of this disclosure can be read as a Si (111) substrate. Here, the negative sign is used instead of the bar symbol representing the Miller index in the negative direction. Moreover, in the specification of this disclosure... <110> The direction is a general term for the

[110] direction,

[101] direction,

[011] direction, [-110] direction, [1-10] direction, [-101] direction, [10-1] direction, [0-11] direction, [01-1] direction, [-1-10] direction, [-10-1] direction, and [0-1-1] direction, which are crystal plane directions that are symmetrically equivalent to each other and can be read as any of these directions.

[0169] When performing anisotropic etching of a crystal using an etching solution on a Si substrate (silicon substrate), for example, when performing etching using an alkaline solution, it is known that etching is easier to perform as the number of dangling bonds exposed on the front surface increases, and etching hardly occurs as the number of back bonds extending to the body side increases, because the reaction between Si bonds and OH ions occurs. A back bond refers to a bond that extends in the negative direction on the opposite side when the normal to the Si {111} plane is positive. Figure 23 The schematic diagram shown illustrates an example of three back bonds at -19.47° to +19.47° relative to the {111} plane. Fewer than three Si back bonds are present in a direction substantially horizontal to the front surface of the substrate, while three Si back bonds are present in a direction substantially perpendicular to the front surface of the substrate. Therefore, for example, when planar orientation selective etching is performed using an alkaline aqueous solution, etching of the semiconductor substrate 101 occurs in the X direction, while almost no etching occurs in the Y and Z directions, and the diffusion portion 132 can be formed. Figures 19 to 22 The planar shape shown.

[0170] <5. Third configuration example of pixels>

[0171] Figure 24 This is a cross-sectional view showing a third configuration embodiment of pixels 50 that can be configured in the pixel array section 10 of the light detection device 1.

[0172] exist Figure 24 In, and in Figure 18 In the second configuration embodiment shown, the corresponding portions are denoted by the same reference numerals. Figure 24In the description of the third configuration embodiment, the description will be related to Figure 18 The second configuration embodiment shown is partially different from some other parts.

[0173] according to Figure 24 The third configuration embodiment shown in the figure has pixel 50 and Figure 18 The difference in the second configuration embodiment shown is that the light converging part that converges the incident light into the photoelectric conversion unit 71 is changed from the on-chip lens 110 to the metasurface element 261.

[0174] exist Figure 24 In pixel 50, the arrangement inside the semiconductor substrate 101 and the arrangement of the light-shielding film portion 107 formed on the semiconductor substrate 101 are similar to those in pixel 50. Figure 18 The configuration of the second configuration embodiment shown is similar. Lens material 110A is formed on the upper surface of the light-shielding film portion 107 and the opening portion 112, and is also embedded in the light guide portion 133. According to the third configuration embodiment, the pixel 50 includes, from the lower layer side, an anti-reflective film 251, a pillar 252, an anti-reflective film 253, a filling material 254, and a protective film 255 on the upper side of the lens material 110A. The metasurface element 261 includes a pillar 252, an anti-reflective film 253, and a filling material 254.

[0175] When the effective refractive index of the material is n and the target wavelength is λ, the antireflective film 251 is formed with a film thickness of approximately λ / (4n) or an integer multiple thereof, in order to suppress reflection through the refractive index interface with the bottom surface of the pillar 252. For example, when SiN is used as the material for the antireflective film 251, it is desirable for the antireflective film 251 to have a film thickness of approximately 130 nm relative to a wavelength of 940 nm. The antireflective film 251 can be formed by stacking multiple films with different refractive indices. Note that the antireflective film 251 can be an etch-stopping layer when dry etching is performed on a material that has high etch selectivity for the pillar 252 in addition to antireflection. For example, when amorphous silicon is used to form the pillar 252, the antireflective film 251 is formed from a 125 nm SiN film, and thus, both antireflection function and etch-stopping layer can be provided simultaneously.

[0176] The metasurface element 261 is formed by arranging a plurality of pillars 252 processed into a cylindrical shape in the pixel region. The diameter (thickness), spacing, and shape of the plurality of array pillars 252 vary depending on the pixel position (more specifically, the image height position) in the pixel array portion 10. For example, it is formed by arranging pillars 252 with different diameters or spacings in the pixel region. Figure 25 Metasurface element 261 is shown in the figure. Due to the difference in at least one of the diameter, spacing or shape of the pillars 252, the phase difference of the light is locally changed, and the direction of the light can be controlled according to the layout of the pillars 252.

[0177] The metasurface element 261 can have a phase design that functions as a lens, such that light is focused onto the light guide 133 of each pixel. This improves quantum efficiency. Alternatively, the metasurface element 261 per image height can have a phase design that functions as a prism, such that the main ray is incident substantially perpendicularly to the light guide 133 in each pixel relative to the oblique incident light from the module lens. With this configuration, sensitivity variations dependent on image height caused by the difference in the angle of incidence of light relative to the light guide 133 can be suppressed. Alternatively, as a phase difference design superimposed on the phase design of the prism that causes the oblique incident light from the module lens to enter the main ray substantially perpendicularly to each image height and the phase design of the lens that focuses the light at a single point, light can converge substantially perpendicularly to the light guide 133 in each pixel. According to this structure, quantum efficiency can be improved and sensitivity variations dependent on image height can be suppressed.

[0178] Antireflective coating 253 is a film that suppresses reflections caused by the refractive index interface with the upper surface of pillar 252. The thickness and material of antireflective coating 253 can be formed similarly to those of antireflective coating 251. By forming it before processing pillar 252, antireflective coating 253 can be formed only on pillar 252, which has a high refractive index.

[0179] Filler material 254 fills the gaps between pillars 252 and can suppress the collapse of pillars 252 and the presence of residues during assembly. Filler material 254 is not limited to filling the gaps between pillars 252, but is formed to cover pillars 252 on the light-incident surface side. Organic or inorganic materials can be used as filler material 254. Examples of organic materials include siloxane resins, styrene resins, acrylic resins, styrene-acrylic copolymer resins, any F-containing materials of these resins, and materials obtained by filling any of these resins with beads having a refractive index lower than that of the resin. Examples of inorganic materials include silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon carbide, silicon carbonitride, zirconium oxide, and laminates thereof.

[0180] A protective film 255 is provided to prevent damage to the filler material 254 during the resist stripping process in manufacturing. Taking into account the target wavelength and refractive index, the film thickness of the filler material 254 and the film thickness of the protective film 255 from the upper surface of the pillar 252 can be formed by using, for example, the Fresnel coefficient method, such that the reflected waves cancel each other out throughout the multilayer film.

[0181] Figure 26 This is a plan view showing an embodiment of the arrangement of pillars 252 of predetermined pixels 50 in the pixel array section 10.

[0182] In order to make efficient use of incident light, the pillars 252 of the metasurface element 261 are designed according to the image height, and have a deflection design corresponding to the prism angle required for each image height.

[0183] Figure 26 Figure A shows an example of a columnar arrangement of pixels 50-1 located in the center of the pixel array 10 among the pixels 50 arranged in the pixel array 10.

[0184] In pixel 50-1, for example, as in Figure 26 As shown in A, 100 pillars 252-1 with the same diameter are arranged in a 10×10 array. With this configuration, no phase difference change occurs in pixel 50, and light incident perpendicularly on the metasurface element 261 is transmitted perpendicularly to the photoelectric conversion section 71 side.

[0185] Figure 26 B shows a columnar arrangement embodiment of pixel 50-2, which is a pixel 50-2 that moves in the X direction relative to pixel 50-1 in the pixel array section 10, and the main ray is incident on pixel 50-2 in the horizontal direction at an angle of 10 degrees.

[0186] In pixel 50-2, for example, as Figure 26 As shown in B, based on the prism angle required for the image height (10 degrees horizontally), for example, pillars 252-1 are arranged in the first and second columns, pillars 252-2 with a diameter smaller than that of pillars 252-1 are arranged in the third and fourth columns, pillars 252 are not arranged in the fifth column, and pillars 252-3 with a diameter larger than that of pillars 252-1 are arranged in the sixth to tenth columns. The pillars 252 are arranged in this way, and therefore, a continuous phase difference gradient is generated in the pillars 252. As a result, light incident on the surface element 261 at 10 degrees is perpendicularly transmitted to the photoelectric conversion section 71 side.

[0187] Figure 26 C shows an example of a columnar arrangement of pixel 50-3, which is a pixel 50-3 that is moved in the X direction relative to pixel 50-2, and the principal ray is incident on pixel 50-3 at a slope of 20 degrees in the horizontal direction.

[0188] In pixels 50-3, for example, as Figure 26As shown in Figure C, pillars 252-1 are arranged in the first to fourth columns, pillar 252-2 in the fifth column, pillar 252-3 in the sixth to eighth columns, and pillar 252-4, with a diameter smaller than that of pillar 252-3 but larger than that of pillar 252-1, is arranged in the ninth and tenth columns, according to the prism angle required for the image height (20 degrees horizontally). The linear slope of the phase difference is set to twice the slope of approximately 10 degrees. The pillars 252 are arranged in this manner, and thus, a continuous phase difference gradient is generated within the pillars 252. As a result, light incident on the surface element 261 at 20 degrees is perpendicularly transmitted to the photoelectric conversion section 71 side.

[0189] Figure 26 D shows an example of a columnar arrangement of pixel 50-4, which is a pixel 50-4 that is moved in the X direction relative to pixel 50-3, and the principal ray is incident on pixel 50-4 at a slope of 30 degrees in the horizontal direction.

[0190] In pixels 50-4, for example, as Figure 26 As shown in Figure D, the pillars 252 are arranged according to the prism angle required for the image height (30 degrees horizontally). The linear slope of the phase difference is then set to three times the slope of approximately 10 degrees. The pillars 252 are arranged in this manner, and thus, a continuous phase difference gradient is generated within the pillars 252. As a result, light incident at 30 degrees on the surface element 261 is perpendicularly transmitted to the photoelectric conversion section 71 side.

[0191] Notice, Figure 26 The column arrangement in A to D is an example, and different layouts can be achieved through 2π folded phase difference or offset processing. The important factor is the relative phase difference between columns 252.

[0192] In the third configuration embodiment, a design embodiment of the prism function of the metasurface element 261 has been described. However, in this configuration, on-chip lenses can be combined and disposed on the light incident surface side of the metasurface element 261. Alternatively, internal lenses can be combined and provided on the semiconductor substrate 101 side of the metasurface element 261. By providing on-chip lenses or internal lenses, light can be effectively guided to the light guide portion 133.

[0193] Figure 27 This is a cross-sectional view showing an embodiment in which an on-chip lens is disposed on the light incident surface side of a metasurface element 261.

[0194] exist Figure 27 In the embodiments, in Figure 24 The metasurface element 261 used in the third configuration embodiment shown is further disposed in Figure 3 Between the on-chip lens 110 and the light-shielding film portion 107 in the first configuration embodiment shown. However, in Figure 27 In one embodiment, the filling material 254 of the metasurface element 261 in the third configuration embodiment becomes a void portion 256, which is an air layer. Because Figure 27 Other configurations in Figure 3 The first configuration embodiment shown in the figure or in Figure 24 The configuration in the third embodiment shown is similar and denoted by the same reference numerals, so its description is omitted. Since the void 256 has a refractive index of 1, the refractive index difference with the pillars 252 can be further increased compared to the case where the filling material 254 fills the spaces between adjacent pillars 252. Figure 27 In this configuration, the on-chip lens 110 is arranged to perform pupil correction in order to reduce stray light caused by light striking the boundary of pixel 50 at the end of the viewing angle of pixel 50, such as the pillar 252. Specifically, the planar center of the on-chip lens 110 is arranged to be offset from the center of the photoelectric conversion unit 71 according to the image height position. Figure 27 In this paper, the anti-reflective coating 111 on the front surface of the on-chip lens 110 is omitted, but the anti-reflective coating 111 can be provided.

[0195] Figure 28 This is a cross-sectional view showing an embodiment in which an internal lens is disposed on the semiconductor substrate 101 side of the metasurface element 261.

[0196] exist Figure 28 In the embodiments, Figure 3 The on-chip lens 110 of the first configuration embodiment shown is changed to an internal lens 271, and an internal lens upper film 272 is formed on the internal lens 271. The internal lens 271 is formed using lens material 110A. Among various materials exemplified as lens material 110A, a material with a refractive index different from that of the internal lens 271 is used as the material of the internal lens upper film 272. Then, a surface element 261 and a protective film 255 are formed on the planarly formed internal lens upper film 272. Similar to Figure 27 In the metasurface element 261, the space between the pillars 252 is not formed by the filling material 254, but by the void portion 256, although it can of course be the filling material 254.

[0197] In addition to its prism function, the metasurface element 261 can also be given a lens function.

[0198] Next, the derivation of metasurface design with prism and lens functions will be described.

[0199] Figure 29 This is a plan view showing an embodiment of the arrangement of pillars 252 of predetermined pixels 50 in the pixel array section 10.

[0200] Figure 29 A to D correspond to Figure 26 A to D, Figure 29 Figure A shows an example of a columnar arrangement of pixels 50-1 located in the central portion of the pixel array section 10. Figure 29 B shows an example of a columnar arrangement of pixels 50-2 on which the main ray is incident at a 10-degree angle in the horizontal direction; Figure 29 C shows an example of a columnar arrangement of pixels 50-3 on which the main ray is incident at a 20-degree angle in the horizontal direction; Figure 29 The D diagram illustrates a columnar arrangement of pixels 50-4 on which the main ray is incident at a 30-degree angle in the horizontal direction.

[0201] In the metasurface element 261, in order to effectively utilize the light at the front end of the viewing angle of the pixel array section 10, a column 252 for each pixel is designed by a combination of a lens design for focusing light at the center of the pixel according to the image height and a deflection design of the prism angle required according to each image height.

[0202] In pixel 50-1, located in the center of pixel array section 10, the main ray from the module lens is incident perpendicularly. For example... Figure 29 As shown in Figure A, the metasurface elements 261 of pixel 50-1 are arranged symmetrically with respect to the pixel center point. The phase of the light rays facing outwards becomes faster, and the light passing through the metasurface elements 261 converges towards the center of pixel 50. Because the pillars 252 are arranged symmetrically, the direction of the principal ray does not change.

[0203] like Figure 29 As shown in B, in the metasurface element 261 of pixel 50-2, where the main ray is incident on it at a 10-degree angle in the horizontal direction, in addition to the lens design at the image height center described above, the pillars 252 are arranged linearly in the horizontal direction with an offset phase difference, so as to correspond to the prism angle at which light incident at 10 degrees in the horizontal direction becomes perpendicular. With this arrangement, both the lens function of focusing light at the pixel center and the prism function of a 10-degree prism angle can be simultaneously achieved.

[0204] like Figure 29 As shown in Figure C, in the metasurface element 261 of pixel 50-3, where the main ray is incident on it at a 20-degree angle in the horizontal direction, in addition to the lens design at the image height center described above, the pillars 252 are arranged linearly in the horizontal direction with an offset phase difference, so as to correspond to the prism angle at which light incident at 20 degrees in the horizontal direction becomes perpendicular. The linear slope of the phase difference is approximately twice that of a 10-degree slope. With this arrangement, both the lens function of focusing light at the pixel center and the prism function of a 20-degree prism angle can be simultaneously achieved.

[0205] like Figure 29As shown in Figure D, in the metasurface element 261 of pixel 50-4, where the main ray is incident on it at a 20-degree angle in the horizontal direction, in addition to the lens design at the image height center described above, the pillars 252 are arranged linearly in the horizontal direction with an offset phase difference, so as to correspond to the prism angle where light incident at 30 degrees in the horizontal direction becomes perpendicular. With this arrangement, both the lens function of focusing light at the pixel center and the prism function of the 30-degree prism angle can be simultaneously achieved.

[0206] Notice, Figure 29 The column arrangement shown in A to D is an example, and different layouts can be achieved through 2π folded phase difference or offset processing. The important factor is the relative phase difference between columns 252.

[0207] The metasurface element 261, with each image height, is phase-designed such that light is focused onto the light guide 133 and the main ray is incident substantially perpendicularly onto the light guide 133. This structure improves quantum efficiency and suppresses sensitivity variations dependent on image height.

[0208] As described above, the light-gathering section can be configured using a metasurface element 261 instead of an on-chip lens 110. In the third configuration embodiment of pixel 50, light gathered by the metasurface element 261, guided to the light guide section 133, and scattered by the diffuser section 132 is reflected by the element isolation section 135 formed at the pixel boundary and returns to the interior of the photoelectric conversion section 71. Furthermore, light attempting to exit to the wiring layer 102 side is reflected by the reflective layer 123 and returns to the interior of the photoelectric conversion section 71. A portion of the light to exit to the light-receiving surface side of the semiconductor substrate 101 is reflected by the substrate surface layer film 105 and returns to the interior of the photoelectric conversion section 71. A portion of the light escaping from the substrate surface layer film 105 and striking the light-shielding film section 107 is absorbed by the light-shielding film section 107 or reflected towards the semiconductor substrate 101. Therefore, in the third configuration embodiment of pixel 50, incident light can be guided into the photoelectric conversion section 71, obtaining an optical path length and achieving both improved quantum efficiency and flicker suppression.

[0209] Note that multiple metasurface elements 261 can be stacked between the antireflective film 251 and the protective film 255 to form a multilayer structure of metasurface elements 261. By employing a multi-level structure, the aspect ratio of each level of pillars 252 can be reduced. As a result, pattern collapse can be easily avoided. Furthermore, a single-layer pillar structure is designed in principle for a single wavelength. However, by providing multi-level pillars 252, the wavelength band and multispectral wavelengths can be broadened by changing and combining the design of each level. Additionally, deflection control can also be achieved.

[0210] In the above embodiments, it has been shown that... Figure 18The example shown is where the on-chip lens 110 of pixel 50 according to the second configuration embodiment is replaced by a metasurface element 261. However, it is also possible to implement in which... Figure 3 The first configuration embodiment shown has a configuration in which the on-chip lens 110 of pixel 50 is replaced by a metasurface element 261.

[0211] <6. Fourth configuration example of pixels>

[0212] Figure 30 This is a cross-sectional view showing a fourth configuration embodiment of pixels 50 that can be configured in the pixel array section 10 of the light detection device 1.

[0213] exist Figure 30 In, and in Figure 3 The portions corresponding to the portions shown in the first configuration embodiment are denoted by the same reference numerals, and in Figure 30 In the description of the fourth configuration embodiment, the description will be related to... Figure 3 The first configuration embodiment shown in the figure has some different parts. Note that in Figure 30 In order to simplify the description, the illustrations of parts common to the first configuration embodiment are omitted.

[0214] Figure 30 The fourth configuration embodiment shown is similar to Figure 3 The difference in the first configuration embodiment lies in the material embedded in the trench portion 131 and the diffusion portion 132 constituting the light guide portion 133. Furthermore, in the fourth configuration embodiment, a deflection portion 304 with an uneven shape is formed on the light-receiving surface of the semiconductor substrate 101, and an inter-pixel light-shielding portion 303 is formed at the pixel boundary portion on the light-receiving surface side. Moreover, on the light-receiving surface side of the semiconductor substrate 101, the on-chip lens 310 is formed as a focusing portion to concentrate incident light into the photoelectric conversion portion 71, instead of the on-chip lens 110 of the first configuration embodiment.

[0215] In the first configuration embodiment, lens material 110A is embedded in the trench portion 131 and the diffusion portion 132, and the interior of the on-chip lens 110 and the light guide portion 133 are formed of the same material. Conversely, in the fourth configuration embodiment, an insulating film 301, such as a SiO2 film, a SiN film, a SiON film, or a TiO2 film, is embedded in the diffusion portion 132. In this embodiment, a SiO2 film is embedded as the insulating film 301. In addition, silicon 302, which is a high refractive index material, is buried inside the trench portion 131. Silicon 302 can be amorphous silicon (α-Si) or polycrystalline silicon. For example, in SiN and oxide film (SiO2), the refractive index n at a wavelength of 940 nm is n=1.82 and n=1.45, respectively, while the refractive index n of silicon at a wavelength of 940 nm is n=3.5 to 3.8, which is higher than the refractive index of the insulating film 301. As the material for the on-chip lens 310, a material with a refractive index close to that of the insulating film 301 embedded in the diffuser 132 is used, such as styrene resin, acrylic resin, styrene-acrylic copolymer resin, or siloxane resin, silicon nitride (SiN), silicon oxynitride (SiON) and other resin materials.

[0216] Similar to the first configuration embodiment, a device isolation portion 135 can be formed at the pixel boundary portion of the semiconductor substrate 101. Although in Figure 30 The text has been simplified, but as... Figure 3 As shown, the device isolation portion 135 may include a fixed charge film 103 formed on the sidewalls of the entire trench structure and an insulating film 106 embedded within the fixed charge film 103. Alternatively, the device isolation portion 135 may be formed by further embedding a metal material such as tungsten or aluminum within the insulating film 106. Furthermore, the device isolation portion 135 may be formed using, for example, a p-type semiconductor region and grounded.

[0217] Like the light-shielding film 107 in the first configuration embodiment, the inter-pixel light-shielding portion 303 is composed of a single layer or multiple layers of metal film. The inter-pixel light-shielding portion 303 can be formed using any light-shielding material, but preferably uses metal films such as aluminum (Al), tungsten (W), or copper (Cu) as materials with strong light-shielding properties and capable of high-precision processing (e.g., etching). Furthermore, silver (Ag), gold (Au), platinum (Pt), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), iron (Fe), tellurium (Te), and alloys containing these metals can be used. Additionally, the inter-pixel light-shielding portion 303 can also be formed by stacking multiple of the aforementioned metal films. In the inter-pixel light-shielding portion 303, a blocking metal can be formed in the lower layer to enhance adhesion to the substrate. For example, titanium (Ti), tantalum (Ta), tungsten (W), cobalt (Co), molybdenum (Mo), or alloys thereof, nitrides, oxides, or carbides can be used as the blocking metal material. Furthermore, the inter-pixel light-shielding portion 303 can also be used to shield pixels used to determine optical black levels, and can also be used to shield against noise in the peripheral circuit area. The inter-pixel light-shielding portion 303 is preferably grounded so as not to be damaged by plasma damage caused by charges accumulated during processing. The grounding structure can be formed in the pixel array, but after all conductors are electrically connected, the grounding structure can be located in the outer region of the effective pixel area.

[0218] The deflection portion 304 is formed of a moth-eye structure with an uneven surface, in which, for example, upward or downward quadrangular pyramids are periodically formed on the light-receiving surface of the semiconductor substrate 101. The moth-eye structure of the deflection portion 304 generates an anti-reflection effect by smoothing out the refractive index difference on the light-receiving surface of the semiconductor substrate 101. Furthermore, the moth-eye structure of the deflection portion 304 also serves as a light diffracting portion for light diffracted through the uneven structure.

[0219] Although not shown, similar to the first configuration embodiment, the wiring layer 102 is formed on the surface opposite to the light-receiving surface of the semiconductor substrate 101. Additionally, in the fourth configuration embodiment, the fixed charge film 103 and the anti-reflection film 104 described in the first configuration embodiment may also be formed on the light-receiving surface of the semiconductor substrate 101.

[0220] Figure 31 It is along Figure 30 The plan view is taken by line X-X' in the cross-sectional view, and an embodiment of the planar shape configuration of the groove portion 131 is shown.

[0221] like Figure 31 As shown in A, the groove portion 131 can be formed as a rectangular planar shape or a hole shape in which the longitudinal and transverse directions are substantially the same. Hole shapes include circular and elliptical shapes.

[0222] Or, such as Figure 31 As shown in B, the groove portion 131 can be formed as a straight line shape in which one of the longitudinal and transverse directions is longer than the other.

[0223] When the planar shape of the groove 131 is rectangular or hole-shaped, the perspective view of the light guide 133 is similar to... Figure 5 Perspective view in the image.

[0224] On the other hand, the perspective view of the light guide portion 133 when the planar shape of the groove portion 131 is formed into a linear shape is as follows: Figure 32 As shown in the image.

[0225] like Figure 10 As shown in B, the light guide portion 133 of the fourth configuration embodiment is formed by embedding an insulating film 301 such as a SiO2 film in a trench of a predetermined depth dug from the light receiving surface of the semiconductor substrate 101 using CVD, ALD, etc., and then embedding silicon 302 such as α-Si. Thereafter, a pixel-to-pixel light-shielding portion 303 and a deflection portion 304 with an uneven structure are formed on the light receiving surface of the semiconductor substrate 101, and an on-chip lens 310 is further formed. For example, the uneven structure of the deflection portion 304 can be formed as follows: A resist mask is formed on the uneven surface of the semiconductor substrate 101 in a region that becomes an uneven structure during photolithography. Next, a recess is formed by wet etching using the resist mask. In the case of forming a recess with an uneven structure, the orientation of the opposing surfaces of the light receiving surface and the semiconductor substrate 101 is set as a (100) surface, and the wall surface of the recess is set as a (111) surface. Therefore, crystallization defects can be suppressed through anisotropic etching of crystallinity, and a high-precision four-corner pyramidal concave-convex structure can be formed. After forming the concave portion, the resist is removed.

[0226] According to the fourth configuration embodiment, the pixel 50 has the above-described configuration. According to the fourth configuration embodiment, incident light is narrowed by the on-chip lens 310 and guided to the light guide portion 133 and the deflection portion 304 surrounding the light guide portion. Light incident on the light guide portion 133 is diffused into the photoelectric conversion portion 71 through the diffusion portion 132. The diffusion portion 132 included in the light guide portion 133 can scatter light passing through the trench portion 131 in different directions and can extend the optical path length of the incident light. The deflection portion 304 with a moth-eye structure is provided on the light-receiving surface of the semiconductor substrate 101; therefore, the 0th-order diffracted light incident on the light-receiving surface of the semiconductor substrate 101 can be diffused and incident on the photoelectric conversion portion 71. Therefore, the optical path length of the incident light can be extended. The increased optical path length of the incident light contributes to improved quantum efficiency. The zeroth-order diffracted light incident on the light-receiving surface of the semiconductor substrate 101 is diffused, thereby reducing the light (return light) that escapes to the side opposite to the light-receiving surface of the semiconductor substrate 101 (the side of the wiring layer 102), is reflected by the wiring layer 102, and escapes to the light-receiving surface side.

[0227] <7. Variations of pixels according to the fourth configuration embodiment>

[0228] Next, a variation of pixel 50 according to the fourth configuration embodiment will be described.

[0229] Figure 33 A shows a cross-sectional view of a first variant of pixel 50 according to a fourth configuration embodiment.

[0230] exist Figure 33 In the first variation shown in A, Figure 30 In the fourth configuration embodiment shown, the light guide portion 133 is changed to a light guide portion 133A. The difference between the light guide portion 133A and the light guide portion 133 in the fourth configuration embodiment lies in the position of the diffuser portion 132. That is, in... Figure 30 In the light guide portion 133, the diffusion portion 132 is disposed at the front end of the trench portion 131 that is drilled along the depth direction from the light receiving surface of the semiconductor substrate 101. In contrast, in Figure 33 In the light guide portion 133A of the first variation of A, the diffusion portion 132 is disposed between the light receiving surface of the semiconductor substrate 101 and the front end of the trench portion 131. In this method for forming the light guide portion 133A, after the diffusion portion 132 is formed by a method similar to that of the first configuration embodiment, a hard mask is further formed, and the hard mask at the bottom of the three-dimensional polygon is removed by a full etch area to advance etching in the depth direction of the semiconductor substrate 101. As described above, the diffusion portion 132 does not need to be the front end of the trench portion 131; it can be disposed at any depth position between the light receiving surface of the semiconductor substrate 101 and the front end of the trench portion 131.

[0231] Figure 33 FIG. B shows a cross-sectional view of a second modification of pixel 50 according to a fourth configuration embodiment.

[0232] In Figure 33 the second modification shown in FIG. B, the light guide portion 133 of the fourth configuration embodiment shown in Figure 30 is changed to a light guide portion 133B. The difference between the light guide portion 133B and the light guide portion 133 of the fourth configuration embodiment lies in the number of diffusion portions 132. That is, in Figure 30 the light guide portion 133, one diffusion portion 132 is provided in the groove portion 131. In contrast, in Figure 33 the light guide portion 133B of the second modification shown in FIG. B, two diffusion portions 132 are provided in the groove portion 131. Specifically, the diffusion portions 132 are provided at two positions, namely, the front end and the middle position of the groove portion 131. In the formation method of such a light guide portion 133B, as long as the same formation method as that of the first configuration embodiment is repeatedly performed in the depth direction. This embodiment is an embodiment in which two diffusion portions 132 are arranged, but three or more diffusion portions 132 can be arranged. As described above, the light guide portion 133B may include a groove portion 131 and a plurality of diffusion portions 132.

[0233] Figure 34 FIG. A shows a cross-sectional view of a third modification of pixel 50 according to a fourth configuration embodiment.

[0234] In Figure 34 the third modification shown in FIG. A, the light guide portion 133 of the fourth configuration embodiment shown in Figure 30 is changed to a light guide portion 133C. The light guide portion 133C includes a diffusion portion 132A changed from the diffusion portion 132 in Figure 30 . Similar to the diffusion portion 132 shown in the second configuration embodiment in Figure 18 , the diffusion portion 132A of the third modification is formed by a plate-shaped three-dimensional polygon extending in the plane direction of the semiconductor substrate 101. The diffusion portion 132A formed by the plate-shaped three-dimensional polygon is provided at the front end of the groove portion 131. Similar to the second configuration embodiment, by using a silicon substrate with the crystal plane orientations of the front and back surfaces being (100) planes as the semiconductor substrate 101 and performing surface orientation selective etching using an alkaline aqueous solution or the like, such a light guide portion 133C can be formed. As described above, the diffusion portion 132A may be formed by a plate-shaped three-dimensional polygon extending in the plane direction of the semiconductor substrate 101.

[0235] Figure 34 FIG. B shows a cross-sectional view of a fourth modification of pixel 50 according to a fourth configuration embodiment.

[0236] In Figure 34 the fourth modification shown in FIG. B, the light guide portion 133 of the fourth configuration embodiment shown in Figure 30The light guide portion 133 shown in the fourth configuration embodiment is modified to a light guide portion 133D. The light guide portion 133D has two diffusion portions 132A formed by a plate-shaped three-dimensional polygon. Specifically, in the fourth modified example of the light guide portion 133D, the diffusion portions 132A formed by a plate-shaped three-dimensional polygon extending in the surface direction of the semiconductor substrate 101 are disposed at two positions between the front end of the trench portion 131 and the front end of the trench portion 131 from the light-receiving surface of the semiconductor substrate 101. This example is an embodiment where two diffusion portions 132A are arranged between the light-receiving surface of the semiconductor substrate 101 and the front end of the trench portion 131, but three or more diffusion portions 132A may be arranged. As described above, the light guide portion 133D may include the trench portion 131 and a plurality of diffusion portions 132A.

[0237] Figure 35 A cross-sectional view of a fifth variant of pixel 50 according to the fourth configuration embodiment is shown.

[0238] exist Figure 35 In the fifth variation shown, the pixel is set Figure 30 The fourth configuration embodiment shown includes a plurality of light guides 133. The planar shape of each of the plurality of provided light guides 133 may be as follows: Figure 31 The rectangular or hole-shaped planar shape shown in the planar diagram A, or as... Figure 31 The planar shape of the linear shape shown in B.

[0239] Figure 36 It is along Figure 35 The planar view intercepted by the line X-X' of the cross-sectional view.

[0240] like Figure 36 As shown in A, when the planar shape of the groove portion 131 is a rectangular shape or a hole shape, the pixel 50 of the fifth modified example includes 3x3=9 light guide portions 133.

[0241] On the other hand, such as Figure 36 As shown in B, when the planar shape of the groove portion 131 is a linear planar shape, the pixel 50 of the fifth modified example includes three light guide portions 133.

[0242] As described above, the pixel 50 of the fifth variation can have a structure in which multiple light guide portions 133 are provided within the pixel. Since multiple light guide portions 133 can be formed simultaneously, the number of diffuser portions 132 provided in the pixel can be increased without increasing the number of processing steps, thereby increasing the optical path length of the incident light and improving sensitivity.

[0243] Able to combine appropriately Figure 33 The first variation shown to Figure 35 and Figure 36The fifth variation shown is a variation of the previous one.

[0244] Figure 37 A cross-sectional view of a sixth variant of pixel 50 according to the fourth configuration embodiment is shown.

[0245] Figure 37 The sixth variation shown has the same characteristics as... Figure 35 The fifth variant shown similarly sets a feature within a pixel. Figure 33 The second variation shown in Figure B employs a structure of multiple diffusers 132 and multiple light guides 133B. The planar shape of the light guides 133B can be as follows: Figure 36 A is a rectangular or hole-shaped planar shape, or as shown in Figure A. Figure 36 The planar shape of the linear shape shown in B.

[0246] Figure 38 A cross-sectional view of a seventh variant of pixel 50 according to the fourth configuration embodiment is shown.

[0247] Figure 38 The seventh variation shown has Figure 30 The light guide 133 shown and Figure 33 The second variation shown in Figure B illustrates a structure in which the light guide portion 133B is disposed in a pixel. As described above, when multiple light guide portions 133 are disposed in a pixel, for example, the type of the light guide portion 133 to be formed can be changed according to its planar position in the pixel. The planar shapes of each of the light guide portions 133 and 133B can be as follows: Figure 36 A is a rectangular or hole-shaped planar shape, or as shown in Figure A. Figure 36 The planar shape of the linear shape shown in B.

[0248] Figure 39 A cross-sectional view of an eighth variant of pixel 50 according to the fourth configuration embodiment is shown.

[0249] exist Figure 39 In the eighth variation shown, 2 x 2 = 4 on-chip lenses 310 are arranged in one pixel, and the light guide portion 133 is arranged at the position of the photoelectric conversion portion 71 as the planar center of the on-chip lens 310, thus corresponding to each on-chip lens 310. Therefore, in the eighth variation, four light guide portions 133 are formed within the pixel. The planar shape of the light guide portion 133 can be as follows: Figure 31 The rectangular or hole-shaped planar shape shown in A, or as... Figure 31The planar shape of the linear shape shown in B. As described above, a plurality of on-chip lenses 310 may be formed in one pixel, and a plurality of light guides 133 may be arranged in the pixel corresponding to each on-chip lens 310. For example, the number of on-chip lenses 310 and the number of light guides 133 arranged in one pixel are not limited to four, and for example, 3x3=9 may be arranged.

[0250] Figure 40 A cross-sectional view of a ninth variant of pixel 50 according to the fourth configuration embodiment is shown.

[0251] Figure 40 The ninth variation shown is based on Figure 30 The difference in the fourth configuration embodiment shown is that the light-receiving surface of the semiconductor substrate 101 is formed as a flat surface. That is, in Figure 30 In pixel 50, a deflection portion 304 formed in a concave-convex shape is disposed on the light-receiving surface of the semiconductor substrate 101. Conversely, in Figure 40 In the ninth variation, the deflection portion 304 is omitted, and the light-receiving surface of the semiconductor substrate 101 is formed as a flat surface. As described above, the pixel 50 includes a light guide portion 133, but may not include the deflection portion 304. Without the deflection portion 304, the manufacturing process becomes easier because the process of forming the deflection portion 304 can be omitted.

[0252] Figure 41 A cross-sectional view of a tenth variation of pixel 50 according to the fourth configuration embodiment is shown.

[0253] Figure 41 The tenth variation shown is based on Figure 30 The difference in the fourth configuration embodiment shown is that the pixel 50 further includes a reflection deflection portion 331, which has an uneven shape on the surface opposite to the light-receiving surface side of the semiconductor substrate 101. That is, in Figure 30 In pixel 50, the surface opposite to the light-receiving surface side of the semiconductor substrate 101 is formed as a flat surface. Conversely, in Figure 41 In the tenth variation, a reflection deflection portion 331 with an uneven shape is formed on the surface opposite to the light-receiving surface side of the semiconductor substrate 101. An insulating film 332, such as SiO2 or SiN, is embedded in the recess of the reflection deflection portion 331. The insulating film 332 may be a multilayer film (dielectric multilayer film) designed to be reflected by a stacked structure of dielectrics with different refractive indices. Therefore, light attempting to be transmitted to the wiring layer 102 side (not shown) can be returned to the photoelectric conversion unit 71. Furthermore, light attempting to be transmitted to the wiring layer 102 side (not shown) can be reflected at a certain angle by the reflection deflection portion 331, and the optical path length can be further increased.

[0254] Figure 42 A cross-sectional view is shown of an eleventh variation of pixel 50 according to the fourth configuration embodiment.

[0255] Figure 42 The eleventh variation shown is similar to Figure 30 The fourth configuration embodiment shown differs in that the deflection portion 304 is omitted, and a color filter layer 351 is formed on the light-receiving surface of the flatly formed semiconductor substrate 101. The color filter layer 351 may be formed between the on-chip lens 310 and the semiconductor substrate 101, and the inter-pixel light-shielding portion 303 or anti-reflective film may be formed between the light-receiving surface of the semiconductor substrate 101 and the color filter layer 351.

[0256] The color filter layer 351 is formed as a so-called Bayer array, wherein, for example, four pixels of 2×2 are set as repeating units, and G, B, R and G color filters are arranged in the four pixels constituting the repeating units. Figure 42 The cross-sectional view shows two pixels of the four pixels that make up the repeating unit, which have G, B, R and G color filters, including pixel 50 with an R color filter and two pixels of pixel 50 with a G color filter.

[0257] Note that the color filter array of color filter layer 351 is not limited to a Bayer array, and can be another array. For example, such as Figure 43 As shown in the embodiment, an RGBW color filter array can be used, wherein the G, B, R and W color filters are arranged in four pixels forming a 2×2 repeating unit. Figure 8 The cross-sectional view shows pixel 50 with an R color filter and two pixels with a W color filter out of the four pixels constituting the repeating unit with G, B, R, and W color filters. The W color filter is a color filter that transmits light of all R, G, and B colors (wavelengths) and can be referred to as C (transparent). Figure 43 In one embodiment, the W color filter is formed using the same material as the on-chip lens 310.

[0258] The color filter array can be a four-Bayer array, a four-RGBW array, etc. In a four-Bayer array, G, B, R, and G color filters are arranged in a Bayer array for each of the four pixels in a 2×2 grid, with one color arrangement unit serving as four pixels in a 2×2 grid. In a four-RGBW array, G, B, R, and W color filters are arranged for each of the four pixels in a 2×2 grid. Alternatively, for example, color filters for complementary colors such as yellow (Y), cyan (Cy), and magenta (Mg) can be arranged.

[0259] Figure 44 A cross-sectional view of a twelfth variant of pixel 50 according to the fourth configuration embodiment is shown.

[0260] exist Figure 44 In the twelfth variation shown, the deflection portion 304 is omitted, and a color filter layer 351 is formed on the light-receiving surface of the flat semiconductor substrate 101. The color filter layer 351 may be formed between the on-chip lens 310 and the semiconductor substrate 101, and the inter-pixel light-shielding portion 303 and the anti-reflective film may be formed between the light-receiving surface of the semiconductor substrate 101 and the color filter layer 351. The color filter array of the color filter layer 351 may be any array similar to that described in the eleventh variation. Figure 44 The color filter array shown is an embodiment of the Bayer array.

[0261] Furthermore, in the twelfth variation, the semiconductor substrate 101 is formed by stacking two semiconductor layers, a first semiconductor layer 361 and a second semiconductor layer 362, in the depth direction of the substrate. An insulating layer 363 is formed between the first semiconductor layer 361 and the second semiconductor layer 362. The insulating layer 363 is formed using, for example, a SiO2 film. The insulating layer 363 can be formed using the same material as the insulating film 301 embedded in the diffusion portion 132 or the same material as the on-chip lens 310.

[0262] Each pixel 50 includes two photoelectric conversion units 71, namely, a photoelectric conversion unit 71 formed in the first semiconductor layer 361 (hereinafter referred to as the first photoelectric conversion unit 71-1.) and a photoelectric conversion unit 71 formed in the second semiconductor layer 362 (hereinafter referred to as the second photoelectric conversion unit 71-2.).

[0263] A first photoelectric conversion section 71-1 formed on the light-receiving surface side of the semiconductor substrate 101 performs photoelectric conversion on G, B, or R light passing through the color filter layer 351. Figure 44 In this embodiment, since the R color filter is formed in the color filter layer 351 of the left pixel 50, the first photoelectric conversion unit 71-1 of the left pixel 50 performs photoelectric conversion on the incident R light. Since the G color filter is formed in the color filter layer 351 of the right pixel 50, the first photoelectric conversion unit 71-1 of the right pixel 50 performs photoelectric conversion on the incident G light.

[0264] The second photoelectric conversion section 71-2, formed on the wiring layer 102 side of the semiconductor substrate 101, performs photoelectric conversion on infrared light that passes through the color filter layer 351 and further through the first photoelectric conversion section 71-1. A light guide section 133, including a trench section 131 and a diffusion section 132, is formed inside the second photoelectric conversion section 71-2.

[0265] As described above, according to the twelfth variation, pixel 50 includes two photoelectric conversion units 71, namely a first photoelectric conversion unit 71-1 and a second photoelectric conversion unit 71-2, and at least one of the two photoelectric conversion units 71 includes a light guide unit 133. The first photoelectric conversion unit 71-1 performs photoelectric conversion on visible light having a predetermined wavelength, and the second photoelectric conversion unit 71-2 performs photoelectric conversion on infrared light. Figure 44 In the illustrated embodiment, the light guide 133 is disposed in the second photoelectric conversion unit 71-2, which converts infrared light into photoelectric light, and thus the optical path length of the infrared light can be extended. Therefore, the quantum efficiency of the infrared light can be improved. When the light guide 133 is also disposed in the first photoelectric conversion unit 71-1, the quantum efficiency of visible light with a predetermined wavelength can be improved.

[0266] It should be noted that, Figure 44 In the embodiments shown, an embodiment with the same configuration of forming units for pixel regions that convert G, B, or R light and pixel regions that convert infrared light is illustrated. However, the forming units for pixel regions that convert G, B, or R light and pixel regions that convert infrared light can be different. For example, in the second semiconductor layer 362 on the wiring layer 102 side of the semiconductor substrate 101, each of the four pixels in the 2x2 array of the first semiconductor layer 361 on the light receiving surface side can form an element isolation portion 135, and the signal of each of the four RGB pixels can be output for the signal of infrared light conversion.

[0267] Reference Figures 33 to 44 The first to twelfth variations described are based on Figure 30 The fourth configuration embodiment of pixel 50 shown is a variation thereof, but these variations can be similarly applied to pixel 50 according to the first to third configuration embodiments described above. Two or more of the first to fourth configuration embodiments of pixel 50 and their variations can be combined to a extent that does not contradict each other.

[0268] <8. Example of a hybrid array of visible and invisible light pixels>

[0269] An example of a pixel array in which pixels 50 that convert R, G, or B visible light by photoelectric conversion and pixels 50 that convert invisible infrared light by photoelectric conversion are mixed and arranged in the pixel array section 10 of the light detection device 1.

[0270] Figure 45 A illustrates a first pixel array embodiment that mixes visible light pixels and invisible light pixels.

[0271] Figure 45The first pixel array embodiment in A has a configuration in which eight pixels 50G, four pixels 50IR, two pixels 50R, and two pixels 50B are arranged as repeating units in a 4×4 pixel region of 16 pixels. Pixel 50G is a pixel with a G color filter and receives G light, pixel 50R is a pixel with an R color filter and receives R light, and pixel 50B is a pixel with a B color filter and receives B light. Pixel 50IR is a pixel with an IR color filter and receives IR light (infrared light).

[0272] Figure 45 B describes a second pixel array embodiment in which visible light pixels are mixed with invisible light pixels.

[0273] Figure 45 The second pixel array embodiment in B has a configuration in which four pixels 50G, eight pixels 50IR, two pixels 50R, and two pixels 50B are arranged as repeating units in a 4×4 pixel region of 16 pixels. When the resolution of the infrared subject is more important and colorization is also required, an array with increased occupancy of pixels 50IR, as described above, can be used.

[0274] Figure 45 The C diagram illustrates an example of a third pixel array where visible and invisible pixels are mixed.

[0275] Figure 45 The third pixel array embodiment in C has a configuration in which four pixels 50G, four pixels 50IR, four pixels 50W, two pixels 50R, and two pixels 50B are arranged as repeating units in a 4×4 pixel region of 16 pixels. Pixel 50W is a pixel that receives R, G, and B visible light and IR invisible light. Furthermore, the third pixel array example is suitable for situations where a light detection device 1 needs brightness information, color information, and sensing information in a low-light environment.

[0276] <9. Configuration Examples of Image Processing Systems>

[0277] Figure 46 This is a schematic diagram illustrating a configuration embodiment of an image processing system according to a second embodiment of the technology applicable to this disclosure.

[0278] Figure 46The image processing system 500 acquires spectral information of an object and also acquires sensing information of the object. The image processing system 500 includes a light source unit 510 that illuminates the object with infrared light, an optical unit (imaging lens) 520 that forms an image using light from the object, and an imaging device 530 that images the object. Furthermore, the image processing system 500 includes a signal processing unit 540 that processes signals from the imaging device 530, an authentication processing unit 550 that performs authentication processing based on the infrared light image, and a viewing processing unit 560 that performs viewing processing. The image processing system 500 performs authentication processing and viewing processing based on signals output from the imaging device 530. The operation of the entire image processing system 500 is controlled by a control unit (not shown).

[0279] In the image processing system 500, through Figure 45 The pixel array of the hybrid array shown in A through C can be applied to the pixel array in the imaging device 530. The signal processing unit 540 isolates the pixel signals from the imaging device 530 into pixel signals for visible light pixels and pixel signals for infrared light pixels. The isolated pixel signals for visible light pixels are used as a visible light image (RGB image). The isolated pixel signals for infrared light pixels are used as an infrared light image. The signal processing unit 540 detects the phase difference based on the isolated pixel signals for infrared light pixels and generates a distance image.

[0280] The authentication processing unit 550 performs authentication processing using at least one of a visible light image, an infrared light image, or a distance image provided by the signal processing unit 540. For example, the authentication processing unit 550 can perform integrated authentication such as three-dimensional (3D) face authentication or iris authentication based on information from the infrared light image and the distance image. The viewing processing unit 560 performs viewing processing based on the visible light image provided by the signal processing unit 540. In the image processing system 500, a light detection device 1 with pixels 50 that achieve both improved quantum efficiency and flicker suppression by guiding incident light into the photoelectric conversion unit 71 and increasing the optical path length is provided as an imaging device 530, and therefore high sensitivity can be achieved. As a result, authentication processing and viewing processing can be performed with higher accuracy.

[0281] <10. Configuration Example of Distance Measurement System>

[0282] Figure 47 This is a block diagram illustrating a configuration embodiment of a distance measurement system according to a third embodiment, which applies the technology disclosed herein.

[0283] Figure 47 The distance measurement system 600 includes a distance measuring device 611 and an application unit 612. The distance measuring device 611 includes a light source unit 641, a light receiving unit 642, and a distance measurement processing unit 643.

[0284] The light source unit 641 includes, for example, a light-emitting element that emits infrared light and a driving circuit that drives the light-emitting element. For example, a light-emitting diode (LED) can be used as the light-emitting element included in the light source unit 641. This disclosure is not limited to this, and a vertical-cavity surface-emitting laser (VCSEL) in which multiple light-emitting elements are formed in an array can also be used as the light-emitting element included in the light source unit 641. In the following, unless otherwise specified, the case of "the light-emitting element of the light source unit 641 emitting light" will be described as the case of "the light source unit 641 emitting light", etc.

[0285] For example, the light receiving unit 642 includes a light receiving element capable of detecting infrared light and a signal processing circuit that outputs a pixel signal corresponding to the light detected by the light receiving element. The light receiving unit 642 includes the light detection device 1 described above. In the following text, unless otherwise specified, the case of "the light receiving element included in the light receiving unit 642 receiving light" will be described as the case of "the light receiving unit 642 receiving light", etc.

[0286] For example, the distance measurement processing unit 643 performs distance measurement processing in the ranging device 611 in response to a distance measurement command from the application unit 612. For example, the distance measurement processing unit 643 generates a light source control signal for driving the light source unit 641 and supplies the light source control signal to the light source unit 641. Furthermore, the distance measurement processing unit 643 controls the light reception of the light receiving unit 642 synchronously with the light source control signal supplied to the light source unit 641. For example, the distance measurement processing unit 643 generates an exposure control signal synchronously with the light source control signal for controlling the exposure period in the light receiving unit 642 and supplies the generated signal to the light receiving unit 642. The light receiving unit 642 outputs valid pixel signals during the exposure period indicated by the exposure control signal. The distance measurement processing unit 643 calculates distance information based on the pixel signals output from the light receiving unit 642 in response to light reception and the light source control signal for driving the light source unit 641. Furthermore, the distance measurement processing unit 643 may also generate predetermined image information based on the pixel signals. The distance measurement processing unit 643 supplies distance information and image information calculated and generated based on pixel signals to the application unit 612.

[0287] In this configuration, for example, the distance measurement processing unit 643 generates a light source control signal for driving the light source unit 641 in response to an instruction from the application unit 612 to perform distance measurement, and supplies the light source control signal to the light source unit 641. Furthermore, the distance measurement processing unit 643 generates an exposure control signal synchronized with the light source control signal, and supplies the exposure control signal to the light receiving unit 642. The light source unit 641 emits light according to the light source control signal generated by the distance measurement processing unit 643. The light emitted from the light source unit 641 is emitted as emitted light 631 of the light source unit 641. For example, the emitted light 631 is reflected by the measured object 621 and received by the light receiving unit 642 as reflected light 632. The light receiving unit 642 generates a pixel signal corresponding to the received reflected light 632 and provides the pixel signal to the distance measurement processing unit 643.

[0288] The distance measurement processing unit 643 measures the distance D to the measurement object 621 based on the timing of the emission of light from the light source unit 641 and the timing of the reception of reflected light by the light receiving unit 642. Here, the direct time-of-flight (ToF) method and the indirect ToF method are known as distance measurement methods using reflected light. In the direct ToF method, the distance D is measured based on the time difference between the emission timing of the light source unit 641 and the reception timing of the reflected light by the light receiving unit 642. In the indirect ToF method, the distance D is measured based on the phase difference between the phase of the light emitted by the light source unit 641 and the phase of the light received by the light receiving unit 642. The pixel 50 of the light detection device 1, which is the pixel of the light receiving unit 642, can effectively confine the incident reflected light 632 within the photoelectric conversion unit 71, and can achieve both improved quantum efficiency and spot suppression.

[0289] The application unit 612 is implemented, for example, by a program operating on the central processing unit (CPU), requesting the ranging device 611 to perform a distance measurement, and obtaining distance information as a result of the distance measurement from the ranging device 611.

[0290] For example, in a distance measurement system 600 that uses infrared light as the emitted light 631 emitted from the light source 641 to the object being measured 621, a light detection device 1 for the pixel 50 is configured as a light receiver 642, which improves quantum efficiency and suppresses flash by introducing incident light into the photoelectric conversion unit 71 and increasing the optical path length. Therefore, high sensitivity and higher accuracy in measuring distance D can be achieved.

[0291] <11. Examples of applications of moving objects>

[0292] The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein can be implemented as a device mounted on any type of mobile body, such as a car, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility device, airplane, drone, ship, or robot.

[0293] Figure 48 This is a block diagram illustrating a schematic configuration embodiment of a vehicle control system, which is an embodiment of a mobile body control system to which the technology according to this disclosure can be applied.

[0294] exist Figure 48 In the embodiment of the vehicle control system 12000 shown, which includes multiple electronic control units connected via a communication network 12001, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. Furthermore, as examples of the functional structure of the integrated control unit 12050, a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0295] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 is used as a control device for drive force generating devices (such as internal combustion engines, drive motors, etc.) that generate drive force for the vehicle, drive force transmission mechanisms that transmit drive force to the wheels, steering mechanisms that adjust the vehicle's steering angle, and braking devices that generate braking force for the vehicle.

[0296] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 is used as a control device for keyless entry systems, smart key systems, power windows, or various lights such as headlights, taillights, brake lights, turn signals, fog lights, etc. In this case, radio waves or signals from various switches, which are used as a substitute for keys, can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the vehicle's door locks, power windows, lights, etc.

[0297] The exterior information detection unit 12030 detects exterior information, including information from outside the vehicle, which is part of the vehicle control system 12000. For example, an imaging unit 12031 is connected to the exterior information detection unit 12030. The exterior information detection unit 12030 causes the imaging unit 12031 to capture images of the exterior of the vehicle and receives these captured images. Furthermore, the exterior information detection unit 12030 can also perform processing based on the received images, such as detecting people, vehicles, obstacles, signs, text on the road surface, etc., or detecting their distances.

[0298] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output an electrical signal as an image, or it can output an electrical signal as information about the measured distance. Furthermore, the light received by the imaging unit 12031 can be visible light, or it can be invisible light such as infrared light.

[0299] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. The in-vehicle information detection unit 12040 is connected, for example, to a driver state detection unit 12041 that detects the driver's state. The driver state detection unit 12041 includes, for example, a camera that captures images of the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration level, or determine whether the driver is drowsy.

[0300] The microcomputer 12051 can calculate control target values ​​for the drive force generation device, steering mechanism, or braking device based on information about the vehicle's interior or exterior obtained by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control designed to implement functions of an advanced driver assistance system (ADAS), including collision avoidance or shock absorption for the vehicle, following driving based on following distance, maintaining vehicle speed, collision warning, lane departure warning, etc.

[0301] In addition, the microcomputer 12051 controls the drive force generation device, steering mechanism, braking device, etc., based on information about the outside or inside of the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, and can perform cooperative control for autonomous driving, which enables the vehicle to drive automatically without relying on the driver's operation.

[0302] Additionally, the microcomputer 12051 can output control commands to the vehicle system control unit 12020 based on information about the outside of the vehicle obtained by the external vehicle information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to switch from high beam to low beam based on the position of the vehicle in front or oncoming vehicle detected by the external vehicle information detection unit 12030.

[0303] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device capable of visually or audibly notifying the vehicle occupants or the outside of the vehicle of information. Figure 48 In some embodiments, the audio speaker 12061, the display unit 12062, and the instrument panel 12063 are shown as output devices. For example, the display unit 12062 may include at least one of an on-board display and a head-up display.

[0304] Figure 49 This is a diagram illustrating an example of the mounting position of the imaging unit 12031.

[0305] exist Figure 49 The imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104 and 12105.

[0306] Imaging units 12101, 12102, 12103, 12104, and 12105 are, for example, installed on the front nose, side mirrors, rear bumper, and rear door of vehicle 12100, as well as on the upper part of the windshield inside the vehicle. Imaging unit 12101 installed on the front nose inside the vehicle and imaging unit 12105 installed on the upper part of the windshield primarily acquire images of the front of vehicle 12100. Imaging units 12102 and 12103 installed on the side mirrors primarily acquire images of the sides of vehicle 12100. Imaging unit 12104 installed on the rear bumper or rear door primarily acquires images of the rear of vehicle 12100. Imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used to detect vehicles, pedestrians, obstacles, signals, traffic signs, lanes, etc., ahead.

[0307] It should be noted that Figure 49An embodiment showing the imaging range of imaging units 12101 to 12104 is illustrated. Imaging range 12111 represents the imaging range of imaging unit 12101 installed on the front nose. Imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103 installed on the side mirrors, respectively. Imaging range 12114 represents the imaging range of imaging unit 12104 installed on the rear bumper or rear door. For example, a planar image of the vehicle 12100 viewed from above can be obtained by superimposing multiple image data captured by imaging units 12101 to 12104.

[0308] At least one of the imaging units 12101 to 12104 may have the function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0309] For example, the microcomputer 12051 obtains the distance to each three-dimensional object within each imaging range 12111 to 12114 and the time change of that distance (relative speed to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Thus, it is possible to select three-dimensional objects traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher), especially the three-dimensional objects closest to the vehicle 12100 on its travel path, as the leading vehicle. Furthermore, the microcomputer 12051 can preset a following distance to stay ahead of the leading vehicle and execute automatic braking control (including follow-stop control), automatic acceleration control (including follow-start control), etc. Thus, coordinated control for automatic driving, enabling the vehicle to drive automatically without relying on driver operation, is possible.

[0310] For example, the microcomputer 12051 can classify three-dimensional object data related to three-dimensional objects into three-dimensional objects such as two-wheeled vehicles, ordinary vehicles, large vehicles, and pedestrians based on distance information obtained from imaging units 12101 to 12104, extract the three-dimensional object data, and use the three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around vehicle 12100 as obstacles that the driver of vehicle 12100 can visually recognize and obstacles that the driver of vehicle 12100 cannot visually recognize. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle. If the collision risk is equal to or higher than a set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver via audio speaker 12061 or display unit 12062, and performs forced deceleration or evasive steering via drive system control unit 12010. The microcomputer 12051 can thereby assist driving to avoid collisions.

[0311] At least one of the imaging units 12101 to 12104 can be an infrared camera that detects infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian exists in the image captured by the imaging units 12101 to 12104. This pedestrian identification is performed, for example, by extracting feature points from the image captured by the imaging units 12101 to 12104, which are infrared cameras, and by performing pattern matching processing on a series of feature points indicating the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the image captured by the imaging units 12101 to 12104 and identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 to overlay and display a square outline for emphasizing the identified pedestrian. The sound / image output unit 12052 can also control the display unit 12062 to display an icon or the like representing a pedestrian at a desired location.

[0312] An embodiment of a vehicle control system to which the technology according to this disclosure can be applied has been described above. The technology according to this disclosure can be applied to the imaging unit 12031 in the above-described components. Specifically, the light detection device 1 can be used as the imaging unit 12031. By applying the technology according to this disclosure to the imaging unit 12031, an easier-to-view imaging image and distance information can be obtained, while reducing the size. Furthermore, by using the obtained imaging image and distance information, driver fatigue can be reduced and the safety of the driver and the vehicle can be increased.

[0313] In the examples described above, a solid-state imaging device was described where the first conductivity type was p-type and the second conductivity type was n-type, and electrons were used as signal charges. However, this disclosure can also be applied to solid-state imaging devices where holes are used as signal charges. That is, when the first conductivity type is n-type and the second conductivity type is p-type, the aforementioned semiconductor regions can be composed of semiconductor regions with opposite conductivity types.

[0314] The embodiments disclosed herein are not limited to those described above, and various modifications can be made without departing from the spirit of the technology disclosed. For example, all or some of the above configuration embodiments can be appropriately combined.

[0315] It should be noted that the effects described herein are merely illustrative and not limiting, and may exhibit effects other than those described herein.

[0316] It should be noted that the technology disclosed herein may have the following configurations. (1)

[0318] A light detection device, comprising: A pixel array section, wherein multiple pixels are arranged two-dimensionally on a semiconductor substrate. Each pixel includes: A photoelectric conversion unit is formed on a semiconductor substrate and performs photoelectric conversion based on incident light. The focusing section concentrates the incident light onto the photoelectric conversion section, and The light guide is formed inside the photoelectric conversion unit. (2)

[0320] According to the optical detection device described in (1) above, The light guide section includes: The trench is formed in the depth direction from the light-receiving surface of the semiconductor substrate; and The diffusion section is formed at a predetermined depth from the light-receiving surface of the semiconductor substrate. (3)

[0322] According to the photodetector of (2) above, the diffusion portion is formed as a three-dimensional polygon including a plane oriented along the crystal plane of the semiconductor substrate. (4)

[0324] According to the light detection device of (2) or (3) above, the diffuser is formed as a protrusion with a planar area larger than that of the groove. (5)

[0326] According to any one of (2) to (4) above, the light detection device has a void in at least a portion of the diffuser. (6)

[0328] According to any one of (2) to (5) above, the light detection device wherein the diffusion portion is formed as a plate extending in the planar direction of the semiconductor substrate. (7)

[0330] According to any one of (2) to (6) above, the optical detection device wherein, when viewed from above, the groove portion is formed into a rectangular shape or a hole shape that is substantially the same in the longitudinal and transverse directions. (8)

[0332] According to any one of (2) to (7) above, the light detection device, when viewed from above, has a groove portion formed as a straight line shape in which one of the longitudinal and transverse directions is longer than the other. (9)

[0334] According to any one of (2) to (8) above, the light detection device has a diffuser disposed at the front end of the trench. (10)

[0336] According to any one of (2) to (9) above, the light detection device is provided between the light receiving surface of the semiconductor substrate and the front end of the trench portion. (11)

[0338] According to any one of (2) to (10) above, the light detection device includes a plurality of diffusion sections. (12)

[0340] According to any one of (1) to (11) above, the light detection device, wherein the pixel includes a plurality of light guides. (13)

[0342] According to any one of (1) to (12) above, the light detection device further includes an element isolation section that isolates the photoelectric conversion section of each pixel. (14)

[0344] According to any one of (1) to (13) above, the light detection device wherein the light-concentrating part is formed using a silicon-containing material. (15)

[0346] According to any one of (1) to (14) above, the light detection device wherein the light-concentrating part is formed using organic or inorganic insulating material. (16)

[0348] According to any one of (1) to (15) above, the light detection device has a curved lens shape in the light-concentrating part. (17)

[0350] According to any one of (1) to (15) above, the light detection device wherein the light-concentrating part is formed using a metasurface element with a plurality of pillars arranged thereon. (18)

[0352] According to any one of (1) to (17) above, the material of the light-concentrating part is embedded in the light-guiding part. (19)

[0354] According to any one of (1) to (18) above, the light guide portion includes: a portion of material in which a light-concentrating portion is embedded, and a portion of material with a refractive index lower than that of the light-concentrating portion. (20)

[0356] According to any one of (1) to (19) above, the light detection device includes a fixed charge film on the sidewall of the light guide portion. (twenty one)

[0358] According to any one of (1) to (20) above, the light detection device further includes: a light-shielding film portion, positioned between the photoelectric conversion portion and the light-concentrating portion and having an opening portion, through which incident light gathered by the light-concentrating portion passes. (twenty two)

[0360] According to the optical detection device described in (21) above, The light-shielding film includes: a stacked film comprising a first metal film on the light-concentrating side and a second metal film on the photoelectric conversion side, and The first metal film includes a film with a lower reflectivity than the second metal film. (twenty three)

[0362] According to the optical detection device described in (21) above, The light-shielding film portion includes: a stacked film comprising a first dielectric multilayer film on the light-concentrating side and a second dielectric multilayer film on the photoelectric conversion side, and The first dielectric multilayer film includes a film with a lower reflectivity than the second dielectric multilayer film. (twenty four)

[0364] According to the light detection device of (23), the second dielectric multilayer film is designed to reflect the wavelength of the incident light to be photoelectric converted. (25)

[0366] According to any one of (1) to (24) above, the light detection device further includes: a deflection portion having a concave-convex shape on the light receiving surface side of the semiconductor substrate. (26)

[0368] According to any one of (1) to (25) above, the light detection device further includes a reflective layer on the surface of the semiconductor substrate opposite to the light receiving surface side. (27)

[0370] According to the optical detection device described above (26), the reflective layer is a stacked film of multilayer dielectrics with different refractive indices. (28)

[0372] According to the light detection device described above (26), the reflective layer is a partially open metal film. (29)

[0374] According to the optical detection device described above (28), the metal film is the wiring material of the wiring layer. (30)

[0376] According to any one of (1) to (29) above, the light detection device further includes: a reflection deflection portion having an uneven shape on the surface of the semiconductor substrate opposite to the light receiving surface side. (31)

[0378] According to any one of (1) to (30) above, the light detection device has a tapered shape on the light receiving surface side of the semiconductor substrate.

[0379] Reference Symbol List

[0380] 1. Optical detection device

[0381] 10-pixel array

[0382] 30-column signal processing unit

[0383] 40 Control Department

[0384] 50 pixels

[0385] 71 Photoelectric Conversion Unit

[0386] 71-1 First Photoelectric Conversion Unit

[0387] 71-2 Second Photoelectric Conversion Unit

[0388] 72 Charge holding section

[0389] 73 to 76 MOS transistors

[0390] 101 Semiconductor Substrate

[0391] 102 Wiring Layer

[0392] 103 Fixed charge film

[0393] 104 Anti-reflective film

[0394] 105 Substrate Surface Thin Film

[0395] 106 Insulating Film

[0396] 107 Light-shielding film department

[0397] 108 First Metallic Film

[0398] 109 Second Metallic Film

[0399] 110 on-plate lenses

[0400] 110A lens material

[0401] 110B lens material

[0402] 111 Anti-reflective film

[0403] 112 Opening

[0404] 121 Metal wiring

[0405] 122 Insulating film

[0406] 123 Reflective layer

[0407] 131 Groove section

[0408] 132 Diffusion Section

[0409] 132A Diffusion Section

[0410] 133 Light Guide Section

[0411] 133A Light Guide

[0412] 133B Light Guide

[0413] 133C light guide section

[0414] 133D light guide section

[0415] 134 gap

[0416] 135 Component Isolation Section

[0417] 201 corrosion resist

[0418] 202 Trench

[0419] 211 Corrosion Resist

[0420] 212 Trench

[0421] 213 Hard Mask

[0422] 214 Light Guide Section

[0423] 221 Three-dimensional polygons

[0424] 223 Opening

[0425] 225 Corrosion Resist

[0426] 231 Corrosion Resist

[0427] 251 Anti-reflective film

[0428] 252 columns

[0429] 253 Anti-reflective film

[0430] 254 Filler Material

[0431] 255 protective film

[0432] 256. Gap section

[0433] 261 Metasurface Components

[0434] 271 Internal Lens

[0435] 272 Inner lens upper layer film

[0436] 301 Insulating Film

[0437] 302 Silicon

[0438] 303-pixel light-blocking section

[0439] 304 Deflection Section

[0440] 310 On-plate lens

[0441] 331 Reflection Deflection Section

[0442] 332 Insulating Film

[0443] 351 color filter layer

[0444] 361 First Semiconductor Layer

[0445] 362 Second Semiconductor Layer

[0446] 363 Insulation Layer

[0447] 500 Image Processing System

[0448] 510 Light Source Section

[0449] 530 Imaging Device

[0450] 540 Signal Processing Department

[0451] 550 Certification Processing Department

[0452] 560 Viewing Processing Department

[0453] 600 Distance Measurement System

[0454] 611 Distance measuring device

[0455] Application Department 612

[0456] 621 Measurement Object

[0457] 631 emitted light

[0458] 632 Reflected light

[0459] 641 Light Source Section

[0460] 642 Optical Receiver

[0461] 643 Distance Measurement and Processing Unit.

Claims

1. A light detection device, comprising: A pixel array section, wherein multiple pixels are arranged two-dimensionally on a semiconductor substrate. Wherein, each pixel includes: A photoelectric conversion unit is formed on the semiconductor substrate and performs photoelectric conversion based on incident light. A focusing section concentrates the incident light onto the photoelectric conversion section, and A light guide is formed inside the photoelectric conversion unit.

2. The optical detection device according to claim 1, wherein The light guide portion includes: The trench is formed in the depth direction from the light-receiving surface of the semiconductor substrate; and The diffusion section is formed at a predetermined depth from the light-receiving surface of the semiconductor substrate.

3. The light detecting device according to claim 2, wherein The diffusion portion is formed as a three-dimensional polygon including a plane oriented along the crystal plane of the semiconductor substrate.

4. The light detecting device according to claim 2, wherein The diffuser portion is formed as a protrusion with a planar area larger than that of the groove portion.

5. The light detecting device according to claim 2, wherein The diffuser has a void in at least a portion.

6. The light detecting device according to claim 2, wherein The diffusion portion is formed as a plate extending in the planar direction of the semiconductor substrate.

7. The light detecting device according to claim 2, wherein When viewed from above, the groove is formed into a rectangular shape or a hole shape that is basically the same in both the longitudinal and transverse directions.

8. The light detecting device according to claim 2, wherein When viewed from above, the groove is formed as a straight line shape in which one of the longitudinal and transverse directions is longer than the other.

9. The light detecting device according to claim 2, wherein The diffuser portion is disposed at the front end of the trench portion.

10. The light detecting device according to claim 2, wherein The diffusion portion is disposed between the light-receiving surface of the semiconductor substrate and the front end of the trench portion.

11. The light detecting device of claim 2, wherein, The light guide portion includes a plurality of the diffuser portions.

12. The light detecting device of claim 1, wherein, The pixel includes a plurality of light guides.

13. The light detecting device of claim 1, wherein, The pixel also includes an element isolation section that isolates the photoelectric conversion section of each pixel.

14. The light detecting device of claim 1, wherein, The focusing section is formed using a silicon-containing material.

15. The light detecting device of claim 1, wherein, The focusing section is formed using organic or inorganic insulating materials.

16. The light detecting device of claim 1, wherein, The focusing part has a curved lens shape.

17. The light detecting device of claim 1, wherein, The focusing section is formed using metasurface elements with multiple pillars arranged in a row.

18. The optical detection device according to claim 1, wherein, The material of the light-concentrating part is embedded in the light-guiding part.

19. The optical detection device according to claim 1, wherein, The light guide portion includes: a portion of material in which the light focusing portion is embedded, and a portion of material with a lower refractive index than the light focusing portion.

20. The optical detection device according to claim 1, wherein, The light guide includes a fixed charge film on its sidewall.

21. The optical detection device according to claim 1, wherein, The pixel further includes: a light-shielding film portion, positioned between the photoelectric conversion portion and the light-concentrating portion and having an opening portion, through which the incident light concentrated by the light-concentrating portion passes.

22. The optical detection device according to claim 21, in, The light-shielding film includes: a stacked film comprising a first metal film on the light-concentrating side and a second metal film on the photoelectric conversion side, and The first metal film includes a film with a lower reflectivity than the second metal film.

23. The optical detection device according to claim 21, in, The light-shielding film includes: a stacked film comprising a first dielectric multilayer film on the light-concentrating side and a second dielectric multilayer film on the photoelectric conversion side, and The first dielectric multilayer film includes a film with a lower reflectivity than the second dielectric multilayer film.

24. The optical detection device according to claim 23, wherein, The second dielectric multilayer film is designed to reflect the wavelength of the incident light to be converted into photoelectric light.

25. The optical detection device according to claim 1, wherein, The pixel further includes a deflection portion having a concave-convex shape on the light-receiving surface side of the semiconductor substrate.

26. The optical detection device according to claim 1, wherein, The pixel also includes a reflective layer on the surface of the semiconductor substrate opposite to the light-receiving surface.

27. The optical detection device according to claim 26, wherein, The reflective layer is a stacked film of multiple dielectric layers with different refractive indices.

28. The optical detection device according to claim 26, wherein, The reflective layer is a partially open metal film.

29. The optical detection device according to claim 28, wherein, The metal film is the wiring material of the wiring layer.

30. The optical detection device according to claim 1, wherein, The pixel further includes a reflection deflection portion having an uneven shape on the surface of the semiconductor substrate opposite to the light receiving surface side.

31. The optical detection device according to claim 1, wherein, The light guide portion has a tapered shape on the light-receiving surface side of the semiconductor substrate.

Images