Semiconductor chip, sensor device and electronic device

Abstract

A semiconductor chip (1) is described in detail, comprising a semiconductor layer sequence (2) having an active region (20) configured to emit electromagnetic radiation (81) and an optical device (4), wherein the semiconductor chip (1) is configured to illuminate an illumination region (5), wherein the ratio between the length L of the illumination region (5) along a longitudinal axis (50) and the width W of the illumination region (5) perpendicular to the longitudinal axis (50) is at least 4:1. Furthermore, a sensor device (6) and an electronic device (7) are described in detail.

Description

Technical Field

[0001] This application relates to semiconductor chips, sensor devices, and electronic devices. Background Technology

[0002] In electronic devices such as smartphones, electronic sensors can be placed below the device's display to save space. However, it has been found that photoelectric sensors using emitters can cause screen distortion. Even if the emitted radiation is invisible to the human eye, glare may appear in the illuminated areas of the display, for example, because the radiation can negatively affect the display's transistors.

[0003] One objective to be addressed is to provide a means for easily integrating transmitters into electronic devices. Summary of the Invention

[0004] This objective is achieved, in particular, by the semiconductor chips, sensor devices, and electronic devices according to the independent claims. Further modifications and configurations are the subject of the dependent claims.

[0005] A semiconductor chip is described in detail.

[0006] According to at least one embodiment of a semiconductor chip, the semiconductor chip includes a sequence of semiconductor layers having active regions configured to emit electromagnetic radiation. For example, the active regions are configured to emit radiation in the infrared spectral range, such as a peak emission wavelength between 800 nm and 1.5 μm.

[0007] For example, a semiconductor chip is a vertical cavity surface-emitting laser (VCSEL) that includes one or more emission regions.

[0008] For example, the active region is arranged between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type different from the first conductivity type, such that the active region is located in the pn junction.

[0009] The active region, the first semiconductor layer, and / or the second semiconductor layer may each include multiple sublayers.

[0010] For example, an active region includes a quantum structure. In the context of this application, the term quantum structure specifically includes any structure in which charge carriers can undergo quantization of their energy states through confinement. In particular, the term quantum structure does not imply any limitation on the quantization dimension. Therefore, it includes quantum wells, quantum wires, quantum rods, and quantum dots, as well as any combination of these structures.

[0011] Semiconductor layer sequences (especially active regions) may include III-V compound semiconductor materials.

[0012] High internal quantum efficiency can be achieved in radiation generation using III-V compound semiconductor materials.

[0013] For example, semiconductor layer sequences (especially active regions) can be based on arsenide or phosphide compound semiconductor materials.

[0014] In this context, "arsenide or phosphide compound semiconductor material" means that the semiconductor layer sequence or at least a portion of the semiconductor layer sequence (particularly preferably at least the active region and / or growth substrate) has a compound semiconductor material with arsenic and / or phosphorus as group V elements, preferably including Al. x In y Ga 1-x-y P z As 1-z Or it may be composed of, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, x + y ≤ 1 and 0 ≤ z ≤ 1. The material does not necessarily have to have a mathematically precise composition according to the above formula. Instead, the material may include, for example, one or more dopants as well as additional components. However, for simplicity, the above formula only includes the basic lattice components (Al, Ga, In, P, As), even though these components may be partially replaced and / or supplemented by small amounts of other substances. Using this material system, radiation in the infrared and visible spectral ranges can be generated.

[0015] According to at least one embodiment of the semiconductor chip, the semiconductor chip includes optical components. For example, the optical components are formed on or within the semiconductor chip at the wafer level. Therefore, the semiconductor chip formed during the wafer dicing process may already include optical components.

[0016] In particular, the optics can be part of a semiconductor chip, such that radiation emitted in the active region extends only through solid material in its beam path from the active region to the optics.

[0017] By integrating optics into a semiconductor chip, the optics assembly and alignment steps for the light source can be avoided. Since semiconductor chips inherently emit radiation with elongated shapes, the eye safety risks can be significantly reduced compared to light sources with circular beam profiles.

[0018] Optical devices can be lens-based. Alternatively or additionally, optical devices can include holographic optics, such as holographic beam shapers (HBS). Such optics can be formed using computer-generated hologram (CGH) patterns. Typical structure dimensions are on the order of 0.5 μm. Large divergence angles can be obtained using holographic optics. Holographic optics can be integrated into surface-emitting lasers (such as VCSELs), especially at the wafer level.

[0019] Alternatively or additionally, optics may include metasurface optics. Typical structural dimensions are on the order of hundreds of nanometers. Particularly large (negative) divergence angles can be obtained using metasurfaces. Metasurface optics can be compact and monolithic. Furthermore, a single-layer etching may be sufficient to fabricate the metasurface optics. Metasurface optics can be integrated into surface-emitting lasers (such as VCSELs), especially at the wafer level.

[0020] Compared to lens-based optics, holographic optics or metasurface optics offer greater design freedom.

[0021] According to at least one embodiment of the semiconductor chip, the semiconductor chip is configured to illuminate an illumination area, wherein the ratio between the length L of the illumination area along its longitudinal axis and the width W of the illumination area perpendicular to the longitudinal axis is at least 2:1 or at least 4:1. If in doubt, this ratio can be determined at a predefined working distance from the optics. For example, the working distance is between 0.05 mm and 3 mm.

[0022] For example, the ratio L:W is at least 6:1 or at least 10:1 or at least 15:1 or at least 20:1 or at least 25:1 and / or at most 200:1 or at most 100:1 or at most 50:1.

[0023] In at least one embodiment of the semiconductor chip, the semiconductor chip includes a sequence of semiconductor layers having an active region configured to emit electromagnetic radiation and an optical device, wherein the semiconductor chip is configured to illuminate an illumination region, wherein the ratio between the length L of the illumination region along the longitudinal axis and the width W of the illumination region perpendicular to the longitudinal axis is at least 2:1.

[0024] Using optics integrated into a semiconductor chip, a long, thin, or essentially linear beam profile can be obtained. In contrast, conventional surface-emitting devices such as LEDs or VCSELs typically have circular or ring-shaped beams.

[0025] If a semiconductor chip is placed below the display so that its vertical axis extends parallel to the display pixel lines, the number of lines within the illumination area can be reduced by at least 1.4 times compared to a conventional chip providing a square illumination area of ​​the same size. Since display distortion can be eliminated by the progressive refresh signal of the display, a reduction in the number of affected display pixel lines within the illumination area can reduce display distortion. Therefore, the shape of the illumination area helps to reduce display distortion.

[0026] In this context, the term "parallel" also includes minor deviations due to assembly tolerances, such as deviations of up to + / - 5°.

[0027] The timing of light emission can be synchronized with the display refresh signal. This can be done, for example, using programmable timing control. In other words, the time between the start of emission and the display refresh signal can be precisely controlled. The reduced number of affected display pixel lines allows for shorter programming times, enabling faster elimination of display distortion. This results in fewer visible effects.

[0028] The shaping of emitted radiation can be achieved within a semiconductor chip using optical devices, eliminating the need for additional optical components.

[0029] According to at least one embodiment of a semiconductor chip, the semiconductor chip includes a substrate. For example, the substrate is a growth substrate on which a sequence of semiconductor layers is epitaxially grown, for example, by MOCVD. For example, the substrate may include or be composed of GaAs. GaAs is transmissive to radiation in the infrared spectral range.

[0030] However, the substrate can also be a different substrate than the growth substrate, which is attached to the semiconductor layer sequence at the wafer level (especially before the dicing process).

[0031] According to at least one embodiment of the semiconductor chip, an optical device is formed on a side of the substrate opposite to the semiconductor layer sequence. In particular, the optical device can be formed directly in the substrate material, for example, by etching. Alternatively, an optical material can be applied to the substrate to form the optical device.

[0032] For example, a semiconductor chip is configured as a flip chip, providing electrical contacts on the side of the semiconductor layer sequence facing away from the substrate. A substrate-emitting VCSEL is also known as a back-emitting VCSEL.

[0033] Improved heat dissipation can be achieved by using semiconductor chips that include back-emitting VCSELs or VCSEL arrays. This can potentially lead to higher efficiency. Furthermore, the electrical contacts of the semiconductor chip do not require wire bonding. This can result in lower inductance and facilitate the generation of short pulses.

[0034] According to at least one embodiment of a semiconductor chip, the semiconductor chip is subdivided into multiple emitter regions. Emitter regions can be addressed individually or in groups. Alternatively or additionally, multiple emitter regions can be electrically connected in parallel.

[0035] According to at least one embodiment of the semiconductor chip, at least some or all of the emitting regions are provided with individual optics. For example, there may be a one-to-one correspondence between the emitting regions and the optics. Thus, each optic can be configured to provide appropriate beam steering or focusing, such that radiation emitted by the associated emitting region is emitted within the illumination area.

[0036] According to at least one embodiment of a semiconductor chip, at least some of the emitting regions are arranged with an offset relative to the optical axis of a separate optics assigned to the respective emitting region. This offset allows the deflection angle of the emitted radiation to be reliably and precisely set during the semiconductor chip manufacturing process.

[0037] According to at least one embodiment of the semiconductor chip, at least some of the emitting regions having individual optics are configured to generate a plurality of illumination spots arranged side-by-side along a longitudinal axis. Therefore, the superposition of the illumination spots along the longitudinal axis provides an elongated (e.g., linear) emission profile. For example, all emitting regions are configured to generate illumination spots arranged side-by-side along the same longitudinal axis. In other words, n emitters generate a 1×n array of illumination spots, where n is an integer.

[0038] Illumination spots can be arranged such that they overlap with at least one adjacent illumination spot. The size of the illumination spot can be defined as the area with a radiation intensity of at least 50% of the maximum intensity within the illumination spot.

[0039] For example, the average center-to-center distance between adjacent illumination spots along the longitudinal axis is at most 200% or at most 150% or at most 120% and / or at least 30% or at least 50% or at least 80% of the average width of the illumination spots along the longitudinal axis. The width can be defined as the full width at half maximum (FWHM) of the intensity profile of a single illumination spot along the longitudinal axis.

[0040] According to at least one embodiment of the semiconductor chip, the illumination spot extends along at least two lines parallel to the longitudinal axis. Typically, n emitter regions can generate an array of m × n / m illumination spots, where m and n are integers chosen such that n / m is also an integer. For example, m=2 is suitable, such that the illumination spot extends along exactly two lines. During operation of the semiconductor chip, the emitter regions can be driven together.

[0041] According to at least one embodiment of a semiconductor chip, in a top view of the illumination region, at least some of the emitting regions have different distances from each other relative to the longitudinal axis. For example, the emitting regions are arranged in a matrix. For example, the matrix includes at least a first line and a second line extending parallel to the longitudinal axis. Radiation originating from different lines of the matrix can be shaped or redirected by individual optics such that corresponding illumination spots are arranged along the longitudinal axis.

[0042] According to at least one embodiment of the semiconductor chip, at least one illumination spot originating from the emitter region of the second line is arranged between two illumination spots originating from two directly adjacent emitter regions of the first line. This means that even if the emitter regions are directly adjacent to each other, one or more additional illumination spots can be arranged between two illumination spots belonging to directly adjacent emitter regions of the same line.

[0043] According to at least one embodiment of a semiconductor chip, the optical device is a common optical device assigned to at least some or all of the emission regions arranged side by side along a longitudinal axis. For example, the optical device is a cylindrical optical device extending over multiple emission regions along a longitudinal axis.

[0044] According to at least one embodiment of the semiconductor chip, the optical device is a cylindrical lens that collimates or focuses radiation from one or more emission regions in a plane perpendicular to the longitudinal axis and the illumination area, and is not collimated in a plane that extends perpendicular to the illumination area and includes the longitudinal axis.

[0045] According to at least one embodiment of the semiconductor chip, the semiconductor chip is configured to illuminate another illumination region extending along a different longitudinal axis, wherein the other longitudinal axis extends parallel to the longitudinal axis. Therefore, the semiconductor chip can provide two illumination regions that can be spaced apart from each other. For example, the other illumination region and the illumination region can be illuminated sequentially, such that display distortion caused by the illumination region is eliminated before the other illumination region is illuminated. The semiconductor chip can also be configured to illuminate more than two illumination regions.

[0046] Furthermore, a sensor device comprising at least one semiconductor chip is specified. The semiconductor chip can be configured as described above.

[0047] According to at least one embodiment of the sensor device, the sensor device includes at least one detector. For example, the detector is sensitive to radiation emitted by a semiconductor chip, such that a portion of the radiation reflected or scattered toward the sensor device by an object outside the sensor device can be detected by the detector.

[0048] According to at least one embodiment, the sensor device is configured to perform at least one of proximity sensing, gesture sensing, and time-of-flight sensing. For example, the sensor device is a surface mount device (SMD).

[0049] In addition, an electronic device is described in detail.

[0050] According to at least one embodiment, the electronic device includes a display and a semiconductor chip, wherein the semiconductor chip can be implemented as described above. In particular, in a top view of the display of the electronic device, the semiconductor chip can be arranged below the display. For example, the longitudinal axis of the illumination area extends parallel to the pixel lines of the display. In particular, the semiconductor chip can be part of the aforementioned sensor device.

[0051] According to at least one embodiment of the electronic device, the illumination area extends over at most ten, five, three, or two pixel lines of the display. By reducing the number of pixel lines overlapping with the illumination area of ​​the semiconductor chip, display distortion effects can be significantly reduced.

[0052] Features described in connection with at least one embodiment of a semiconductor chip, sensor device, or electronic device may be combined with other features described in connection with at least one embodiment of a semiconductor chip, sensor device, or electronic device, unless they are contradictory. Attached Figure Description

[0053] In the exemplary embodiments and drawings, similar or functionally similar components have the same reference numerals. Generally, only the differences with respect to the various exemplary embodiments are described. Unless otherwise stated, the description of a component or feature in one exemplary embodiment also applies to the corresponding component or feature in another exemplary embodiment.

[0054] In the attached diagram: Figure 1A , Figure 1B and Figure 1C An exemplary embodiment of a semiconductor chip is shown, wherein, Figure 1A A cross-sectional view is shown. Figure 1B It shows Figure 1A Detail 9, and Figure 1C The illuminated area is shown; Figures 2A to 2C With 3D diagram ( Figure 2A Side view along the longitudinal axis ( Figure 2B ) and a side view perpendicular to the longitudinal axis ( Figure 2C This illustrates an exemplary implementation of a semiconductor chip; Figure 3 An exemplary embodiment of a semiconductor chip is illustrated in cross-sectional view; Figures 4A to 4C With 3D diagram ( Figure 4A ), Top view of the lighting area ( Figure 4B ) and a top view of a semiconductor chip ( Figure 4C This illustrates an exemplary implementation of a semiconductor chip; Figure 5A and Figure 5B With 3D diagram ( Figure 5A ) and top view ( Figure 5B An exemplary implementation of the sensor device is shown; Figure 6A , Figure 6B and Figure 6C Top view ( Figure 6A and Figure 6B ) and cross-sectional view ( Figure 6C This illustrates an exemplary implementation of an electronic device; Figure 6D A reference example of an electronic device is shown; Figure 7A and Figure 7B Each illustrates an exemplary implementation of the pixel arrangement; Figure 8A and Figure 8B An example of operating a semiconductor chip in an electronic device is shown; and Figure 8C and Figure 8D A reference example of an operating reference semiconductor chip is shown.

[0055] The accompanying drawings are schematic representations. The elements shown in the drawings and their dimensional relationships with each other are not necessarily drawn to scale. Instead, for better representation and / or for better understanding, individual elements or layer thicknesses may be shown with exaggerated dimensions. Detailed Implementation

[0056] Figure 1A The semiconductor chip 1 shown includes a sequence of semiconductor layers 2 having an active region 20 configured to emit electromagnetic radiation 81.

[0057] The active region 20 is disposed between a first semiconductor layer 21 of a first conductivity type and a second semiconductor layer 22 of a second conductivity type different from the first conductivity type. For example, the first semiconductor layer is n-type and the second semiconductor layer 22 is p-type, or vice versa.

[0058] Semiconductor chip 1 also includes optical components 4. For example... Figure 1C As shown, the ratio between the length L of the lighting area 5 along the longitudinal axis 50 and the width W of the lighting area 5 perpendicular to the longitudinal axis 50 is at least 4:1, for example at least 8:1 or at least 10:1 or at least 20:1 or at least 25:1 and / or at most 200:1 or at most 100:1 or at most 50:1.

[0059] For example, the width W is at least 5 μm or at least 10 μm and / or at most 100 μm or at most 50 μm or at most 30 μm.

[0060] exist Figure 1A In the exemplary embodiment shown, semiconductor chip 1 is implemented as a back-emitting vertical-cavity surface-emitting laser.

[0061] The first semiconductor layer 21 is electrically connected to the first contact 23. The second contact 24 is electrically connected to the second semiconductor layer 22, such that by applying an external voltage between the first contact 23 and the second contact 24, charge carriers are injected from different sides of the active region 20 into the active region 20 and recombine there under the emission of electromagnetic radiation.

[0062] For example, the emitted radiation 81 is in the near-infrared spectral range. The semiconductor chip 1 may include a single emission region 25 or multiple emission regions 25.

[0063] Some or all of the transmitter regions 25 can be electrically connected in parallel, so that only two contacts 23, 24 are required for electrical contact of multiple or even all transmitter regions 25. Alternatively, the transmitter regions 25 can be electrically addressed at least partially independently of each other.

[0064] like Figure 1B As shown, by providing an offset d between the emission region 25 and the optical axis 40 of the associated optical device 4, the deflection angle 49 of the emitted radiation 81 can be adjusted.

[0065] Therefore, the deflection angle 49 can be defined during the production of semiconductor chip 1. Figure 1A In the exemplary embodiment shown, the optical device 4 is formed on the side of the substrate 3 facing away from the semiconductor layer sequence 2. In particular, the substrate 3 may be a growth substrate on which the semiconductor layer sequence 2 is epitaxially grown. For example, the optical device 4 can be formed by directly etching into the substrate 3 (e.g., the growth substrate of the semiconductor layer sequence 2). Alternatively, optical device material can be applied to the substrate.

[0066] The optics 4 etched into the substrate can also be formed as holographic optics, such as a holographic beam shaper. For example, this can be accomplished by etching a properly designed CGH pattern into the substrate 3 of the surface-emitting laser using multiple photolithographic masks. For example, the substrate 3 is a GaAs growth substrate. For example, a hologram with 16 height levels can be obtained through four etching steps.

[0067] Alternatively or additionally, optics 4 may include metasurface optics. A single-layer etching may be sufficient to produce metasurface optics in substrate 3.

[0068] exist Figures 2A to 2C In the exemplary embodiment shown, the optical device 4 is configured as a cylindrical lens. The semiconductor chip 1 may include one or more emission regions 25 arranged along a line extending parallel to the longitudinal axis 50.

[0069] like Figure 2BAs shown, in a plane perpendicular to the longitudinal axis 5 and the longitudinal axis 50, radiation can be focused or collimated by the optical device 4 to form a line shape with a particularly small linewidth W in the illumination area 5.

[0070] In a plane extending perpendicular to the lighting area 5 and including the longitudinal axis 50, radiation may diverge, such as... Figure 2C As shown. Therefore, even with only one emission zone 25, a relatively large ratio L:W can be obtained.

[0071] This ratio can be further increased by arranging multiple emitter regions 25 along the longitudinal axis 50 in a top view of the semiconductor chip 1.

[0072] like Figure 2C As shown, the working distance 45 between the optics 4 and the illumination area 5 can, for example, be in the range of 0.2 mm to 2.5 mm. This working distance 45 is particularly suitable for semiconductor chips 1 used below displays. However, other working distances may also be suitable for other applications.

[0073] Figure 3 Another exemplary embodiment of the semiconductor chip 1 is shown, wherein the semiconductor chip 1 includes a plurality of emission regions 25. In this exemplary embodiment, each emission region 25 is provided with a separate optical element 4. For example, in a top view of the semiconductor chip 1, the optical element 4 has a circular shape.

[0074] Such as combination Figure 1B The deflection angle of each emission region 25 can be designed by appropriately positioning the emission region 25 relative to the optical axis 40 of the associated optics 4. Each of the optics 4 can provide an illumination spot 55 arranged along the longitudinal axis 50 to form an illumination area 5 with a large L:W ratio.

[0075] Figures 4A to 4C The exemplary embodiment shown illustrates another example where the illumination region 5 is formed by a plurality of illumination spots 55 arranged along a longitudinal axis 50. In this exemplary embodiment, the semiconductor chip 1 includes a matrix of emission regions 25. As an example, the matrix includes three columns and three rows, namely a first line 26, a second line 27, and a third row 28.

[0076] The individual optical devices 4 assigned to the emission area 25 are configured such that the illumination spot 55 is arranged along the longitudinal axis 50 to form the illumination area 5. Figure 4B and Figure 4C The emission areas 25a, 25b, ..., 25i and the associated illumination spots 55a, 55b, ..., 55i are shown.

[0077] As shown in the figure, illumination spots 55a and 55b are spaced apart from each other, while additional illumination spots 55d and 55g belonging to emission areas 25d and 25g are arranged in the second line 27 and the third row 28, respectively. This exemplary embodiment illustrates that even if the emission areas 25 themselves are not arranged along a common line, individual illumination spots 55 can be arranged along a common longitudinal axis 50 to form an illumination area 5.

[0078] One of the lines (e.g., the second line 27) may overlap with the longitudinal axis 50 of the illumination area 5 in the top view of the semiconductor chip 1, while the other lines are arranged at a greater distance from the longitudinal axis 50.

[0079] Of course, the relative arrangement, number of lines and columns of the launch area 25 can vary within a wide range, depending on the application requirements.

[0080] and Figure 4A Unlike other methods, the illumination spots 55 do not necessarily have to be arranged in a single line. For example, n emission areas 25 can produce an array of m×n / m illumination spots 55, such as an array of 2×n / 2 illumination spots. Illumination spots 55 on one line can be directly adjacent to or overlap with illumination spots 55 from adjacent lines.

[0081] Figure 5A and Figure 5B An exemplary embodiment of a sensor device 6 is shown, which includes a semiconductor chip 1 as described above. The sensor device 6 includes a housing 63 having a first recess 631 and a second recess 632. The semiconductor chip 1 is disposed in the first recess 631. A detector 61 is disposed in the second recess 632. The housing 63 blocks the direct optical beam path between the semiconductor chip 1 and the detector 61.

[0082] However, housing 63 is not necessary. A barrier between detector 61 and semiconductor chip 1, which acts as a transmitter, may be sufficient to manage or prevent direct crosstalk. Housing or barrier need not be a component of sensor device 6. Housing or barrier may also be an additional component or material provided by electronic equipment including sensor device 6.

[0083] For example, detector 61 is configured to detect a portion of the radiation emitted by semiconductor chip 1 that is reflected or scattered outside sensor device 6 and redirected back to detector 61.

[0084] The sensor device 6 may also include a controller circuit 62, such as an application-specific integrated circuit (ASIC). For example, the controller circuit is embedded in the housing 63.

[0085] For example, the detector is configured to perform at least one of proximity sensing, gesture sensing, and time-of-flight sensing. Furthermore, detector 61 may include additional sensitive areas, such as those for detecting radiation from ambient light in the visible spectrum.

[0086] Figure 6A and Figure 6B An exemplary embodiment of an electronic device 7 including a display 71 is shown. In the illustrated embodiment, the electronic device is a smartphone. However, the electronic device can also be another electronic device, particularly a portable or wearable electronic device including a display, such as a tablet or smartwatch.

[0087] Figure 6C A cross-sectional view showing details of electronic device 7.

[0088] exist Figure 6A In the exemplary embodiment shown, the semiconductor chip 1 is located below the display 71, such that the illumination area 5 has a line shape extending along the pixel line of the display 71.

[0089] exist Figure 6B In the exemplary embodiment shown, an illumination region 5 and another illumination region 51 are illustrated. For example, each of the two illumination regions 5, 51 includes one or more emission areas 25, wherein, as described in the previous exemplary embodiments, the emission area assigned to the illumination region can be addressed independently of the emission area 25 assigned to the other illumination region 51.

[0090] For comparison, Figure 6D A reference device 70 is shown, comprising a reference illumination area 59 in a ring shape. (Compared to...) Figure 6A Compared to the line shape of the illumination area 5 shown, the reference illumination area 59 overlaps with a greater number of pixel lines of the display 71.

[0091] Example of pixel line 710 in Figure 7A As shown in Figure 7D, the individual pixels of display 71 include a red sub-pixel 711r, a green sub-pixel 711g, and a blue sub-pixel 711b. Figure 7A In this context, subpixels are arranged in a pentile pixel arrangement. Figure 7B In this configuration, pixels are arranged in a diamond pattern. However, other pixel arrangements can also be used.

[0092] Figure 6C A cross-sectional view of an electronic device 7 is shown, wherein the dimensional relationships between the individual components of the electronic device 7 are not drawn to scale. The electronic device 7 includes a sensor device 6 having a semiconductor chip 1 disposed on a carrier 72 (e.g., a printed circuit board). For example, the carrier 72 is attached to a housing 75 of the electronic device.

[0093] Semiconductor chip 1 is disposed behind display 71 of electronic device 7. For example, display 71 is a display including light-emitting material 76 (e.g., organic material) and is configured to emit light in the red, green and blue spectral range for individual sub-pixels 711r, 711g, 711b.

[0094] The display 71 also includes transistors 77 for addressing the light-emitting material 76 of the assigned pixels. The light-emitting material 76 and transistors 77 may be formed on a carrier 78, which may include, for example, glass or plastic material.

[0095] The display 71 may also include an encapsulation layer 79 to protect the light-emitting material 76.

[0096] Radiation 81 emitted by semiconductor chip 1 can pass through display 71. A portion of this radiation can be reflected or scattered by external objects (such as parts of the user's body). As indicated by arrow 85, this radiation, along with ambient light, can reach detector 61 of sensor device 6.

[0097] Figure 8A and Figure 8B The operating modes during the operation of electronic device 7 are shown. As an example, in... Figure 8A In this process, the semiconductor chip operates in pulse mode with a pulse length of 128 microseconds.

[0098] If the illumination area 5 covers two pixel lines 710 of the display 71, and assuming the clearing time for each line is 6 μs, then the display clearing will take 12 μs.

[0099] Therefore, the distortion caused by radiation 81 emitted by semiconductor chip 1 persists on the display for 140 μs. In contrast, in Figure 6D In the reference device 70 shown, the reference illumination area 59 covers 10 pixel lines 710, resulting in a clearing time of 60 μs, and thus distortion on the display lasts for 188 μs.

[0100] Figure 8B As shown Figure 6B In the illustrated display device, in addition to illumination area 5, there is another illumination area 51. In this exemplary embodiment, the total radiative emission can be distributed between the two illumination areas such that the pulse duration can be divided by half. Therefore, at each illumination area 5, 51, the distortion persists on the display for 76 μs. However, illumination area 5 and the other illumination area 51 can be illuminated sequentially, such that the distortion caused by illumination area 5 is erased before the other illumination area 51 causes further distortion.

[0101] In reference device 70, splitting the radiation into two subsequent pulses does not reduce distortion because both pulses will illuminate the same area. Therefore, the distortion persists on the display for 252 μs.

[0102] These examples illustrate that by properly designing the geometry of the lighting area, display distortion caused by the radiative emission semiconductor chip 1 located below the display 7 can be significantly reduced.

[0103] The reduced display distortion also allows for an increase in the output power of the semiconductor chip 1, which can help improve the sensing range and / or signal-to-noise ratio of the sensor device, including the semiconductor chip 1 as a radiation source. Therefore, the failure rate due to erroneous readings can be reduced.

[0104] The invention described herein is not limited to the description given with reference to exemplary embodiments. Rather, the invention covers any novel features and any combination of features, particularly any combination of features in the claims, even if the feature or combination itself is not expressly indicated in the claims or exemplary embodiments.

[0105] Figure Labels

Claims

1. A semiconductor chip (1) comprising a sequence (2) of semiconductor layers having an active region (20) configured to emit electromagnetic radiation (81) and an optical device (4), wherein, The semiconductor chip (1) is configured to illuminate an illumination region (5), wherein the ratio between the length L of the illumination region (5) along the longitudinal axis (50) and the width W of the illumination region (5) perpendicular to the longitudinal axis (50) is at least 2:

1.

2. The semiconductor chip according to claim 1, wherein, The ratio L:W is at least 4:

1.

3. The semiconductor chip according to claim 1, wherein, The ratio L:W is at least 10:

1.

4. The semiconductor chip according to any one of the preceding claims, wherein, The semiconductor chip (1) includes a substrate (3), wherein the optical device (4) is formed on the side of the substrate (3) opposite to the semiconductor layer sequence (2).

5. The semiconductor chip according to any one of the preceding claims, wherein, The active region (20) is subdivided into multiple emission regions (25).

6. The semiconductor chip according to claim 5, wherein, At least some of the emission areas (25) are provided with individual optical devices (4).

7. The semiconductor chip according to claim 6, wherein, At least some of the emission regions are arranged with an offset (d) relative to the optical axis (40) of the individual optics assigned to the respective emission region (25).

8. The semiconductor chip according to any one of claims 5 to 7, wherein, At least some of the emission regions (25) having the individual optical devices (4) are configured to generate a plurality of illumination spots (55) arranged side by side along the longitudinal axis (50).

9. The semiconductor chip according to claim 8, wherein, The illumination spot (55) extends along two lines parallel to the longitudinal axis (50).

10. The semiconductor chip according to any one of claims 5 to 9, wherein, In a top view of the illumination area, at least some of the emission areas (25) are different from each other with respect to their distance from the longitudinal axis.

11. The semiconductor chip according to any one of claims 5 to 10, wherein, The emission areas are arranged in a matrix comprising a first line (26) and a second line (27) extending parallel to the longitudinal axis (50), wherein at least one illumination spot (55) of the emission area (25) originating from the second line (27) is arranged between two illumination spots (55) of two directly adjacent emission areas (25) originating from the first line (26).

12. The semiconductor chip according to any one of claims 5 to 11, wherein, The optical device (4) is a common optical device assigned to at least some of the emission areas (25) arranged side by side along the longitudinal axis (50).

13. The semiconductor chip according to claim 12, wherein, The optical device (4) is a cylindrical lens that collimates or focuses radiation from the emission area (25) in a plane perpendicular to the longitudinal axis and the illumination area (5), and is not collimated in a plane that extends perpendicular to the illumination area (5) and includes the longitudinal axis (50).

14. The semiconductor chip according to any one of the preceding claims, wherein, The semiconductor chip (1) is configured to illuminate another lighting area (51) extending along another longitudinal axis (510) that extends parallel to the longitudinal axis (50).

15. A sensor device (6) comprising a semiconductor chip (1) according to any one of the preceding claims and a detector (61).

16. The sensor device according to claim 15, wherein, The sensor device (6) is configured to perform at least one of proximity sensing, gesture sensing, and time-of-flight sensing.

17. An electronic device (7) comprising a display (71) and a semiconductor chip (1) according to any one of claims 1 to 14, wherein, In a top view of the display (71), the semiconductor chip (1) is arranged below the display (71).

18. The electronic device (7) according to claim 17, wherein, The illumination area extends over up to three pixel lines (710) of the display (71).

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