A visual recognition-based mobile phone jig calibration system

Abstract

This application relates to the field of automated assembly technology and discloses a mobile phone fixture calibration system based on vision recognition. The system includes a vision processor acquiring an image matrix and transmitting it to an FPGA module. The FPGA module calculates the absolute phase field and subtracts it from a reference phase field to obtain a phasor residual field. A GPU module outputs deformation mode categories to a main control SOC based on the phasor residual field. The main control SOC controls an actuator to complete the assembly based on the deformation mode categories. A torque sensor feeds back the force vector, and the main control SOC calculates the weighted coefficient vector corresponding to the six-dimensional force perception residual. The FPGA module combines the weighted coefficient vector with the global deformation mode basis phasor field to obtain an environmental drift phase compensation matrix, and adds the reference phase field to the environmental drift phase compensation matrix to complete the update. This invention transforms assembly contact stress deviation into reference update parameters, compensates for environmental drift errors, and achieves closed-loop calibration based on vision and force perception.

Description

Technical Field

[0001] This invention relates to the field of automated assembly technology, specifically to a mobile phone fixture calibration system based on vision recognition. Background Technology

[0002] In the automated assembly process of mobile phones, fixtures are usually used to position the parts. Due to the high requirements for assembly accuracy, existing production lines mostly use visual recognition technology to obtain images of the mobile phone fixtures and perform position measurement and calibration.

[0003] Traditional vision-based calibration systems rely on a main control computer for centralized processing of image data during operation. Frequent transfer of image matrix data within the system's internal bus introduces time delays, reducing the system's computational speed for calculating the absolute phase field and extracting the geometric distortion features of the fixture. Furthermore, purely optical vision measurements struggle to perceive the actual contact stress during the physical assembly process. When the mobile phone fixture experiences localized nonlinear mechanical wear or overall environmental thermal drift during prolonged continuous operation, traditional calibration systems cannot convert the stress deviations during the physical assembly stage into correction parameters for the optical reference. Consequently, the fixed visual reference cannot dynamically update itself in accordance with the actual physical evolution of the mobile phone fixture.

[0004] Furthermore, traditional calibration systems lack a pre-emptive spatial pose compensation mechanism for the current nonlinear deformation mode of the mobile phone fixture before the pressing and assembly operation. This prevents the actuators from performing translational and rotational compensations in advance, easily leading to spatial misalignment of the mobile phone fixture during pressing and assembly, ultimately reducing the long-term operational accuracy and yield of automated mobile phone assembly equipment. Therefore, this invention proposes a vision-based mobile phone fixture calibration system to address the shortcomings of existing technologies. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a mobile phone fixture calibration system based on visual recognition. This system solves the problems of traditional calibration systems, which suffer from response delays due to centralized image data processing and the inability of purely optical visual measurements to perceive physical contact stress, resulting in the visual reference benchmark failing to dynamically update in response to the long-term environmental drift and mechanical wear of the mobile phone fixture.

[0006] To achieve the above objectives, the present invention provides the following technical solution: A mobile phone fixture calibration system based on vision recognition includes a vision processor, an FPGA module, a GPU module, a main control SOC, an actuator, and a torque sensor; The vision processor acquires a real-time image matrix and transmits it to the FPGA module. The FPGA module calculates and obtains the current absolute phase field, and subtracts the current absolute phase field from the pre-stored reference phase field to obtain the phasor residual field. The GPU module outputs the deformation mode category to the main control SOC based on the phasor residual field. The main control SOC controls the actuator to complete the pressing assembly according to the deformation mode category; The torque sensor feeds back the actual force vector to the main control SOC. The main control SOC obtains the six-dimensional force perception residual based on the actual force vector and calculates the weight coefficient vector corresponding to the six-dimensional force perception residual, which is then transmitted to the FPGA module. The FPGA module combines the weight coefficient vector with the basis phasor field of multiple global deformation modes to obtain the global environment drift phase compensation matrix, and adds the reference phase field with the global environment drift phase compensation matrix to complete the evolution update of the reference phase field.

[0007] The mobile phone fixture calibration system of the present invention utilizes the FPGA module to perform spatial phase calculation and pixel subtraction to obtain the phasor residual field, thereby reducing the time delay caused by image data transmission. The main control SOC calculates and generates compensation parameters based on the force data fed back by the torque sensor. The FPGA module combines the compensation parameters to complete the update of the reference phase field, realizing the combined calibration of visual information and force information.

[0008] Preferably, the system further includes a projection device, the vision processor is electrically connected to the projection device, the vision processor is communicatively connected to the FPGA module via a high-speed image pass-through bus, the FPGA module has a built-in static memory and is communicatively connected to the GPU module via a direct memory access bus, the GPU module is communicatively connected to the main control SOC via an internal system bus, and the torque sensor is located at the end of the actuator and is communicatively connected to the main control SOC via a control communication bus.

[0009] Preferably, the FPGA module calculates and obtains the current absolute phase field specifically including: The FPGA module receives the real-time image matrix and performs an arctangent operation to output a wrapped phase field. It then performs a phase unpacking operation on the wrapped phase field according to the spatial phase unfolding logic, restoring it to an absolute phase distribution map that presents a continuous mapping relationship as the current absolute phase field.

[0010] Preferably, the plurality of global deformation mode basis phasor fields are obtained through the following steps: The visual recognition mobile phone fixture calibration system applies global environmental variables to the standard fixture to generate an environmental drift state. The FPGA module calculates and obtains the absolute phase distribution map under the influence of the environmental drift state, and extracts the initial environmental drift phase difference matrix by subtracting the absolute phase distribution map from the reference phase field under the ideal stress-free state. The master control SOC uses the singular value decomposition algorithm to orthogonally decompose the multiple initial environmental drift phase difference matrices to extract the multiple global deformation mode basis phasor fields.

[0011] Preferably, the GPU module outputs the deformation mode category to the main control SOC based on the phasor residual field, specifically including: The FPGA module flattens the phasor residual field in two-dimensional matrix format into a high-dimensional feature vector and transmits it to the GPU module. The GPU module uses principal component analysis algorithm to project the high-dimensional feature vector to a low-dimensional feature space to obtain a dimension-reduced feature vector. The GPU module calls the Mahalanobis distance classifier to calculate the Mahalanobis distance between the dimensionality-reduced feature vector and the set local deformation pattern cluster center, and outputs the category corresponding to the minimum value of the Mahalanobis distance as the deformation pattern category to the main control SOC.

[0012] Preferably, the GPU module outputting the deformation mode category to the main control SOC based on the phasor residual field further includes: The GPU module compares the minimum value of the Mahalanobis distance with the anomaly confidence threshold; When the minimum value of the Mahalanobis distance is less than or equal to the anomaly confidence threshold, the GPU module outputs the category corresponding to the minimum value of the Mahalanobis distance as the deformation mode category to the main control SOC. When the minimum value of the Mahalanobis distance is greater than the anomaly confidence threshold, the GPU module outputs an unknown distortion anomaly alarm signal to the main control SOC. After receiving the unknown distortion anomaly alarm signal, the main control SOC cuts off the assembly enable command of the actuator.

[0013] Preferably, the main control SOC controls the actuator to complete the pressing assembly according to the deformation mode category, specifically including: The main control SOC receives the deformation mode category and calls the nonlinear compensation vector field preset table, and extracts the three-dimensional spatial translation compensation command and the three-dimensional spatial rotation compensation command according to the deformation mode category. The main control SOC sends the three-dimensional spatial translation compensation command and the three-dimensional spatial rotation compensation command to the actuator to perform the compensation.

[0014] Preferably, the main control SOC obtains the six-dimensional force perception residual based on the actual force vector, specifically including: The main control SOC calculates the difference between the actual force vector and the ideal compliant force vector to obtain the six-dimensional force perception residual; The ideal compliant force vector characterizes the theoretical feedback contact force generated by the standard fixture in a deformable and ideally aligned assembly state.

[0015] Preferably, the process of the main control SOC calculating the weight coefficient vector corresponding to the six-dimensional force perception residual and transmitting it to the FPGA module specifically includes: The main control SOC uses the mapping matrix established by offline calibration to calculate the weight coefficient vector corresponding to the six-dimensional force perception residual on the basis phasor field of the multiple global deformation modes; The mapping matrix is ​​calculated using the least squares method.

[0016] Preferably, the FPGA module combines the weight coefficient vector with the basis phasor field of multiple global deformation modes to obtain the global environment drift phase compensation matrix, and combines the global environment drift phase compensation matrix to complete the iterative evolution update of the reference phase field, specifically including: The FPGA module controls the internally configured hardware multiply-accumulate operation array to perform pixel-level linear weighted synthesis operation on the weight coefficient vector and the multiple global deformation mode basis phasor fields to generate the global environment drift phase compensation matrix. The FPGA module adds the original reference phase field initialized under ideal stress-free conditions to the global environment drift phase compensation matrix, and then performs a pixel-level addition operation by combining the old reference phase field of the current detection cycle and the set update step size factor to solve for and obtain the new reference phase field to complete the evolution update.

[0017] This invention provides a mobile phone fixture calibration system based on visual recognition. It has the following beneficial effects: 1. This invention directly receives the real-time image matrix through an FPGA module. The FPGA module performs arctangent operation and phase unpacking operation at the hardware level to obtain the current absolute phase field. The current absolute phase field is then subtracted from the reference phase field at the pixel level to obtain the phasor residual field. The FPGA module directly processes the underlying pixel data, eliminating the process of moving image matrix data between system bus nodes, reducing the time delay caused by data transmission and floating-point calculation, and improving the calculation speed of the mobile phone fixture calibration system to obtain the geometric distortion features of the fixture.

[0018] 2. This invention utilizes a GPU module to perform dimensionality flattening and principal component analysis to reduce the dimensionality of the phasor residual field. A Mahalanobis distance classifier is used to calculate and compare the deformation mode categories. The main control SOC then issues three-dimensional spatial translation compensation commands and three-dimensional spatial rotation compensation commands to the actuator based on the deformation mode categories. Before the pressing and assembly action is executed, spatial pose feedforward compensation is performed on the actuator based on the specific deformation mode presented by the mobile phone fixture, thus avoiding the problem of spatial misalignment in assembly caused by local nonlinear mechanical wear of the mobile phone fixture.

[0019] 3. This invention collects the actual force vector during the execution phase using a torque sensor, calculates the six-dimensional force perception residual using the main control SOC, and maps it to generate a weight coefficient vector. Finally, the FPGA module combines the weight coefficient vector with multiple global deformation mode basis phasor fields to generate a global environmental drift phase compensation matrix. The reference phase field is added to the global environmental drift phase compensation matrix to complete the evolution and update of the reference phase field. The contact stress deviation during the physical assembly process is transformed into the update parameters of the optical reference phase field, realizing the dynamic closed-loop iteration of the reference phase field and compensating for the thermal drift error and overall mechanical bias error generated by the machine tool under long-term operation conditions. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the system architecture of the present invention; Figure 2 This is a schematic diagram of the overall method flow of the present invention; Figure 3 This is a schematic diagram comparing the data processing delays at each stage of the present invention; Figure 4 This is a schematic diagram of the deformation mode determination and threshold segmentation curve of the present invention; Figure 5 This is a schematic diagram illustrating the convergence of the adaptive iterative error of the reference phase field according to the present invention. Detailed Implementation

[0021] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Please see Figure 1 This invention provides a mobile phone fixture calibration system based on visual recognition, comprising: a projection device, a visual processor, an FPGA module (Field Programmable Gate Array module), a GPU module (Graphics Processing Unit module), a main control SOC (System-on-a-Chip), a torque sensor, and an actuator.

[0023] The projection device is positioned above the fixture workbench. The vision processor is electrically connected to the projection device. The vision processor communicates with the FPGA module via a high-speed image pass-through bus. The FPGA module has a built-in static memory and communicates with the GPU module via a direct memory access bus. The GPU module communicates with the main control SOC via an internal system bus. The main control SOC communicates with the torque sensor via a control communication bus. The torque sensor is fixedly installed at the assembly end of the actuator. The main control SOC is electrically connected to the actuator.

[0024] See attached document Figure 2 This invention provides a mobile phone fixture calibration method based on visual recognition, comprising the following steps: S10, the projection device projects phase-shifted sinusoidal fringes onto the surface of a standard fixture in a stress-free state. The vision processor acquires a distorted grating image containing the surface morphology information of the fixture and transmits the distorted grating image to the FPGA module. The FPGA module performs phase unpacking operation to obtain the reference phase field. The system applies environmental variables to the standard fixture to obtain multiple basic environmental drift states. The FPGA module calculates and extracts multiple global deformation mode basis phasor fields based on the basic environmental drift states. The main control SOC calibrates the mapping matrix from the six-dimensional force perception residual to the weight coefficients of the global deformation mode basis phasor field. The FPGA module stores the reference phase field and multiple global deformation mode basis phasor fields in the static memory for static residence. S20, the vision processor acquires the real-time image matrix of the fixture under test in the current working state and transmits the real-time image matrix to the FPGA module. The FPGA module calculates and obtains the current absolute phase field of the fixture under test. The FPGA module calls the reference phase field in the static memory. The FPGA module performs pixel-level matrix subtraction operation between the current absolute phase field and the reference phase field to obtain the phasor residual field. S30, the FPGA module transmits the phasor residual field to the GPU module. The GPU module flattens the phasor residual field and converts it into a high-dimensional feature vector. The GPU module uses the principal component analysis algorithm to project the high-dimensional feature vector onto the low-dimensional feature space to obtain the dimensionality-reduced feature vector. The GPU module calls the internal Mahalanobis distance classifier to calculate the Mahalanobis distance between the dimensionality-reduced feature vector and the set local deformation pattern cluster center. The GPU module outputs the category corresponding to the minimum Mahalanobis distance as the deformation pattern category of the current fixture. S40, the main control SOC receives the deformation mode category output by the GPU module and calls the stored nonlinear compensation vector field preset table. The main control SOC extracts the three-dimensional spatial translation compensation command and the three-dimensional spatial rotation compensation command corresponding to the assembly position according to the deformation mode category. The main control SOC sends the three-dimensional spatial translation compensation command and the three-dimensional spatial rotation compensation command to the actuator. The actuator performs the compensation and completes the pressing assembly of the fixture component. S50, at the moment when the actuator performs the pressing assembly in steady state, the main control SOC synchronously acquires the actual force vector fed back by the torque sensor. The main control SOC calculates the difference between the actual force vector and the ideal compliant force vector to obtain the force perception residual. The main control SOC uses the mapping matrix to calculate the weight coefficient vector corresponding to the force perception residual on multiple global deformation mode basis phasor fields and transmits the weight coefficient vector to the FPGA module. The FPGA module calls multiple global deformation mode basis phasor fields in the static memory, combines the weight coefficient vector to perform spatial superposition operation to obtain the global environment drift phase compensation matrix. The FPGA module iteratively adds the reference phase field and the global environment drift phase compensation matrix to complete the evolution update of the reference phase field, and uses the evolved and updated reference phase field for the generation of the phasor residual field in the next cycle.

[0025] See attached document Figure 2 The underlying optical data acquisition and hardware-level preprocessing mechanism provided by this invention specifically includes the following steps: S101, the projection device projects phase-shifted sinusoidal fringes onto the surface of a standard fixture in a stress-free state. The projection device can be a digital light processing projection device or a liquid crystal display projection device. The projection device projects three-step phase-shifted sinusoidal fringes onto the surface of the standard fixture according to a set time interval and spatial frequency. The three-step phase-shifted sinusoidal fringes include three fringes with phase differences that are mutually... The spatial frequency of the sine stripe pattern is set according to the field of view of the fixture surface and the required spatial resolution for deformation measurement.

[0026] S102, the vision processor acquires a distorted grating image modulated by the surface morphology of a standard fixture. The vision processor specifically includes a global shutter industrial camera and a matching image acquisition card. The vision processor and the projection device receive the same external hardware trigger signal to maintain physical-level acquisition synchronization. By projecting structured light onto the surface of the fixture, the physical height undulations and three-dimensional morphology of the standard fixture surface will cause the originally regular projected sinusoidal fringes to be distorted and modulated. The vision processor captures the distorted grating image to obtain three discrete grayscale image matrices. The pixel values ​​in the grayscale image matrix reflect the spatial light intensity information after being modulated by the reflection from the fixture surface.

[0027] S103, the vision processor transmits the grayscale image matrix to the FPGA module. The three discrete grayscale image matrices are specifically labeled as the first grayscale image matrix, the second grayscale image matrix, and the third grayscale image matrix. The vision processor converts the first grayscale image matrix, the second grayscale image matrix, and the third grayscale image matrix into pixel data streams through a high-speed serial transceiver bus and transmits them to the internal buffer of the FPGA module. The high-speed serial transceiver bus can be a CoaXPress protocol bus (coaxial ultra-high-speed image transmission protocol bus) or a CameraLink protocol bus (camera link image transmission protocol bus).

[0028] S104, the FPGA module performs the wrapping phase calculation. The FPGA module calls its internal field-programmable gate array resources to perform parallel mathematical operations on the input pixel data stream. The FPGA module calculates and obtains the wrapping phase field. The formula for calculating the wrapping phase field is as follows: ; in, Represents the spatial pixel coordinates of the image The wrapping phase value at the surface; Represents the pixel coordinates of the first grayscale image matrix in the image space. The grayscale value at that location; Represents the pixel coordinates of the second grayscale image matrix in image space. The grayscale value at that location; Represents the pixel coordinates of the third grayscale image matrix in the image space. The grayscale value at that location; , and The value range is determined by the physical bit depth of the camera. For example, under the hardware conditions of an 8-bit industrial camera, the value range is 0 to 255.

[0029] To adapt to the high-speed operation of the production line and avoid system delays caused by floating-point partial differential operations, the FPGA module can use a coordinate rotation digital computer algorithm to approximate the arctangent function at the hardware logic level. Alternatively, the FPGA module can directly call a pre-set arctangent data lookup table in a register to output the encapsulated phase value. When the FPGA module uses the arctangent data lookup table, it combines the results of the numerator and denominator operations in the formula to construct a digital index, which serves as the address for static memory. The module then outputs the pre-programmed arctangent phase value at that address. The calculation result is restricted by the principal value interval of the arctangent function, and its range is truncated within... between.

[0030] S105, the FPGA module performs phase unpacking operations to obtain the reference phase field. Due to the truncation limitation of the arctangent function, the wrapped phase field exhibits a jagged, discontinuous jump pattern in image space. The FPGA module performs phase unpacking operations on the wrapped phase field according to the spatial phase expansion logic. The physical principle of the phase unpacking operation is to determine the number of times the sine cycle is crossed based on the phase difference between adjacent pixels, and to compensate for the jumps in the wrapped phase. The absolute phase distribution map, which is an integer multiple of the standard fixture's actual physical height, is restored to a continuous mapping relationship with the actual physical height of the fixture. This unpacked absolute phase distribution map serves as the reference phase field. The formula for calculating the reference phase field is as follows: ; in, Represents the reference phase field; This represents the spatial phase unpacking operator; Represents the spatial pixel coordinates of the image The wrapping phase value at the surface is used to obtain the reference phase field, which characterizes the original physical topology of the standard fixture under ideal stress-free conditions. The FPGA module stores the reference phase field for later use.

[0031] See attached document Figure 2 The modal basis initialization and offline calibration mechanism provided by this invention specifically includes the following steps: S201, the FPGA module stores the unpacked reference phase field in its internal static memory. The static memory can be implemented using a block random access memory structure. The reference phase field serves as the original zero-bit reference data for subsequent differential operations in the system and resides statically in the static memory. This avoids repeated reference calculations during online production, reducing system latency. The reference phase field represents the standard geometric shape of the standard fixture under an ideal stress-free environment.

[0032] S202, the system applies a set global environmental variable to the standard fixture. The global environmental variable is used to simulate the slow environmental drift caused by long-cycle operation in the actual production line. In the industrial manufacturing site, the temperature rise of the machine tool caused by long-term operation of the equipment and the friction of mechanical parts caused by multiple clamping actions will cause the fixture to undergo overall geometric offset. Therefore, the set global environmental variables specifically include uniform thermal load and basic assembly preload. The system applies uniform thermal loads of different gradients to the standard fixture through an external heating device, and at the same time uses the actuator to apply basic assembly preloads of different levels to the standard fixture.

[0033] S203, after the system applies each set of global environmental variables to reach a steady state, it controls the projection device and the vision processor to acquire the image matrix under the corresponding state. The FPGA module synchronously calculates and acquires the absolute phase distribution map under the influence of environmental drift. The FPGA module performs pixel-level subtraction between the absolute phase distribution map under the influence of environmental drift and the reference phase field residing in the static memory to extract multiple initial environmental drift phase difference matrices.

[0034] In S204, the master control SOC performs orthogonal decomposition operations on multiple initial environmental drift phase difference matrices to obtain multiple global deformation mode basis phasor fields. Specifically, the master control SOC first flattens the two-dimensional initial environmental drift phase difference matrix obtained from each experiment into a one-dimensional column vector. Then, it concatenates the one-dimensional column vectors corresponding to multiple experimental states column-wise to construct a high-dimensional two-dimensional snapshot matrix. To eliminate the influence of coupling between different environmental variables, the master control SOC uses a singular value decomposition algorithm to process the two-dimensional snapshot matrix, extracting mutually independent and orthogonal phasors. A global deformation mode basis phasor field.

[0035] Regarding numerical values The method for determining the energy proportion is as follows: the master control SOC calculates the sum of squares of the singular values ​​obtained from each decomposition, and accumulates the energy proportion of the singular values ​​in descending order. When the accumulated energy proportion reaches a set energy threshold, the number of modes accumulated at that time is taken as the energy proportion. The value of the energy threshold is typically set to 90%–95%. This truncation operation can filter out high-frequency noise components while retaining the main low-frequency global deformation characteristics of the fixture. The global deformation mode basis phasor field reflects the low-frequency overall deformation law of the standard fixture under the influence of global environmental factors, decoupling high-dimensional image distortion into finite-dimensional basic modes. The FPGA module will... The global deformation mode basis phasor field is also burned into the static memory and statically stored for later use.

[0036] S205, the main control SOC offline calibrates the mapping matrix from the force sensor residual to the weighting coefficients of the global deformation mode basis phasor field. During the application of global environmental variables, the main control SOC simultaneously records the six-dimensional force sensor data output by the torque sensor. The six-dimensional force sensor data includes the force components along the three orthogonal spatial coordinate axes and the torque components around these three orthogonal spatial coordinate axes. The main control SOC calculates the difference between the current six-dimensional force sensor data and the force data under the ideal stress-free state to obtain the six-dimensional force sensor residual vector. At the same time, the main control SOC projects the acquired initial environmental drift phase difference matrix onto the acquired... On the global deformation mode basis phasor field, the basis weight coefficients corresponding to each experiment are calculated.

[0037] The basis weight coefficients obtained from multiple experiments are combined into a basis weight coefficient matrix according to column vectors. The master control SOC then establishes a six-dimensional force perception residual vector. The linear mapping relationship between the basis phasor fields of the global deformation modes is obtained by calculating the mapping matrix using the least squares method. The formula for calculating the mapping matrix is ​​as follows: ; in, This represents the mapping matrix obtained during calibration; This represents the basis weight coefficient matrix obtained in the calibration experiment; This represents the six-dimensional force perception residual matrix formed by combining the six-dimensional force perception residuals collected synchronously in multiple calibration experiments according to the column vector combination. This represents the matrix transpose operation. This represents the matrix inversion operation.

[0038] The mapping matrix transforms low-dimensional physical and mechanical vectors into combined weight parameters of a finite-dimensional modal basis, eliminating the dimensionality mismatch and underdetermined problems caused by directly mapping low-dimensional mechanical data to high-dimensional image pixel data. The main control SOC stores the mapping matrix in its internal flash memory for fast reading and calling during online cycle steps.

[0039] See attached document Figure 2 The residual field extraction mechanism based on FPGA online pixel-level subtraction provided by this invention specifically includes the following steps: S301, during continuous manufacturing, when the fixture under test arrives at the calibration station of the fixture workbench, the projection device projects phase-shifted sinusoidal fringes onto the surface of the fixture under test. The vision processor acquires the real-time image matrix of the fixture under test in the current working state. The real-time image matrix contains three frames of distorted grayscale images modulated by the surface morphology of the fixture under test. The vision processor transmits the real-time image matrix to the input buffer area inside the FPGA module.

[0040] S302, the FPGA module receives the real-time image matrix. The FPGA module calls its internal hardware logic unit to perform arctangent and phase unpacking operations. The FPGA module obtains the current absolute phase field of the fixture under test through the calculation. The current absolute phase field reflects the three-dimensional surface topological features of the fixture under test at the current working moment.

[0041] S303, the FPGA module calls the reference phase field residing in the static memory through the internal bus as a lower-level implementation. The FPGA module can use the direct memory access controller to move the reference phase field data block in the static memory to the operation register inside the FPGA module, avoiding the occupation of the microprocessor's operating resources.

[0042] S304, the FPGA module performs pixel-level matrix subtraction between the current absolute phase field and the reference phase field to obtain the phasor residual field. The FPGA module calls its internal parallel arithmetic logic unit to subtract the absolute phase values ​​of the corresponding image space pixel coordinates one by one. The phasor residual field directly characterizes the local nonlinear deformation gradient of the fixture under test caused by mechanical fatigue or stress concentration. The calculation formula of the phasor residual field is as follows: ; in, This represents the phasor residual field, i.e., the pixel coordinates in the image space. The residual value at the location; This represents the current absolute phase field, i.e., the pixel coordinates in the image space. The current absolute phase value at; This represents the reference phase field.

[0043] Because deformation of the fixture during actual operation may lead to an increase or decrease in local height, the phasor residual field... The values ​​can be positive or negative. In order to correctly process the data sign at the hardware level and avoid calculation overflow or errors, the subtractor deployed inside the FPGA module uses a signed fixed-point two's complement format to perform difference operations. The range of values ​​for the phasor residual field depends on the mapping relationship between the maximum physical deformation threshold allowed by the fixture and the spatial frequency of the sinusoidal fringe.

[0044] The physical principle of grating projection technology determines that changes in the physical height of the fixture surface will cause a lateral shift in the phase of the reflected grating fringes. The phase shift and the height change are directly proportional within a small deformation range. Therefore, the system transforms the deformation characteristics of the three-dimensional physical space into a two-dimensional phase space for representation. The two-dimensional phase space retains the grating distortion gradient information caused by the fixture deformation. The phasor residual field contains the necessary data for extracting geometric distortion features. The fixed-point subtractor deployed inside the FPGA module directly completes the feature extraction operation in the image pixel domain. The system does not need to map the absolute phase field with the system calibration parameters to the three-dimensional space to generate three-dimensional point cloud coordinates. From the physical hardware level, the floating-point matrix multiplication operation involved in the three-dimensional point cloud reconstruction process is avoided, which meets the data processing requirements of high-cycle industrial production line environments.

[0045] See attached document Figure 2 The heterogeneous feature dimensionality reduction mechanism provided by this invention specifically includes the following steps: S401, the FPGA module acquires the phasor residual field. The phasor residual field is represented as a two-dimensional matrix in its physical storage structure. The dimension of the phasor residual field is determined by the image resolution of the vision processor. To adapt to the format requirements of the subsequent principal component analysis algorithm for one-dimensional feature input, the FPGA module flattens the two-dimensional matrix format phasor residual field and converts it into a one-dimensional high-dimensional feature vector. Specifically, the FPGA module calls its internal memory read / write control logic to linearly read and concatenate the two-dimensional matrix data in the phasor residual field into a high-dimensional column vector, following either row-major or column-major order. The FPGA module then uses direct memory access technology and a high-speed peripheral component interconnect (PCIe) bus to directly write the high-dimensional feature vector into the GPU module's video memory. This direct writing operation avoids the data transfer delay caused by the high-dimensional feature vector passing through the main controller's SOC memory nodes.

[0046] In S402, the GPU module receives high-dimensional feature vectors in its video memory. It then uses principal component analysis (PCA) to project these high-dimensional feature vectors into a low-dimensional feature space to obtain dimensionality-reduced feature vectors. At the physical level, local nonlinear distortion of a fixture typically manifests as synchronous offsets of consecutive pixels within a region, indicating strong correlation between pixels. PCA can transform correlated high-dimensional pixel variables into a few linearly independent composite variables through linear transformation. These composite variables are the extracted principal components. Principal components can represent the original geometric distortion state with a small amount of data. The GPU module calls its internal parallel computing core to perform matrix bias and matrix multiplication operations. The formula for calculating the dimensionality-reduced feature vectors is as follows: ; in, Represents the dimensionality-reduced eigenvectors; Represents the characteristic projection orthogonal matrix; This represents the matrix transpose operation; This represents the flattened high-dimensional feature vector; This represents the mean vector of a high-dimensional sample set.

[0047] The feature projection orthogonal matrix and the mean vector of the high-dimensional sample set are obtained by training the system in the offline stage based on a large number of typical jig local distortion sample data. The jig local distortion sample data are collected by applying different types and sizes of local forces to the standard jig or introducing known structural defects during the offline testing stage.

[0048] The dimension value of the dimensionality-reduced feature vector is much smaller than that of the high-dimensional feature vector. The dimension value of the dimensionality-reduced feature vector is dynamically determined by the cumulative variance contribution rate threshold. The cumulative variance contribution rate threshold reflects the proportion of original data information retained after dimensionality reduction. The value range of the cumulative variance contribution rate threshold is set to 85% to 95%. Selecting a value range of 85% to 95% can filter out high-frequency random measurement noise introduced by equipment operation while retaining the main local distortion features of the fixture.

[0049] The GPU module sorts the eigenvalues ​​in descending order and retains the top principal component eigenvectors whose cumulative variance contribution rate reaches the threshold to form a feature projection orthogonal matrix. Through principal component space projection, the GPU module removes redundant pixel background information and random noise components from the high-dimensional eigenvectors and extracts key geometric feature parameters that directly reflect the type of local nonlinear distortion of the fixture. This completes the offloading of computing power and data dimensionality reduction of the computing task on the heterogeneous hardware link.

[0050] See attached document Figure 2 The distortion pattern determination mechanism based on Mahalanobis distance classifier provided by this invention specifically includes the following steps: S501, the GPU module obtains the dimensionality-reduced feature vector. The GPU module calls the statistical parameters of multiple pre-saved local deformation modes in the internal memory. The local deformation mode represents the typical nonlinear structural degradation state that occurs frequently in the actual continuous operation of the fixture. The specific lower-level physical states of the local deformation mode include the fixture positioning groove wear mode, the fixture side baffle bending mode, and the fixture bearing surface corner warping mode. The statistical parameters include the class mean vector and class covariance matrix of each local deformation mode in the low-dimensional feature space. The class mean vector and class covariance matrix are obtained by performing mathematical statistical calculations on the labeled prior local distortion dimensionality-reduced feature sample set in the offline stage. Specifically, the system calculates the mathematical expectation of all prior feature sample vectors under each local deformation mode as the class mean vector of the mode, and calculates the dispersion and correlation values ​​between the sample feature components to form the class covariance matrix.

[0051] In the S502 GPU module, the internal Mahalanobis distance classifier is invoked to calculate the Mahalanobis distance between the dimensionality-reduced feature vector and the cluster centers of each set local deformation pattern. In the physical calculation logic of geometry-to-pattern mapping, the dimensionality-reduced feature vector represents the coordinate vector of the geometric deformation component of the current fixture under test in the principal component space. Since each feature dimension in the principal component space represents deformation information with different energy ratios, their numerical fluctuation ranges are significantly different. Compared with the Euclidean distance, which directly calculates the absolute straight-line length between two points, the Mahalanobis distance can eliminate the measurement bias caused by the inconsistency of numerical scale and data correlation between the various principal component dimensions in the feature space, and more realistically reflects the probability that the sample vector belongs to a certain distribution set. The specific calculation formula of the Mahalanobis distance is as follows: ; in, Represents the relationship between the dimensionality-reduced eigenvector and the th... The square of the Mahalanobis distance between the cluster centers of the local deformation patterns; Represents the dimensionality-reduced eigenvectors; Indicates the first The category mean vector corresponding to each local deformation pattern; This represents the matrix transpose operation; Indicates the first The inverse matrix of the category covariance matrix corresponding to each local deformation pattern; The index number representing the local deformation mode. The value range is from 1 to the total number of local deformation modes set.

[0052] In S503, the GPU module iterates through and compares all calculated squared Mahalanobis distance values, selecting the minimum Mahalanobis distance. The GPU module then compares the minimum Mahalanobis distance with a set anomaly confidence threshold. The anomaly confidence threshold is used to determine whether the current dimensionality-reduced feature vector truly belongs to the known local deformation pattern library. Mathematically, the squared Mahalanobis distance values ​​follow a chi-square distribution. The range of the anomaly confidence threshold is determined by querying the principal component dimension values ​​corresponding to the degrees of freedom and the chi-square distribution critical value table with a confidence level of 95%.

[0053] S504, when the minimum value of the Mahalanobis distance is less than or equal to the anomaly confidence threshold, the GPU module determines that the dimensionality reduction feature vector is successfully matched. The GPU module outputs the index number corresponding to the minimum value of the Mahalanobis distance as the deformation mode category of the current fixture. The GPU module sends the deformation mode category to the main control SOC through the system internal bus. The deformation mode category is used to provide input conditions for the main control SOC to trigger the corresponding nonlinear vector field scheduling and compensation action.

[0054] S505 When the minimum value of the Mahalanobis distance is greater than the anomaly confidence threshold, it indicates that the nonlinear distortion state of the current test fixture exceeds the coverage range of the system's preset typical mode. The GPU module outputs an unknown distortion anomaly alarm signal to the main control SOC. After receiving the unknown distortion anomaly alarm signal, the main control SOC cuts off the assembly enable command of the actuator to prevent physical damage to the mobile phone components during the pressing assembly process due to misjudgment.

[0055] See attached document Figure 2 The cross-physical domain force feedback and reference field conversion mechanism provided by this invention specifically includes the following steps: S601, the main control SOC receives the deformation mode category output by the GPU module, the main control SOC calls the nonlinear compensation vector field preset table stored in the internal memory, the main control SOC performs address addressing in the nonlinear compensation vector field preset table according to the deformation mode category, and extracts the three-dimensional spatial translation compensation command and three-dimensional spatial rotation compensation command corresponding to the assembly position. The nonlinear compensation vector field preset table is a two-dimensional data association table pre-calculated and stored through offline physical calibration experiments.

[0056] During the specific calibration process, when the standard fixture presents a known local deformation pattern, the system fine-tunes the spatial pose of the end effector manually or through an auxiliary teaching program until the measured contact force reaches the minimum compliance state. The system records the spatial displacement difference and attitude angle difference of the end effector relative to the theoretical zero position at this time. The deformation pattern category is paired and bound with the measured spatial displacement difference and attitude angle difference to form a two-dimensional data association table. The two-dimensional data association table establishes a numerical mapping relationship between discrete geometric distortion categories and continuous spatial motion compensation amounts.

[0057] S602, the main control SOC uses its internal motion control algorithm module to convert three-dimensional spatial translation compensation commands and three-dimensional spatial rotation compensation commands into pulse width modulation drive signals for the underlying motor. The main control SOC sends the pulse width modulation drive signals to the actuator, which drives the end effector to adjust its spatial pose according to the compensation commands and perform a vertical downward pressing action to complete the assembly of the mobile phone fixture components.

[0058] S603, at the instant the actuator completes the pressing assembly action and reaches mechanical steady state, the main control SOC synchronously acquires the actual force vector fed back by the torque sensor. The actual force vector is specifically represented by six-dimensional force sensor data containing three spatial orthogonal force components and three orthogonal torque components. The main control SOC calls the ideal compliant force vector pre-stored in memory. The ideal compliant force vector represents the theoretical feedback contact force generated by the standard fixture in a non-deformed and ideally aligned assembly state.

[0059] The specific value of the ideal compliant force vector is obtained by performing multiple standard pressing assembly actions using a standard fixture in a stress-free state during the system initialization phase, and by arithmetically averaging the data collected from the six-dimensional force sensor multiple times. The main control SOC performs vector subtraction on the actual force vector and the ideal compliant force vector to obtain the six-dimensional force residual. When the fixture undergoes overall basic deformation or long-cycle environmental drift, even if the system applies nonlinear compensation for local distortion characteristics in advance, the relative physical contact point between the end effector and the fixture will still experience a slight spatial misalignment. This spatial misalignment will directly translate into an increase in the rigid internal stress of the assembly during hard contact assembly, which manifests as the six-dimensional torque sensor reading deviating from the ideal reference state. Therefore, the six-dimensional force residual reflects the abnormal internal stress of the assembly caused by slow environmental drift factors such as temperature changes or long-cycle fatigue that the fixture as a whole suffers from.

[0060] In S604, the main control SOC performs cross-domain transformation operations, calculating the weight coefficient vectors corresponding to the six-dimensional force perception residuals on multiple global deformation mode phasor fields. At the physical level, the six-dimensional force perception residuals are low-dimensional physical features describing mechanical contact stress, while the global deformation mode phasor fields are high-dimensional geometric features describing surface optical distortion. The main control SOC calls the mapping matrix pre-calibrated and stored in flash memory during the offline stage, using matrix multiplication to transform the low-dimensional mechanical features across physical domains into linear combinations of proportions of the high-dimensional modal bases. The formula for calculating the weight coefficient vectors is as follows: ; in, This represents the weight coefficient vector obtained from the cross-domain transformation; This represents the mapping matrix obtained during calibration; This represents the six-dimensional force perception residual column vector acquired in real time.

[0061] The number of rows in the mapping matrix is ​​the same as the number of global deformable mode basis phasors predefined, the number of columns in the mapping matrix is ​​fixed at 6, and the length dimension of the weight coefficient vector is equal to the number of global deformable mode basis phasors.

[0062] The S605 main control SOC transmits the calculated weight coefficient vector to the registers inside the FPGA module via the system's internal direct memory access bus. The weight coefficient vector numerically represents the projection components of the current environmental drift deformation of the fixture onto each independent orthogonal optical modal basis. The weight coefficient vector provides control parameters for the FPGA module to subsequently perform closed-loop adaptive iteration of the reference phase field at the hardware level. By introducing the characteristics of the physical force perception dimension for feedback adjustment of the optical geometric field, the system eliminates the measurement blind zone that a single vision system is insensitive to long-period slow deformation drift.

[0063] See attached document Figure 2 The modal basis hardware-level parallel synthesis and reference field adaptive iteration mechanism provided by this invention specifically includes the following steps: S701, the communication register inside the FPGA module receives the weight coefficient vector transmitted by the main control SOC. The FPGA module calls the internally configured hardware multiply-accumulate operation array. For the configuration of the underlying digital logic circuit of the field-programmable gate array of the hardware multiply-accumulate operation array, those skilled in the art can use digital signal processing slices to build a multi-stage pipeline cascade. The configuration of the underlying digital logic circuit of the hardware multiply-accumulate operation array is a well-known technology in the art and will not be described in detail here.

[0064] The S702 FPGA module reads multiple global deformation mode basis phasor fields solidified in the static memory in parallel through a high-bandwidth internal memory bus. There is a one-to-one correspondence between the global deformation mode basis phasor fields and the weight coefficient vectors in the modal dimension.

[0065] The S703 FPGA module controls the hardware multiply-accumulate array to perform pixel-level linear weighted synthesis operations. Based on the physical principles of orthogonal decomposition and signal reconstruction, complex global physical deformation can be equivalent to the linear superposition of a finite number of independent basic deformation modes. Since the global deformation mode basis phasor field extracted in the offline stage constitutes the orthogonal vector space describing the environmental drift, the mechanical dimension weight coefficients obtained by real-time cross-domain transformation can be used as projection components for inverse synthesis, thereby reconstructing the current global continuous geometric deformation state in the optical phase domain.

[0066] The hardware multiply-accumulate array multiplies each numerical variable in the weight coefficient vector with the pixel value at the same spatial coordinate position in the corresponding global deformation mode basis phasor field, and accumulates all modal product results to generate a global environmental drift phase compensation matrix. The global environmental drift phase compensation matrix represents the phase distortion distribution caused by the current temperature and stress drift in the continuous spatial geometric field. The calculation formula of the global environmental drift phase compensation matrix is ​​as follows: ; in, Represents the global environment drift phase compensation matrix in image space pixel coordinates The compensation phase value at the location; This represents the total number of basis phasors in the global deformation modes; Represents the weight coefficient vector of the first... The weight coefficient values ​​corresponding to each dimension; Indicates the first The global deformation modal basis phasor field of each dimension in the image space pixel coordinates The base phase value at that location.

[0067] The S704 FPGA module retrieves the original reference phase field stored in static memory and the old reference phase field used in the current detection cycle. Using internal hardware adders and multipliers, the FPGA module adds the original reference phase field to the global environmental drift phase compensation matrix to obtain the currently estimated target phase field. It then combines the current estimated target phase field with the old reference phase field, updates the step size factor, and performs pixel-level exponential smoothing to obtain the adaptively evolved new reference phase field. The update step size factor is used to prevent drastic fluctuations in the reference field caused by accidental measurement noise in a single acquisition cycle. The value range of the update step size factor is set to be greater than 0 and less than or equal to 0.1. The specific value is calibrated during system initialization based on the noise reduction requirements of exponential smoothing. A smaller update step size factor ensures that the reference phase field only responds to long-term, slow environmental drift trends, while filtering and smoothing transient high-frequency noise. The calculation formula for the new reference phase field is as follows: ; in, Represents the new reference phase field in the image space pixel coordinates The new reference phase value at the location; Represents the old reference phase field in image space pixel coordinates The old reference phase value at the location; This indicates the set update step size factor; This represents the original reference phase field obtained during system initialization under ideal stress-free conditions, expressed in pixel coordinates in image space. The original reference phase value at the location; Represents the global environment drift phase compensation matrix in image space pixel coordinates The compensation phase value at the location.

[0068] In the S705, the FPGA module writes the new reference phase field back to the static memory. The new reference phase field overwrites the old reference phase field stored in the static memory and serves as the original zero-bit reference data for generating the online phasor residual field in the next detection cycle. The reference field adaptive iteration process is executed in a closed loop at the on-chip hardware logic level of the FPGA module. The operation does not require uploading the large-scale two-dimensional image matrix to the external central processing unit memory node for software calculation via the high-speed peripheral component interconnection expansion bus. By updating the reference phase field in a closed loop at the underlying hardware level, the system eliminates the data transfer delay between heterogeneous device nodes and realizes real-time dynamic compensation for long-cycle environmental drift in industrial production lines.

[0069] Specific application examples: To verify the effectiveness and advancement of the mobile phone fixture calibration system based on visual recognition and cross-domain force feedback proposed in this invention in actual high-speed industrial production lines, this embodiment takes the continuous operation of the screen module and mid-frame pressing station of a smartphone assembly line as an example, and provides a detailed description of the specific implementation process and numerical derivation of this invention in conjunction with the accompanying drawings.

[0070] Heterogeneous hardware parallel acceleration and processing latency comparison test (combined) Figure 3 ): For the single-cycle high-definition optical data acquisition and low-level preprocessing stage, the system conducted comparative tests on the traditional CPU serial architecture and the heterogeneous parallel architecture of the present invention.

[0071] Traditional serial processing stage: Taking the wrapping phase solution as an example, assuming a certain feature point The three phase-shift grayscale values ​​collected are as follows: , , Traditional CPUs require sequential substitution of nonlinear formulas to perform floating-point operations: ; Faced with 1920×1080 (approximately 2.07 million) pixels, the CPU calculates the above formula one by one, such as... Figure 1 As shown, the time taken is as high as 85.5ms; with residual field extraction (42.0ms), feature dimensionality reduction (35.5ms), etc., the total time taken is 175.0ms.

[0072] Heterogeneous Parallel Acceleration Stage: This invention embeds the formula into FPGA logic gates and lookup tables (LUTs) to achieve parallel pipelined computation. Similarly, substituting... , , Numerical values ​​show that the FPGA can directly map a result of 0.606 rad within one clock cycle, reducing the computation time of the entire phasor matrix to 12.5 ms. Combined with the multi-core processing feature dimensionality reduction of the GPU, the overall computation latency of this invention is only 30.7 ms, with an efficiency improvement of 82.5%.

[0073] Deformation mode determination and Mahalanobis distance anomaly detection mechanism (combined) Figure 4 ): To evaluate the anomaly interception capability of the GPU feature space classifier, the system extracts features online and substitutes them into the Mahalanobis distance formula. The calculation is performed, and the alarm confidence threshold is set to 25.0.

[0074] Known stable phase of the model: Figure 4 Taking the 15th online sample as an example, the system extracts its dimensionality-reduced feature components. Get the average value corresponding to the slight wear mode. And the inverse covariance matrix (scalarization) Substitute into the formula to calculate: ; like Figure 4 As shown, the calculated value of 20.0 is below the abnormal alarm threshold of 25.0. The system successfully identified the known mode and continued to run.

[0075] Unknown Anomaly Interception Phase: At the 65th sample, the fixture encountered an unknown foreign object, causing severe deformation, and the measured characteristic component abruptly changed. Substitute into the same formula: ; The calculated result of 61.25 broke through the threshold defense line of 25.0 (e.g.) Figure 4 As shown in the figure, when the present invention detects that this value exceeds the limit, it cuts off the device enable and completes the abnormal interception.

[0076] Cross-physical domain force feedback and reference field adaptive convergence test (combined) Figure 5 ): To address the reference field drift caused by thermal accumulation in long-cycle equipment, this embodiment verifies the error convergence performance of the reference phase field closed-loop evolution mechanism. The system sets a pixel-level adaptive update step size factor. .

[0077] Iterative convergence process verification: To intuitively verify the convergence mechanism of this invention, a feature point in the stress region of the fixture is used. Taking this as an example, we perform a numerical simulation, assuming that after a long period of drift, the historical reference phase of this point has drifted to... The actual physical steady-state (target) phase of this point, calculated in real time using the cross-domain mapping matrix of this invention, should be... At this point, the initial physical error of this single point is... This also corresponds to Figure 5 The starting position is approximately 3.0 for the initial global root mean square error (RMSE).

[0078] When the system triggers the first adaptive closed-loop iteration, the values ​​are substituted into the reference field update formula of this invention. Perform calculations: ; After the first iteration, the current phase value at this point is updated to 4.55 rad, at which point the residual error decreases. ,like Figure 5 As shown by the black solid line with a horizontal axis of 2 (i.e., after the first iteration), the global macroscopic error has decreased to approximately 2.55.

[0079] When the system triggers the second iteration, the previous result is used as the old value and substituted into the calculation again: ; At this point, the residual error further decreases to ,and Figure 5 The curve values ​​at the x-axis point 3 match perfectly.

[0080] The above numerical extrapolation at the micro-pixel level shows that after approximately 20 closed-loop iterations, the phase value at this point will approach the true 2.0 rad, and the local error will approach zero. Figure 5 It is precisely after millions of pixel-level nodes across the entire field of view are updated synchronously according to the above formula that the global RMSE smoothly converges to about 0.1, which is a macroscopic statistical manifestation. In contrast, traditional systems without sensory feedback, due to the lack of target value guidance and weight update terms, always have errors oscillating at a high level between 3.0 and 3.8. This deduction proves the feasibility of the adaptive update formula of this invention and its superiority in eliminating measurement blind spots and achieving rapid convergence.

Claims

1. A visual recognition-based mobile phone jig calibration system, characterized by, The system includes a vision processor that acquires a real-time image matrix and transmits it to an FPGA module. The FPGA module calculates and obtains the current absolute phase field, and subtracts the current absolute phase field from the pre-stored reference phase field to obtain the phasor residual field. The GPU module outputs the deformation mode category to the main control SOC based on the phasor residual field. The main control SOC controls the actuator to complete the pressing assembly according to the deformation mode category; The torque sensor feeds back the actual force vector to the main control SOC. The main control SOC obtains the six-dimensional force perception residual based on the actual force vector, calculates the weight coefficient vector corresponding to the six-dimensional force perception residual, and transmits it to the FPGA module. The FPGA module combines the weight coefficient vector with the basis phasor field of multiple global deformation modes to obtain the global environment drift phase compensation matrix, and combines the global environment drift phase compensation matrix to complete the iterative evolution update of the reference phase field.

2. The visual recognition-based mobile phone jig calibration system of claim 1, wherein, The system also includes a projection device, the vision processor is electrically connected to the projection device, the vision processor is communicatively connected to the FPGA module through a high-speed image pass-through bus, the FPGA module has a built-in static memory and is communicatively connected to the GPU module through a direct memory access bus, the GPU module is communicatively connected to the main control SOC through an internal system bus, and the torque sensor is located at the end of the actuator and is communicatively connected to the main control SOC through a control communication bus.

3. The visual recognition based cell phone fixture calibration system of claim 1, wherein, The FPGA module calculates and obtains the current absolute phase field, specifically including: The FPGA module receives the real-time image matrix and performs an arctangent operation to output a wrapped phase field. It then performs a phase unpacking operation on the wrapped phase field according to the spatial phase unfolding logic, restoring it to an absolute phase distribution map that presents a continuous mapping relationship as the current absolute phase field.

4. The visual recognition based cell phone fixture calibration system of claim 1, wherein, The basis phasor fields of the multiple global deformation modes are obtained through the following steps: The visual recognition mobile phone fixture calibration system applies global environmental variables to the standard fixture to generate an environmental drift state. The FPGA module calculates and obtains the absolute phase distribution map under the influence of the environmental drift state, and extracts the initial environmental drift phase difference matrix by subtracting the absolute phase distribution map from the reference phase field under the ideal stress-free state. The master control SOC uses the singular value decomposition algorithm to orthogonally decompose the multiple initial environmental drift phase difference matrices to extract the multiple global deformation mode basis phasor fields.

5. The visual recognition based cell phone fixture calibration system of claim 1, wherein, The GPU module outputs the deformation mode category to the main control SOC based on the phasor residual field, specifically including: The FPGA module flattens the phasor residual field in two-dimensional matrix format into a high-dimensional feature vector and transmits it to the GPU module. The GPU module uses principal component analysis algorithm to project the high-dimensional feature vector to a low-dimensional feature space to obtain a dimension-reduced feature vector. The GPU module calls the Mahalanobis distance classifier to calculate the Mahalanobis distance between the dimensionality-reduced feature vector and the set local deformation pattern cluster center, and outputs the category corresponding to the minimum value of the Mahalanobis distance as the deformation pattern category to the main control SOC.

6. The visual recognition based cell phone fixture calibration system of claim 5, wherein, The GPU module outputs the deformation mode category to the main control SOC based on the phasor residual field, which further includes: The GPU module compares the minimum value of the Mahalanobis distance with the anomaly confidence threshold; When the minimum value of the Mahalanobis distance is less than or equal to the anomaly confidence threshold, the GPU module outputs the category corresponding to the minimum value of the Mahalanobis distance as the deformation mode category to the main control SOC. When the minimum value of the Mahalanobis distance is greater than the anomaly confidence threshold, the GPU module outputs an unknown distortion anomaly alarm signal to the main control SOC. After receiving the unknown distortion anomaly alarm signal, the main control SOC cuts off the assembly enable command of the actuator.

7. The visual recognition based cell phone fixture calibration system of claim 1, wherein, The main control SOC controls the actuator to complete the pressing assembly according to the deformation mode category, specifically including: The main control SOC receives the deformation mode category and calls the nonlinear compensation vector field preset table, and extracts the three-dimensional spatial translation compensation command and the three-dimensional spatial rotation compensation command according to the deformation mode category. The main control SOC sends the three-dimensional spatial translation compensation command and the three-dimensional spatial rotation compensation command to the actuator to perform the compensation.

8. The visual recognition based cell phone fixture calibration system of claim 1, wherein, The main control SOC obtains the six-dimensional force perception residual based on the actual force vector, specifically including: The main control SOC calculates the difference between the actual force vector and the ideal compliant force vector to obtain the six-dimensional force perception residual; The ideal compliant force vector characterizes the theoretical feedback contact force generated by the standard fixture in a deformable and ideally aligned assembly state.

9. The visual recognition based cell phone fixture calibration system of claim 1, wherein, The main control SOC calculates the weight coefficient vector corresponding to the six-dimensional force perception residual and transmits it to the FPGA module, specifically including: The main control SOC uses the mapping matrix established by offline calibration to calculate the weight coefficient vector corresponding to the six-dimensional force perception residual on the basis phasor field of the multiple global deformation modes; The mapping matrix is ​​calculated using the least squares method.

10. The visual recognition based cell phone fixture calibration system of claim 1, wherein, The FPGA module combines the weight coefficient vector with the basis phasor field of multiple global deformation modes to obtain the global environment drift phase compensation matrix, and combines the global environment drift phase compensation matrix to complete the iterative evolution update of the reference phase field, specifically including: The FPGA module controls the internally configured hardware multiply-accumulate operation array to perform pixel-level linear weighted synthesis operation on the weight coefficient vector and the multiple global deformation mode basis phasor fields to generate the global environment drift phase compensation matrix. The FPGA module adds the original reference phase field initialized under ideal stress-free conditions to the global environment drift phase compensation matrix, and then performs a pixel-level addition operation by combining the old reference phase field of the current detection cycle and the set update step size factor to solve for and obtain the new reference phase field to complete the evolution update.

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