Charging dual dc output circuit, current equalization method and fault monitoring method thereof

Abstract

The application discloses a charging double direct current output loop and a current equalization method and a fault monitoring method thereof, wherein the double direct current output loop comprises a first direct current output loop and a second direct current output loop in parallel, the two direct current output loops are set by using an impedance matching strategy, the first direct current output loop comprises two direct current contactors, a first fuse and a first shunt, the second direct current output loop comprises two direct current contactors, a second fuse and a second shunt, wherein the resistance grades of the first shunt and the second shunt are graded and matched according to the impedance difference of the two direct current output loops. The current equalization between the direct current output loops can be realized, so that the situation that a single direct current output loop is overloaded, seriously heated and even burned is avoided.

Description

Technical Field

[0001] This invention relates to the field of DC charging technology for charging piles, specifically to a dual DC output circuit for charging, a current balancing method, and a fault monitoring method. Background Technology

[0002] Charging piles typically have a single DC output circuit. However, as the demand for current increases, it becomes difficult for the components in the DC circuit to meet the dual requirements of high current and low cost during the selection process. Furthermore, with a single DC output circuit, if any component in the circuit fails, the entire charging pile will be unable to charge.

[0003] In related technologies, dual DC output circuits can be used to solve the problems of single DC output circuits. However, it is difficult to achieve current balance between the DC output circuits in the dual DC output circuit, which can easily cause overload, severe heat generation, or even device burnout in a single DC output circuit. Summary of the Invention

[0004] To solve the above-mentioned technical problems, this invention provides a dual DC output charging circuit, its current balancing method, and a fault monitoring method, which can achieve current balancing between each DC output circuit, thereby avoiding overload, severe overheating, or even device burnout in a single DC output circuit.

[0005] The technical solution adopted in this invention is as follows:

[0006] A charging dual DC output circuit is characterized in that the dual DC output circuit includes a first DC output circuit and a second DC output circuit connected in parallel. The first DC output circuit includes two DC contactors, a first fuse, and a first shunt. The second DC output circuit includes two DC contactors, a second fuse, and a second shunt. The resistance levels of the first shunt and the second shunt are matched according to the impedance difference between the two DC output circuits.

[0007] In one embodiment of the present invention, the first DC output circuit and the second DC output circuit are configured using an impedance matching strategy.

[0008] In one embodiment of the present invention, the two DC output circuits are configured using an impedance matching strategy, including: measuring the impedance values ​​of each device in the first DC output circuit and the second DC output circuit respectively to obtain a first inherent impedance value and a second inherent impedance value; calculating the difference between the first inherent impedance value and the second inherent impedance value to generate a resistance value to be compensated; and adjusting the length of the connecting cables in the first DC output circuit and the second DC output circuit according to the resistance value to be compensated, so that the total impedance of the first DC output circuit is equal to the total impedance of the second DC output circuit.

[0009] In one embodiment of the present invention, the two DC output circuits are set up with an impedance matching strategy, including: during the testing phase, if there is a DC output circuit with a current less than a first preset current, the torque of the screw at the busbar connection in the DC output circuit with a current less than the first preset current is adjusted.

[0010] A current balancing method for dual DC output circuits in charging, wherein the first DC output circuit and the second DC output circuit are powered by different power module groups, each power module group including multiple power modules, the current balancing method includes the following steps: detecting a first current value of the first DC output circuit and a second current value of the second DC output circuit respectively, and calculating a current deviation value between the first current value and the second current value; determining whether the current deviation value is greater than a second preset current; if the current deviation value is greater than the second preset current, and the first current value is greater than the second current value, then adopting a PI adjustment strategy and generating a target reduction amount based on the droop characteristic, and reducing the output voltage reference value of the power module corresponding to the first DC output circuit according to the target reduction amount, and after a first preset time, determining whether the current deviation value converges to the target current deviation value; if the current deviation value does not converge to the target current deviation value, then adopting a PI adjustment strategy and generating a target increase amount based on the droop characteristic, and increasing the output voltage reference value of the power module corresponding to the second DC output circuit according to the target increase amount, until the current of the two DC output circuits is balanced.

[0011] In one embodiment of the present invention, before reducing the output voltage reference value of the power module corresponding to the first DC output circuit according to the target reduction amount, or increasing the output voltage reference value of the power module corresponding to the second DC output circuit according to the target increase amount, the method further includes: performing current balancing on the first DC output circuit or the second DC output circuit using an balancing algorithm, wherein the balancing algorithm is an average current method or a master-slave control method.

[0012] In one embodiment of the present invention, the master-slave control method includes: dividing the power module group corresponding to the first DC output circuit or the second DC output circuit into a first power module group to be balanced and a second power module group to be balanced, and designating the first power module group to be balanced as the master module group and the second power module group to be balanced as the slave module group; controlling the first power module group to be balanced to perform current closed-loop control to output current in real time and calculate the corresponding voltage regulation target value, and sending the calculated voltage regulation target value to the second power module group to be balanced; wherein, when the second power module group to be balanced receives the voltage regulation target value, controlling the second power module group to be balanced to output current following the voltage regulation target value.

[0013] In one embodiment of the present invention, the average current method includes: acquiring the real-time output current of each power module in the power module group corresponding to the first DC output circuit or the second DC output circuit; calculating the average output current of each power module in the corresponding power module group based on the real-time output current of each power module; and independently adjusting the output voltage reference value of the corresponding power module based on the difference between the real-time output current and the average output current, so as to drive the output current of each power module to converge towards the average output current.

[0014] A fault monitoring method for a dual DC output charging circuit, wherein the first DC output circuit and the second DC output circuit share a DC bus for power supply, the fault monitoring method includes the following steps: detecting a first current value of the first DC output circuit and a second current value of the second DC output circuit respectively; determining whether the maximum current value among the first current value and the second current value exceeds the rated current value of the target device; if the maximum current value does not exceed the rated current value of the target device, calculating the imbalance degree based on the first current value and the second current value; determining whether the imbalance degree is greater than a preset value; if the imbalance degree is greater than the preset value, issuing a fault warning.

[0015] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the above-described current balancing method for dual DC output charging circuits or the fault monitoring method for dual DC output charging circuits.

[0016] A non-transitory computer-readable storage medium storing a computer program that, when executed by a processor, implements the aforementioned current balancing method for dual DC output charging circuits or the fault monitoring method for dual DC output charging circuits.

[0017] The beneficial effects of this invention are:

[0018] (1) This invention proposes a dual DC output circuit for charging, which uses physical impedance matching to achieve current balance between DC output circuits, thereby avoiding overload, severe heat generation or even device burnout in a single DC output circuit.

[0019] (2) This invention proposes a current balancing method for dual DC output circuits for charging. Based on software control algorithm, it further realizes the current balancing between each DC output circuit, thereby avoiding the situation of overload, severe heat generation or even device burnout in a single DC output circuit.

[0020] (3) The present invention can monitor in real time whether the current imbalance fault occurs in the dual DC output circuit of the charging circuit. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the charging dual DC output circuit according to an embodiment of the present invention;

[0022] Figure 2 This is a schematic diagram of a charging dual DC output circuit according to an embodiment of the present invention;

[0023] Figure 3 A flowchart of a current balancing method for a dual DC output charging circuit according to an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of a dual DC output charging circuit according to another embodiment of the present invention;

[0025] Figure 5 This is a flowchart of a fault monitoring method for a dual DC output charging circuit according to an embodiment of the present invention. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] Figure 1 This is a schematic diagram of the dual DC output charging circuit according to an embodiment of the present invention.

[0028] like Figure 1 As shown, the charging dual DC output circuit of this embodiment may include a first DC output circuit 100 and a second DC output circuit 200 connected in parallel. The first DC output circuit 100 may include two DC contactors, a first fuse and a first shunt. The second DC output circuit 200 may include two DC contactors, a second fuse and a second shunt. The resistance levels of the first shunt and the second shunt are matched according to the impedance difference between the two DC output circuits.

[0029] Specifically, in this embodiment of the invention, a shunt can be used as a fine-tuning resistor. Based on the impedance difference between the two DC output circuits, a first shunt and a second shunt with different resistance levels can be adaptively selected. Specifically, during procurement, pairing screening can be performed, and shunts with extremely similar resistance values ​​can be used in pairs.

[0030] It should be noted that the charging dual DC output circuit of the present invention can adopt a mirror symmetrical layout, that is, when designing the copper busbar, ensure that the two paths branching off from the busbar are completely symmetrical in physical shape (the length and number of bends are the same); or adopt a common busbar design, that is, adopt a "Y" type or "T" type busbar design to ensure that the potential of the busbar is strictly equal, and avoid uneven current distribution caused by the voltage drop of the busbar itself.

[0031] It is understandable that for large-section copper cables, the resistance is proportional to the length. Therefore, the DC resistance of the conductors themselves in each DC output circuit can be used as the balancing resistance.

[0032] In one embodiment of the present invention, the first DC output circuit and the second DC output circuit may be configured using an impedance matching strategy.

[0033] Specifically, in one embodiment of the present invention, the two DC output circuits are set up using an impedance matching strategy, including: measuring the impedance values ​​of each device (including DC contactors, fuses, shunts, and busbars, etc.) in the first DC output circuit and the second DC output circuit respectively to obtain a first inherent impedance value and a second inherent impedance value; calculating the difference between the first inherent impedance value and the second inherent impedance value to generate a resistance value to be compensated; and adjusting the length of the connecting cables in the first DC output circuit and the second DC output circuit according to the resistance value to be compensated, so that the total impedance of the first DC output circuit is equal to the total impedance of the second DC output circuit.

[0034] In another embodiment of the present invention, the two DC output circuits are set with an impedance matching strategy, including: during the test phase, if there is a DC output circuit with a current less than a first preset current, the torque of the screw at the busbar connection in the DC output circuit with a current less than the first preset current is adjusted.

[0035] In summary, the dual DC output charging circuit according to an embodiment of the present invention includes a first DC output circuit and a second DC output circuit connected in parallel. The first DC output circuit includes two DC contactors, a first fuse, and a first shunt. The second DC output circuit includes two DC contactors, a second fuse, and a second shunt. The resistance levels of the first and second shunts are matched according to the impedance difference between the two DC output circuits. Therefore, current balance between the DC output circuits is achieved through physical impedance matching, thereby avoiding overload, severe overheating, or even device burnout in a single DC output circuit.

[0036] It should be noted that the dual DC output charging circuit in the above embodiments has two power supply architecture scenarios: module group control architecture and module parallel control architecture. Different control strategies are applicable to different power supply architecture scenarios.

[0037] Specifically, corresponding to the dual DC output circuit for charging in the above embodiments, the present invention also proposes a current balancing method for the dual DC output circuit for charging.

[0038] It should be noted that, as Figure 2 As shown, in one embodiment of the present invention, the first DC output circuit and the second DC output circuit are powered by different power module groups, and each power module group includes multiple power modules, i.e., a module grouping control architecture. In other words, the current balancing method for the dual DC output circuits of the present invention is applicable to situations where the first DC output circuit and the second DC output circuit are powered by different power module groups.

[0039] like Figure 3 As shown, the current balancing method for the dual DC output charging circuit of this invention may include the following steps:

[0040] S21, detect the first current value of the first DC output circuit and the second current value of the second DC output circuit respectively, and calculate the current deviation value between the first current value and the second current value.

[0041] Specifically, the current deviation value is obtained by calculating the absolute value of the difference between the first current value and the second current value.

[0042] S22, determine whether the current deviation value is greater than the second preset current.

[0043] S23, if the current deviation value is greater than the second preset current and the first current value is greater than the second current value, then a PI regulation strategy is adopted and a target reduction amount is generated based on the droop characteristic. The output voltage reference value of the power supply module corresponding to the first DC output circuit is reduced according to the target reduction amount. After a first preset time, it is determined whether the current deviation value converges to the target current deviation value.

[0044] S24. If the current deviation value does not converge to the target current deviation value, a PI regulation strategy is adopted and a target increase is generated based on the droop characteristic. The output voltage reference value of the power supply module corresponding to the second DC output circuit is increased according to the target increase until the current of the two DC output circuits is balanced.

[0045] Specifically, by determining whether the current deviation value is greater than the second preset current, it is possible to determine whether there is a risk of current imbalance in the first DC output circuit and the second DC output circuit. If the current deviation value is less than or equal to the second preset current, there is no risk of current imbalance in the first DC output circuit and the second DC output circuit. In this case, no adjustment is required, and the jitter caused by frequent adjustments is avoided.

[0046] If the current deviation is less than or equal to the second preset current, there is a risk of current imbalance between the first and second DC output circuits. In this case, if the first current value is greater than the second current value, the first DC output circuit can be adjusted first. Specifically, a PI regulation strategy is adopted, and a target reduction amount is generated based on the droop characteristic. The output voltage reference value of the power module corresponding to the first DC output circuit is then reduced according to the target reduction amount. Specifically, a PI regulation strategy is used to generate the first reduction amount ΔV1, i.e.

[0047] ,

[0048] Where Kp and Ki are the PI adjustment coefficients, ΔI is the current deviation value, and ΔV1 is the first reduction amount.

[0049] Understandably, the droop characteristic is the physical mechanism by which two power modules "negotiate" current distribution. Without the droop characteristic, both power modules would try to maintain their no-load voltage reference value V_ref, leading to competition for current when connected in parallel, resulting in unstable current. With the droop characteristic, the module with the larger current will have a slightly lower voltage, providing a certain degree of self-current sharing capability. Specifically, the output voltage of the power module is not constant but decreases slightly as the output current increases.

[0050] ,

[0051] Where K is the droop slope (mV / A), V_ref is the voltage reference value under no-load conditions, I_out is the output current of the power module, and V_out is the output voltage of the power module. For example, when K = 0.2 mV / A and I_out = 500A, the actual output voltage V_out is 100mV lower than V_ref.

[0052] K = 0.2 mV / A, assuming the current first current value I1 = 550A, the second current value I2 = 450A, and the current deviation ΔI = 100A, to converge the two currents to 500A each, the current difference that needs to be eliminated is 100A. At this point, based on the droop characteristic, a second reduction ΔV2 can be generated, i.e.

[0053] .

[0054] Therefore, the target reduction amount can be generated based on the first reduction amount and the second reduction amount, i.e., ΔV = ΔV1 + ΔV2.

[0055] The output voltage reference value of the power module corresponding to the first DC output circuit is reduced according to the target reduction amount, and after a first preset time, it is determined whether the current deviation value has converged to the target current deviation value.

[0056] If the current deviation value does not converge to the target current deviation value, a PI control strategy is adopted, and a target increase is generated based on the droop characteristic. The specific calculation method can be found in the target decrease calculation. The output voltage reference value of the power module corresponding to the second DC output circuit is increased according to the target increase until the current of the two DC output circuits is balanced. In this way, bidirectional symmetrical control can be formed, which accelerates the current sharing convergence speed.

[0057] It should be noted that before performing current balancing between the two DC output circuits, current balancing can also be performed within each DC output circuit.

[0058] Specifically, before reducing the output voltage reference value of the power module corresponding to the first DC output circuit according to the target reduction amount, or increasing the output voltage reference value of the power module corresponding to the second DC output circuit according to the target increase amount, the method further includes: using an equalization algorithm to perform current equalization on the first DC output circuit or the second DC output circuit, wherein the equalization algorithm is an average current method or a master-slave control method.

[0059] In one embodiment of the present invention, the master-slave control method includes: dividing the power module group corresponding to the first DC output circuit or the second DC output circuit into a first power module group to be balanced and a second power module group to be balanced; using the first power module group to be balanced as the master module group and the second power module group to be balanced as the slave module group; controlling the first power module group to be balanced to perform current closed-loop control to output current in real time and calculate the corresponding voltage regulation target value; and sending the calculated voltage regulation target value to the second power module group to be balanced; wherein, when the second power module group to be balanced receives the voltage regulation target value, controlling the second power module group to be balanced to output current following the voltage regulation target value.

[0060] The system connects the various power supply modules to be balanced via CAN communication. In case of a failure of the main module group, the system has a switching mechanism. When the main module fails, the slave module group can be promoted to the new main module group to ensure continuous system operation.

[0061] In another embodiment of the present invention, the average current method includes: acquiring the real-time output current of each power module in the power module group corresponding to the first DC output circuit or the second DC output circuit; calculating the average output current of each power module in the corresponding power module group based on the real-time output current of each power module; and independently adjusting the output voltage reference value of the corresponding power module based on the difference between the real-time output current and the average output current, so as to drive the output current of each power module to converge towards the average output current.

[0062] Understandably, in a symmetrical architecture with high system redundancy requirements and no clear master-slave division, the failure of any module group will not affect the operation of the current sharing logic.

[0063] In summary, the current balancing method for dual DC output circuits according to embodiments of the present invention detects the first current value of the first DC output circuit and the second current value of the second DC output circuit, and calculates the current deviation between the first and second current values; determines whether the current deviation is greater than a second preset current; if the current deviation is greater than the second preset current and the first current is greater than the second current, a PI control strategy is adopted and a target reduction amount is generated based on the droop characteristic, and the output voltage reference value of the power module corresponding to the first DC output circuit is reduced according to the target reduction amount, and after a first preset time, it is determined whether the current deviation converges to the target current deviation value; if the current deviation does not converge to the target current deviation value, a PI control strategy is adopted and a target increase amount is generated based on the droop characteristic, and the output voltage reference value of the power module corresponding to the second DC output circuit is increased according to the target increase amount, until the current of the two DC output circuits is balanced. Thus, based on a software control algorithm, current balancing between each DC output circuit is further achieved, thereby avoiding overload, severe overheating, or even device burnout in a single DC output circuit.

[0064] Corresponding to the dual DC output charging circuit of the above embodiments, the present invention also proposes a fault monitoring method for the dual DC output charging circuit.

[0065] It should be noted that, as Figure 4 As shown, in one embodiment of the present invention, the first DC output circuit and the second DC output circuit can share a set of DC bus power supplies, i.e., a module parallel control architecture. In other words, the fault monitoring method for the dual DC output circuits of the charging circuit in this embodiment of the present invention is applicable to the situation where the first DC output circuit and the second DC output circuit share a set of DC bus power supplies.

[0066] like Figure 5 As shown, the fault monitoring method for the dual DC output charging circuit of this invention may include the following steps:

[0067] S31, detect the first current value of the first DC output circuit and the second current value of the second DC output circuit respectively; determine whether the maximum current value among the first current value and the second current value exceeds the rated current value of the target device.

[0068] The target device is the device with the smallest rated current in the dual DC output charging circuit corresponding to the maximum current value between the first and second current values.

[0069] S32, if the maximum current value does not exceed the rated current value of the target device, the unbalance is calculated based on the first current value and the second current value.

[0070] If the maximum current value exceeds the rated current value of the target device, the charging current demand will be reduced through the communication protocol (BMS) to ensure that a single circuit is not overloaded.

[0071] In one embodiment of the present invention, the degree of imbalance can be calculated using the following formula:

[0072] ,

[0073] in, For the degree of imbalance, This is the first current value. This is the second current value.

[0074] S33, determine whether the imbalance is greater than the preset value.

[0075] S34 If the imbalance exceeds the preset value, a fault warning will be issued.

[0076] The preset value can be calibrated according to the actual situation; for example, it can be 15%.

[0077] It should be noted that a single-path fault protection and derating output mechanism can also be set. Specifically, when an overcurrent or device malfunction is detected in a DC output circuit, the faulty DC output circuit is automatically cut off, and the charging service continues to be provided with the remaining single-path rated current, thus balancing safety and availability.

[0078] In summary, the fault monitoring method for the dual DC output charging circuit according to embodiments of the present invention detects the first current value of the first DC output circuit and the second current value of the second DC output circuit, respectively, and determines whether the maximum current value among the first and second current values ​​exceeds the rated current value of the target device. If the maximum current value does not exceed the rated current value of the target device, the imbalance is calculated based on the first and second current values, and it is determined whether the imbalance is greater than a preset value. If the imbalance is greater than the preset value, a fault warning is issued. Therefore, the present invention can monitor in real time whether a current imbalance fault occurs in the dual DC output charging circuit.

[0079] Corresponding to the above embodiments, the present invention also proposes a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the above-mentioned current balancing method for dual DC output circuits of charging, or the fault monitoring method for dual DC output circuits of charging.

[0080] The computer device according to the present invention uses physical impedance matching to achieve current balance between each DC output circuit, and further achieves current balance between each DC output circuit based on software control algorithm, thereby avoiding overload, severe heat generation or even device burnout of a single DC output circuit, and can monitor in real time whether current imbalance fault occurs in the dual DC output circuit of charging.

[0081] Corresponding to the above embodiments, the present invention also proposes a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the above-described current balancing method for dual DC output circuits of charging, or the fault monitoring method for dual DC output circuits of charging.

[0082] According to the embodiments of the present invention, the non-transitory computer-readable storage medium adopts physical impedance matching to achieve current balance between each DC output circuit, and further achieves current balance between each DC output circuit based on software control algorithm, thereby avoiding overload, severe heat generation or even device burnout of a single DC output circuit, and can monitor in real time whether current imbalance fault occurs in the dual DC output circuit of charging.

[0083] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. "A plurality of" means two or more, unless otherwise explicitly specified.

[0084] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0085] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0086] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0087] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0088] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A charging dual DC output circuit, characterized in that, The dual DC output circuit includes a first DC output circuit and a second DC output circuit connected in parallel. The first DC output circuit includes two DC contactors, a first fuse, and a first shunt. The second DC output circuit includes two DC contactors, a second fuse, and a second shunt. The resistance ratings of the first and second shunts are matched according to the impedance differences between the two DC output circuits.

2. The charging dual DC output circuit according to claim 1, characterized in that, The first DC output circuit and the second DC output circuit are configured using an impedance matching strategy.

3. The charging dual DC output circuit according to claim 2, characterized in that, The two DC output circuits are configured using an impedance matching strategy, including: The impedance values ​​of each device in the first DC output circuit and the second DC output circuit are measured respectively to obtain the first inherent impedance value and the second inherent impedance value; The difference between the first inherent impedance value and the second inherent impedance value is calculated to generate the resistance value to be compensated; Adjust the length of the connecting cables in the first DC output circuit and the second DC output circuit according to the value of the resistance to be compensated, so that the total impedance of the first DC output circuit is equal to the total impedance of the second DC output circuit.

4. The charging dual DC output circuit according to claim 2 or 3, characterized in that, The two DC output circuits are configured using an impedance matching strategy, including: During the testing phase, if there is a DC output circuit with a current less than the first preset current among the two DC output circuits, then adjust the torque of the screw at the busbar connection in the DC output circuit with a current less than the first preset current.

5. A current balancing method for a dual DC output charging circuit according to claim 4, characterized in that, The first DC output circuit and the second DC output circuit are powered by different power module groups, each power module group including multiple power modules, and the current balancing method includes the following steps: The first current value of the first DC output circuit and the second current value of the second DC output circuit are detected respectively, and the current deviation value between the first current value and the second current value is calculated. Determine whether the current deviation value is greater than the second preset current; If the current deviation value is greater than the second preset current and the first current value is greater than the second current value, then a PI regulation strategy is adopted and a target reduction amount is generated based on the droop characteristic. The output voltage reference value of the power module corresponding to the first DC output circuit is reduced according to the target reduction amount. After a first preset time, it is determined whether the current deviation value has converged to the target current deviation value. If the current deviation value does not converge to the target current deviation value, a PI regulation strategy is adopted and a target increase is generated based on the droop characteristic. The output voltage reference value of the power module corresponding to the second DC output circuit is increased according to the target increase until the current of the two DC output circuits is balanced.

6. The current equalization method according to claim 5, characterized in that, Before reducing the output voltage reference value of the power module corresponding to the first DC output circuit according to the target reduction amount, or increasing the output voltage reference value of the power module corresponding to the second DC output circuit according to the target increase amount, the method further includes: A current balancing algorithm is used to balance the current of the first DC output circuit or the second DC output circuit, wherein the balancing algorithm is the average current method or the master-slave control method.

7. The current equalization method according to claim 6, characterized in that, The master-slave control method includes: The power module group corresponding to the first DC output circuit or the second DC output circuit is divided into a first power module group to be balanced and a second power module group to be balanced, and the first power module group to be balanced is regarded as the master module group and the second power module group to be balanced is regarded as the slave module group. The first power supply module group to be balanced is controlled to perform current closed-loop control to output current in real time and calculate the corresponding voltage regulation target value, and the calculated voltage regulation target value is sent to the second power supply module group to be balanced; wherein, When the second power supply module group to be balanced receives the target voltage value, it controls the second power supply module group to output current in accordance with the target voltage value.

8. The current equalization method according to claim 6, characterized in that, The average current method includes: Collect the real-time output current of each power module in the power module group corresponding to the first DC output circuit or the second DC output circuit; The average output current of each power module in the corresponding power module group is calculated based on the real-time output current of each power module. Based on the difference between the real-time output current and the average output current, the output voltage reference value of the corresponding power module is adjusted independently to drive the output current of each power module to converge towards the average output current.

9. A fault monitoring method for a dual DC output charging circuit according to claim 1, characterized in that, The first DC output circuit and the second DC output circuit share a common DC bus power supply. The fault monitoring method includes the following steps: Detect the first current value of the first DC output circuit and the second current value of the second DC output circuit respectively; determine whether the maximum current value among the first current value and the second current value exceeds the rated current value of the target device; If the maximum current value does not exceed the rated current value of the target device, the unbalance is calculated based on the first current value and the second current value. Determine whether the imbalance is greater than a preset value; If the imbalance is greater than the preset value, a fault warning will be issued.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the current balancing method for the dual DC output charging circuit according to any one of claims 5-8, or the fault monitoring method for the dual DC output charging circuit according to claim 9.

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