A detection system for PDU quality inspection work

Abstract

The application relates to the field of power electronic and electrical equipment detection, and discloses a detection system for PDU quality detection, which comprises a main control unit, a programmable AC load machine, a high-voltage withstand voltage test unit, a multi-channel high-frequency data acquisition card and a signal probe assembly; the main control unit controls the load machine to apply a step current, calculates a transient dynamic impedance value according to a voltage transient waveform to detect a contact defect; during a thermal relaxation time after the step current is applied, the main control unit starts high-voltage testing, calculates a thermal sensitivity factor according to a leakage current sequence, and evaluates the stability of an insulating medium under thermal stress; in addition, the main control unit judges the consistency of a physical grounding state and a logical alarm state according to a probe collected signal. The application is helpful to identify thermal insulation deterioration hidden dangers and logical function failures caused by poor contact which cannot be found in conventional cold state testing through thermal-electric coupling and double-dimensional verification.

Description

Technical Field

[0001] This invention relates to the field of power electronics and electrical equipment testing, specifically a testing system for PDU quality inspection. Background Technology

[0002] As a critical end-point power distribution device in data centers and industrial control systems, the manufacturing quality of PDUs directly affects the safety and stability of power systems. With the increasing intelligence and high power density of PDU products, higher requirements are being placed on quality inspection during the production process. This necessitates not only verifying basic electrical connection performance but also assessing the reliability of the insulation system and the correctness of the monitoring logic.

[0003] Current PDU production line testing technologies typically treat load current testing and insulation withstand voltage testing as two separate processes. Insulation withstand voltage testing is generally performed under cold conditions, such as when the equipment is in thermal equilibrium or at room temperature, focusing on testing the dielectric strength of the insulation material in a static environment. However, in actual operating conditions, if there are microscopic contact defects such as poor soldering or loose crimping at the connection points of the PDU's internal conductive circuits, significant Joule heating will occur when a large current passes through. This localized heat accumulation not only increases contact resistance but, more importantly, it acts on the adjacent insulating medium through heat conduction, leading to performance degradation such as increased polarization or leakage current under thermal stress. Because existing cold-state withstand voltage testing severs the physical connection between the thermal effect generated by the electrical load and the insulation performance, it is difficult to effectively detect these insulation hazards induced by contact defects that only manifest under thermal stress, resulting in some potentially defective products entering the market.

[0004] Furthermore, for PDUs with intelligent monitoring capabilities, existing testing systems often focus on measuring physical and electrical parameters, such as simply detecting the continuity of the grounding loop or measuring the sound pressure level of the alarm buzzer. They lack a mechanism for synchronously verifying the correlation between physical and logical states. During testing, there is a common issue where only the physical connection is considered, while the correctness of the firmware logic response is overlooked. This testing model struggles to accurately distinguish between physical hardware failures and firmware logic errors. It cannot effectively identify deeper logical defects such as a good physical grounding but a false alarm, or a physical grounding failure but a silent (missed) system logic. This leads to ambiguous fault attribution and makes it difficult to guarantee the functional safety of the product.

[0005] Furthermore, existing quality judgment logic is mostly based on static threshold comparisons of a single parameter, such as judging whether a product is qualified or not solely based on whether the steady-state impedance value or the absolute value of leakage current exceeds the standard. This discrete evaluation method ignores the dynamic correlation between various physical quantities and lacks comprehensive consideration of multiple dimensions such as transient impedance change rate, leakage current thermal sensitivity, and logical consistency. When faced with products that seem to meet certain single indicators but have complex quality risks, the existing single-dimensional judgment mechanism is prone to missed detections and cannot meet the comprehensive quality control requirements of high-reliability PDU products. Summary of the Invention

[0006] This invention provides a testing system for PDU quality inspection, aiming to solve the technical problems of the separation between physical connection testing and logic function testing in existing PDU testing technologies, as well as the difficulty in detecting the potential insulation thermal failure caused by contact resistance under non-destructive conditions.

[0007] A testing system for PDU quality inspection includes a main control unit, a programmable AC load cell, a high-voltage withstand voltage test unit, a multi-channel high-frequency data acquisition card, and a signal probe assembly. The main control unit is communicatively connected to the programmable AC load cell, the high-voltage withstand voltage test unit, the multi-channel high-frequency data acquisition card, and the signal probe assembly. The programmable AC load cell is electrically connected to the output terminal of the PDU under test (PDD) to apply a step current. The high-voltage withstand voltage test unit is connected to the PDU's housing and grounding terminal to apply a high-voltage test voltage. The signal probe assembly is physically in contact with the PDU's buzzer drive pin and housing grounding point to acquire physical signals.

[0008] The main control unit controls the programmable AC load cell to apply a step current to the PDU under test, receives the transient voltage waveform fed back by the multi-channel high-frequency data acquisition card, and calculates the transient dynamic impedance value based on the waveform to detect contact defects in the circuit. The main control unit also initiates the high-voltage withstand voltage test unit during the thermal relaxation time after the step current application ends, acquires the instantaneous leakage current value sequence through the multi-channel high-frequency data acquisition card, and calculates the leakage current thermal sensitivity factor to evaluate the stability of the insulating medium under thermal stress. Simultaneously, the main control unit determines whether the physical grounding state and the logic alarm state of the PDU under test are consistent based on the signals acquired by the signal probe assembly. The main control unit summarizes the transient dynamic impedance value, leakage current thermal sensitivity factor, and consistency determination results to generate comprehensive quality data.

[0009] Furthermore, the main control unit performs logic self-testing and phase initialization. During system power-up, the main control unit acquires the steady-state voltage and current values ​​of each phase of the PDU under test through a multi-channel high-frequency data acquisition card, and simultaneously reads the firmware status register data of the microcontroller inside the PDU under test; then it verifies whether the on / off state of the physical measurement is consistent with the alarm flag bit in the firmware status register data. Only when the physical state and logic state of all phases match a preset valid combination, the main control unit generates a global test enable signal.

[0010] Furthermore, the main control unit implements thermal accumulation excitation control by constructing a current control descriptor. This current control descriptor includes a pre-bias phase, a step rise phase, a thermal accumulation holding phase, and a rapid turn-off phase. In the pre-bias phase, the control loop current is stabilized at a small pre-bias level to establish stable contact; in the step rise phase, the control loop current jumps to the target excitation current amplitude at a set current ramp rate; in the thermal accumulation holding phase, the target excitation current amplitude is maintained, and a localized high-temperature thermal field is established at the contact resistance anomaly point using the Joule heating effect; in the rapid turn-off phase, the load current is cut off, and a thermal excitation completion synchronization trigger signal is generated.

[0011] Furthermore, the main control unit calculates the transient dynamic impedance value based on the voltage response characteristics. Specifically, the main control unit obtains the steady-state voltage reference value before the load step trigger and the lowest voltage extreme point during the load step response process. It calculates the difference between the steady-state voltage reference value and the lowest voltage extreme point, and then divides this difference by the target excitation current amplitude to obtain the transient dynamic impedance value. The main control unit compares this transient dynamic impedance value with a preset reference impedance threshold. If it exceeds the threshold, it determines that the circuit has a high impedance defect.

[0012] Furthermore, the main control unit monitors the thermal excitation completion synchronization trigger signal and performs hardware topology reconfiguration during the thermal relaxation time. The specific process includes: sending a physical disconnect command to the load-side isolation relay group to cut off the electrical connection between the programmable AC load machine and the PDU under test; after confirming the load-side isolation relay group is disconnected, sending a closing command to the withstand voltage-side access relay group to connect the high-voltage withstand voltage test unit to the PDU under test. This process ensures that the insulating medium undergoes high-voltage testing while maintaining its thermal excitation latent state.

[0013] Furthermore, the main control unit calculates the leakage current thermal sensitivity factor based on the time evolution characteristics of the leakage current. Specifically, the main control unit selects the initial leakage current corresponding to the starting sampling time after the withstand voltage test has stabilized, and the final leakage current corresponding to the ending sampling time before the withstand voltage test ends. It then calculates the current increment value of the ending leakage current relative to the initial leakage current, and the time interval value of the ending sampling time relative to the starting sampling time. The main control unit divides the current increment value by the time interval value to obtain the leakage current thermal sensitivity factor. If this factor is greater than zero, it is determined that the insulating medium exhibits a thermally induced degradation trend.

[0014] Furthermore, the main control unit performs a logical-physical dual-dimensional verification. The main control unit receives the physical grounding loop current signal and the buzzer drive pulse width modulation signal collected by the signal probe component. For the buzzer drive pulse width modulation signal, envelope detection is performed to filter out the carrier component and extract the signal characteristic frequency; if the signal characteristic frequency falls within a preset alarm frequency range, the logical state is marked as an alarm state; otherwise, it is marked as a silent state. For the physical grounding loop current signal, it is compared with a zero current threshold; if it is greater than the zero current threshold, the physical state is marked as a connected state; otherwise, it is marked as a disconnected state.

[0015] Furthermore, the main control unit uses a consistency check matrix to determine the fault type. When the physical state is disconnected and the logical state is silent, it is determined to be a missed fault; when the physical state is connected and the logical state is alarm, it is determined to be a false alarm fault; when the physical state is disconnected and the logical state is alarm, it is determined to be an effective protection state; when the physical state is connected and the logical state is silent, it is determined to be a normal operating state.

[0016] Furthermore, the main control unit performs priority-weighted decision-making based on the three-dimensional quality feature vector. First, it checks the consistency verification result code. If it indicates a missed fault or a false fault, it directly determines the PDU under test as a functionally faulty product and generates a functional safety blocking command. If it indicates normal operation or effective protection, it further evaluates the transient dynamic impedance value and leakage current thermal sensitivity factor. Only when the transient dynamic impedance value is less than the reference impedance threshold and the leakage current thermal sensitivity factor is less than the thermal stability reference threshold is the PDU under test determined to be a high-quality finished product.

[0017] Furthermore, the main control unit performs data traceability recording. For products determined to have contact connection defects, the original voltage drop waveform is associated with the product serial number; for products determined to have insulation defects, the leakage current time evolution curve is associated with the product serial number. The main control unit uploads the associated test record containing the original waveform data to the engineering traceability database.

[0018] This invention provides a detection system for PDU quality inspection. It has the following advantages: 1. This invention rapidly switches to high-voltage testing mode during the thermal relaxation time after the step current excitation ends, and uses the local Joule heat generated by the abnormal contact resistance point as the physical excitation condition for insulation testing. This can detect hidden defects that cannot be found by conventional cold testing, and the thermal stability deterioration of the insulation medium caused by local temperature rise due to poor micro-contact, thereby helping to identify potential thermal breakdown hazards.

[0019] 2. This invention achieves synchronous verification of the physical connection layer and firmware logic layer of the device under test by constructing a two-dimensional consistency verification matrix of physical grounding loop signal and logic alarm signal. It can accurately distinguish between physical hardware faults (such as open circuits) and firmware logic judgment errors (such as false alarms or missed alarms), which helps to solve the problem that single physical detection cannot verify the correctness of logic function and improves the accuracy of fault attribution.

[0020] 3. This invention constructs a multi-dimensional quality characteristic model by integrating transient dynamic impedance values, leakage current thermal sensitivity factors, and logic consistency verification results, and adopts a safety logic veto mechanism. This decision logic based on multi-source data fusion enables multi-faceted quantitative evaluation of PDU products from electrical connection reliability and insulation material thermal stability to functional logic safety, which helps to intercept composite defective products from flowing into subsequent processes. Attached Figure Description

[0021] Figure 1 This is a hardware topology and functional module interaction architecture diagram of the detection system according to an embodiment of the present invention; Figure 2 This is a flowchart illustrating the timing and state machine transitions of the full-process collaborative control in an embodiment of the present invention. Figure 3 This is a schematic diagram of the multidimensional comprehensive quality decision-making logic in an embodiment of the present invention. Detailed Implementation

[0022] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] Please see the appendix Figure 1 The present invention provides a testing system for PDU quality inspection, which includes a main control unit, a programmable AC load cell, a high voltage withstand voltage test unit, a multi-channel high frequency data acquisition card, and a signal probe assembly.

[0024] The main control unit establishes communication connections with the programmable AC load cell, the high-voltage withstand voltage test unit, and the multi-channel high-frequency data acquisition card via an industrial control bus. This connection is used to send control commands and receive feedback data. The programmable AC load cell is configured to establish electrical connections with the L1, L2, and L3 output terminals of the PDU under test (DUT), applying a specific timing load current to the DUT according to the instructions from the main control unit. The high-voltage withstand voltage test unit is configured to connect to the DUT's component housing and grounding terminal, applying a high-voltage test voltage and measuring the loop leakage current. The signal probe assembly physically contacts the buzzer driver pin inside the DUT and the housing grounding point, transmitting the acquired physical signals to the multi-channel high-frequency data acquisition card. The multi-channel high-frequency data acquisition card is configured to acquire voltage, current, and logic level signals in real time at a preset sampling frequency, transmitting the digitized sampled data to the main control unit.

[0025] The main control unit is equipped with a logic self-test and phase initialization module, a thermal accumulation excitation control module, a dielectric loss trend analysis module, and a logic-physical dual-dimensional verification module.

[0026] The logic self-test and phase initialization module is configured to acquire the steady-state voltage and current values ​​of each phase of the PDU under test via a multi-channel high-frequency data acquisition card during system power-up, and simultaneously read the firmware status register data of the microcontroller inside the PDU under test. The module then logically compares the acquired steady-state voltage and current values ​​with the alarm flag bits in the firmware status register. When the steady-state voltage value of a certain phase is detected to be within the normal power supply range and the steady-state current value is below the minimum operating threshold, the module verifies whether the corresponding alarm flag bit in the firmware status register is set. Only when the physically measured on / off state is completely consistent with the logical state of the firmware status register does the module generate an unlock command, allowing the system to proceed to the subsequent testing process.

[0027] The thermal accumulation excitation control module is configured to send a step current pulse control command to the programmable AC load machine after the logic self-test passes. This command instructs the programmable AC load machine to apply a step current with a specific amplitude to a designated circuit of the PDU under test. The duration of this step current is set sufficient to induce Joule thermal accumulation at the point of abnormal contact resistance. The thermal accumulation excitation control module receives the transient waveform of the circuit voltage from the multi-channel high-frequency data acquisition card and extracts the voltage drop amplitude and voltage recovery time.

[0028] The thermal accumulation excitation control module is further configured to calculate the transient dynamic impedance value based on the acquired transient waveform data. The calculation logic for the transient dynamic impedance value is as follows: obtain the steady-state voltage reference value before the load step trigger and the lowest voltage extreme point during the load step response process; calculate the difference between the steady-state voltage reference value and the lowest voltage extreme point; divide this difference by the applied step current amplitude to obtain the transient dynamic impedance value. The thermal accumulation excitation control module compares the calculated transient dynamic impedance value with a preset reference impedance threshold. If the transient dynamic impedance value exceeds the reference impedance threshold, it is determined that the circuit has a high impedance defect.

[0029] The dielectric loss trend analysis module is configured to send a high-voltage test start command to the high-voltage withstand voltage test unit within the thermal relaxation time window after the thermal accumulation excitation control module completes the application of the step current pulse. The dielectric loss trend analysis module controls the high-voltage withstand voltage test unit to apply a 3,000-volt test voltage to the component casing of the PDU under test, and continuously acquires the instantaneous value sequence of leakage current flowing through the casing grounding loop through a multi-channel high-frequency data acquisition card.

[0030] The dielectric loss trend analysis module is further configured to calculate a leakage current thermal sensitivity factor to assess the stability of the insulating dielectric under thermal stress. The calculation logic for the leakage current thermal sensitivity factor is as follows: the leakage current value corresponding to the initial sampling time after the withstand voltage test has stabilized is selected as the initial leakage current; the leakage current value corresponding to the sampling time before the end of the withstand voltage test is selected as the final leakage current; the difference between the final leakage current and the initial leakage current is calculated, and this difference is divided by the time difference between the final sampling time and the initial sampling time. The dielectric loss trend analysis module determines whether the calculated leakage current thermal sensitivity factor is greater than zero. If the leakage current thermal sensitivity factor is greater than zero, it indicates that the leakage current shows an increasing trend over time, and the dielectric loss trend analysis module generates a judgment result indicating thermal stability failure.

[0031] The logic-physical dual-dimensional verification module is configured to receive the physical grounding loop current signal and the buzzer drive pulse width modulation signal collected by the signal probe component. The module performs envelope detection and frequency analysis on the buzzer drive pulse width modulation signal to extract its characteristic frequency. When the signal characteristic frequency falls within a preset alarm frequency range, the module marks the logic state as alarm state; otherwise, it marks it as silent state. Simultaneously, the module determines whether the physical grounding loop current signal is greater than zero. If it is, the module marks the physical state as connected; otherwise, it marks it as disconnected.

[0032] The logical-physical dual-dimensional verification module internally stores a consistency verification matrix, which is used to determine the fault type based on the combination of physical and logical states. When the physical state is marked as disconnected and the logical state is marked as silent, the logical-physical dual-dimensional verification module determines it as a missed fault; when the physical state is marked as connected and the logical state is marked as alarm, the logical-physical dual-dimensional verification module determines it as a false alarm fault; only when the physical state is marked as disconnected and the logical state is marked as alarm, or when the physical state is marked as connected and the logical state is marked as silent, does the logical-physical dual-dimensional verification module determine that the grounding function verification has passed.

[0033] The main control unit is configured to summarize the output results of the logic self-test and phase initialization module, the thermal accumulation excitation control module, the dielectric loss trend analysis module, and the logic-physical dual-dimensional verification module, and generate comprehensive quality data including transient dynamic impedance value, leakage current thermal sensitivity factor, and logic-physical verification status. Based on the comprehensive quality data, it controls whether the PDU under test enters the finished product assembly process.

[0034] The main control unit contains a logic self-test and phase initialization module, a thermal accumulation excitation control module, a dielectric loss trend analysis module, and a logic-physical dual-dimensional verification module.

[0035] The logic self-test and phase initialization module is configured to perform heterogeneous data mapping between firmware state and physical state. It retrieves the status register data of the microcontroller inside the power distribution unit under test via the communication interface and parses the alarm flag bits, metering parameter register values, and phase on / off status bits from the status register data. Simultaneously, the module receives physical voltage and current values ​​acquired by a multi-channel high-frequency data acquisition card. Internally, the module maintains a state truth table that defines the legal combinations of physical power supply states and logical alarm states.

[0036] The logic self-test and phase initialization module defines a physical open circuit state as the physical current value being below the minimum operating threshold, and a physical closed circuit state as the physical voltage value being within the rated range and the physical current value being within the rated operating range. The module iterates through the L1, L2, and L3 output terminals of the power distribution unit under test. For each output terminal, the module compares whether the physical open circuit state corresponds to the alarm set state in the status register data, and whether the physical closed circuit state corresponds to the normal operation state in the status register data. Only when the physical and logical states of all phases match as a valid combination in the status truth lookup table, the module generates a global test enable signal and transmits it to the thermal accumulation excitation control module; otherwise, it generates a logic self-test failure interrupt signal and locks the system flow.

[0037] The thermal accumulation excitation control module is configured to perform active stress excitation control based on the Joule heating effect. Internally, the thermal accumulation excitation control module includes a pulse sequence generation subunit and a transient feature extraction subunit. The pulse sequence generation subunit is configured to generate a step current control sequence containing specific pulse amplitude, pulse width, and current ramp-up rate based on the rated power parameters of the power distribution unit under test, and send the step current control sequence to the programmable AC load machine. The step current control sequence is configured to generate a non-steady-state thermal accumulation effect at the conductive loop contact points of the power distribution unit under test.

[0038] The transient feature extraction subunit is configured to trigger the high-speed sampling function of the multi-channel high-frequency data acquisition card at the synchronization moment when the programmable AC load machine executes the step current control sequence. The transient feature extraction subunit extracts voltage waveform segments before and after the load step moment from the voltage sampling data stream. It identifies the steady-state voltage reference value and the transient voltage minimum extreme point within the voltage waveform segment. The transient feature extraction subunit executes dynamic impedance calculation logic, calculating the difference between the steady-state voltage reference value and the transient voltage minimum extreme point, and dividing this difference by the current amplitude set in the step current control sequence to obtain the transient dynamic impedance value. The thermal accumulation excitation control module compares the transient dynamic impedance value with a preset reference impedance threshold to identify defects such as poor soldering or high contact resistance in the circuit.

[0039] The dielectric loss trend analysis module is configured to perform insulation performance evaluation during the thermal relaxation window after the thermal accumulation excitation control module completes its operation. The module monitors the execution status of the thermal accumulation excitation control module. Once it detects that the step current control sequence has been completed, the module immediately sends a high-voltage output command to the high-voltage withstand voltage test unit and initiates leakage current monitoring when the output voltage of the high-voltage withstand voltage test unit stabilizes.

[0040] The dielectric loss trend analysis module integrates a differential trend calculation subunit. This subunit is configured to process leakage current time-series data uploaded by the multi-channel high-frequency data acquisition card in real time. It selects the leakage current values ​​at the start and end of the withstand voltage test cycle, calculates the difference between these values, and divides this difference by the time interval between the start and end times to obtain the leakage current thermal sensitivity factor. The dielectric loss trend analysis module uses this leakage current thermal sensitivity factor to characterize the stability of the insulating medium under the thermal field generated by the early-stage thermal accumulation excitation control module. When the leakage current thermal sensitivity factor is positive, the module determines that the insulating medium exhibits a thermally induced degradation trend.

[0041] The logic-physical dual-dimensional verification module is configured to perform closed-loop verification of the grounding safety function of the power distribution unit under test. The control signal probe assembly of the logic-physical dual-dimensional verification module collects the current signal of the physical grounding loop and the drive signal of the alarm buzzer, respectively. The logic-physical dual-dimensional verification module integrates an envelope demodulation subunit, which performs envelope detection on the drive signal of the alarm buzzer, filters out high-frequency carrier components, and extracts the frequency and duty cycle characteristics of the modulated waveform.

[0042] The logic-physical dual-dimensional verification module matches the extracted frequency features with a preset alarm frequency range. If the frequency features fall within the preset alarm frequency range, the logic-physical dual-dimensional verification module determines the logical state to be alarm triggered; otherwise, it determines the logical silence state. Simultaneously, the logic-physical dual-dimensional verification module compares the current signal of the physical grounding loop with the zero current threshold. If the current signal is greater than the zero current threshold, the physical state is determined to be good grounding; otherwise, it is determined to be grounding open. The logic-physical dual-dimensional verification module outputs the verification result based on the combination of the physical and logical states: when determined to be grounding open and simultaneously determined to be logical silence, a missed fault signal is output; when determined to be good grounding and simultaneously determined to be logic alarm triggered, a false alarm fault signal is output.

[0043] This embodiment constructs a data processing flow architecture based on event-driven and parameter coupling to ensure that the physical effects and data calculation results generated in each testing phase can be accurately synchronized on the time axis.

[0044] The data stream originates from the multi-channel high-frequency data acquisition card and the microcontroller of the power distribution unit under test (PDU). During the initialization phase, the multi-channel high-frequency data acquisition card transmits the acquired basic voltage and basic current data streams for each phase to the logic self-test and phase initialization module in real time. Simultaneously, the logic self-test and phase initialization module reads the status bit data from the PDU microcontroller register via the serial communication bus. The logic self-test and phase initialization module performs real-time comparison of these two sets of heterogeneous data. Once the comparison passes, the logic self-test and phase initialization module generates a global test enable signal. This global test enable signal is unidirectionally transmitted to the thermal accumulation excitation control module, serving as the sole trigger for unlocking the system and initiating the high-energy excitation process.

[0045] Upon receiving the global test enable signal, the thermal accumulation excitation control module generates a step current control command and transmits it to the programmable AC load machine. Simultaneously, the multi-channel high-frequency data acquisition card transmits the high-frequency voltage transient waveform data stream from the loop port back to the thermal accumulation excitation control module. The internal processing unit of the thermal accumulation excitation control module processes this waveform data stream, calculates the transient dynamic impedance value, and stores it in the system's main register. Crucially, upon confirming the arrival of the falling edge of the step current pulse, the thermal accumulation excitation control module immediately generates a thermal excitation completion synchronization trigger signal. This signal bypasses the main controller's conventional polling queue and is directly transmitted to the dielectric loss trend analysis module via direct memory access or a high-priority interrupt channel.

[0046] The dielectric loss trend analysis module uses the thermal excitation completion synchronization trigger signal as the zero point of startup time. Within a microsecond delay of receiving this signal, the dielectric loss trend analysis module sends a high-voltage output enable command to the high-voltage withstand voltage test unit. Subsequently, the multi-channel high-frequency data acquisition card continuously transmits the microampere-level leakage current time series data stream acquired during the high-voltage withstand voltage test to the dielectric loss trend analysis module. The dielectric loss trend analysis module performs sliding window differentiation on the leakage current time series data stream to generate a leakage current thermal sensitivity factor, and transmits this factor to the decision data pool of the main control unit.

[0047] Meanwhile, the logic-physical dual-dimensional verification module operates independently on the parallel data channel. The signal probe component transmits the analog ground current signal of the physical circuit and the pulse-width modulated digital signal of the buzzer driver pin in parallel to the logic-physical dual-dimensional verification module. The logic-physical dual-dimensional verification module performs feature demodulation on the two signals respectively, generates physical connection status flag bits and logic alarm status flag bits, and transmits the final consistency verification result code to the decision data pool of the main control unit.

[0048] The central decision-making logic of the main control unit aggregates transient dynamic impedance values ​​from the thermal accumulation excitation control module, leakage current thermal sensitivity factors from the dielectric loss trend analysis module, and consistency verification result codes from the logic-physical dual-dimensional verification module. The main control unit performs a weighted matching of the parameters from these three dimensions with a preset quality fingerprint model. If all parameters conform to the acceptable range of the quality fingerprint model, the main control unit sends a finished product assembly release instruction to the production line control system; if any parameter exceeds the standard, the main control unit generates a blocking instruction containing specific fault dimensions and packages and uploads the associated raw waveform data to the engineering traceability database.

[0049] The thermal accumulation excitation control module is configured to execute a time-slice-based transient thermal stress excitation sequence. Internally, the thermal accumulation excitation control module includes a waveform synthesis unit that constructs a current control descriptor containing a pre-bias phase, a step rise phase, a thermal accumulation hold phase, and a fast turn-off phase based on the rated current parameters of the power distribution unit under test.

[0050] During the pre-bias phase, the thermal accumulation excitation control module sends a first current setting command to the programmable AC load machine. This command controls the programmable AC load machine to stabilize the loop current at a low pre-bias level. This low pre-bias level is set to a current value sufficient to establish a stable electrical connection between the relay contacts and the conductive copper busbars within the power distribution unit under test; typically, it is set to 5% to 10% of the rated current. The purpose of setting the pre-bias phase is to eliminate noise interference caused by mechanical contact jitter in subsequent transient measurements and to establish the sampling zero point of the steady-state voltage reference value.

[0051] During the step rise phase, the thermal accumulation excitation control module sends a transient trigger command to the programmable AC load. This command includes a target excitation current amplitude parameter and a current ramp-up rate parameter. Based on the current ramp-up rate parameter, the programmable AC load controls the conduction angle of its internal power transistor array, causing the loop current to linearly jump from a value associated with a small current pre-bias level to a value associated with the target excitation current amplitude in microseconds. The target excitation current amplitude is typically set to 110% to 150% of the rated current of the power distribution unit under test. The current ramp-up rate parameter is set to a high slope value to ensure a sufficiently detectable transient voltage response under the influence of the loop inductive component, while simulating the hot-plug inrush current under extreme operating conditions.

[0052] During the heat accumulation holding phase, the heat accumulation excitation control module controls the programmable AC load machine to maintain the target excitation current amplitude. The duration of the heat accumulation holding phase is strictly limited to a specific time window. The length of this time window is set according to the following principles: it must be greater than the thermal time constant required for the local temperature rise caused by the extremely small heat capacity at the contact resistance abnormality point, and it must be less than the time constant for the overall heat dissipation structure of the power distribution unit under test to reach thermal equilibrium, while it must also be less than the melting response time of the overcurrent protection device inside the power distribution unit under test. Within this duration, if there is a poor solder joint or oxidized contact surface in the circuit, according to Joule's law, the heat power generated at this point is equal to the square of the target excitation current amplitude multiplied by the contact resistance value at that point. Due to the extremely small mass of the defect point, this heat power will cause the temperature in the defect point area to rise rapidly during the heat accumulation holding phase, thereby establishing a local high-temperature thermal field in the insulating medium around the defect point.

[0053] During the rapid shutdown phase, the thermal accumulation excitation control module sends a shutdown command, controlling the programmable AC load machine to cut off the load current in a very short time. The falling edge of the rapid shutdown phase is marked by the thermal accumulation excitation control module as the thermal excitation completion time, which serves as the time reference zero point for the subsequent dielectric loss trend analysis module to initiate high-voltage testing. Through the timing control of the above four phases, the thermal accumulation excitation control module effectively excites the thermal stress of microscopic potential defects while ensuring the structural integrity of the power distribution unit under test.

[0054] This embodiment describes how the transient feature extraction subunit inside the thermal accumulation excitation control module accurately quantifies the dynamic connection quality of the circuit of the power distribution unit under test based on the raw waveform data fed back by the multi-channel high-frequency data acquisition card.

[0055] The transient feature extraction subunit is configured to maintain strict clock synchronization with the pulse sequence generation subunit. Within the microsecond-level time window of the programmable AC load machine executing the step current command, the transient feature extraction subunit directly addresses and reads the cache of the multi-channel high-frequency data acquisition card. The transient feature extraction subunit divides the voltage sampling data stream into two independent time series segments: a steady-state reference window and a transient response window.

[0056] The steady-state reference window corresponds to the time interval of the aforementioned pre-biasing stage. Within this interval, the power distribution unit under test is in a stable, low-current conduction state. The transient feature extraction subunit performs an arithmetic mean or median filtering operation on all voltage sampling points within the steady-state reference window to eliminate random electromagnetic noise interference, thereby obtaining a high-confidence steady-state voltage reference value. This steady-state voltage reference value characterizes the base potential level of the power distribution unit under test when it is not subjected to a large current surge.

[0057] The transient response window corresponds to the time interval between the step rise phase and the initial stage of the thermal accumulation and holding phase. During this interval, the loop current undergoes a drastic change. Due to the inherent parasitic inductance and resistance components in the circuit board traces, relay contacts, and connectors within the power distribution unit under test, the voltage waveform exhibits a downward transient drop. The transient feature extraction subunit executes an extreme value search algorithm within the transient response window, traversing each voltage sampling point, identifying and locking the sampling point with the minimum amplitude, and defining the voltage value of this sampling point as the lowest extreme value of the transient voltage.

[0058] After obtaining the steady-state voltage reference value and the transient voltage minimum extreme point, the transient feature extraction subunit performs a differential operation. The transient feature extraction subunit calculates the voltage sag difference obtained by subtracting the transient voltage minimum extreme point from the steady-state voltage reference value. This voltage sag difference directly reflects the voltage drop effect generated by the total circuit impedance at the moment of current change. Subsequently, the transient feature extraction subunit reads the target excitation current amplitude set by the pulse sequence generation subunit. The transient feature extraction subunit performs a division operation, dividing the voltage sag difference by the target excitation current amplitude, thereby calculating the transient dynamic impedance value.

[0059] The transient feature extraction subunit is further configured to execute impedance anomaly detection logic. Internally, the transient feature extraction subunit stores a preset reference impedance threshold, which is set based on statistical data measured from standard good products under the same test conditions. The transient feature extraction subunit compares the real-time calculated transient dynamic impedance value with the reference impedance threshold.

[0060] If the transient dynamic impedance value is less than or equal to the reference impedance threshold, the transient feature extraction subunit determines that the circuit connection is good and marks the impedance qualified status bit in the system register. If the transient dynamic impedance value is greater than the reference impedance threshold, the transient feature extraction subunit determines that there is an abnormal contact resistance increment in the circuit. This abnormal contact resistance increment usually corresponds to cold solder joints on the printed circuit board, oxide layers on relay contacts, or loose parts of crimp terminals. In this case, the transient feature extraction subunit not only records the impedance over-limit fault code but also generates a heat accumulation warning signal. This heat accumulation warning signal indicates to the subsequent dielectric loss trend analysis module that the current circuit defect point has accumulated Joule heat energy exceeding the normal level under the action of the just-ended high-current pulse. This heat energy is diffusing into the surrounding insulating medium, providing the necessary physical excitation conditions for the subsequent hot withstand voltage test.

[0061] This embodiment details how the thermal accumulation excitation control module utilizes the Joule heating effect at the physical level to transform microscopic defects at the electrical connection level into a thermodynamic anomaly state at the insulating dielectric level, thereby constructing the necessary physical excitation environment for the subsequent dielectric loss trend analysis module.

[0062] The thermal accumulation excitation control module establishes a conversion model between electrical and thermal energy based on Joule's law. During the thermal accumulation holding phase of the programmable AC load machine to maintain the target excitation current amplitude, each micro-segment of the conductive circuit inside the power distribution unit under test generates thermal power. For normally conductive sections with good welding quality and tight contact, their equivalent resistance is at an extremely low level, and the generated Joule heat can be quickly conducted to the environment through a large area of ​​copper foil or busbar, without forming obvious hot spots.

[0063] However, the physical mechanisms of high-impedance defects identified by the transient feature extraction subunit (such as solder joint cracks on printed circuit boards, oxide pits in relay contacts, or microscopic voids in crimp terminals) exhibit significant differences. First, the contact resistance of the defect is significantly higher than that of the normal conductive section; second, the defect is usually located at a microscopic interface, and its effective thermal capacity is much smaller than that of the macroscopic conductive components. Therefore, when a step current of the same amplitude flows through, the energy density at the defect location increases exponentially.

[0064] The thermal accumulation excitation control module utilizes this energy density difference to establish a localized, transient high-temperature heat source at the defect point. Because the duration of the thermal accumulation holding phase is extremely short, the heat generated by this high-temperature heat source does not have time to dissipate to the external environment through thermal convection or radiation; instead, it mainly diffuses to the adjacent physical medium through thermal conduction. In the physical structure of the power distribution unit under test, the physical medium adjacent to the conductive circuit is the insulating material, such as the glass fiber epoxy resin substrate of a printed circuit board, the polymer insulation layer of wires, or the insulating shell of a relay.

[0065] This thermal diffusion process leads to the formation of a non-uniformly distributed localized high-temperature field in the insulating medium region adjacent to the defect point. The dielectric physical properties of the insulating medium, especially the insulation resistivity and dielectric loss factor, exhibit a significant negative temperature coefficient. When the insulating medium is in a localized high-temperature field, the movement of its internal polymer chain segments intensifies, and the migration rate of impurity ions increases, resulting in a temporary degradation of the insulation performance in this region compared to the cold environment.

[0066] The thermal accumulation excitation control module defines this temporary degradation state as the thermal excitation latent state. This state is time-sensitive and is maintained by the thermal inertia of the insulating medium. When the programmable AC load machine performs a fast shutdown operation to cut off the circuit current, although the generation of Joule heating stops, the heat already transferred to the interior of the insulating medium does not dissipate immediately. The thermal accumulation excitation control module utilizes this physical phenomenon to maintain the power distribution unit under test in the thermal excitation latent state during the thermal relaxation window after the current is turned off. At this time, although the current is zero macroscopically, the insulating medium near the defect point is still in the active period of thermal stress microscopically. This provides a unique physical window for subsequent detection of the leakage current change trend of the insulation layer under thermal stress through a high-voltage electric field, realizing cross-physical field coupling from electrical defects to thermal anomalies to dielectric loss anomalies.

[0067] This embodiment details how the dielectric loss trend analysis module switches the system hardware topology from high-current load mode to high-voltage test mode within a very short time window after the thermal accumulation excitation control module completes its action, so as to ensure that the thermal excitation state of the insulating medium is not dissipated due to time delay.

[0068] The dielectric loss trend analysis module is configured to execute seamless switching logic based on nanosecond-level clock synchronization. At the physical level, the module controls a multiplexed high-voltage relay matrix located between the programmable AC load machine, the high-voltage withstand voltage test unit, and the power distribution unit under test. This multiplexed high-voltage relay matrix includes load-side isolation relay groups for carrying high currents and withstand-voltage access relay groups for carrying high voltages.

[0069] The dielectric loss trend analysis module integrates a switching sequence control subunit. This subunit monitors the thermal excitation completion synchronization trigger signal sent by the thermal accumulation excitation control module in real time. Upon the arrival of the rising edge of the thermal excitation completion synchronization trigger signal, the switching sequence control subunit immediately initiates an uninterrupted hard real-time switching task, which is strictly limited to execution within the thermal relaxation time window of the insulating medium.

[0070] The switching sequence control subunit first sends an electronic load shutdown command to the programmable AC load. This command controls the power MOSFET array inside the programmable AC load to enter a high-impedance cutoff state, thereby reducing the loop current to zero amperes within microseconds. Within the first system clock cycle after confirming the loop current is zero, the switching sequence control subunit sends a physical disconnect command to the load-side isolation relay group. This mechanical contact separation physically disconnects the programmable AC load from the power distribution unit under test. The purpose of this physical disconnect is to prevent subsequent high-voltage test voltages from reverse-pathfinder breakdown of the programmable AC load's low-voltage control circuitry, and to eliminate the capacitive shunt effect of the parallel capacitors inside the load on leakage current measurement.

[0071] After the safe dead time following the complete disconnection of the load-side isolation relay group, the switching sequence control subunit immediately sends a high-voltage pre-charge command to the high-voltage withstand voltage test unit and simultaneously sends a closing command to the withstand voltage-side access relay group. The withstand voltage-side access relay group performs a closing action, connecting the high-voltage output terminal of the high-voltage withstand voltage test unit to the L1, L2, and L3 phase output terminals of the power distribution unit under test, while simultaneously connecting the return current terminal of the high-voltage withstand voltage test unit to the component housing of the power distribution unit under test.

[0072] The dielectric loss trend analysis module, through the aforementioned timing control, ensures that the time interval between the current cutoff by the thermal accumulation excitation control module and the establishment of the test voltage by the high-voltage withstand voltage test unit is less than the thermal time constant of the insulating material. This time interval is defined as the thermal-withstand voltage switching delay time. The dielectric loss trend analysis module optimizes the relay action timing to control the thermal-withstand voltage switching delay time to the millisecond level. During this delay time, although no new Joule heat is generated inside the power distribution unit under test, the local high-temperature field established near the defect point has not yet undergone significant thermal diffusion and cooling due to the thermal resistance characteristics of the insulating medium. Therefore, when a high-voltage electric field is applied across the insulating medium, the insulating medium remains in a thermally excited latent state, and its internal electric dipole polarization behavior and carrier migration behavior are still controlled by the local high-temperature field, thus ensuring that subsequent leakage current data can accurately reflect the dielectric loss characteristics under thermal stress.

[0073] This embodiment details how the differential trend calculation subunit integrated within the dielectric loss trend analysis module performs in-depth analysis of leakage current data during high-voltage withstand voltage testing to identify the dynamic evolution characteristics of the insulating medium under thermal stress.

[0074] The differential trend calculation subunit is configured to establish a high-speed data stream connection with the analog-to-digital conversion channel of the multi-channel high-frequency data acquisition card. During the entire test cycle after the output voltage of the high-voltage withstand voltage test unit is established, the differential trend calculation subunit continuously reads the instantaneous value of the leakage current flowing through the grounding loop of the power distribution unit under test at a fixed sampling frequency, and constructs a leakage current time series dataset in memory.

[0075] The differential trend calculation subunit is configured to perform time-domain segmentation on the leakage current time series dataset, dividing it into a polarization establishment interval and a thermal response monitoring interval. The polarization establishment interval corresponds to the brief period at the initial stage of voltage application. During this interval, the electric dipoles inside the insulating dielectric undergo polarization reversal, and the distributed capacitance of the line charges, resulting in a rapid decay of the leakage current. The differential trend calculation subunit is configured to automatically shield the sampling data within the polarization establishment interval to eliminate interference from normal dielectric polarization current and capacitor charging current on the thermal stability assessment.

[0076] The thermal response monitoring interval follows the polarization establishment interval and covers the remaining withstand voltage test duration. The differential trend calculation subunit performs linear regression analysis or two-point difference operation within the thermal response monitoring interval. The differential trend calculation subunit selects the initial leakage current value corresponding to the initial sampling time of the thermal response monitoring interval, and the final leakage current value corresponding to the final sampling time of the thermal response monitoring interval.

[0077] The differential trend calculation subunit executes the calculation logic for the leakage current thermal sensitivity factor. Specifically, the differential trend calculation subunit calculates the current increment obtained by subtracting the initial leakage current value from the final leakage current value. Subsequently, the differential trend calculation subunit calculates the time interval obtained by subtracting the initial sampling time from the final sampling time. The differential trend calculation subunit divides the current increment value by the time interval value to obtain the leakage current thermal sensitivity factor, which characterizes the rate of change of leakage current over time.

[0078] The differential trend calculation subunit uses the polarity and absolute value of the leakage current thermal sensitivity factor to characterize the thermal stability of the insulating medium. In an ideal insulation structure, even under a high-voltage electric field, the leakage current should remain constant or exhibit a slight negative growth trend due to continuous polarization effects (i.e., the current decreases with time). However, if the preceding thermal accumulation excitation control module excites a local thermal field in the loop, and this thermal field is located near a weak point in the insulation, the thermal stress will cause the conductivity of the insulating material to increase nonlinearly with increasing temperature.

[0079] Under this thermo-electric coupling condition, if the leakage current thermal sensitivity factor calculated by the differential trend calculation subunit is positive, it indicates that the leakage current shows an increasing trend over time under a constant test voltage. The differential trend calculation subunit identifies this positive slope characteristic as a signal of thermally induced insulation degradation. This signal reflects the phenomenon of enhanced thermionic emission or increased ion mobility induced by local high temperature occurring inside the insulating medium, which is an early precursor to thermal breakdown. The differential trend calculation subunit transmits the calculated leakage current thermal sensitivity factor to the main control unit in real time as a key quantitative indicator for determining whether there are hidden insulation defects in the power distribution unit under test.

[0080] This embodiment describes how the dielectric loss trend analysis module calculates the quantitative indicators of the sub-unit output based on the differential trend, and makes a final qualification decision on the insulation health status of the power distribution unit.

[0081] The dielectric loss trend analysis module is internally equipped with a threshold comparator and a logic decision subunit. The logic decision subunit receives the leakage current thermal sensitivity factor calculated in real time by the differential trend calculation subunit. The logic decision subunit compares the leakage current thermal sensitivity factor with a preset thermal stability reference threshold. The thermal stability reference threshold is usually set to zero or a very small positive number to tolerate the inherent white noise floor of the measurement system.

[0082] When the leakage current thermal sensitivity factor is less than or equal to the thermal stability reference threshold, the logic decision subunit identifies the time evolution characteristic of the leakage current as either decaying or steady-state. The dielectric loss trend analysis module interprets this characteristic as follows: after experiencing the current surge applied by the thermal accumulation excitation control module, the insulating dielectric of the power distribution unit under test does not form a thermal failure point within its physical structure that would cause a positive feedback increase in conductivity. At this time, the current flowing through the insulation layer is mainly dominated by the absorption current generated by the dielectric polarization effect, and the absorption current naturally decays with the passage of time. Based on this physical phenomenon, the dielectric loss trend analysis module determines that the power distribution unit under test has passed the hot withstand voltage test and generates a thermal stability qualification mark.

[0083] When the leakage current thermal sensitivity factor is significantly greater than the thermal stability reference threshold, the logic decision subunit identifies the time evolution characteristics of the leakage current as divergent or creeping. The dielectric loss trend analysis module interprets this characteristic as follows: the Joule heat generated at the abnormal contact resistance point in the previous step has successfully diffused to the adjacent insulating medium, and this local high temperature causes a nonlinear decrease in the volume resistivity of the insulating medium.

[0084] Specifically, a positive leakage current thermal sensitivity factor indicates that the growth rate of the carrier migration current generated by thermal excitation has exceeded the decay rate of the polarization absorption current. This anomalous current surge is an early physical characteristic of thermal breakdown in the insulating material, meaning that if the high voltage continues or the load is increased, this localized area will likely evolve into a permanent carbonization channel. Based on this judgment logic, the dielectric loss trend analysis module immediately generates a thermal stability failure fault code and simultaneously triggers a high-voltage cutoff command to protect the sample under test from complete burnout, thereby achieving non-destructive interception of potential insulation hazards caused by poor soldering.

[0085] The logic and physical dual-dimensional verification module controls the signal probe assembly to perform actions, enabling the physical grounding detection probe to establish physical contact with the grounding point of the metal casing of the power distribution unit under test, and the logic signal extraction probe to pierce the insulating coating of the printed circuit board and connect to the alarm buzzer driver or the microcontroller alarm signal test point.

[0086] The logic-physical dual-dimensional verification module includes parallel physical signal conditioning channels and logic signal conditioning channels. The physical signal conditioning channel connects a precision shunt resistor and an instrumentation amplifier in series. In grounding test mode, the physical grounding detection probe and the housing of the power distribution unit under test form a physical grounding loop. The instrumentation amplifier amplifies the voltage drop signal flowing through the precision shunt resistor and transmits it to the first analog input channel of the multi-channel high-frequency data acquisition card.

[0087] The logic signal conditioning channel input is equipped with a high-impedance buffer circuit with megaohm-level input impedance to achieve non-invasive signal extraction. A voltage clamping protection circuit and a level conversion circuit are cascaded at the back end of this channel to map the original drive signal to a standard range before transmitting it to the second analog input channel of the multi-channel high-frequency data acquisition card. The multi-channel high-frequency data acquisition card performs synchronous sampling on the first and second analog input channels at a sampling rate no less than ten times the carrier frequency of the alarm buzzer, acquiring a strictly time-aligned physical ground loop current sequence and alarm drive voltage sequence.

[0088] The logic-physical dual-dimensional verification module processes the instantaneous value sequence of the buzzer drive voltage through the envelope demodulation subunit, extracting baseband logic features from the pulse width modulation or carrier signal. The envelope demodulation subunit first performs absolute value digital rectification on the voltage sampling points, and then uses a moving average filtering algorithm for low-pass filtering. The sliding time window length is set to be greater than five times the period corresponding to the audio carrier frequency to obtain a smooth voltage envelope waveform.

[0089] The envelope demodulation subunit performs hysteresis comparison on the voltage envelope waveform. It outputs a high level when the envelope amplitude exceeds the first trigger threshold voltage and a low level when it falls below the second trigger threshold voltage (less than the first trigger threshold voltage), thus generating a debouncing square wave pulse sequence. The logic-physical dual-dimensional verification module calculates the envelope characteristic frequency and envelope duty cycle of this square wave pulse sequence and matches them with a pre-stored alarm mode feature library. If the envelope characteristic frequency falls within a preset alarm range and the amplitude meets the standard, it is determined to be in an alarm triggered state; if it remains below the second trigger threshold voltage, it is determined to be in a logic silent state.

[0090] The logic-physical dual-dimensional verification module constructs a two-dimensional consistency verification matrix based on the physical grounding status (connected / disconnected) and the logical feedback status (alarm / silent), and outputs a decision code according to the status combination: Normal operating state: Corresponds to the physical connection state and logical silence state. This indicates that the grounding loop has low resistance and conduction and the monitoring firmware does not trigger false alarms, thus the function is deemed qualified.

[0091] Effective protection status: Corresponds to the physical disconnection state and the logic alarm triggered state. This indicates that under simulated ground fault conditions, the monitoring system correctly identifies and triggers the alarm, thus determining that the function is qualified.

[0092] False alarm fault state: Corresponds to the physical connection state but the logic alarm is triggered. It indicates that the physical grounding is good, but the internal detection circuit drifts or the threshold is abnormal, resulting in a false alarm and generating a fault lockout command.

[0093] Missed fault status: corresponds to a physically disconnected state but a logically silent state. This indicates that the system failed to execute an alarm action when grounding protection was lost, constituting a serious safety failure. The module generates a highest-priority blocking command and forces a shutdown for review.

[0094] The main control unit writes the verification results into the production traceability database based on the above code, and controls the automated sorting mechanism to remove and classify products that are falsely reported or missed.

[0095] Please see the appendix Figure 2 The main control unit, acting as the time scheduling core, controls each module to execute tests according to the following timing sequence. (See attached document.) Figure 2 Each flowchart is a simplified abbreviation of the control flow in this embodiment. T0 represents the start time of system power-on initialization; T1 represents the time when the logic self-test and phase initialization module generates the global test enable signal; T2 represents the time when the step current is quickly turned off and the thermal excitation completion synchronization trigger signal is generated; T3 represents the time when the high voltage withstand voltage test unit completes high voltage establishment and enters the insulation thermal stability evaluation state; T4 represents the time when the leakage current trend monitoring stage ends and the high voltage output is turned off; T5 represents the time when the logic and physical dual-dimensional verification is completed, the main control unit generates the quality judgment report and resets the system state machine.

[0096] During the system power-on initialization phase (T0-T1): the logic self-test and phase initialization module controls the data acquisition card to establish a physical connection and performs heterogeneous data mapping. This heterogeneous data mapping involves converting and comparing physical sampled values ​​with logic status flag bits. When the physical on / off state and the logic alarm perfectly match, a global test enable signal is generated at time T1, and the system state machine transitions from the idle waiting state to the thermal stress excitation state.

[0097] Thermal accumulation excitation stage (T1-T2): The thermal accumulation excitation control module drives the programmable AC load machine to output a current sequence including pre-bias, step rise, and hold. The transient feature extraction subunit synchronously calculates the transient dynamic impedance value. Time T2 is the moment of rapid current turn-off, and a synchronous trigger signal for the completion of thermal excitation is generated, marking that the insulating medium has entered the thermal excitation latent state.

[0098] Thermal-withstand voltage switching dead time (T2-T3): The dielectric loss trend analysis module performs hardware topology reconstruction within a millisecond time slot, first disconnecting the load-side isolation relay group, and then closing the withstand voltage-side connection relay group after confirming that the arc has been extinguished. Time T3 marks the establishment of high voltage, and the system enters the insulation thermal stability evaluation state.

[0099] Leakage current trend monitoring phase (T3-T4): The dielectric loss trend analysis module maintains a constant high voltage. The differential trend calculation subunit establishes shielded polarization and calculates the leakage current thermal sensitivity factor within the thermal response monitoring interval. If a positive feedback upward trend is detected in the leakage current thermal sensitivity factor, the high voltage output is terminated early and a thermal stability fault is reported; if no positive feedback upward trend is detected, the high voltage is shut off at time T4, and the system transitions to a grounding safety verification state.

[0100] The logic-physical dual-dimensional verification phase (T4-T5): The logic-physical dual-dimensional verification module drives the probe to perform invasive contact, simulating a physical circuit breaker condition. The envelope demodulation subunit extracts the characteristic frequency of the alarm signal, and the module determines the combination of physical and logical states based on the consistency check matrix.

[0101] End of process (T5): The main control unit collects transient dynamic impedance values, leakage current thermal sensitivity factors and consistency verification result codes, generates a quality judgment report and resets the system state machine.

[0102] Please see the appendix Figure 3 The main control unit aggregates data at the test endpoint and constructs a quality decision-making model based on multi-source heterogeneous data. (Appendix) Figure 3 Each flowchart is a simplified abbreviation of the overall quality judgment process in this embodiment.

[0103] Decision data temporary storage: The main control unit is equipped with a decision data buffer pool, which is used to temporarily store transient dynamic impedance values, leakage current thermal sensitivity factors, and consistency verification result codes.

[0104] Data feature vectorization: The main control unit receives the transient dynamic impedance value, the leakage current thermal sensitivity factor and the consistency verification result code, and encapsulates the transient dynamic impedance value, the leakage current thermal sensitivity factor and the consistency verification result code into a three-dimensional quality feature vector.

[0105] Quality model mapping: The main control unit maps the three-dimensional quality feature vector to the standard quality feature model and its corresponding qualified solution space to determine whether the parameters of each dimension are within the qualified range.

[0106] Priority-weighted decision: Level 1 Decision (Security Logic): Prioritizes checking the consistency verification result code. If a false or missed fault is detected, it is directly determined as a functional logic failure and a blocking instruction is generated (one-vote veto).

[0107] Secondary judgment (parameter evaluation): If the logic verification is qualified, the physical parameters are further evaluated. If the transient dynamic impedance value exceeds the standard, a poor contact fault code is generated; if the leakage current thermal sensitivity factor exceeds the standard, an insulation hazard fault code is generated; if both the transient dynamic impedance value and the leakage current thermal sensitivity factor exceed the standard, or if the consistency verification result code and at least one physical parameter indicate an anomaly at the same time, it is determined that multiple parameters exceed the standard at the same time, corresponding to a composite quality defect.

[0108] Execution and sorting: Qualified product: The three-dimensional quality feature vector completely falls into the qualified solution space, and a release instruction is sent to the production line.

[0109] Defective products: For any non-conforming situation, a sorting interception instruction is sent, driving the mechanical mechanism to move the product into the rework buffer area; for situations where multiple parameters exceed the standard at the same time, a composite quality defect identifier is written into the sorting interception instruction.

[0110] Deep data traceability: The main control unit will associate the original waveform data that caused the fault (such as the voltage drop waveform corresponding to the contact defect and the leakage current evolution curve corresponding to the insulation defect) with the product serial number, package them, and upload them to the engineering traceability database to provide quantitative basis for process improvement.

Claims

1. A detection system for PDU quality inspection, characterized in that, Including the main control unit, The main control unit is connected to the programmable AC load cell, the high voltage withstand voltage test unit, the multi-channel high frequency data acquisition card, and the signal probe assembly. The programmable AC load cell is connected to the output terminal of the PDU under test to apply a step current, the high voltage withstand test unit is connected to the housing to apply a test voltage, and the signal probe assembly contacts the buzzer drive pin and the housing grounding point to collect physical signals. The main control unit controls the application of a step current and calculates the transient dynamic impedance value based on the voltage transient waveform to detect contact defects; The main control unit initiates a high-voltage test within the thermal relaxation time after the step current is applied, and calculates the leakage current thermal sensitivity factor based on the leakage current instantaneous value sequence to evaluate the insulation stability under thermal stress. The main control unit determines the consistency between the physical grounding state and the logical alarm state based on the collected signals, and summarizes the transient dynamic impedance value, the leakage current thermal sensitivity factor and the consistency determination result to generate comprehensive quality data. The main control unit includes: A thermal accumulation excitation control module is used to construct a current control descriptor, which includes a pre-bias stage, a step rise stage, a thermal accumulation holding stage, and a fast turn-off stage. During the pre-biasing phase, the control stabilizes the loop current at a low current pre-biasing level. During the step rise phase, the control loop current jumps to the target excitation current amplitude at a set current ramp rate. During the heat accumulation and holding stage, the target excitation current amplitude is controlled and maintained to establish a local high-temperature thermal field at the point of abnormal contact resistance. During the rapid shutdown phase, the load current is cut off and a thermal excitation completion synchronization trigger signal is generated.

2. The detection system for PDU quality inspection according to claim 1, characterized in that, The main control unit includes: The logic self-test and phase initialization module is used to acquire the steady-state voltage and steady-state current values ​​of each phase of the PDU under test through the multi-channel high-frequency data acquisition card during the system power-on phase, and to read the firmware status register data of the microcontroller inside the PDU under test. The logic self-test and phase initialization module is also used to verify whether the on / off state of the physical measurement is consistent with the alarm flag bit in the firmware status register data. The logic self-test and phase initialization module generates a global test enable signal only when the physical state and logic state of all phases match a valid combination.

3. The detection system for PDU quality inspection according to claim 1, characterized in that, The thermal accumulation excitation control module is used to execute the calculation logic of the transient dynamic impedance value: Obtain the steady-state voltage reference value before load step triggering and the lowest voltage extreme point during the load step response process. Calculate the difference between the steady-state voltage reference value and the lowest voltage extreme point. Divide the difference by the target excitation current amplitude to obtain the transient dynamic impedance value. The transient dynamic impedance value is compared with a preset reference impedance threshold. If the transient dynamic impedance value exceeds the reference impedance threshold, it is determined that the circuit has a high impedance defect.

4. The detection system for PDU quality inspection according to claim 1, characterized in that, The main control unit includes a dielectric loss trend analysis module: The dielectric loss trend analysis module is used to monitor the thermal excitation completion synchronization trigger signal and perform hardware topology reconstruction within the thermal relaxation window period after the thermal accumulation excitation control module completes its action. The dielectric loss trend analysis module is also used to send a physical disconnect command to the load-side isolation relay group to cut off the electrical connection between the programmable AC load machine and the PDU device under test; After confirming that the load-side isolation relay group is disconnected, a closing command is sent to the withstand voltage-side access relay group to connect the high-voltage withstand voltage test unit to the PDU device under test, ensuring that the insulating medium is subjected to high-voltage testing in the thermally excited latent state.

5. The detection system for PDU quality inspection according to claim 4, characterized in that, The dielectric loss trend analysis module is used to execute the calculation logic of the leakage current thermal sensitivity factor: Select the starting leakage current corresponding to the initial sampling time after the withstand voltage test stabilizes, and the ending leakage current corresponding to the ending sampling time before the withstand voltage test ends. Calculate the current increment value obtained by subtracting the starting leakage current from the ending leakage current, and calculate the time interval value obtained by subtracting the starting sampling time from the ending sampling time. Divide the current increment value by the time interval value to obtain the leakage current thermal sensitivity factor; if the leakage current thermal sensitivity factor is greater than zero, it is determined that the insulating medium has a thermally induced degradation trend.

6. The detection system for PDU quality inspection according to claim 1, characterized in that, The main control unit also includes a logical and physical dual-dimensional verification module: The logic-physical dual-dimensional verification module is used to receive the physical grounding loop current signal and the buzzer drive pulse width modulation signal collected by the signal probe component, perform envelope detection on the buzzer drive pulse width modulation signal, filter out the carrier component and extract the signal characteristic frequency. If the signal characteristic frequency falls within the preset alarm frequency range, the logic state is marked as alarm state; otherwise, it is marked as silent state. Compare the physical grounding loop current signal with the zero current threshold; if the physical grounding loop current signal is greater than the zero current threshold, mark the physical state as connected, otherwise mark it as disconnected.

7. The detection system for PDU quality inspection according to claim 6, characterized in that, The logical-physical dual-dimensional verification module uses a consistency verification matrix to determine the fault type: When the physical state is marked as disconnected and the logical state is marked as silent, it is determined to be a missed fault. When the physical state is marked as connected and the logical state is marked as alarm, it is determined to be a false alarm fault. When the physical state is marked as disconnected and the logical state is marked as alarm, it is determined to be an effective protection state; When the physical state is marked as connected and the logical state is marked as silent, it is determined to be in normal operating state.

8. The detection system for PDU quality inspection according to claim 7, characterized in that, The main control unit is used to receive the transient dynamic impedance value, the leakage current thermal sensitivity factor, and the consistency verification result code from the logic-physical dual-dimensional verification module, and encapsulate the transient dynamic impedance value, the leakage current thermal sensitivity factor, and the consistency verification result code into a three-dimensional quality feature vector. The main control unit is used to perform priority-weighted decision-making: First, check the consistency verification result code. If it indicates a missed fault or a false fault, directly determine that the PDU device under test is a functional logic failure and generate a functional safety blocking command. If the system indicates normal operation or effective protection, further evaluate the transient dynamic impedance value and the leakage current thermal sensitivity factor. The PDU under test is determined to be a high-quality finished product only when the transient dynamic impedance value is less than the reference impedance threshold and the leakage current thermal sensitivity factor is less than the thermal stability reference threshold.

9. The detection system for PDU quality inspection according to claim 1, characterized in that, The main control unit executes data traceability records as follows: For products identified as having contact connection defects, the original voltage drop waveform collected by the main control unit is associated with the product serial number; For products identified as having insulation defects, the leakage current time evolution curve collected by the main control unit is associated with the product serial number. The main control unit is used to upload the associated test records containing the original waveform data to the engineering traceability database.

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