X-ray flat panel detector interference suppression method and apparatus

Abstract

This invention relates to the field of flat panel detector technology, and discloses a method and apparatus for suppressing interference in an X-ray flat panel detector. The method includes: in response to a change in the magnetic field outside a shielding cover, an induced electromotive force is generated in the first coil of an interference pickup circuit, and a first signal is output; the shielding cover is disposed around the readout chip; the first signal is received using an amplifier circuit, and amplified based on a pre-configured gain, resulting in a second signal; the phase of the second signal is shifted using an inverting circuit, resulting in a third signal with the phase opposite to that of the second signal; and a destructive magnetic field is generated by the second coil in an interference cancellation circuit based on the third signal. By implementing this invention, the shortcomings of related technologies, such as limited interference absorption, inaccurate suppression bandwidth, complex structure, large internal space occupation, and susceptibility to parasitic parameters, are solved, making it difficult to meet the application requirements of high-resolution, low-noise medical X-ray flat panel detectors.

Description

Technical Field

[0001] This invention relates to the field of flat panel detector technology, and more specifically to a method and apparatus for suppressing interference in X-ray flat panel detectors. Background Technology

[0002] In X-ray flat panel detector imaging systems, the ASIC (Integrated Circuit-Based Array) readout chip serves as the core component for signal readout. It is used to acquire, amplify, convert analog-to-digital signals from the weak photoelectric signals output by the TFT pixel array, and transmit the data. The ASIC chip's anti-interference capability and operational stability directly determine the detector's imaging signal-to-noise ratio, image uniformity, and diagnostic accuracy. During actual operation, the ASIC is highly susceptible to low-frequency electromagnetic interference, primarily including switching noise from the detector's internal row and column drive circuits, power module ripple, 50Hz / 60Hz power frequency interference, and low-frequency magnetic field interference introduced from the external environment through near-field coupling or conduction. This low-frequency interference induces interference electromotive forces in the ASIC's signal readout channels, internal substrate, and metal wiring, causing baseline drift, noise superposition, and amplitude jitter in the readout signal. Ultimately, this manifests in the detector's image as bright and dark stripes, banded artifacts, and uneven dark fields, severely degrading image quality.

[0003] Because low-frequency magnetic fields are highly penetrating and have a weak skin effect, conventional passive shielding methods are insufficient for effective suppression. Traditional solutions typically use metal shields such as aluminum or copper to shield the ASIC, but this method has limited attenuation capabilities for low-frequency magnetic fields, and interfering magnetic flux can still penetrate the shielding structure and enter the chip. Furthermore, relying solely on optimized grounding, circuit filtering, and device layout isolation can only suppress some conducted interference, and is insufficient for suppressing low-frequency magnetic field interference formed by near-field coupling.

[0004] Within the industry, the methods for suppressing low-frequency interference in X-ray flat panel detectors based on ASICs are still mainly passive shielding, post-stage filtering, and grounding optimization. These methods generally suffer from limitations such as limited suppression bandwidth, inaccurate magnetic field cancellation, complex structure, large internal space occupation, and easy introduction of parasitic parameters, making it difficult to meet the application requirements of high-resolution, low-noise medical X-ray flat panel detectors. Summary of the Invention

[0005] In view of this, the present invention provides an X-ray flat panel detector interference suppression method and device to solve the problems that related technologies generally have limited suppression bandwidth, inaccurate magnetic field cancellation, complex structure, large internal space occupation and easy introduction of parasitic parameters, which make it difficult to meet the application requirements of high resolution and low noise medical X-ray flat panel detectors.

[0006] In a first aspect, the present invention provides an X-ray flat panel detector interference suppression method, applied to an X-ray flat panel detector interference suppression device, wherein the X-ray flat panel detector interference suppression device is mounted on the readout circuit board of the X-ray flat panel, and the X-ray flat panel detector interference suppression device includes: a shielding cover, an interference pickup circuit, an amplification circuit, an inverting circuit, and an interference cancellation circuit. The method is characterized by comprising: in response to a change in the outer magnetic field of the shielding cover, an induced electromotive force is generated in the first coil of the interference pickup circuit, and a first signal is output; the shielding cover is disposed around the readout chip; the amplification circuit receives the first signal and amplifies the first signal based on a pre-configured gain, and outputs a second signal; the inverting circuit shifts the phase of the second signal, and outputs a third signal, the phase of the third signal being opposite to that of the second signal; and the second coil in the interference cancellation circuit generates a cancellation magnetic field based on the third signal.

[0007] The X-ray flat panel detector interference suppression method provided in this invention firstly, by responding in real time to changes in the magnetic field outside the shield, early pickup is completed before the interference signal acts on the readout chip, transforming the interference suppression process from passive protection to active sensing. By generating an induced electromotive force in the first coil that matches the external magnetic field change, the amplitude characteristics and phase information of the interference signal are preserved, ensuring that the picked-up first signal accurately reflects the changing pattern of external interference, thus improving the matching degree and consistency of the overall suppression logic. By arranging the shield around the readout chip, the interference action area and signal processing area are clearly defined, ensuring that interference pickup and magnetic field cancellation both revolve around the core working area. Secondly, by using an amplifier circuit to receive the first signal and perform amplification processing, the driving capability and response amplitude of the interference signal are improved, giving the weak induced signal sufficient driving margin to ensure stable execution of subsequent phase processing and magnetic field cancellation processes. By normalizing and amplifying the first signal based on a pre-configured gain, the signal amplitude can be kept within a suitable working range, avoiding inaccurate phase shifts and insufficient cancellation strength due to excessively small signals, while also avoiding distortion and circuit overload caused by excessively large signals. By stably converting the first signal into the second signal, a processing object with appropriate amplitude and complete waveform is provided for phase shifting, making the phase inversion operation more accurate and reliable, and improving the robustness and continuous operation capability of the overall scheme. Furthermore, by performing phase shifting processing on the second signal, a third signal with the opposite phase to the original interference signal is generated according to preset logic, ensuring that subsequent magnetic field cancellation has the correct phase basis and that effective cancellation is achieved during magnetic field superposition. By maintaining a completely opposite phase relationship between the third signal and the second signal, the timing of the canceling magnetic field and the original interference magnetic field is strictly corresponded, avoiding suppression failure or interference enhancement due to phase deviation. Stable phase conversion enables the compensation signal and the interference signal to form a complete inverse correspondence, providing the necessary conditions for magnetic field spatial superposition and energy cancellation, improving the accuracy and controllability of the suppression scheme. Then, by using a second coil to generate a canceling magnetic field based on the third signal, a compensation magnetic field opposite in direction to the external interference is constructed near the shield, causing the two types of magnetic fields to cancel each other in space, eliminating the influence of the interference magnetic field on the readout chip. By applying a destructive magnetic field directly to the interference path, the magnetic field component penetrating the shield can be weakened at the source, preventing the interference from inducing excess electromotive force inside the readout circuit and ensuring the purity and stability of the readout signal. By establishing a dynamic correspondence between the destructive magnetic field and the external interference magnetic field, the compensation level is continuously adjusted in real time to follow changes in interference, ensuring that the readout chip always operates in a stable, low-interference environment.Overall, this solution establishes a coherent and complete processing flow by integrating interference pickup, signal amplification, phase shifting, and magnetic field cancellation. This achieves closed-loop control across the entire chain, from interference detection to compensation and cancellation, enhancing the overall integrity and synergy of the suppression scheme. It avoids introducing complex high-frequency processing structures into the readout circuit, reducing the impact on the original signal path, maintaining the overall stability and reliability of the detector, avoiding signal loss and phase distortion caused by traditional filtering methods, preserving the original characteristics of the readout signal, and improving the stability of the imaging process. In summary, by implementing this invention, the limitations of related technologies—limited suppression bandwidth, inaccurate magnetic field cancellation, complex structure, large internal space occupation, and susceptibility to parasitic parameters—are overcome, making it difficult to meet the application requirements of high-resolution, low-noise medical X-ray flat panel detectors.

[0008] In one optional implementation, the pre-configured gain is an adaptive gain, and the adaptive configuration process of the pre-configured gain includes: in response to a change in the inner magnetic field of the shield, an induced electromotive force is generated in the third coil, and a fourth signal is output. The third coil is disposed inside the shield, and the fourth signal is processed by an inner amplification circuit; the amplitudes of the third signal and the fourth signal are collected respectively to obtain a third amplitude and a fourth amplitude; the pre-configured gain is updated based on the third amplitude and the fourth amplitude; and the in-phase gain configuration circuit of the amplification circuit is adjusted based on the updated pre-configured gain.

[0009] In one optional embodiment, the inverting circuit is provided with an operational amplifier. The step of using the inverting circuit to shift the phase of the second signal and output a third signal includes: inputting the second signal into the inverting input terminal of the operational amplifier; and shifting the phase of the second signal using the resistance ratio of the operational amplifier to output a third signal.

[0010] In one optional embodiment, the inverting circuit is configured in the amplifier circuit. The step of using the inverting circuit to shift the phase of the second signal and output the third signal includes: using a differential amplifier to differentially amplify the first signal based on a pre-configured gain, while using a differential amplifier to phase-flip the first signal and output the third signal in differential form. The amplifier circuit is provided with a differential amplifier and a non-inverting gain configuration circuit.

[0011] In one optional embodiment, the aforementioned inverting circuit is an RC full-pass phase shifter circuit. The step of using the aforementioned inverting circuit to shift the phase of the aforementioned second signal and outputting a third signal includes: determining the resonant frequency in the RC full-pass phase shifter circuit based on the frequency of the aforementioned second signal; adjusting the capacitance and resistance values ​​in the aforementioned RC full-pass phase shifter circuit based on the resonant frequency; and shifting the phase of the aforementioned second signal based on the adjusted RC full-pass phase shifter circuit to output a third signal.

[0012] In one optional embodiment, the inverting circuit is an electrode reversal circuit. The step of using the inverting circuit to shift the phase of the second signal and output a third signal includes: reversing the positive and negative polarities of the second signal using the electrode reversal circuit and outputting a third signal; and connecting the third signal to the second coil in the interference cancellation circuit.

[0013] In an optional implementation, after the phase of the second signal is shifted using the inverting circuit to output the third signal, the method further includes: acquiring the phase of the second signal and the phase of the third signal to obtain a second phase and a third phase; obtaining an error phase based on the second phase and the third phase; and performing phase calibration processing on the third phase based on the error phase using a phase calibration circuit.

[0014] Secondly, the present invention provides an X-ray flat panel detector interference suppression device, which is mounted on the readout circuit board of an X-ray flat panel. The X-ray flat panel detector interference suppression device includes: a shield, an interference pickup circuit, an amplification circuit, an inverting circuit, and an interference cancellation circuit. The shield is disposed around the readout chip, and the interference pickup circuit, amplification circuit, inverting circuit, and interference cancellation circuit are disposed outside the shield. The interference pickup circuit includes a first coil, which generates an induced electromotive force in response to a change in the magnetic field outside the shield and outputs a first signal. The amplification circuit includes a differential amplifier and a non-inverting gain configuration circuit, which receive the first signal and amplify it based on a pre-configured gain to output a second signal. The inverting circuit shifts the phase of the second signal to output a third signal, the phase of which is opposite to that of the second signal. The interference pickup circuit includes a second coil, which generates a cancellation magnetic field. The first and second coils are wound in the same direction.

[0015] In one optional embodiment, a third coil and an inner amplifier circuit are provided inside the shield. The third coil is used to generate an induced electromotive force in response to a change in the inner magnetic field of the shield, and output a fourth signal. The fourth signal is processed by the inner amplifier circuit.

[0016] The X-ray flat panel detector interference suppression device provided in this invention uses a third coil and an inner amplification circuit inside the shield to sense the changes in the magnetic field inside the shield in real time. The third coil responds to the changes in the inner magnetic field and generates a corresponding induced electromotive force, accurately reflecting the actual residual interference after shielding and cancellation. By converting the changes in the inner magnetic field into a stable fourth signal and processing it through the inner amplification circuit, accurate and reliable feedback is provided for subsequent adjustment and control. By fully acquiring the real-time changes in the inner magnetic field, the interference suppression process has a clear internal state reference, improving the accuracy and adaptability of the overall solution. By relying on the inner coil to achieve closed-loop sensing and feedback support, the amplification, phase adjustment, and magnetic field cancellation processes can always match the actual interference suppression effect, ensuring that the entire device is continuously in a stable and efficient working state. By setting a dedicated detection and amplification structure inside, the internal magnetic field state monitoring can be completed independently without affecting the original signal path and workflow of the detector, improving the safety and stability of the device operation. This provides a more reliable, stable, and clean working environment for the readout chip, ensuring the long-term stable operation of the X-ray flat panel detector and maintaining excellent imaging quality.

[0017] In one alternative implementation, the aforementioned inverting circuit is any one of an operational amplifier, a differential amplifier, an RC all-pass phase shifter circuit, and an electrode reversal circuit.

[0018] The X-ray flat panel detector interference suppression device provided in this invention uses an operational amplifier to form an inverting circuit, relying on a mature and stable amplification topology to achieve precise phase reversal, ensuring the consistency and reliability of phase shift. It is designed for working scenarios with high requirements for phase accuracy and signal stability, maintaining accurate and reliable phase relationships in complex electromagnetic environments, and meeting the implementation requirements of high-precision interference cancellation. By using a differential amplifier to form an inverting circuit, it suppresses common-mode interference while performing phase shift, improving the anti-interference capability of the signal processing process. This ensures that the phase shift result is not affected by external stray signals, making it suitable for applications with complex interference sources and strong common-mode noise. It simultaneously purifies the signal during phase reversal, improving the purity and reliability of the overall suppression process. Furthermore, by employing an RC... The all-pass phase-shifting circuit forms an inverting circuit, achieving phase adjustment with a simple passive network, reducing circuit complexity, minimizing the impact on the detector's original operating state, and improving the solution's lightweight and easy integration. It is suitable for scenarios with strict requirements on circuit size and layout space, and can complete phase shifting under limited installation conditions, maintaining the overall compact and efficient structure of the detector. By using an electrode reverse connection circuit to form an inverting circuit, signal phase reversal is achieved through direct wiring, eliminating the need for additional active components, simplifying the hardware structure, and achieving phase reversal in the simplest way. This improves the long-term robustness of the device and provides a variety of flexible circuit forms for phase reversal processing. The appropriate implementation method can be selected based on the detector's internal space layout, noise index, and circuit structure requirements, improving the solution's adaptability to different application scenarios. While ensuring the phase shifting effect, it optimizes the overall circuit power consumption and size, making the interference suppression device more in line with the compact design requirements of X-ray flat panel detectors.

[0019] In one alternative embodiment, the interference cancellation circuit is configured with a drive compensation circuit for driving compensation of the second coil based on the third signal and the loss characteristics of the second coil.

[0020] The X-ray flat panel detector interference suppression device provided in this invention achieves targeted drive compensation to match the output state and loss characteristics of the second coil, ensuring that the amplitude and phase of the destructive magnetic field remain within a preset ideal operating range. Compensation adjustment is completed by dynamically matching the coil's own losses, avoiding amplitude attenuation and phase shift of the destructive magnetic field caused by coil losses. This ensures a stable correspondence between the destructive magnetic field and the external interference magnetic field. Continuous and stable drive compensation improves the working accuracy and response consistency of the second coil, enabling the destructive magnetic field to accurately act on the target area. By improving the compensation mechanism of the drive stage, the stability and reliability of the entire interference suppression process are enhanced, providing a continuous and stable low-interference working environment for the readout chip. By optimizing the coil drive effect through the drive compensation circuit, the controllability and accuracy of the interference destructive process are improved, ensuring the long-term stable operation of the interference suppression device, thereby maintaining the reliability of the overall working state and the stability of the imaging quality of the X-ray flat panel detector. Attached Figure Description

[0021] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 This is a flowchart illustrating the interference suppression method for an X-ray flat panel detector according to an embodiment of the present invention; Figure 2 This is a structural block diagram of an X-ray flat panel detector interference suppression device according to an embodiment of the present invention; Figure 3 This is an extended schematic diagram of an X-ray flat panel detector interference suppression device in a specific embodiment of the present invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] In X-ray flat panel detector imaging systems, the ASIC (Integrated Circuit-Based Array) readout chip serves as the core component for signal readout. It is used to acquire, amplify, convert analog-to-digital signals from the weak photoelectric signals output by the TFT pixel array, and transmit the data. The ASIC chip's anti-interference capability and operational stability directly determine the detector's imaging signal-to-noise ratio, image uniformity, and diagnostic accuracy. During actual operation, the ASIC is highly susceptible to low-frequency electromagnetic interference, primarily including switching noise from the detector's internal row and column drive circuits, power module ripple, 50Hz / 60Hz power frequency interference, and low-frequency magnetic field interference introduced from the external environment through near-field coupling or conduction. This low-frequency interference induces interference electromotive forces in the ASIC's signal readout channels, internal substrate, and metal wiring, causing baseline drift, noise superposition, and amplitude jitter in the readout signal. Ultimately, this manifests in the detector's image as bright and dark stripes, banded artifacts, and uneven dark fields, severely degrading image quality.

[0025] Because low-frequency magnetic fields are highly penetrating and have a weak skin effect, conventional passive shielding methods are insufficient for effective suppression. Traditional solutions typically use metal shields such as aluminum or copper to shield the ASIC, but this method has limited attenuation capabilities for low-frequency magnetic fields, and interfering magnetic flux can still penetrate the shielding structure and enter the chip. Furthermore, relying solely on optimized grounding, circuit filtering, and device layout isolation can only suppress some conducted interference, and is insufficient for suppressing low-frequency magnetic field interference formed by near-field coupling.

[0026] Within the industry, the methods for suppressing low-frequency interference in X-ray flat panel detectors based on ASICs are still mainly passive shielding, post-stage filtering, and grounding optimization. These methods generally suffer from limitations such as limited suppression bandwidth, inaccurate magnetic field cancellation, complex structure, large internal space occupation, and easy introduction of parasitic parameters, making it difficult to meet the application requirements of high-resolution, low-noise medical X-ray flat panel detectors.

[0027] The X-ray flat panel detector interference suppression method provided in this invention firstly, by responding in real time to changes in the magnetic field outside the shield, early pickup is completed before the interference signal acts on the readout chip, transforming the interference suppression process from passive protection to active sensing. By generating an induced electromotive force in the first coil that matches the external magnetic field change, the amplitude characteristics and phase information of the interference signal are preserved, ensuring that the picked-up first signal accurately reflects the changing pattern of external interference, thus improving the matching degree and consistency of the overall suppression logic. By arranging the shield around the readout chip, the interference action area and signal processing area are clearly defined, ensuring that interference pickup and magnetic field cancellation both revolve around the core working area. Secondly, by using an amplifier circuit to receive the first signal and perform amplification processing, the driving capability and response amplitude of the interference signal are improved, giving the weak induced signal sufficient driving margin to ensure stable execution of subsequent phase processing and magnetic field cancellation processes. By normalizing and amplifying the first signal based on a pre-configured gain, the signal amplitude can be kept within a suitable working range, avoiding inaccurate phase shifts and insufficient cancellation strength due to excessively small signals, while also avoiding distortion and circuit overload caused by excessively large signals. By stably converting the first signal into the second signal, a processing object with appropriate amplitude and complete waveform is provided for phase shifting, making the phase inversion operation more accurate and reliable, and improving the robustness and continuous operation capability of the overall scheme. Furthermore, by performing phase shifting processing on the second signal, a third signal with the opposite phase to the original interference signal is generated according to preset logic, ensuring that subsequent magnetic field cancellation has the correct phase basis and that effective cancellation is achieved during magnetic field superposition. By maintaining a completely opposite phase relationship between the third signal and the second signal, the timing of the canceling magnetic field and the original interference magnetic field is strictly corresponded, avoiding suppression failure or interference enhancement due to phase deviation. Stable phase conversion enables the compensation signal and the interference signal to form a complete inverse correspondence, providing the necessary conditions for magnetic field spatial superposition and energy cancellation, improving the accuracy and controllability of the suppression scheme. Then, by using a second coil to generate a canceling magnetic field based on the third signal, a compensation magnetic field opposite in direction to the external interference is constructed near the shield, causing the two types of magnetic fields to cancel each other in space, eliminating the influence of the interference magnetic field on the readout chip. By applying a destructive magnetic field directly to the interference path, the magnetic field component penetrating the shield can be weakened at the source, preventing the interference from inducing excess electromotive force inside the readout circuit and ensuring the purity and stability of the readout signal. By establishing a dynamic correspondence between the destructive magnetic field and the external interference magnetic field, the compensation level is continuously adjusted in real time to follow changes in interference, ensuring that the readout chip always operates in a stable, low-interference environment.Overall, this solution establishes a coherent and complete processing flow by integrating interference pickup, signal amplification, phase shifting, and magnetic field cancellation. This achieves closed-loop control across the entire chain, from interference detection to compensation and cancellation, enhancing the overall integrity and synergy of the suppression scheme. It avoids introducing complex high-frequency processing structures into the readout circuit, reducing the impact on the original signal path, maintaining the overall stability and reliability of the detector, avoiding signal loss and phase distortion caused by traditional filtering methods, preserving the original characteristics of the readout signal, and improving the stability of the imaging process. In summary, by implementing this invention, the limitations of related technologies—limited suppression bandwidth, inaccurate magnetic field cancellation, complex structure, large internal space occupation, and susceptibility to parasitic parameters—are overcome, making it difficult to meet the application requirements of high-resolution, low-noise medical X-ray flat panel detectors.

[0028] According to an embodiment of the present invention, an embodiment of an X-ray flat panel detector interference suppression method is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0029] This embodiment provides an X-ray flat panel detector interference suppression method, applied to an X-ray flat panel detector interference suppression device. The X-ray flat panel detector interference suppression device is mounted on the readout circuit board of the X-ray flat panel and includes: a shielding cover, an interference pickup circuit, an amplification circuit, an inverting circuit, and an interference cancellation circuit. Figure 1 This is a flowchart of an X-ray flat panel detector interference suppression method according to an embodiment of the present invention, such as... Figure 1 As shown, the process includes the following steps: In step S101, in response to a change in the magnetic field outside the shield, an induced electromotive force is generated in the first coil of the interference pickup circuit, and a first signal is output. The shield is disposed around the readout chip.

[0030] Specifically, a shield is arranged around the readout chip, forming a protective area. The interference pickup circuit includes a first coil, which is attached to the outer surface of the shield. The first coil is wound in a predetermined direction. Changes in the external magnetic field pass through the area enclosed by the first coil, causing a change in the magnetic flux inside the coil. Under electromagnetic induction, an induced electromotive force (EMF) corresponding to the rate of change of magnetic flux is generated inside the first coil. The interference pickup circuit collects and preliminarily conditions the induced EMF, converting it into a continuous electrical signal for output, forming a first signal. This first signal synchronously carries the phase change characteristics and local amplitude characteristics of the interference magnetic field within the pickup area, serving as the raw input for the subsequent multi-stage signal processing.

[0031] Step S102: Receive the first signal using the aforementioned amplifier circuit, amplify the first signal based on a pre-configured gain, and output the second signal.

[0032] Specifically, the aforementioned amplifier circuit includes a differential amplifier and a non-inverting gain configuration circuit. The differential amplifier adopts a differential input, single-ended output topology, with input terminals including a non-inverting input and an inverting input. The non-inverting gain configuration circuit is composed of a resistor network, one end of which is connected to the non-inverting input of the differential amplifier, and the other end is grounded. The gain is precisely set and adjusted through the impedance matching of the resistor network, ensuring that the signal maintains its original phase characteristics during amplification and preventing phase shift. The first signal is connected to the signal input interface of the amplifier circuit through a shielded transmission line. The input interface is connected to the inverting input of the differential amplifier via an impedance matching circuit. Simultaneously, a bias circuit provides a stable static operating point for the differential amplifier, ensuring that it operates in the amplification region and avoiding cutoff distortion or saturation distortion. After receiving the first signal, the differential amplifier performs linear amplification based on the resistor network matching corresponding to the pre-configured gain. The pre-configured gain is determined by the preset resistor parameters of the non-inverting gain configuration circuit and can be specifically set according to the estimated amplitude range of the interference signal. The in-phase gain configuration circuit provides real-time feedback on the output amplitude of the differential amplifier. By adjusting its own impedance, it dynamically calibrates the amplification factor of the differential amplifier, suppressing gain shifts caused by power supply fluctuations and temperature drift, and ensuring the stability and linearity of the amplification process. Since the first signal is a portion of the interference magnetic field signal picked up by the interference pickup circuit through the first coil coupling, its amplitude is weak and contains a small amount of stray signal, making it unable to directly drive the subsequent inverting circuit and interference cancellation circuit. Through the differential amplification effect of the differential amplifier, not only can the amplitude of the first signal be effectively increased, but common-mode stray signals can also be suppressed. Simultaneously, relying on the calibration effect of the in-phase gain configuration circuit, it ensures that the waveform of the amplified signal remains consistent with the original first signal, without waveform distortion, phase shift, or other problems. The first signal is amplified by a differential amplifier and calibrated by a non-inverting gain configuration circuit. It is then output from the output terminal of the differential amplifier. After impedance matching by the output buffer circuit, the second signal is formed and output from the signal output interface of the amplifier circuit. The second signal completely retains the phase characteristics of the interference magnetic field carried by the first signal. The amplitude of the second signal is amplified to meet the requirements of subsequent phase inversion processing and interference cancellation, providing a stable, clean signal input with qualified amplitude for subsequent stages.

[0033] In some optional embodiments, the pre-configured gain is an adaptive gain, and the adaptive configuration process of the pre-configured gain includes: In step a1, in response to a change in the magnetic field inside the shield, an induced electromotive force is generated in the third coil, and a fourth signal is output. The third coil is located inside the shield, and the fourth signal is processed by the inner amplification circuit.

[0034] Furthermore, the shielding cover is a closed, enclosed metal protective structure, completely covering the outer space of the readout chip. The third coil is independently arranged in the inner area of ​​the shielding cover, forming a layered magnetic field acquisition layout with the first coil arranged on the outer side. The inner amplification circuit is arranged in the circuit area of ​​the readout circuit board corresponding to the inner side of the shielding cover, forming a fixed electrical connection with the third coil. The inner amplification circuit integrates a circuit topology of signal buffering and linear amplification. When the magnetic field in the space inside the shielding cover changes dynamically, the magnetic flux passes through the winding loop of the third coil, and an induced electromotive force is continuously generated inside the third coil by electromagnetic induction. The induced electromotive force changes synchronously with the fluctuation law of the residual magnetic field inside the inner side. The induced electromotive force is conducted through the circuit to complete the signal extraction, continuously generating a fourth signal. The fourth signal completely carries the dynamic change characteristics of the residual magnetic field inside the shielding cover. The fourth signal is synchronously connected to the input circuit of the inner amplification circuit. The impedance matching unit and linear amplification unit inside the inner amplification circuit complete the signal conditioning, stabilize the weak original induced signal, regulate the signal output shape, maintain the continuity and integrity of the signal waveform, and complete the standardized output flow of the inner magnetic field sampling signal.

[0035] Step a2: Collect the amplitudes of the third and fourth signals respectively to obtain the third and fourth amplitudes.

[0036] Furthermore, the third signal is stabilized and output after phase shifting by an inverting circuit, while the fourth signal is continuously transmitted after global conditioning and steady-state amplification by an internal amplifier circuit. Both signals are connected to the signal acquisition path. The signal acquisition path is equipped with an independent amplitude sampling unit, built upon an analog signal sampling topology, capable of real-time capture and level analysis of continuous alternating electrical signals. Independent sampling links for the third and fourth signals are established, isolated from each other and without interference. The alternating signals are continuously sampled and captured according to a unified signal sampling sequence. The level fluctuation range during signal operation is continuously captured, and the amplitude variation range and peak level information of the alternating signal are extracted. Quantization is performed according to the analog signal amplitude analysis rules, and the amplitude characteristics of the two signals are extracted separately. The third amplitude value corresponding to the amplitude characteristics of the third signal and the fourth amplitude value corresponding to the amplitude characteristics of the fourth signal are generated sequentially, ensuring that the original signal variation characteristics are not lost or distorted throughout the process.

[0037] Step a3: Update the pre-configured gain based on the third and fourth amplitude values ​​mentioned above.

[0038] Furthermore, the third amplitude represents the amplitude state of the compensation signal outside the shield after phase reversal processing, and the fourth amplitude represents the amplitude state of the feedback signal corresponding to the residual magnetic field inside the shield. Both amplitude parameters are synchronously transmitted to the gain adjustment logic link. The gain adjustment logic link has a built-in amplitude comparison and parameter iteration mechanism. Following the signal matching logic of electromagnetic cancellation, it performs item-by-item comparison calculations on the correspondence between the two amplitudes. Combining the amplitude difference between the outer compensation signal and the inner residual feedback signal, it gradually corrects the original preset gain reference parameter, and gradually corrects the gain reference range according to the signal matching iteration rules, gradually completing the layer-by-layer iteration and update optimization of the gain parameter. It continuously corrects the gain setting reference of the amplifier circuit, completing the dynamic iterative adjustment of the pre-configured gain, so that the updated pre-configured gain can match the signal amplification requirements under the real-time magnetic field environment. Throughout the process, it adheres to the constraints of the circuit's linear operating range, maintaining the smooth and continuous iteration of the gain parameter and avoiding sudden jumps in the gain parameter.

[0039] Step a4: Adjust the in-phase gain configuration circuit of the above amplifier circuit based on the updated pre-configured gain.

[0040] Furthermore, the in-phase gain configuration circuit is the core functional unit responsible for gain parameter adjustment within the amplifier circuit. It relies on a passive impedance network and bias adjustment loop to form a hardware adjustment structure, achieving stable electrical coupling with the in-phase input of the differential amplifier. The updated pre-configured gain is continuously input to the in-phase gain configuration circuit in the form of control levels or impedance adjustment commands. After receiving the gain adjustment command, the in-phase gain configuration circuit gradually adjusts the matching relationship of its internal impedance network, changing the input bias conditions and feedback ratio of the in-phase input of the differential amplifier. Simultaneously, it corrects the signal amplification factor of the differential amplification link, gradually adapting to the iteratively completed gain setting standard, and stabilizing the overall signal amplification capability of the amplifier circuit. Relying on the continuous adjustment characteristics of the hardware circuit, it smoothly completes the switching transition of amplification parameters, ensuring that the signal amplification link maintains a linear operating state throughout the gain adjustment process, avoiding waveform distortion and operating point offset during signal transmission, achieving closed-loop dynamic adjustment of the amplifier circuit gain parameters, and stably adapting to the signal amplification processing flow under real-time magnetic field interference environments.

[0041] Step S103: The phase of the second signal is shifted using the aforementioned inverting circuit to output a third signal, the phase of which is opposite to that of the second signal.

[0042] Specifically, the aforementioned inverting circuit can be any one of an operational amplifier, a differential amplifier, an RC all-pass phase-shifting circuit, and an electrode reversal circuit.

[0043] In some alternative embodiments, the inverting circuit is provided with an operational amplifier, and the phase shifting of the second signal using the inverting circuit to output a third signal includes: Step b1: Input the second signal mentioned above into the inverting input terminal of the operational amplifier.

[0044] Furthermore, in this scheme, the inverting circuit uses an operational amplifier as its core functional component. The operational amplifier employs a dual-supply mode, possessing electrical characteristics of high input impedance, low output impedance, and high amplification. Its pins include an inverting input, a non-inverting input, an output, and a power supply. The power supply is connected to both positive and negative power supplies, providing a stable operating voltage for the operational amplifier and ensuring it operates in the linear amplification region, avoiding cutoff distortion or saturation distortion. The non-inverting input of the operational amplifier is grounded through a bias resistor, which provides a stable quiescent operating point, maintaining the operational amplifier output at a preset quiescent level and ensuring the stability of the signal processing. After the second signal is output from the amplification circuit, it is connected to the signal input interface of the inverting circuit through a shielded transmission line. The input interface is electrically connected to the inverting input of the operational amplifier via an impedance matching resistor. The impedance matching resistor is used to achieve impedance matching in the signal transmission link, reducing signal reflection and loss during transmission and ensuring that the second signal can be transmitted completely and stably into the operational amplifier. During the access process, the shielding integrity of the signal transmission link is strictly guaranteed to prevent external stray signals from coupling into the transmission link and affecting the purity of the second signal. This ensures that the second signal input to the inverting input of the operational amplifier can truly reflect the phase and amplitude characteristics of the original interference magnetic field, providing a reliable signal basis for subsequent phase shift processing.

[0045] Step b2: The phase of the second signal is shifted using the resistor ratio of the operational amplifier to output the third signal.

[0046] Furthermore, the resistor ratio of the operational amplifier consists of the input resistor and the feedback resistor. One end of the input resistor is connected to the inverting input terminal of the operational amplifier, and the other end is connected to the signal input interface of the inverting circuit. One end of the feedback resistor is connected to the inverting input terminal of the operational amplifier, and the other end is connected to the output terminal of the operational amplifier. The input resistor and the feedback resistor together constitute the inverting amplification topology of the operational amplifier. The amplification factor and phase processing characteristics of the operational amplifier are determined by the impedance ratio of the two resistors. Under normal operating conditions, the inverting input terminal is in a virtual ground state. After the second signal is transmitted to the inverting input terminal through the input resistor, the signal is amplified and phase-flipped internally by the operational amplifier. Based on the impedance ratio of the input resistor and the feedback resistor, the operational amplifier linearly amplifies the second signal input to the inverting input terminal while achieving a 180-degree phase shift, that is, the phase of the output signal is completely opposite to the phase of the input second signal. During the phase shift process, the operational amplifier maintains the integrity of the signal waveform, avoiding waveform distortion, amplitude distortion, and other problems, ensuring that the output signal can completely retain the interference magnetic field characteristic information carried by the second signal. After phase shifting and linear amplification achieved by resistor matching, the signal is output from the output terminal of the operational amplifier. After impedance matching and signal normalization by the output buffer circuit, a third signal is formed and output from the signal output interface of the inverting circuit. The phase of the third signal is opposite to that of the second signal, and its amplitude is linearly amplified to meet the working requirements of the subsequent interference cancellation circuit, providing a phase-accurate compensation signal for the interference cancellation stage.

[0047] In some alternative embodiments, the inverting circuit is configured in the amplifier circuit, and the phase shifting of the second signal using the inverting circuit to output the third signal includes: differentially amplifying the first signal based on a pre-configured gain using a differential amplifier, while simultaneously phase-flipping the first signal using a differential amplifier to output the third signal in differential form. The amplifier circuit is provided with a differential amplifier and a non-inverting gain configuration circuit.

[0048] Furthermore, in this scheme, the inverting circuit is integrated within the amplifier circuit, forming an integrated circuit topology with the differential amplifier and the non-inverting gain configuration circuit. This eliminates the need for an additional independent inverting device, simplifying the overall circuit structure and reducing the impact of parasitic parameters. The differential amplifier in the amplifier circuit adopts a differential input, differential output topology, possessing electrical characteristics that suppress common-mode interference and improve signal anti-interference capabilities. Its input terminals include two symmetrical non-inverting and inverting input terminals, and its output terminals correspond to two symmetrical signal output terminals, outputting differential signals with opposite phases. The non-inverting gain configuration circuit consists of an impedance adjustment network, with one end connected to the non-inverting input terminal of the differential amplifier and the other end grounded. It is used to preset and stabilize the amplification factor of the differential amplifier, ensuring the linearity and stability of the differential amplification process. The first signal is received from the interference pickup circuit and connected to the two input terminals of the differential amplifier through symmetrical shielded transmission lines, realizing the differential input of the first signal. Based on the pre-configured gain, the differential amplifier initiates differential amplification. The pre-configured gain is determined by the impedance parameters preset in the in-phase gain configuration circuit. The in-phase gain configuration circuit adjusts its own impedance network in real time, dynamically calibrating the amplification factor of the differential amplifier and suppressing gain shifts caused by temperature drift and power fluctuations, ensuring the stability of the amplification process. During differential amplification, the output phase characteristics of the differential amplifier are used synchronously to perform phase reversal processing on the input first signal. Through the internal circuit topology design of the differential amplifier, the signals output from the two output terminals are out of phase and correspond to the phase reversal of the input first signal. After the differential amplification and phase reversal synchronization are completed, the two output terminals of the differential amplifier output corresponding signals respectively. The two signals form a differential form with equal amplitude and opposite phase, which together constitute the third signal. The third signal undergoes impedance matching and signal normalization through the differential output buffer circuit to ensure the integrity of the signal waveform and the stability of the amplitude, avoiding waveform distortion or phase deviation. The output differential form of the third signal completely retains the phase and amplitude characteristics of the interference magnetic field carried by the first signal, and after differential amplification, it has sufficient driving capability to meet the differential driving requirements of the subsequent interference cancellation circuit. At the same time, relying on the anti-interference characteristics of the differential signal, it reduces the coupling effect of stray signals during transmission, and provides a stable and pure differential compensation signal for subsequent interference cancellation work.

[0049] In some optional embodiments, the aforementioned inverting circuit is an RC all-pass phase shifting circuit. The method of using the aforementioned inverting circuit to shift the phase of the second signal and output a third signal includes: Step c1: Determine the resonant frequency in the RC full-pass phase shift circuit based on the frequency of the second signal, and adjust the capacitance and resistance values ​​in the RC full-pass phase shift circuit based on the resonant frequency.

[0050] Furthermore, in this scheme, the RC all-pass phase-shifting circuit is constructed using resistors and capacitors to form a passive signal conditioning topology. The transmission characteristics of the all-pass circuit ensure that the signal amplitude remains stable throughout the transmission process, continuously adjusting only the signal phase without attenuating or amplifying the waveform amplitude of the input signal. The second signal is continuously input to the front-end signal link of the RC all-pass phase-shifting circuit. Based on the alternating frequency characteristics of the second signal, the resonant operating frequency of the RC all-pass phase-shifting circuit is matched and defined. The resonant frequency is the core operating reference for the RC phase-shifting topology to achieve a fixed phase shift. According to the determined resonant frequency parameters, the resistors and capacitors arranged inside the RC all-pass phase-shifting circuit are adjusted successively, changing the overall impedance combination and capacitive-to-impedance ratio of the circuit, and simultaneously correcting the inherent frequency response characteristics of the circuit, so that the resonant operating state of the RC all-pass phase-shifting circuit is precisely matched with the frequency characteristics of the second signal. By coordinating the adjustment of RC parameters, the phase offset range of the circuit is locked, and phase shifting operating conditions adapted to the current interference signal frequency are constructed to ensure a stable circuit operating foundation for subsequent phase adjustment processes and maintain the continuity and matching of the passive phase shifting link's operating state.

[0051] Step c2: Based on the adjusted RC full-pass phase shift circuit, the phase of the second signal is shifted, and the third signal is output.

[0052] Furthermore, after adjusting the RC parameters, the RC full-pass phase-shifting circuit enters the matched resonance operating state. The second signal is fully connected to the input circuit of the RC full-pass phase-shifting circuit and flows sequentially through the resistor and capacitor units inside the circuit along the preset signal transmission path. Utilizing the inherent phase response characteristics of the RC full-pass phase-shifting circuit, the alternating signal continuously generates a controllable phase shift change under the charging and discharging action of the RC components and the impedance voltage division. Taking advantage of the transmission advantage of the full-pass topology without amplitude attenuation, the interference amplitude information and waveform characteristics carried by the second signal are preserved throughout the process. Under the continuous action of the passive circuit, the overall phase shift adjustment of the second signal is gradually completed, forming a target electrical signal with a reversed phase. The entire process does not require the addition of active amplifier devices, and stable phase conversion is achieved by relying on the pure passive circuit topology. After the phase adjustment is completed, the signal is output through the back-end output circuit of the RC full-pass phase-shifting circuit, which regulates the signal output shape, maintains the integrity and continuity of the alternating waveform, and finally generates a stable output third signal, meeting the requirements of the subsequent interference cancellation circuit for the reverse compensation signal.

[0053] In some optional embodiments, the aforementioned inverting circuit is an electrode reverse connection circuit, and the aforementioned use of the inverting circuit to shift the phase of the second signal and output a third signal includes: Step d1: The positive and negative polarities of the second signal are reversed using an electrode reversal circuit to output the third signal.

[0054] Furthermore, in this scheme, the electrode reversal circuit is a simple signal conditioning structure that achieves signal polarity conversion based on the wiring topology. It has independent forward and reverse input terminals, with these two types of terminals corresponding to the two transmission loops of the alternating electrical signal. The second signal is transmitted to the input port of the electrode reversal circuit via a fixed transmission line. According to the circuit's preset reverse wiring logic, the wiring arrangement of the second signal's forward and reverse loops is swapped, changing the polarity conduction direction of the alternating electrical signal in the transmission link. The interchange of the two signal poles is directly achieved through hardware wiring, without the need for additional amplification devices or phase-shifting components; electrical adjustment is achieved solely through the physical reversal of the line topology. During the polarity reversal transmission, the alternating signal maintains its original waveform shape and amplitude characteristics, without amplitude loss or waveform distortion. The phase shift is achieved solely through the reversal of electrical polarity, naturally creating a phase relationship opposite to the original second signal. After continuous polarity conversion, the signal is output from the electrode reversal circuit, stably generating a phase-matched third signal.

[0055] Step d2: Connect the third signal to the second coil in the interference cancellation circuit.

[0056] Furthermore, a second coil is installed inside the interference cancellation circuit. This second coil has a dedicated signal input terminal, establishing a continuously conducting signal transmission path between the input terminal and the output of the electrode reverse connection circuit, ensuring the stability of the electrical signal transmission link. The third signal, after being output from the electrode reverse connection circuit, is continuously transmitted along the fully deployed transmission line to the interference cancellation circuit, precisely connecting to the corresponding drive terminal of the second coil, establishing an electrical coupling relationship between the third signal and the second coil. The alternating third signal is continuously fed into the winding of the second coil, driving it to synchronously generate a correspondingly changing induced magnetic field based on the alternating current pattern, fully inheriting the phase characteristics and fluctuation patterns carried by the third signal. This stable electrical connection method ensures the continuity of signal driving, avoiding abnormal magnetic field output caused by poor line contact or transmission interruption. This allows the second coil to operate stably according to the real-time changes of the third signal, continuously outputting an induced magnetic field adapted to the interference cancellation requirements, ensuring the overall interference suppression process is carried out smoothly.

[0057] Step S104: The second coil in the above-mentioned interference cancellation circuit generates a cancellation magnetic field based on the above-mentioned third signal.

[0058] Specifically, the interference cancellation circuit is attached to the outer surface of the shielding cover. The second coil, as the core electromagnetic generating structure of the interference cancellation circuit, is regularly wound and fixed along the outer wall of the shielding cover, maintaining the same winding direction as the first coil on the outer side of the shielding cover. The entire coil is attached to the shielding cover body to form an integrated structure. The third signal is continuously introduced into the interference cancellation circuit through a complete signal transmission link, stably connected to both ends of the winding of the second coil, so that the alternating current forms a continuous conduction along the closed winding loop of the second coil. Relying on the dynamic flow of the alternating current in the coil winding, combined with the physical mechanism of electromagnetic induction, the second coil synchronously excites a spatial induced magnetic field with the current rhythm. The magnetic field distribution completely covers the interference coupling area outside the shielding cover. The system strictly follows the phase change and amplitude fluctuation of the third signal to complete dynamic adjustment, continuously outputting a phase-destroying magnetic field with a fixed magnetic field direction and synchronous change rhythm. The phase-destroying magnetic field directly acts on the low-frequency interference magnetic flux propagation path outside the shield. Relying on the arrangement of the second coil attached to the shield, it ensures that the phase-destroying magnetic field and the original interference magnetic field are in the same spatial superposition area, continuously completing the real-time conversion of electrical signal to compensation magnetic field, and stably generating a phase-destroying magnetic field that can couple and cancel out the external interference magnetic field.

[0059] In some alternative embodiments, after the phase of the second signal is shifted using the aforementioned inverting circuit to output the third signal, the method further includes: Step e1: Acquire the phase of the second signal and the phase of the third signal to obtain the second phase and the third phase.

[0060] Furthermore, the second signal is stably transmitted to the phase acquisition node, and the third signal, after being processed by the inverting circuit, is synchronously transmitted to the phase detection link. The phase acquisition link has a built-in independent phase detection unit to capture the timing status of the two alternating signals. Independent detection channels are established for the second and third signals, electrically isolated from each other to avoid crosstalk and superposition. Timing inflection points and level switching nodes during the signal alternation process are continuously captured according to a unified timing rhythm. Based on the periodic variation law of the alternating electrical signal, the timing distribution state of the signal waveform is identified, and the inherent phase information of the signal itself is extracted. The second phase corresponding to the timing characteristics of the second signal and the third phase corresponding to the timing characteristics of the third signal are characterized respectively. The original alternation law of the signal is maintained throughout the process, and the timing difference relationship between the two signals is completely preserved, providing accurate original detection basis for subsequent phase comparison and error calculation.

[0061] Step e2: Obtain the error phase based on the second and third phases described above.

[0062] Furthermore, the second and third phases are simultaneously transmitted to the phase calculation stage, which uses timing comparison logic to perform correlation analysis of the two phase information paths. Combining the signal timing distribution states represented by each phase path and comparing the timing correspondence within the signal alternation cycle, the stage identifies the offset differences between the two signals during timing progression, quantifying the offset deviation between the phases. Through continuous phase comparison calculations, the timing deviations of the second and third phases are integrated and uniformly summarized into an error phase that characterizes the actual phase offset deviation. This error phase objectively reflects the degree of timing deviation between the two signals after inversion processing, accurately representing the deviation relationship between the actual output state and the ideal phase state of the inverting circuit. It fully encompasses the deviation elements generated during the phase offset process, providing a quantitative reference benchmark for subsequent targeted calibration and adjustment.

[0063] Step e3: The third phase is calibrated based on the error phase using a phase calibration circuit.

[0064] Furthermore, the phase calibration circuit is configured with an independent phase adjustment topology, possessing continuously adjustable phase offset control capabilities. After receiving the deviation information transmitted by the error phase, it generates corresponding phase adjustment commands based on the offset deviation state represented by the error phase. These adjustment commands are synchronously applied to the transmission link of the third signal, performing fine-grained correction and control on the timing phase corresponding to the third signal. According to the preset phase correction logic, it gradually compensates for the phase deviation, continuously adjusting the timing position of the third signal. This gradually reduces the deviation range between the actual phase and the ideal reverse phase, smoothly correcting the phase offset problem generated during the phase inversion process, ensuring that the calibrated third signal maintains a stable and standardized reverse timing relationship. Relying on the dynamic adjustment capability of the phase calibration circuit, it continuously optimizes the signal phase matching accuracy, weakens the phase offset effects caused by circuit device parameter drift and environmental disturbances, and ensures the timing accuracy of the subsequent destructive magnetic field generation process.

[0065] The X-ray flat panel detector interference suppression method provided in this invention firstly, by responding in real time to changes in the magnetic field outside the shield, early pickup is completed before the interference signal acts on the readout chip, transforming the interference suppression process from passive protection to active sensing. By generating an induced electromotive force in the first coil that matches the external magnetic field change, the amplitude characteristics and phase information of the interference signal are preserved, ensuring that the picked-up first signal accurately reflects the changing pattern of external interference, thus improving the matching degree and consistency of the overall suppression logic. By arranging the shield around the readout chip, the interference action area and signal processing area are clearly defined, ensuring that interference pickup and magnetic field cancellation both revolve around the core working area. Secondly, by using an amplifier circuit to receive the first signal and perform amplification processing, the driving capability and response amplitude of the interference signal are improved, giving the weak induced signal sufficient driving margin to ensure stable execution of subsequent phase processing and magnetic field cancellation processes. By normalizing and amplifying the first signal based on a pre-configured gain, the signal amplitude can be kept within a suitable working range, avoiding inaccurate phase shifts and insufficient cancellation strength due to excessively small signals, while also avoiding distortion and circuit overload caused by excessively large signals. By stably converting the first signal into the second signal, a processing object with appropriate amplitude and complete waveform is provided for phase shifting, making the phase inversion operation more accurate and reliable, and improving the robustness and continuous operation capability of the overall scheme. Furthermore, by performing phase shifting processing on the second signal, a third signal with the opposite phase to the original interference signal is generated according to preset logic, ensuring that subsequent magnetic field cancellation has the correct phase basis and that effective cancellation is achieved during magnetic field superposition. By maintaining a completely opposite phase relationship between the third signal and the second signal, the timing of the canceling magnetic field and the original interference magnetic field is strictly corresponded, avoiding suppression failure or interference enhancement due to phase deviation. Stable phase conversion enables the compensation signal and the interference signal to form a complete inverse correspondence, providing the necessary conditions for magnetic field spatial superposition and energy cancellation, improving the accuracy and controllability of the suppression scheme. Then, by using a second coil to generate a canceling magnetic field based on the third signal, a compensation magnetic field opposite in direction to the external interference is constructed near the shield, causing the two types of magnetic fields to cancel each other in space, eliminating the influence of the interference magnetic field on the readout chip. By applying a destructive magnetic field directly to the interference path, the magnetic field component penetrating the shield can be weakened at the source, preventing the interference from inducing excess electromotive force inside the readout circuit and ensuring the purity and stability of the readout signal. By establishing a dynamic correspondence between the destructive magnetic field and the external interference magnetic field, the compensation level is continuously adjusted in real time to follow changes in interference, ensuring that the readout chip always operates in a stable, low-interference environment.Overall, this solution establishes a coherent and complete processing flow by integrating interference pickup, signal amplification, phase shifting, and magnetic field cancellation. This achieves closed-loop control across the entire chain, from interference detection to compensation and cancellation, enhancing the overall integrity and synergy of the suppression scheme. It avoids introducing complex high-frequency processing structures into the readout circuit, reducing the impact on the original signal path, maintaining the overall stability and reliability of the detector, avoiding signal loss and phase distortion caused by traditional filtering methods, preserving the original characteristics of the readout signal, and improving the stability of the imaging process. In summary, by implementing this invention, the limitations of related technologies—limited suppression bandwidth, inaccurate magnetic field cancellation, complex structure, large internal space occupation, and susceptibility to parasitic parameters—are overcome, making it difficult to meet the application requirements of high-resolution, low-noise medical X-ray flat panel detectors.

[0066] This embodiment also provides an X-ray flat panel detector interference suppression device, which is used to implement the above embodiments and preferred embodiments. Details that have been described will not be repeated here.

[0067] This embodiment provides an X-ray flat panel detector interference suppression device, such as... Figure 2 As shown, the aforementioned X-ray flat panel detector interference suppression device is mounted on the readout circuit board of the X-ray flat panel. The X-ray flat panel detector interference suppression device includes: a shielding cover, an interference pickup circuit, an amplification circuit, an inverting circuit, and an interference cancellation circuit, wherein: The aforementioned shielding cover is disposed around the readout chip, and the aforementioned interference pickup circuit, amplification circuit, inverting circuit, and interference cancellation circuit are disposed outside the aforementioned shielding cover.

[0068] Specifically, the shielding cover is manufactured using a one-piece molding process with a metal shielding material, forming an enclosed structure that completely surrounds the readout chip, providing comprehensive physical coverage and electromagnetic isolation. The interference pickup circuit, amplification circuit, inverting circuit, and interference cancellation circuit are sequentially arranged along the signal flow direction. All functional circuits are uniformly arranged on the outer area of ​​the shielding cover, forming a spatial partition layout with the chip's working area inside the shielding cover. The circuit modules are continuously electrically connected via onboard wiring, establishing a complete hardware processing link according to a fixed signal transmission sequence. Based on the layered layout of the hardware structure, it achieves complete hardware support for external interference acquisition, step-by-step signal processing, and reverse magnetic field generation. The shielding cover is securely installed on the surface of the readout circuit board using fixing clips or welding structures, completely enclosing the readout chip and defining the spatial boundary between the chip's core working area and the external electromagnetic environment. The interference pickup circuit, amplification circuit, inverting circuit, and interference cancellation circuit are all integrated using surface-mount devices and uniformly arranged on the circuit board area outside the shielding cover. Reasonable wiring spacing is maintained between each circuit module to avoid signal crosstalk. Each functional circuit is arranged sequentially according to the order of signal transmission, and adjacent circuits are electrically connected through neat copper wiring to ensure a continuous and smooth signal transmission path. The centralized layout of the circuits outside the shielding cover allows the magnetic field acquisition and compensation structures to be concentrated in the area affected by external interference magnetic fields. Based on the spatial correspondence, the spatial matching of interference signal pickup, signal conditioning and conversion, and interference cancellation magnetic field emission is ensured, making the hardware layout of the entire device compatible with the interference suppression workflow.

[0069] The aforementioned interference pickup circuit is equipped with a first coil, which is used to generate an induced electromotive force in the first coil in response to a change in the magnetic field outside the shield, and output a first signal.

[0070] Specifically, the interference pickup circuit is an independent signal acquisition hardware unit, primarily responsible for the induction and acquisition of changes in the external magnetic field and the output of the original electrical signal. The first coil, as the core induction component of the interference pickup circuit, is formed by continuous winding of metal wire and fixedly attached to the outer wall of the shield. The first coil forms a closed induction winding according to a regular winding pattern, with the winding plane parallel to and fixed to the outer surface of the shield. The alternating magnetic field in the external environment penetrates the winding coverage area of ​​the first coil, causing continuous dynamic fluctuations in the magnetic flux inside the coil. Based on the working principle of electromagnetic induction, the real-time changes in magnetic flux continuously generate an induced electromotive force inside the coil winding. The induced electromotive force changes synchronously with the fluctuation rhythm of the external magnetic field. The interference pickup circuit stably acquires and outputs the induced electromotive force, converting the weak electrical changes generated by magnetic induction into a continuous analog electrical signal, completing the continuous output of the first signal, and realizing the real-time physical acquisition and electrical signal conversion of external low-frequency magnetic field interference.

[0071] The aforementioned amplifier circuit includes a differential amplifier and a non-inverting gain configuration circuit, used to receive the first signal and amplify the first signal based on the pre-configured gain to output the second signal.

[0072] Specifically, the amplifier circuit, as a hardware unit for intermediate frequency signal conditioning, integrates two functional structures: a differential amplifier and a non-inverting gain configuration circuit. The differential amplifier is the core amplification device, with built-in symmetrical differential input ports and linear output ports. The non-inverting gain configuration circuit is constructed from multiple sets of passive impedance components, forming a stable electrical connection with the non-inverting input of the differential amplifier. The amplifier circuit receives the first signal transmitted by the interference pickup circuit through the front-end access line, and inputs the weak electrical signal obtained from the original acquisition into the input circuit of the differential amplifier. The non-inverting gain configuration circuit pre-matches the impedance parameters to determine the pre-configured gain reference of the amplifier circuit. The differential amplifier performs linear signal amplification according to the preset gain conditions, normalizing and boosting the amplitude of the input first signal. Simultaneously, relying on the electrical characteristics of the differential topology itself, it filters out spurious common-mode signals coupled in the transmission link. The amplified electrical signal is stably sent out through the output port of the amplifier circuit, completing the normalized output of the second signal and providing a standard electrical signal with amplitude adaptation for subsequent phase shift processing.

[0073] The aforementioned inverting circuit is used to shift the phase of the second signal and output a third signal, the phase of which is opposite to that of the second signal.

[0074] Specifically, the inverting circuit is an independent phase adjustment hardware module. Its input terminal maintains reliable electrical continuity with the signal output terminal of the amplifier circuit, continuously receiving the second signal transmitted and output by the amplifier circuit. Internally, it integrates a dedicated phase adjustment hardware topology, which can achieve signal phase modulation and conversion through various circuit implementations. The input second signal is completely fed into the signal conditioning loop inside the inverting circuit. Relying on the electrical response characteristics of the internal components, the timing phase of the alternating electrical signal is systematically offset, changing the periodic timing relationship of the electrical signal. The signal phase state is strictly adjusted according to the requirements of electromagnetic cancellation, ensuring that the output signal after circuit conditioning has a completely opposite phase characteristic to the input second signal in terms of timing variation. This continuously completes the phase offset processing, stably outputting a third signal with opposite phase characteristics, providing a phase-matched driving signal for the downstream magnetic field generating structure.

[0075] The aforementioned interference pickup circuit is equipped with a second coil, which is used to generate a destructive magnetic field. The first coil and the second coil are wound in the same direction.

[0076] Specifically, the interference cancellation circuit incorporates a second coil, also made of metal wire, which is fixed to the outer surface of the shield. It is manufactured using the same winding process as the first coil, with identical winding directions and corresponding structural specifications. The second coil is connected to the signal output of the inverting circuit, continuously receiving the third signal to form a closed current loop. Alternating current flows continuously along the winding loop of the second coil, generating a stable induced magnetic field through this alternating current motion. Strictly following the current change rhythm of the third signal, the direction and intensity of the magnetic field are dynamically adjusted synchronously, continuously generating a directionally distributed cancellation magnetic field. The unified winding direction of the first and second coils ensures that the cancellation magnetic field precisely corresponds to the original interference magnetic field in spatial direction. The coaxial and unidirectional arrangement on the outer side of the shield ensures that the generated cancellation magnetic field accurately covers the area through which the interference magnetic field penetrates. Relying on the electromagnetic conversion effect of the hardware coil, a stable conversion output from electrical signal to compensation magnetic field is achieved.

[0077] In some alternative embodiments, a third coil and an inner amplifier circuit are provided inside the shield. The third coil is used to generate an induced electromotive force in response to a change in the inner magnetic field of the shield, and output a fourth signal. The fourth signal is processed by the inner amplifier circuit.

[0078] Furthermore, the shielding cover completely encloses the readout chip, dividing it into an independent inner closed space and an outer electromagnetic interaction area. The third coil is specifically located within the inner space of the shielding cover, fixedly installed against the inner wall of the shielding cover, forming a layered magnetic field acquisition structure with the first coil located on the outer side of the shielding cover. The inner amplification circuit is synchronously integrated into the circuit area on the readout circuit board corresponding to the inner side of the shielding cover, and is fixedly electrically connected to the third coil through onboard wiring, forming a complete inner signal acquisition and processing path. The inner side of the shielding cover retains a residual magnetic field after the external shielding and magnetic field cancellation. When the inner magnetic field undergoes continuous dynamic changes, the magnetic flux continuously passes through the winding of the third coil, causing the magnetic flux inside the third coil to fluctuate regularly, generating a continuously changing induced electromotive force inside the coil conductor through electromagnetic induction. The induced electromotive force is conducted outward along the conduction path and transformed into a fourth signal that can characterize the change state of the residual magnetic field inside. The fourth signal is directly connected to the front-end input circuit of the inner amplifier circuit. Relying on the signal buffer unit and linear conditioning unit inside the inner amplifier circuit, the weak original induced signal is stabilized and standardized, the signal output waveform is regulated, the signal transmission quality is optimized, and the original fluctuation characteristics corresponding to the inner magnetic field are completely preserved, realizing the complete conversion flow of the inner magnetic field state from physical field change to standard electrical signal.

[0079] In some alternative embodiments, the aforementioned inverting circuit is any one of an operational amplifier, a differential amplifier, an RC all-pass phase shifter circuit, and an electrode reversal circuit.

[0080] Furthermore, operational amplifiers utilize an inverting amplification topology to construct signal processing loops. Through the cooperation of RC networks at the input and feedback ends, they complete phase reversal and linear conditioning of the input signal, achieving stable phase control based on a mature active device architecture. Differential amplifiers, with their symmetrical differential input / output structure, simultaneously amplify the signal amplitude and, leveraging the inherent phase difference characteristics of the differential ports, synchronously reverse the signal phase, thus providing both signal anti-interference and phase adjustment. The RC all-pass phase shift circuit employs a purely passive RC combination architecture. Relying on the impedance frequency response characteristics of resistors and capacitors, it completes continuous phase shift adjustment without attenuating the signal amplitude, achieving smooth phase shift processing through a simple passive circuit. The electrode reversal circuit directly changes the transmission direction of the alternating signal by reversing the polarity of the hardware wiring, achieving reverse phase correspondence through physical wiring layout; the circuit structure is simple and intuitive. Based on the overall circuit layout space, signal processing requirements, and installation adaptation conditions of the device, any type of circuit can be flexibly selected as the carrier for implementing the inversion function. All types of circuits can be independently connected to the second signal transmission link, complete the phase shift processing according to their own circuit working logic, and stably output the third signal with the phase reversed, thus meeting the generation requirements of the reverse compensation signal in the interference suppression process.

[0081] In some alternative embodiments, the interference cancellation circuit is configured with a drive compensation circuit for driving compensation of the second coil based on the loss characteristics of the third signal and the second coil.

[0082] Furthermore, the interference cancellation circuit integrates a drive compensation circuit, which is connected in series in the drive path between the third signal and the second coil. It directly receives the third signal output from the preceding inverting circuit, providing closed-loop drive regulation for the second coil. The second coil inherently possesses winding resistance and inductance. Under alternating signal drive conditions, the coil impedance changes objectively with the signal frequency. Simultaneously, conduction voltage drop and reactive power losses occur during line conduction. These inherent electrical losses cause attenuation of the drive current and output magnetic field strength, resulting in insufficient cancellation magnetic field output. The drive compensation circuit, relying on a sampling resistor and operational amplifier conditioning circuit, acquires real-time load voltage and circuit operating current on the coil drive circuit side, indirectly characterizing the current load loss and impedance state of the second coil without requiring additional complex sensing structures. Combining the input waveform characteristics of the third signal and the real-time load conditions of the coil, and relying on a linear amplification and negative feedback adjustment architecture, it dynamically adjusts the output drive gain, appropriately boosting and compensating the drive level and circuit current supplied to the second coil. Relying on the continuous adjustment of the hardware negative feedback loop, it offsets the signal attenuation caused by coil winding impedance and line loss, corrects the drive deviation caused by load changes, ensures the excitation signal loaded at both ends of the second coil is complete and stable, keeps the coil excitation current in a continuous and stable manner, maintains the electromagnetic conversion efficiency of the second coil, ensures that the output strength of the phase-destroying magnetic field is consistent with the dynamic response, and adapts to the actual operating conditions of long-term continuous operation.

[0083] In some alternative embodiments, multiple sets of interference suppression devices are provided on the shielding cover.

[0084] Furthermore, such as Figure 3As shown, multiple sets of interference suppression devices are uniformly arranged along the circumferential sidewall surface of the shield, forming a distributed array. From a top-down perspective, each set of devices is linearly arranged along the outer perimeter of the shield, continuously distributed from the first to the Nth set, with regular spacing between each set to avoid electromagnetic coupling crosstalk. Each set of interference suppression devices consists of an inverting amplifier circuit, an interference pickup coil, and an interference cancellation coil. The inverting amplifier circuit is mounted on the X-ray flat panel detector circuit board and electrically connected to the interference pickup coil and interference cancellation coil via onboard wiring. The interference pickup coil and interference cancellation coil are synchronously arranged on the outer surface of the interference shield, maintaining a co-directional winding structure, forming pairs of coils along the outer wall of the shield. Multiple sets of devices operate synchronously. Each set of interference pickup coils independently collects changes in the external magnetic field of its local area. The generated induced signal is sent to the corresponding inverting amplifier circuit for amplification and phase reversal processing. The processed signal drives the corresponding set of interference cancellation coils, generating a reverse compensation magnetic field in the local area of ​​the outer wall of the shield. Through the coordinated action of multiple devices, a magnetic field cancellation network covering the entire periphery of the shielding cover is formed, effectively suppressing low-frequency interference magnetic fields intruding from different directions and reducing the impact of magnetic field penetration on the internal readout chip. From a side view, the entire device is arranged in a planar attachment along the outer wall of the shielding cover, without occupying additional vertical space inside the detector. This adapts to the compact structural installation requirements of flat panel detectors. From a 90-degree parallel rotation, the attachment relationship between the coil and the outer wall of the shielding cover is clearly visible. The coil winding plane remains parallel to the shielding cover wall, ensuring spatial correspondence between magnetic field pickup and compensation, guaranteeing that the canceling magnetic field and the original interference magnetic field are on the same plane of action, and improving the spatial matching degree of magnetic field cancellation.

[0085] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. An X-ray flat panel detector interference suppression method applied to an X-ray flat panel detector interference suppression device, the X-ray flat panel detector interference suppression device being installed on a readout circuit board of an X-ray flat panel, the X-ray flat panel detector interference suppression device comprising: The shielding cover, interference pickup circuit, amplification circuit, inverting circuit, and interference cancellation circuit are characterized in that the method includes: In response to a change in the magnetic field outside the shield, an induced electromotive force is generated in the first coil of the interference pickup circuit, and a first signal is output. The shield is disposed around the readout chip. The amplifier circuit receives the first signal and amplifies it based on a pre-configured gain to output the second signal. The phase of the second signal is shifted using the inverting circuit to output a third signal, the phase of which is opposite to that of the second signal. The second coil in the interference cancellation circuit generates a cancellation magnetic field based on the third signal.

2. The method according to claim 1, characterized in that, The pre-configured gain is an adaptive gain, and the adaptive configuration process of the pre-configured gain includes: In response to a change in the magnetic field inside the shield, an induced electromotive force is generated in the third coil, and a fourth signal is output. The third coil is located inside the shield, and the fourth signal is processed by an internal amplification circuit. The amplitudes of the third and fourth signals are collected separately to obtain the third and fourth amplitudes. Update the pre-configured gain based on the third and fourth amplitude values; The in-phase gain configuration circuit of the amplifier circuit is adjusted based on the updated pre-configured gain.

3. The method according to claim 1, characterized in that, The inverting circuit is equipped with an operational amplifier. The step of using the inverting circuit to shift the phase of the second signal and output a third signal includes: The second signal is input to the inverting input terminal of the operational amplifier; The phase of the second signal is shifted by using the resistor ratio of the operational amplifier to output the third signal.

4. The method according to claim 1, characterized in that, The inverting circuit is configured in the amplifying circuit, and the step of using the inverting circuit to shift the phase of the second signal and output a third signal includes: While using a differential amplifier to differentially amplify the first signal based on a pre-configured gain, the differential amplifier also performs a phase flip on the first signal to output a third signal in differential form. The amplifier circuit is equipped with a differential amplifier and a non-inverting gain configuration circuit.

5. The method according to claim 1, characterized in that, The inverting circuit is an RC all-pass phase-shifting circuit. The step of using the inverting circuit to shift the phase of the second signal and output a third signal includes: The resonant frequency in the RC full-pass phase-shifting circuit is determined based on the frequency of the second signal, and the capacitance and resistance values ​​of the RC full-pass phase-shifting circuit are adjusted based on the resonant frequency. The phase of the second signal is shifted based on the adjusted RC full-pass phase shift circuit, and the third signal is output.

6. The method according to claim 1, characterized in that, The inverting circuit is an electrode reverse connection circuit. The step of using the inverting circuit to shift the phase of the second signal and output a third signal includes: The polarity of the second signal is reversed using an electrode reversal circuit to output a third signal. The third signal is connected to the second coil in the interference cancellation circuit.

7. The method according to claim 1, characterized in that, After using the inverting circuit to shift the phase of the second signal and output the third signal, the method further includes: The phases of the second signal and the third signal are acquired to obtain the second phase and the third phase; The error phase is obtained based on the second and third phases; The third phase is calibrated based on the error phase using a phase calibration circuit.

8. An X-ray flat panel detector interference suppression device, characterized in that, The X-ray flat panel detector interference suppression device is mounted on the readout circuit board of the X-ray flat panel. The X-ray flat panel detector interference suppression device includes: a shielding cover, an interference pickup circuit, an amplification circuit, an inverting circuit, and an interference cancellation circuit, wherein: The shielding cover is disposed around the readout chip, and the interference pickup circuit, amplification circuit, inverting circuit and interference cancellation circuit are disposed outside the shielding cover; The interference pickup circuit is equipped with a first coil, which is used to generate an induced electromotive force in the first coil in response to a change in the magnetic field outside the shield, and output a first signal. The amplifier circuit is equipped with a differential amplifier and a non-inverting gain configuration circuit, which are used to receive the first signal, amplify the first signal based on the pre-configured gain, and output the second signal. The inverting circuit is used to shift the phase of the second signal and output a third signal, the phase of which is opposite to that of the second signal. The interference pickup circuit is provided with a second coil, which is used to generate a destructive magnetic field. The first coil and the second coil are wound in the same direction.

9. The apparatus according to claim 8, characterized in that, The shielding cover has a third coil and an inner amplifier circuit on its inner side. The third coil is used to generate an induced electromotive force in response to a change in the magnetic field inside the shielding cover, and output a fourth signal. The fourth signal is processed by the inner amplifier circuit.

10. The apparatus according to claim 8, characterized in that, The inverting circuit can be any one of an operational amplifier, a differential amplifier, an RC all-pass phase shifter circuit, and an electrode reversal circuit.

11. The apparatus according to claim 8, characterized in that, The interference cancellation circuit is equipped with a drive compensation circuit for driving compensation of the second coil based on the third signal and the loss characteristics of the second coil.

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