Circuit for enhancing load transient response force, power supply chip

Abstract

The embodiment of the present disclosure provides a circuit for enhancing load transient response force, a power supply chip, wherein the circuit comprises: a reference voltage generating circuit, an overvoltage transient response circuit, an undervoltage transient response circuit and a bandwidth temporary adjusting circuit; the reference voltage generating circuit is used for generating a main circuit reference voltage, an overvoltage reference voltage and an undervoltage reference voltage; the overvoltage transient response circuit is used for comparing a feedback voltage of an output voltage with the overvoltage reference voltage to output a first control signal, and adjusting a control electrode voltage of a power tube according to the first control signal; the undervoltage transient response circuit is used for comparing the feedback voltage with the undervoltage reference voltage to output a second control signal, and adjusting the control electrode voltage of the power tube according to the second control signal; and the bandwidth temporary adjusting circuit is used for generating a third control signal according to the first control signal and the second control signal, and adjusting a bandwidth of the main circuit according to the third control signal. The problem of how to improve the load transient response force of the LDO is solved.

Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and more specifically, to circuits and power supply chips that enhance load transient response. Background Technology

[0002] Low dropout linear regulators (LDOs) are common power supply chips characterized by simple structure, low cost, and low output voltage ripple, and are widely used in the electronics, automotive, and aerospace fields.

[0003] In practical applications, LDOs often encounter situations involving sudden load changes, such as... Figure 1 As shown in the LDO circuit diagram, when the load rapidly changes from light load to heavy load, the voltage at point A is lower under light load conditions. When the load suddenly increases, the power transistor M0 cannot output sufficient energy, and the output voltage Vout will decrease, resulting in a lower feedback voltage V. FB When the voltage drops, the error amplifier EA raises the voltage at point A, thus increasing the output voltage Vout, completing the regulation process. Due to the limitations of the LDO loop's bandwidth and slew rate, Vout drops rapidly, but the loop cannot quickly raise the voltage at point A. Therefore, Vout gradually decreases and then slowly recovers to the normal voltage through loop regulation. When the load rapidly changes from heavy to light, the voltage at point A is higher under heavy load. When the load suddenly decreases, the power transistor M0 continues to output energy at the heavy load level, so the output voltage Vout increases. The error amplifier EA lowers the voltage at point A, thus lowering the output voltage Vout. Similarly, due to the limitations of bandwidth and slew rate, Vout increases rapidly, but the loop cannot quickly lower the voltage at point A. Therefore, the output voltage Vout gradually increases and then slowly recovers to the normal voltage through loop regulation.

[0004] As can be seen from the above description, when the load changes abruptly, the output voltage cannot quickly recover to the normal voltage due to the limitations of the LDO loop bandwidth, slew rate, etc., which affects the stability of the circuit and may even cause adverse consequences to the subsequent circuits. Summary of the Invention

[0005] The embodiments described herein provide a circuit and power supply chip for enhancing the load transient response of an LDO.

[0006] According to a first aspect of this disclosure, a circuit for enhancing load transient response is provided, the circuit comprising: a reference voltage generation circuit, an overvoltage transient response circuit, an undervoltage transient response circuit, and a bandwidth temporary adjustment circuit; wherein, the reference voltage generation circuit is configured to generate a main circuit reference voltage of a low-dropout linear regulator, an overvoltage reference voltage of the overvoltage transient response circuit, and an undervoltage reference voltage of the undervoltage transient response circuit based on a first reference voltage; the overvoltage transient response circuit is configured to compare a feedback voltage of the output voltage of the low-dropout linear regulator with the overvoltage reference voltage and output a first control signal, and adjust the control voltage of the power transistor of the low-dropout linear regulator according to the first control signal; the undervoltage transient response circuit is configured to compare the feedback voltage with the undervoltage reference voltage and output a second control signal, and adjust the control voltage of the power transistor of the low-dropout linear regulator according to the second control signal; the bandwidth temporary adjustment circuit is configured to generate a third control signal based on the first control signal and the second control signal, and adjust the bandwidth of the main circuit according to the third control signal.

[0007] Optionally, the overvoltage transient response circuit includes: a first comparator, a first switch, and a first current generating module, wherein the positive input terminal of the first comparator is coupled to the feedback voltage, the negative input terminal of the first comparator is coupled to the overvoltage reference voltage, and the output terminal of the first comparator is coupled to the control terminal of the first switch; one end of the first switch is coupled to the control electrode of the power transistor, and the other end of the first switch is coupled to one end of the first current generating module, and the other end of the first current generating module is coupled to ground or power supply voltage; the first current generating module is configured to generate pull-down or pull-up current to pull down or pull up the control electrode voltage of the power transistor.

[0008] Optionally, the undervoltage transient response circuit includes: a second comparator, a second switch, and a second current generation module. The positive input terminal of the second comparator is coupled to the undervoltage reference voltage, the negative input terminal of the second comparator is coupled to the feedback voltage, and the output terminal of the second comparator is coupled to the control terminal of the second switch. One end of the second switch is coupled to the control electrode of the power transistor, and the other end of the second switch is coupled to one end of the second current generation module. The other end of the second current generation module is coupled to the power supply voltage or ground. The second current generation module is configured to generate pull-up or pull-down current to pull up or pull down the control electrode voltage of the power transistor.

[0009] Optionally, the temporary bandwidth adjustment circuit includes: an OR gate, a third switch, and a third current generation module, wherein the first input terminal of the OR gate is coupled to the first control signal, the second input terminal of the OR gate is coupled to the second control signal, the output terminal of the OR gate is coupled to the control terminal of the third switch, and outputs the third control signal; one end of the third switch is coupled to the error amplifier of the main circuit, and the other end of the third switch is coupled to the third current generation module; the other end of the third current generation module is coupled to the power supply voltage; the third current generation module is configured to generate an adjustment current to adjust the bandwidth of the main circuit.

[0010] Optionally, the reference voltage generation circuit includes: a third comparator, a first transistor, a first resistor, and an output resistor string, wherein the positive input terminal of the third comparator is coupled to the first reference voltage, the negative input terminal of the third comparator is coupled to one end of the first resistor and one end of the output resistor string, and the output terminal of the third comparator is coupled to the control electrode of the first transistor; the first electrode of the first transistor is coupled to the other end of the output resistor string, and the second electrode of the first transistor is coupled to the power supply voltage; the output resistor string is used to output the main circuit reference voltage, the overvoltage reference voltage, and the undervoltage reference voltage; and the other end of the first resistor is coupled to ground.

[0011] Optionally, the reference voltage generating circuit further includes a trimming circuit, wherein the trimming circuit is coupled between the first resistor and the output resistor string and is configured to adjust the accuracy of the main circuit reference voltage.

[0012] Optionally, when the first control signal is high, the first switch is controlled to close; when the second control signal is high, the second switch is controlled to close.

[0013] Optionally, when the third control signal is high, the third switch is controlled to close.

[0014] Optionally, the undervoltage reference voltage is less than the main circuit reference voltage, and the main circuit reference voltage is less than the overvoltage reference voltage.

[0015] According to a second aspect of this disclosure, a power chip is provided, the power chip including circuitry for enhancing load transient response according to any one of the first aspects.

[0016] The circuit for enhancing load transient response in embodiments of this disclosure improves the load transient response when the load rapidly changes from heavy to light load by adjusting the control voltage of the power transistor of the low-dropout linear regulator (LDO) based on the comparison between the output voltage feedback voltage and the overvoltage reference voltage, and by adjusting the control voltage of the LDO power transistor based on the comparison between the output voltage feedback voltage and the undervoltage reference voltage. Furthermore, it temporarily adjusts the bandwidth of the main circuit based on the results of the two comparisons mentioned above, further improving the load transient response. The combination of these two aspects effectively improves the transient response of the LDO during load changes, ensuring circuit stability and avoiding adverse effects on subsequent circuits. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein:

[0018] Figure 1 An example diagram of an LDO circuit based on related technologies is shown; Figure 2 A schematic block diagram of a circuit for enhancing load transient response according to an embodiment of the present disclosure is shown; Figure 3 , 4 Exemplary circuit diagrams of two overvoltage transient response circuits according to embodiments of this disclosure are shown; Figure 5 , 6 Exemplary circuit diagrams of two undervoltage transient response circuits according to embodiments of the present disclosure are shown; Figure 7 An exemplary circuit diagram of a bandwidth temporary adjustment circuit according to an embodiment of the present disclosure is shown; Figure 8 , 9 Exemplary circuit diagrams of two reference voltage generation circuits according to embodiments of the present disclosure are shown; Figure 10 The diagram shows waveforms of key signals related to the circuit for enhancing load transient response according to an embodiment of the present disclosure; The elements in the attached diagram are schematic and not drawn to scale. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0020] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “connecting” or “coupling” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components.

[0021] In all embodiments of this disclosure, since the source and drain of a metal-oxide-semiconductor (MOS) transistor are symmetrical, and the conduction current directions between the source and drain of an N-type transistor and a P-type transistor are opposite, the controlled middle terminal of the MOS transistor is referred to as the control terminal, and the remaining two terminals of the MOS transistor are referred to as the first terminal and the second terminal, respectively. In all embodiments of this disclosure, terms such as "first" and "second" are used only to distinguish one component (or part of a component) from another component (or another part of a component).

[0022] To improve the load transient response of an LDO, a circuit for enhancing load transient response is proposed. In this embodiment, the control voltage of the LDO's power transistor is adjusted by comparing the output voltage feedback voltage with an overvoltage reference voltage, thus improving the load transient response when the load rapidly changes from heavy to light load. Similarly, the control voltage of the LDO's power transistor is adjusted by comparing the output voltage feedback voltage with an undervoltage reference voltage, further improving the load transient response when the load rapidly changes from light to heavy load. Furthermore, the bandwidth of the main circuit is temporarily adjusted based on the results of the two comparisons mentioned above, further enhancing the load transient response. In addition, the circuit of this embodiment is simple, easy to implement, and provides a significant improvement in transient response without increasing power consumption. The circuit for enhancing load transient response of this disclosure will be described in detail below.

[0023] Figure 2 A schematic block diagram of a circuit 100 for enhancing load transient response according to an embodiment of the present disclosure is shown. The circuit 100 for enhancing load transient response is coupled to the main circuit 200 of a low-dropout linear regulator, as shown below. Figure 2 As shown, the circuit 100 for enhancing load transient response includes: a reference voltage generation circuit 110, an overvoltage transient response circuit 120, an undervoltage transient response circuit 130, and a bandwidth temporary adjustment circuit 140. The reference voltage generation circuit 110 is configured to generate, based on the first reference voltage Vref1, the main circuit reference voltage Vref0 of the low-dropout linear regulator, the overvoltage reference voltage VrefH of the overvoltage transient response circuit 120, and the undervoltage reference voltage VrefL of the undervoltage transient response circuit 130. The main circuit 200 of the low-dropout linear regulator consists of a power transistor M0, voltage divider resistors (R2, R3), an error amplifier EA, and a capacitor C1. The main circuit reference voltage Vref0 generated by the reference voltage generation circuit 110 serves as the reference voltage for the error amplifier EA. The operating principle of the main circuit 200 is as follows: the output voltage Vout is sampled through the voltage divider resistors to obtain the feedback voltage V. FB The error amplifier EA will collect the feedback voltage V FB The error signal is compared with the main circuit reference voltage Vref0 and amplified. It is then input to the control electrode of the power transistor M0, and the conduction level is adjusted according to this signal, thereby controlling the output voltage Vout. Figure 2 The power transistor M0 in the example is an N-type MOSFET, but it can also be a P-type MOSFET.

[0024] The overvoltage reference voltage VrefH and undervoltage reference voltage VrefL provide reference voltages for the subsequent overvoltage transient response circuit 120 and undervoltage transient response circuit 130. The undervoltage reference voltage VrefL is less than the main circuit reference voltage Vref0, and the main circuit reference voltage Vref0 is less than the overvoltage reference voltage VrefH. In this embodiment, three reference voltages are generated by a reference voltage generation circuit 110 to ensure that the three reference voltages are on the same branch, making their voltage error values ​​more uniform and improving the overall accuracy of the circuit.

[0025] The overvoltage transient response circuit 120 is configured to receive the feedback voltage V of the output voltage Vout of the low-dropout linear regulator. FB The overvoltage transient response circuit 120 is compared with the overvoltage reference voltage VrefH to output a first control signal B, and the control gate voltage Vgate of the power transistor M0 of the low-dropout linear regulator is adjusted according to the first control signal B. Specifically, the circuit principle of the overvoltage transient response circuit 120 is as follows: when the load of the low-dropout linear regulator rapidly changes from heavy load to light load, the output voltage Vout increases, and the feedback voltage V... FB The overvoltage transient response circuit 120 compares the feedback voltage V. FBWith the overvoltage reference voltage VrefH, since the overvoltage reference voltage VrefH is greater than the main circuit reference voltage Vref0, when the feedback voltage V... FB When the overvoltage reference voltage VrefH is greater than or equal to the overvoltage voltage Vout, it indicates that the output voltage Vout has experienced overvoltage. At this time, the first control signal B is a high-level signal, which quickly adjusts the voltage at the control electrode of the power transistor M0. If the power transistor M0 is an N-type MOSFET, a pull-down current can be provided to the control electrode of the power transistor M0 through the control of the first control signal B, causing Vgate to drop rapidly, thus reducing Vout and improving the overvoltage. If the power transistor M0 is a P-type MOSFET, a pull-up current can be provided to the control electrode of the power transistor M0 through the first control signal B, thereby improving the overvoltage. Afterwards, as Vout decreases, the feedback voltage V... FB When the voltage is less than the overvoltage reference voltage VrefH, the first control signal B becomes a low-level signal and does not provide pull-down or pull-up current, thus not affecting the voltage of the control electrode of the power transistor M0. It can be seen that the overvoltage transient response circuit 120 mainly functions when the load rapidly changes from heavy load to light load, improving the load transient response during this phase. Furthermore, the specific voltage value of the overvoltage reference voltage VrefH can be adaptively set according to actual needs, provided it is greater than the main circuit reference voltage Vref0; this embodiment does not impose any limitations.

[0026] The undervoltage transient response circuit 130 is configured to transfer the feedback voltage V FB The output voltage is compared with the undervoltage reference voltage VrefL to output a second control signal D, and the control gate voltage Vgate of the power transistor M0 of the low dropout linear regulator is adjusted according to the second control signal D. Specifically, the circuit principle of the undervoltage transient response circuit 130 is as follows: when the load of the low dropout linear regulator rapidly changes from a light load to a heavy load, the output voltage Vout decreases, and the feedback voltage V... FB The voltage is reduced by comparing the feedback voltage V through the undervoltage transient response circuit 130. FB With the undervoltage reference voltage VrefL, since the undervoltage reference voltage VrefL is less than the main circuit reference voltage Vref0, when the feedback voltage V... FB When the voltage is less than or equal to the undervoltage reference voltage VrefL, it indicates that the output voltage Vout is undervoltage. At this time, the second control signal D is a high-level signal, which quickly adjusts the voltage at the control electrode of power transistor M0. If power transistor M0 is an N-type MOSFET, a pull-up current can be provided to its control electrode through the second control signal D, causing Vgate to rise rapidly and Vout to rise, thereby improving the undervoltage. If power transistor M0 is a P-type MOSFET, a pull-down current can be provided to its control electrode through the second control signal D, further improving the undervoltage. As Vout increases, when the feedback voltage V... FBWhen the voltage is greater than the undervoltage reference voltage VrefL, the second control signal D becomes a low-level signal and does not provide pull-up or pull-down current, thus not affecting the voltage of the control electrode of the power transistor M0. It can be seen that the undervoltage transient response circuit 130 mainly functions when the load rapidly changes from a light load to a heavy load, improving the load transient response during this phase. Furthermore, the specific voltage value of the undervoltage reference voltage VrefL can be adaptively set according to actual needs, provided it is less than the main circuit reference voltage Vref0; this embodiment does not impose any limitations.

[0027] The temporary bandwidth adjustment circuit 140 is configured to generate a third control signal F based on the first control signal B and the second control signal D, and to adjust the bandwidth of the main circuit 200 based on the third control signal F. The first control signal B determines whether the output voltage Vout is overvoltage, and the second control signal D determines whether the output voltage Vout is undervoltage. Therefore, "generating the third control signal F based on the first control signal B and the second control signal D" specifically means taking the first control signal B and the second control signal D as an OR to obtain the third control signal F. This allows the bandwidth of the main circuit 200 to be temporarily increased during overvoltage or undervoltage conditions, further improving the load transient response. Specifically, increasing the bandwidth of the main circuit 200 can be achieved by injecting additional current into the error amplifier EA in the main circuit 200 through the third control signal F. Since no additional current is injected when there is no overvoltage or undervoltage, this is only a temporary increase in bandwidth and does not affect the normal operation of the low-dropout linear regulator (LDO).

[0028] From the above description, it can be seen that the circuit for enhancing the transient response of the load in the embodiments of this disclosure, on the one hand, uses the feedback voltage V of the output voltage Vout. FB The control voltage of the power transistor M0 of the low-dropout linear regulator (LDO) is adjusted based on the comparison with the overvoltage reference voltage VrefH, improving the transient response of the load when the load rapidly changes from heavy to light load, and through the feedback voltage Vout of the output voltage Vout. FB The control voltage of the LDO power transistor M0 is adjusted based on the comparison with the undervoltage reference voltage VrefL, improving the transient response of the load when it rapidly changes from light to heavy load. Furthermore, the bandwidth of the LDO's main circuit is temporarily adjusted based on the results of the two comparisons mentioned above, further improving the transient response. The combination of these two aspects effectively enhances the LDO's transient response during sudden load changes, ensuring circuit stability and avoiding adverse effects on subsequent circuits.

[0029] Furthermore, such as Figure 3As shown, the overvoltage transient response circuit 120 includes: a first comparator A1, a first switch S1, and a first current generation module 121, wherein the positive input terminal of the first comparator A1 is coupled to the feedback voltage V. FB The negative input terminal of the first comparator A1 is coupled to the overvoltage reference voltage VrefH. The output terminal of the first comparator A1 outputs a first control signal B, which is coupled to the control terminal of the first switch S1. One end of the first switch S1 is coupled to the control electrode Vgate of the power transistor M0, and the other end of the first switch S1 is coupled to one end of the first current generation module 121. The other end of the first current generation module 121 is coupled to ground. The first current generation module 121 is configured to generate a pull-down current to pull down the control electrode voltage of the power transistor M0. The circuit structure of the first current generation module 121 is not limited, as long as it can generate a stable current; for example, it can be a current source circuit.

[0030] Combination Figure 3 The working principle of the overvoltage transient response circuit 120 is explained as follows: For the first comparator A1, when the load is rapidly changed from heavy load to light load, Vout experiences overvoltage, and V... FB Increase, when V FB When VrefH is greater than or equal to V, the first control signal B is high, controlling the first switch S1 to close. After the first switch S1 closes, the pull-down current generated by the first current generation module 121 pulls down Vgate, thereby causing Vout to drop rapidly. As Vout decreases, when V... FB When <VrefH, the first control signal B is low and the first switch S1 is open.

[0031] In addition, for Figure 3 The overvoltage transient response circuit 120 is suitable for when the power transistor M0 is an N-type MOSFET. If the power transistor M0 is a P-type MOSFET, the corresponding overvoltage transient response circuit 120 is as follows: Figure 4 As shown. Figure 4 and Figure 3 The difference is that the other end of the first current generating module 121 is coupled to the power supply voltage Vcc, not the ground terminal. Therefore, the first current generating module 121 generates a pull-up current, not a pull-down current.

[0032] Furthermore, such as Figure 5 As shown, the undervoltage transient response circuit 130 includes: a second comparator A2, a second switch S2, and a second current generation module 131. The positive input terminal of the second comparator A2 is coupled to the undervoltage reference voltage VrefL, and the negative input terminal of the second comparator A2 is coupled to the feedback voltage V. FBThe output of the second comparator A2 is coupled to the control terminal of the second switch S2; one end of the second switch S2 is coupled to the control electrode Vgate of the power transistor M0, and the other end of the second switch S2 is coupled to one end of the second current generation module 131, the other end of the second current generation module 131 being coupled to the power supply voltage Vcc; the second current generation module 131 is configured to generate a pull-up current to pull up the control electrode voltage Vgate of the power transistor M0. The circuit structure of the second current generation module 131 is not limited, as long as it can generate a stable current; for example, it can be a current source circuit.

[0033] Combination Figure 5 The working principle of the undervoltage transient response circuit 130 is explained as follows: For the second comparator A2, when the load is rapidly adjusted from a light load to a heavy load, Vout is undervoltage, and V... FB Decrease, when V FB When VrefL is less than or equal to V, the second control signal D is high, controlling the second switch S2 to close. After the second switch S2 closes, the pull-up current generated by the second current generation module 131 pulls up Vgate, thereby causing Vout to rise rapidly. As Vout rises, when V... FB When >VrefL, the second control signal D is low, and the second switch S2 is open.

[0034] In addition, for Figure 5 The undervoltage transient response circuit 130 is suitable for when the power transistor M0 is an N-type MOSFET. If the power transistor M0 is a P-type MOSFET, the corresponding undervoltage transient response circuit 130 is as follows: Figure 6 As shown. Figure 6 and Figure 5 The difference is that the other end of the second current generating module 131 is coupled to the ground terminal instead of the power supply voltage Vcc. Therefore, the second current generating module 131 generates a pull-down current instead of a pull-up current.

[0035] Furthermore, such as Figure 7As shown, the temporary bandwidth adjustment circuit 140 includes: an OR gate, a third switch S3, and a third current generation module 141. The first input terminal of the OR gate is coupled to the first control signal B, the second input terminal of the OR gate is coupled to the second control signal D, and the output terminal of the OR gate is coupled to the control terminal of the third switch S3, outputting the third control signal F. One end of the third switch S3 is coupled to the error amplifier EA of the main circuit 200, and the other end of the third switch S3 is coupled to the third current generation module 141. The other end of the third current generation module 141 is coupled to the power supply voltage Vcc. The third current generation module 141 is configured to generate an adjustment current to adjust the bandwidth of the main circuit 200. The circuit structure of the third current generation module 141 is not limited, as long as it can generate a stable current; for example, it can be a current source circuit.

[0036] Combination Figure 7 The working principle of the temporary bandwidth adjustment circuit 140 is explained as follows: When both the first control signal B and the second control signal D are low, the third control signal F is low and the third switch S3 is open; when either the first control signal B or the second control signal D is high, i.e. when the output voltage Vout is over-voltage or under-voltage, the third control signal F is high, controlling the third switch S3 to close, so that the adjustment current generated by the third current generation module 141 is injected as an additional current into the error amplifier EA, thereby improving the bandwidth and slew rate and further enhancing the load transient response capability.

[0037] Furthermore, such as Figure 8 As shown, the reference voltage generation circuit 110 includes: a third comparator OP1, a first transistor M1, a first resistor R1, and an output resistor string 111. The positive input terminal of the third comparator OP1 is coupled to the first reference voltage Vref1. The negative input terminal of the third comparator OP1 is coupled to one end of the first resistor R1 and one end of the output resistor string 111. The output terminal of the third comparator OP1 is coupled to the control electrode of the first transistor M1. The first electrode of the first transistor M1 is coupled to the other end of the output resistor string 111, and the second electrode of the first transistor M1 is coupled to the power supply voltage Vcc. The output resistor string 111 is used to output the main circuit reference voltage Vref0, the overvoltage reference voltage VrefH, and the undervoltage reference voltage VrefL. The other end of the first resistor R1 is coupled to ground.

[0038] For example, this disclosure provides a circuit example diagram of an output resistor series 111, as shown in the embodiment. Figure 8As shown, the output resistor string 111 is composed of multiple resistors (Rc1, Rc2, ..., Rck) connected in series. One end of the first resistor Rc1 is coupled to the first terminal of the first transistor M1, and one end of the last resistor Rck is coupled to one end of the first resistor R1. The main circuit reference voltage Vref0, the overvoltage reference voltage VrefH, and the undervoltage reference voltage VrefL are output from three nodes in the connection nodes between the first resistor Rc1 and the last resistor Rck. The specific positions of the three nodes are determined based on the voltage values ​​of Vref0, VrefH, and VrefL, and the values ​​of each resistor in the output resistor string 1111. Figure 8 This is an exemplary circuit structure. The structure of the output resistor string 111 can also be in other forms, as long as it can output voltages of different values. This disclosure does not impose any limitations on the embodiments.

[0039] Furthermore, due to mismatch issues in the third comparator OP1, in order to reduce the impact of mismatch on the circuit, this disclosure also provides another reference voltage generation circuit 110, such as... Figure 9 As shown. Figure 9 and Figure 8 In comparison, a trimming circuit 112 is added. This trimming circuit 112 is coupled between the first resistor R1 and the output resistor series 111, and is configured to adjust the accuracy of the main circuit reference voltage Vref0. This ensures the overall circuit accuracy. The trimming circuit 112 is a commonly used Trim circuit in circuit design.

[0040] Combination Figure 2 , 3 Articles 5, 7, and 8 describe the working principle of the circuit 100 for enhancing the transient response of the load according to the embodiments of this disclosure: The reference voltage generation circuit 110 obtains VrefH, VrefL, and Vref0 based on Vref1. Vref0 is input to EA, and VrefH and VrefL are input to A1 and A2 respectively. In steady state, V... FB = Vref0, the first control signal B output by A1 and the second control signal D output by A2 are both low, Vgate has no pull-up or pull-down current for adjustment, and the third control signal F is also low, EA has no additional current injection; when the load changes rapidly from heavy load to light load, V FB Increase, when V FB When VrefH is greater than or equal to V, B changes from low to high, closing the first switch S1. This results in a pull-down current that pulls down Vgate, causing Vout to drop rapidly and improving the load transient response during this phase. Simultaneously, the third control signal F also goes high, injecting additional current into EA. This increases the bandwidth and slew rate of the main circuit 200, further enhancing the load transient response. As Vout decreases, when V...FB When VrefH < 0, the first control signal B is low, the first switch S1 is open, the third control signal F also becomes low, and the third switch S3 is open. When the load rapidly changes from light load to heavy load, Vout is undervoltage, V FB Decrease, when V FB When VrefL ≤ V, D changes from low to high, closing the second switch S2. This results in a pull-up current to Vgate, causing Vout to rise rapidly and improving the load transient response during this phase. Simultaneously, the third control signal F also goes high, injecting additional current into EA. This increases the bandwidth and slew rate of the main circuit 200, further enhancing the load transient response. As Vout increases, when V... FB When >VrefL, the second control signal D is low, the second switch S2 is open, the third control signal F also becomes low, and the third switch S3 is open.

[0041] To more clearly demonstrate the effect of the circuit 100 that enhances the transient response of the load in the embodiments of this disclosure, waveform diagrams of relevant key signals are also provided, such as... Figure 10 As shown, the load current Iload and feedback voltage V of the LDO are illustrated. FB A waveform diagram showing the overvoltage reference voltage VrefH, the undervoltage reference voltage VrefL, the first control signal B, the second control signal D, and the third control signal F. For comparison... Figure 10 It also shows Figure 1 The feedback voltage V in FB The waveform diagram is denoted as V. FB This is used to reflect the change in output voltage Vout when the circuit 100 for enhancing load transient response is not used according to the embodiments of this disclosure. From Figure 10 As can be seen, when the load current Iload suddenly increases, that is, when the load rapidly changes from a light load to a heavy load, V FB Suddenly decrease, when V FB When VrefL is less than or equal to V, D is high and F is also high, compared to V. FB During the period when D is high, V FB The load current will be rapidly increased, meaning Vout can be quickly pulled up, improving the load transient response during this phase; when the load current Iload suddenly decreases, i.e., when the load rapidly changes from heavy load to light load, Vout will be rapidly pulled up. FB Suddenly rise, when V FB When VrefH is greater than or equal to V, B is high and F is also high compared to V. FB During the period when B is high, V FB It will be pulled down quickly, meaning Vout can be pulled down quickly, improving the transient response at this stage.

[0042] In summary, the circuit 100 for enhancing load transient response in this embodiment can significantly improve the load transient response capability of a low-dropout linear regulator. Furthermore, the circuit structure for enhancing load transient response in this embodiment is simple, easy to implement, and consumes minimal additional power.

[0043] Furthermore, this disclosure also provides a power supply chip, which includes at least a circuit 100 for enhancing load transient response according to any of the foregoing embodiments and an LDO main circuit, wherein the LDO main circuit is the main circuit 200 in the foregoing embodiments. The power supply chip in this disclosure can be an LDO chip, and because it utilizes the circuit for enhancing load transient response in the foregoing embodiments, its load transient response capability is better. The LDO main circuit in this embodiment can be… Figure 2 The structure of the main circuit 200 can also be used for other LDO main circuits, and this disclosure does not limit the embodiments.

[0044] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.

[0045] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this disclosure may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0046] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A circuit for enhancing the transient response of a load, characterized in that, The circuit includes: a reference voltage generation circuit, an overvoltage transient response circuit, an undervoltage transient response circuit, and a bandwidth temporary adjustment circuit; The reference voltage generation circuit includes a third comparator, a first transistor, a first resistor, and an output resistor string. It is configured to generate, based on a first reference voltage, the main circuit reference voltage of the low dropout linear regulator, the overvoltage reference voltage of the overvoltage transient response circuit, and the undervoltage reference voltage of the undervoltage transient response circuit. The undervoltage reference voltage is less than the main circuit reference voltage, and the main circuit reference voltage is less than the overvoltage reference voltage. The overvoltage transient response circuit includes a first comparator, a first switch, and a first current generation module, and is configured to compare the feedback voltage of the output voltage of the low dropout linear regulator with the overvoltage reference voltage, output a first control signal, and adjust the control electrode voltage of the power transistor of the low dropout linear regulator according to the first control signal. The undervoltage transient response circuit includes a second comparator, a second switch, and a second current generation module, and is configured to compare the feedback voltage with the undervoltage reference voltage and output a second control signal, and adjust the control electrode voltage of the power transistor of the low dropout linear regulator according to the second control signal; The temporary bandwidth adjustment circuit includes an OR gate, a third switch, and a third current generation module, and is configured to generate a third control signal based on the first control signal and the second control signal, and adjust the bandwidth of the main circuit based on the third control signal.

2. The circuit for enhancing load transient response according to claim 1, Its features are, Wherein, the positive input terminal of the first comparator of the overvoltage transient response circuit is coupled to the feedback voltage, the negative input terminal of the first comparator is coupled to the overvoltage reference voltage, and the output terminal of the first comparator is coupled to the control terminal of the first switch; One end of the first switch is coupled to the control electrode of the power transistor, and the other end of the first switch is coupled to one end of the first current generating module. The other end of the first current generating module is coupled to the ground terminal or the power supply voltage. The first current generating module is configured to generate pull-down or pull-up current to pull down or pull up the control electrode voltage of the power transistor.

3. The circuit for enhancing load transient response according to claim 2, characterized in that, The positive input terminal of the second comparator in the undervoltage transient response circuit is coupled to the undervoltage reference voltage, the negative input terminal of the second comparator is coupled to the feedback voltage, and the output terminal of the second comparator is coupled to the control terminal of the second switch. One end of the second switch is coupled to the control electrode of the power transistor, and the other end of the second switch is coupled to one end of the second current generating module. The other end of the second current generating module is coupled to the power supply voltage or ground terminal. The second current generating module is configured to generate pull-up or pull-down current to pull up or pull down the control electrode voltage of the power transistor.

4. The circuit for enhancing load transient response according to claim 1, Its features are, Wherein, the first input terminal of the OR gate of the bandwidth temporary adjustment circuit is coupled to the first control signal, the second input terminal of the OR gate is coupled to the second control signal, and the output terminal of the OR gate is coupled to the control terminal of the third switch and outputs the third control signal; One end of the third switch is coupled to the error amplifier of the main circuit, and the other end of the third switch is coupled to the third current generating module; the other end of the third current generating module is coupled to the power supply voltage. The third current generating module is configured to generate an regulating current to adjust the bandwidth of the main circuit.

5. The circuit for enhancing load transient response according to claim 1, Its features are, In this circuit, the positive input terminal of the third comparator of the reference voltage generation circuit is coupled to the first reference voltage, the negative input terminal of the third comparator is coupled to one end of the first resistor and one end of the output resistor string, and the output terminal of the third comparator is coupled to the control electrode of the first transistor. The first terminal of the first transistor is coupled to the other end of the output resistor string, and the second terminal of the first transistor is coupled to the power supply voltage. The output resistor string is used to output the main circuit reference voltage, the overvoltage reference voltage, and the undervoltage reference voltage; The other end of the first resistor is coupled to the ground terminal.

6. The circuit for enhancing load transient response according to claim 5, characterized in that, The reference voltage generation circuit also includes a trimming circuit. The adjustment circuit is coupled between the first resistor and the output resistor string and is configured to adjust the accuracy of the main circuit reference voltage.

7. The circuit for enhancing load transient response according to claim 3, characterized in that, When the first control signal is high, the first switch is closed; when the second control signal is high, the second switch is closed.

8. The circuit for enhancing load transient response according to claim 4, characterized in that, When the third control signal is high, it controls the third switch to close.

9. A power supply chip, characterized in that, The power chip includes a circuit that enhances the transient response of the load according to any one of claims 1 to 8.

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