High speed interconnect monitoring prediction system, method and artificial intelligence server
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI BIREN TECH CO LTD
- Filing Date
- 2026-05-13
- Publication Date
- 2026-08-04
AI Technical Summary
[0047] As can be seen from the above scheme, the high-speed interconnect monitoring and prediction system, method, and artificial intelligence server disclosed herein utilize a sensor group deployed at specific locations on the high-speed connector of the OAM board to achieve multi-dimensional information perception beyond high-speed signals, and realize state monitoring of the correlation between high-speed interconnect signals and environmental conditions in the artificial intelligence server. A relatively simple prediction logic is used to implement a lightweight prediction algorithm running on a resource-constrained data processing module, achieving real-time prediction at the board level and obtaining predictive evaluation information of high-speed interconnect status. This allows potential high-speed interconnect risks to be detected in advance before the high-speed interconnect signal completely deteriorates, ensuring the stable operation of the artificial intelligence server and corresponding cluster. Compared with related technologies that rely on cloud AI and discrete devices, this achieves fast, low-power, and low-cost monitoring and prediction. Furthermore, by performing corresponding safeguard operations, the physical layer parameters of the signal transmitting end are rapidly and adaptively adjusted to improve the quality of high-speed signals. The high-speed interconnect monitoring and prediction system, method, and artificial intelligence server disclosed herein, from sensors and lightweight algorithms in the data processing module to relatively simple execution control logic, realize a complete board-level integrated solution for high-speed interconnect monitoring that can be deployed on a single OAM board.
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Figure CN122507585A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of artificial intelligence monitoring technology, and in particular to a high-speed interconnected monitoring and prediction system, method and artificial intelligence server. Background Technology
[0002] Currently, artificial intelligence (AI) technology is evolving at an unprecedented pace, profoundly impacting all industries. Large-scale AI models have achieved significant breakthroughs in intelligence levels, operational efficiency, and application costs. AI server clusters are also evolving towards multi-GPU clusters, which places increasingly higher demands on server performance and maintenance.
[0003] In hardware infrastructure, the high-speed interconnect performance between hardware components, such as between accelerator chips and between central processing units and accelerator chips, directly impacts the computational inference speed of large-scale AI models. Furthermore, high-speed interconnect performance is fundamental to ensuring the stable operation of AI server clusters. As large-scale AI models continue to improve and AI server clusters expand, accurately grasping the status and trends of high-speed interconnect performance between hardware components to ensure the stability and reliability of large-scale server clusters has become an increasingly critical issue. Summary of the Invention
[0004] In view of this, this disclosure provides a high-speed interconnect monitoring and prediction system, method, and artificial intelligence server to realize the state monitoring of high-speed interconnect signals in the artificial intelligence server in relation to the environmental state, and to perform corresponding safeguard operations. It also provides high-speed interconnect state prediction and assessment information with predictive properties, so that potential high-speed interconnect risks can be known in advance before the high-speed interconnect signals are completely degraded, thereby ensuring the stable operation of the artificial intelligence server and the corresponding cluster.
[0005] According to one aspect of the embodiments of this disclosure, a high-speed interconnect monitoring and prediction system is provided, comprising:
[0006] A sensor group is deployed in the artificial intelligence server to collect sensing status information associated with the interconnection location of the OAM board within the artificial intelligence server. The OAM board is an artificial intelligence computing acceleration unit with an acceleration chip as its core and an integrated serial deserializer. The acceleration chip is used for artificial intelligence computing, and the serial deserializer is used for high-speed serial data transmission.
[0007] The data processing module, located within the artificial intelligence server and coupled to the sensor group and the serializer / deserializer, is used for:
[0008] Receive the sensing status information and receive the high-speed interconnect signal monitoring parameters of the OAM board from the serializer;
[0009] Based on the perceived state information, the high-speed interconnect signal monitoring parameters, and preset abnormal critical conditions, perform signal integrity protection operations; and,
[0010] Based on multiple high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times, the high-speed interconnect status prediction and evaluation information of the OAM board is obtained.
[0011] In one possible implementation, the sensor group includes at least one of an infrared temperature sensor, a strain sensor, and a vibration sensor;
[0012] The infrared temperature sensor is located inside the artificial intelligence server and is used to collect surface temperature information of the area where the high-speed connector pins of the OAM board are located in a non-contact manner.
[0013] The strain sensor is mounted on the PCB in the area where the high-speed connector is located, and is used to collect deformation information in the area where the high-speed connector is located.
[0014] The vibration sensor is mounted on the PCB in the area where the high-speed connector is located, and is used to collect vibration information in the area where the high-speed connector is located.
[0015] The sensed state information includes at least one of the surface temperature information, the deformation information, and the vibration information.
[0016] In one possible implementation, the signal integrity protection operation includes:
[0017] If either the sensing status information or the high-speed interconnect signal monitoring parameter satisfies a preset abnormal critical condition, a high-speed interconnect alarm message associated with the abnormal critical condition is generated.
[0018] If the high-speed interconnect signal monitoring parameters meet the preset abnormal critical conditions, adjust the physical layer parameters of the signal transmitting end so that the high-speed interconnect signal monitoring parameters are restored to the normal range that does not meet the abnormal critical conditions.
[0019] In one possible implementation, the abnormal critical condition is:
[0020] The sensed state information reaches or exceeds a preset abnormal state threshold, and / or the high-speed interconnect signal monitoring parameters reach or exceed a preset abnormal parameter threshold.
[0021] In one possible implementation, the high-speed interconnect alarm information includes:
[0022] The sensing state information and the high-speed interconnect signal monitoring parameters when the abnormal critical conditions are met.
[0023] In one possible implementation, the data processing module is further configured to:
[0024] Based on the multiple high-speed interconnect signal monitoring parameters collected at the multiple data acquisition times, multiple signal quality scores are obtained, each associated with one of the multiple high-speed interconnect signal monitoring parameters.
[0025] Based on the multiple signal quality scores, a linear regression function related to the multiple signal quality scores is obtained;
[0026] Based on the linear regression function, a quality change trend score is obtained to characterize the quality change trend of high-speed interconnect signals;
[0027] Based on the latest signal quality score among the multiple signal quality scores and the preset quality warning score, the current quality level of the high-speed interconnect signal corresponding to the latest signal quality score is obtained;
[0028] Based on the quality change trend score and the preset trend warning score, the quality change trend level of the high-speed interconnect signal corresponding to the quality change trend score is obtained;
[0029] Based on the latest preset number of signal quality scores among the plurality of signal quality scores, a first signal quality score average decrease rate corresponding to the current time window is obtained, wherein the current time window includes the preset number of the data acquisition times;
[0030] Based on the first average rate of decrease in signal quality score and the second average rate of decrease in signal quality score corresponding to the previous time window obtained before the current time window, a signal quality acceleration decrease score is obtained, wherein the duration of the previous time window and the current time window are equal, and the number of signal quality scores obtained in the previous time window is equal to the number of signal quality scores obtained in the current time window.
[0031] In one possible implementation, the data processing module is further configured to generate early warning information associated with the high-speed interconnect status prediction and evaluation information.
[0032] In one possible implementation, the data processing module is further configured to:
[0033] Upon obtaining the current quality level, a warning message associated with the current quality level is generated;
[0034] Upon obtaining the quality change trend level, an early warning message associated with the quality change trend level is generated;
[0035] When the signal quality acceleration decline score exceeds the preset signal quality acceleration decline warning value, a warning message related to the acceleration decline trend of signal quality is generated.
[0036] In one possible implementation, the high-speed interconnect monitoring and prediction system further includes:
[0037] A high-speed interconnected monitoring and early warning network, coupled to at least one of the aforementioned artificial intelligence servers, is used to transmit the early warning information from at least one of the aforementioned artificial intelligence servers;
[0038] A high-speed interconnect monitoring and early warning server, coupled to the high-speed interconnect monitoring and early warning network, is used to receive and manage the early warning information of at least one of the artificial intelligence servers.
[0039] In one possible implementation, the data processing module is further configured to:
[0040] Within the data acquisition window time corresponding to the target data acquisition time, multiple high-speed interconnect signal monitoring parameters and multiple sensing state information corresponding one-to-one with the multiple high-speed interconnect signal monitoring parameters are acquired, wherein the target data acquisition time is any one of the multiple data acquisition times;
[0041] The high-speed interconnect signal monitoring parameters corresponding to the sensing state information under preset stable conditions are determined as the high-speed interconnect signal monitoring parameters collected at the target data acquisition time.
[0042] According to another aspect of the embodiments of this disclosure, a high-speed interconnect monitoring and prediction method is provided, comprising:
[0043] The system collects perception status information associated with the interconnection location of the OAM board within the artificial intelligence server and high-speed interconnection signal monitoring parameters of the OAM board. The OAM board is an artificial intelligence computing acceleration unit with an acceleration chip as its core and an integrated serial deserializer. The acceleration chip is used for artificial intelligence computing, the serial deserializer is used for high-speed serial data transmission, and the high-speed interconnection signal monitoring parameters are collected from the serial deserializer.
[0044] Based on the sensing status information, the high-speed interconnect signal monitoring parameters, and the preset abnormal critical conditions, perform signal integrity protection operations;
[0045] Based on multiple high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times, the high-speed interconnect status prediction and evaluation information of the OAM board is obtained.
[0046] According to another aspect of the present disclosure, an artificial intelligence server is provided, including the high-speed interconnect monitoring and prediction system as described in any of the preceding claims.
[0047] As can be seen from the above scheme, the high-speed interconnect monitoring and prediction system, method, and artificial intelligence server disclosed herein utilize a sensor group deployed at specific locations on the high-speed connector of the OAM board to achieve multi-dimensional information perception beyond high-speed signals, and realize state monitoring of the correlation between high-speed interconnect signals and environmental conditions in the artificial intelligence server. A relatively simple prediction logic is used to implement a lightweight prediction algorithm running on a resource-constrained data processing module, achieving real-time prediction at the board level and obtaining predictive evaluation information of high-speed interconnect status. This allows potential high-speed interconnect risks to be detected in advance before the high-speed interconnect signal completely deteriorates, ensuring the stable operation of the artificial intelligence server and corresponding cluster. Compared with related technologies that rely on cloud AI and discrete devices, this achieves fast, low-power, and low-cost monitoring and prediction. Furthermore, by performing corresponding safeguard operations, the physical layer parameters of the signal transmitting end are rapidly and adaptively adjusted to improve the quality of high-speed signals. The high-speed interconnect monitoring and prediction system, method, and artificial intelligence server disclosed herein, from sensors and lightweight algorithms in the data processing module to relatively simple execution control logic, realize a complete board-level integrated solution for high-speed interconnect monitoring that can be deployed on a single OAM board. Attached Figure Description
[0048] Figure 1 This is a schematic diagram of the structure of a high-speed interconnect monitoring and prediction system according to an illustrative embodiment;
[0049] Figure 2 This is a schematic diagram of another embodiment of the high-speed interconnect monitoring and prediction system of this disclosure;
[0050] Figure 3 This is a schematic diagram of the technical architecture of the high-speed interconnect monitoring and prediction system according to an embodiment of the present disclosure;
[0051] Figure 4 This is a schematic flowchart illustrating a high-speed interconnect monitoring and prediction method according to an illustrative embodiment;
[0052] Figure 5 This is a schematic diagram illustrating the process of obtaining high-speed interconnect status prediction and evaluation information of an OAM board according to an illustrative embodiment.
[0053] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this disclosure.
[0054] In the attached diagram, the component names represented by each number are as follows:
[0055] 10. Sensor group
[0056] 11. Infrared temperature sensor,
[0057] 12. Strain sensor
[0058] 13. Vibration sensor
[0059] 20. Data processing module
[0060] 100. Artificial intelligence server
[0061] 110. OAM board,
[0062] 111. Serializer / Deserializer
[0063] 30. High-speed interconnected monitoring and early warning network;
[0064] 40. High-speed interconnected monitoring and early warning server.
[0065] 600. Electronic equipment
[0066] 601. Processor
[0067] 602. Memory. Detailed Implementation
[0068] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided with reference to the accompanying drawings and embodiments.
[0069] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0070] As used in the specification and claims of this disclosure, “coupled (or connected)” may refer to any direct or indirect means of connection. For example, if a first device is coupled (or connected) to a second device, it should be interpreted as the first device being directly connected to the second device, or the first device being indirectly connected to the second device through other devices or some means of connection.
[0071] In related technologies, monitoring and maintenance systems for AI servers utilize sensors to monitor temperature and vibration within the server, issuing timely alarms when temperatures are too high or vibrations are excessive. While these systems provide environmental monitoring capabilities, they lack multi-dimensional monitoring micro-sensors deployed at critical stress points such as high-speed connector pins within the AI server. This prevents the monitoring of key high-speed interconnect points between the transmitter and receiver within the AI server. Consequently, it is impossible to collect firsthand physical data leading to signal degradation (such as localized heat buildup or mechanical warping), resulting in diagnostics that are merely speculative and unable to accurately pinpoint whether thermal stress or vibration is causing eye diagram closure at the receiver.
[0072] Meanwhile, the monitoring and maintenance systems for AI servers based on related technologies mainly rely on simple threshold alarms or post-fault diagnosis, which is a reactive approach and suffers from predictive lag. Furthermore, they lack trend prediction capabilities and cannot provide early warnings of remaining lifespan several days before a potential failure, thus lacking any "prognostic" capability.
[0073] Furthermore, the related technologies for monitoring and maintaining AI servers can at most manage the connectivity of data links but cannot intervene in the adaptive modification of physical layer parameters. When the monitoring and maintenance system detects pre-degradation of high-speed interconnect signals, it cannot dynamically adjust parameters such as pre-emphasis, equalizer, or drive current of the SerDes (Serializer / Deserializer) in real time to "adaptively compensate" for signal damage and achieve self-healing. The related technologies for monitoring and maintaining AI servers separate control and execution, making real-time closed-loop optimization impossible.
[0074] Furthermore, the related technologies for monitoring and maintaining AI servers rely on cloud-based AI and discrete components, which are unsuitable for large-scale deployments of OAM (OCP Accelerator Module) boards at the edge in terms of power consumption, cost, and response speed. The lack of energy-efficient and low-cost integration of the entire process of perception, analysis, decision-making, and execution results in complex and expensive systems.
[0075] In view of this, this disclosure addresses many problems of the monitoring and maintenance system for artificial intelligence servers in the aforementioned related technologies by proposing a high-speed interconnect monitoring and prediction system, method, and artificial intelligence server. This system achieves targeted state monitoring of high-speed interconnect signals and their correlation with environmental conditions in artificial intelligence servers at a lower cost, performs signal integrity assurance operations including adaptive modification of physical layer parameters, and provides predictive high-speed interconnect state prediction and evaluation information. This allows the system to detect potential high-speed interconnect risks in advance before failures occur, thereby ensuring the stable operation of the artificial intelligence server and its corresponding cluster.
[0076] Figure 1 This is a schematic diagram illustrating the structure of a high-speed interconnect monitoring and prediction system according to an illustrative embodiment, such as... Figure 1 As shown in the illustrative embodiment, the high-speed interconnect monitoring and prediction system includes a sensor group 10 and a data processing module 20. The sensor group 10 is deployed within the artificial intelligence server 100 and is used to collect sensing status information associated with the interconnection locations of the OAM board 110 within the artificial intelligence server 100. The OAM board 110 is an artificial intelligence computing acceleration unit with an acceleration chip at its core and an integrated serial deserializer (SerDes) 111. The acceleration chip is used for artificial intelligence computing, and the serial deserializer 111 is a circuit module that converts parallel data into serial data for high-speed transmission through a single channel and restores it to parallel data at the receiving end. It is used for high-speed serial data transmission (e.g., high-speed serial data transmission between different acceleration chips, and / or high-speed serial data transmission between the acceleration chip and the central processing unit, etc.). By serializing the parallel data for transmission and receiving, and then deserializing it back, the number of pins and the complexity of the PCB (Printed Circuit Board) routing are reduced. The data processing module 20 is located within the artificial intelligence server 100 and coupled to the sensor group 10 and the serializer / deserializer 111. It is used to: receive sensing status information and receive high-speed interconnect signal monitoring parameters from the OAM board 110 from the serializer / deserializer 111; perform signal integrity assurance operations based on the sensing status information, the high-speed interconnect signal monitoring parameters, and preset abnormal critical conditions; and obtain high-speed interconnect status prediction and evaluation information for the OAM board 110 based on multiple high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times. The high-speed interconnect signal monitoring parameters reflect signal integrity and can therefore also be called high-speed interconnect signal integrity parameters.
[0077] The high-speed interconnect monitoring and prediction system of this embodiment utilizes sensor group 10 to collect sensing status information associated with the interconnect position of OAM board 110 within artificial intelligence server 100, achieving accurate monitoring of the interconnect position of OAM board 110. This system correlates the sensing status information of the OAM board 110 interconnect position with simultaneously acquired high-speed interconnect signal monitoring parameters. Therefore, when the high-speed interconnect signal monitoring parameters become abnormal (e.g., meeting preset abnormality threshold conditions), the system can reference the cause of the abnormality from the associated sensing status information of the OAM board 110 interconnect position. For example, it can determine whether the abnormality is caused by excessive temperature at the OAM board 110 interconnect position, excessive vibration at the OAM board 110 interconnect position, or other factors related to the OAM board 110 interconnect... Excessive positional deformation can lead to anomalies, and when abnormalities occur in the high-speed interconnect signal monitoring parameters, signal integrity protection operations are performed to promptly issue alarms and quickly and automatically repair the system by modifying physical layer parameters. Furthermore, since the high-speed interconnect status prediction and evaluation information of the OAM board 110 is obtained from multiple high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times, it reflects the changes and future trends of multiple high-speed interconnect signal monitoring parameters. Therefore, it can provide real-time information on the health status of the high-speed interconnect signal of the OAM board 110 and infer future conditions. Thus, the high-speed interconnect monitoring and prediction system of this embodiment provides reliable data support for data analysis combining the current status and long-term trend prediction of the high-speed interconnect signal health.
[0078] like Figure 1As shown, in the illustrative embodiment, the sensor group 10 includes at least one of an infrared temperature sensor 11, a strain sensor 12, and a vibration sensor 13. The infrared temperature sensor 11 is disposed within the artificial intelligence server 100 and is used to non-contactly acquire surface temperature information of the area where the high-speed connector pins of the OAM board 110 are located. Using non-contact acquisition of the surface temperature information of the area where the high-speed connector pins of the OAM board 110 are located allows for accurate acquisition of the surface temperature of the metal pins of the high-speed connector and / or the PCB area near them, helping to avoid the installation difficulties and thermal isolation problems of contact temperature measurement methods. In the illustrative embodiment, the infrared temperature sensor 11 can be miniaturized. The strain sensor 12 is mounted on the PCB in the area where the high-speed connector is located and is used to acquire deformation information of the area. The vibration sensor 13 is mounted on the PCB in the area where the high-speed connector is located and is used to acquire vibration information of the area. Preferably, the strain sensor 12 and the vibration sensor 13 are mounted on the PCB directly below or to the side of the high-speed connector, as close as possible to the fixing screw holes or force support points. Strain sensor 12 and vibration sensor 13 are used to monitor board deformation (bending, twisting) and high-frequency micro-vibration in the high-speed connector and its surrounding area caused by heat sink pressure, chassis vibration, or thermal expansion and contraction. In an illustrative embodiment, based on sensor group 10 including at least one of infrared temperature sensor 11, strain sensor 12, and vibration sensor 13, the sensed state information includes at least one of surface temperature information, deformation information, and vibration information. In an illustrative embodiment, strain sensor 12 can be a MEMS (Micro-Electro-Mechanical Systems) strain sensor 12, and vibration sensor 13 can be a MEMS vibration sensor 13.
[0079] The high-speed connector is a type of connector that supports high-speed data transmission protocols and is used to achieve high-bandwidth interconnection between the OAM board and the motherboard. In an illustrative embodiment, the high-speed connector is a mezzanine connector similar to gold fingers mating with a high-density slot. It may have a long, flat shape and densely arranged metal pins or contacts. It is typically mounted on the motherboard or carrier board, and the OAM board mates with it via a vertical plug-in method.
[0080] In an illustrative embodiment, the high-speed interconnect signal monitoring parameters include at least one of the bit error rate, eye diagram width margin, and eye diagram height margin of the signal received by the signal receiver. In an illustrative embodiment, depending on the monitoring requirements, the high-speed interconnect signal monitoring parameters may also include parameters such as signal swing and clock jitter. In an illustrative embodiment, the high-speed interconnect signal monitoring parameters are collected from the signal receiver of the high-speed interconnect signal, for example, from the serial deserializer of the OAM board or the serial deserializer of the Central Processing Unit (CPU). In an illustrative embodiment, the data processing module is also coupled to the serial deserializer of the CPU, so that when the CPU acts as the signal receiver, the high-speed interconnect signal monitoring parameters of the CPU can be obtained from the CPU's serial deserializer. Artificial intelligence servers typically include a central processing unit (CPU) and several OAM (Optical Access Module) boards. These CPUs and OAM boards form high-speed interconnect links based on protocols such as PCIe (Peripheral Component Interconnect Express). The role of a serializer / deserializer is to convert parallel data at the transmitting end (e.g., CPU or OAM board) into high-speed serial data for transmission, and then restore it to parallel data at the receiving end (e.g., OAM board or CPU). This solves the pin count limitations and signal integrity issues associated with high-speed inter-chip transmission. Serializers / deserializers are usually built into the chip itself, such as within the CPU or the AI accelerator (acceleration chip) of the OAM board.
[0081] In an illustrative embodiment, the abnormal critical condition is: the sensed state information reaches or exceeds a preset abnormal state threshold, and / or the high-speed interconnect signal monitoring parameter reaches or exceeds a preset abnormal parameter threshold. In an illustrative embodiment, the abnormal state threshold includes at least one sub-abnormal state threshold (such as an abnormal temperature threshold, an abnormal deformation threshold, and an abnormal vibration threshold), each sub-abnormal state threshold being associated with one of the sensed state information. In an illustrative embodiment, when the sensed state information includes surface temperature information of the area where the high-speed connector pins of the OAM board are located, collected by an infrared temperature sensor, the abnormal state threshold includes an abnormal temperature threshold; when the sensed state information includes deformation information of the area where the high-speed connector is located, the abnormal state threshold includes an abnormal deformation threshold; when the sensed state information includes vibration information of the area where the high-speed connector is located, the abnormal state threshold includes an abnormal vibration threshold.
[0082] In an illustrative embodiment, the signal integrity assurance operation performed by the data processing module 20 includes: generating high-speed interconnect alarm information associated with the abnormal critical condition when either the sensing status information or the high-speed interconnect signal monitoring parameters meet a preset abnormal critical condition; and adjusting the physical layer parameters of the signal transmitter when the high-speed interconnect signal monitoring parameters meet the preset abnormal critical condition, so that the high-speed interconnect signal monitoring parameters are restored to the normal range where the abnormal critical condition is not met. The high-speed interconnect signal monitoring parameters originate from a signal receiver, which includes at least one of the receiver of an OAM board and the receiver of a central processing unit within an artificial intelligence server. The signal transmitter includes at least one of the transmitter of an OAM board associated with the signal receiver and the transmitter of a central processing unit.
[0083] In a specific application scenario, when data is sent from the central processing unit (CPU) to the AI accelerator of the OAM board, the signal receiving end can refer to the serial deserializer of the AI accelerator on the OAM board, and the signal sending end can refer to the serial deserializer of the CPU. Conversely, when data is sent from the AI accelerator of the OAM board to the CPU, the signal receiving end can refer to the serial deserializer of the CPU, and the signal sending end can refer to the serial deserializer of the AI accelerator on the OAM board.
[0084] In a specific application scenario, when the sensing status information includes the surface temperature information of the area where the high-speed connector pins of the OAM board are located, collected by an infrared temperature sensor, the signal integrity protection operation performed by the data processing module may include, for example, generating a high-speed interconnect alarm message associated with the abnormal temperature threshold when the surface temperature information of the area where the high-speed connector pins of the OAM board reach or exceed an abnormal temperature threshold (at which point other information in the sensing status information and high-speed interconnect signal monitoring parameters can be normal values). The high-speed interconnect alarm message may selectively include other information in the current sensing status information and / or high-speed interconnect signal monitoring parameters. By using the high-speed interconnect alarm message associated with the abnormal temperature threshold, it can warn that the high-speed connector pin temperature of the OAM board is too high, which may subsequently cause high-speed interconnect signal abnormalities, reminding relevant personnel to pay attention and take appropriate measures.
[0085] Similarly, when the sensing status information includes deformation information of the area where the high-speed connector is located, collected by strain sensor 12, the signal integrity assurance operation performed by data processing module 20 may include: when the deformation information of the area where the high-speed connector is located reaches or exceeds an abnormal deformation threshold (at which time other information in the sensing status information and high-speed interconnect signal monitoring parameters can be normal values), generating high-speed interconnect alarm information associated with the abnormal deformation threshold, wherein the high-speed interconnect alarm information may selectively include other information in the current sensing status information and / or high-speed interconnect signal monitoring parameters. By using high-speed interconnect alarm information associated with the abnormal deformation threshold, it is possible to warn that the high-speed connector of the OAM board has excessive stress, which may subsequently cause abnormal high-speed interconnect signals, reminding relevant personnel to pay attention and take appropriate measures.
[0086] Similarly, when the sensing status information includes vibration information collected by vibration sensor 13 in the area where the high-speed connector is located, the signal integrity assurance operation performed by data processing module 20 may include: generating a high-speed interconnect alarm message associated with the abnormal vibration threshold when the vibration information in the area where the high-speed connector is located reaches or exceeds an abnormal vibration threshold (at this time, other information in the sensing status information and high-speed interconnect signal monitoring parameters can be normal values). Through the high-speed interconnect alarm message associated with the abnormal vibration threshold, it can warn that the high-speed connector of the OAM board has excessive vibration, which may subsequently cause abnormal high-speed interconnect signals, reminding relevant personnel to pay attention and take appropriate measures.
[0087] In a specific application scenario, when high-speed interconnect signal monitoring parameters include bit error rate, eye diagram width margin, eye diagram height margin, signal swing, and clock jitter, the signal integrity protection operation performed by the data processing module 20 may include, for example, the following: when the bit error rate reaches (or exceeds) a preset bit error rate abnormality threshold (e.g., 10), -6 If the eye width margin reaches (or exceeds) the preset eye width abnormality threshold, or the eye height margin reaches (or exceeds) the preset eye height abnormality threshold, or the signal swing reaches (or exceeds) the preset swing abnormality threshold, or the clock jitter reaches (or exceeds) the preset jitter abnormality threshold, the physical layer parameters of the signal transmitter are adjusted so that the high-speed interconnect signal monitoring parameters are restored to the normal range that does not meet the abnormality critical conditions.
[0088] In the illustrative embodiment, the physical layer parameters of the signal transmitter include Preset parameters. Preset parameters, also known as preset parameters, refer to a set of predefined and stored configuration parameters. Based on the application scenario of this disclosure embodiment, Preset parameters can be a standard predefined set of transmit equalization configurations (including pre-emphasis / de-emphasis coefficients, output swing, etc.) for the signal transmitter, used to quickly optimize signal integrity and ensure interoperability for different channel loss characteristics. In the illustrative embodiment, for high-speed serial standards such as PCIe, Preset parameters include 10 preset transmit equalization configurations from P0 to P9, corresponding to different de-emphasis / pre-emphasis strengths from minimum to maximum (e.g., 0dB to -12dB range), used for dynamic negotiation between the transmitter and receiver during link training to match the optimal signal compensation scheme for channels with different loss characteristics.
[0089] In an illustrative embodiment, the physical layer parameters of the signal transmitter can be adjusted in conjunction with the link training process from the signal transmitter to the signal receiver. For example, this can include gradually adjusting 10 Preset parameters from P0 to P9 so that after link training is completed based on the adjusted Preset parameters, the high-speed interconnect signal monitoring parameters received from the signal receiver return to the normal range (i.e., the bit error rate no longer reaches or exceeds the abnormal threshold, the eye diagram width margin no longer reaches or exceeds the abnormal threshold, the eye diagram height margin no longer reaches or exceeds the abnormal threshold, the signal swing no longer reaches or exceeds the abnormal threshold, and the clock jitter no longer reaches or exceeds the abnormal threshold).
[0090] For example, if the bit error rate (BER) is determined to have reached (or exceeded) a preset BER anomaly threshold when the current Preset parameter is at level P3, the Preset parameter is changed to level P4, and the link from the signal transmitter to the signal receiver is trained based on the P4 Preset parameter. After training, the high-speed interconnect signal received from the signal receiver is monitored to determine if it has returned to the normal range. If it has returned to the normal range, the signal integrity assurance operation is completed; otherwise, the Preset parameter level is changed again, and training and judgment are repeated. Of course, in addition to the Preset parameter, optimization methods such as modifying weighted compensation and adjusting power consumption can also be used to ensure signal integrity. In an illustrative embodiment, if all levels of the Preset parameter, modifications to weighted compensation, and adjustments to power consumption have been completed, and the high-speed interconnect signal monitoring parameters still cannot return to the normal range, the signal transmission rate from the signal transmitter to the signal receiver is reduced, for example, from PCIe 5.0 x16 to PCIe 4.0 x16, to ensure the reliability of signal transmission while maintaining the connection.
[0091] In this illustrative embodiment, when the high-speed interconnect signal monitoring parameters meet preset abnormal critical conditions, the high-speed interconnect alarm information includes the sensing status information when the abnormal critical conditions are met and the high-speed interconnect signal monitoring parameters. This approach helps relevant personnel quickly identify the problematic high-speed interconnect signal monitoring parameters, improving transparent monitoring capabilities.
[0092] The above is a functional introduction to the real-time data monitoring and early warning system of the high-speed interconnect monitoring and prediction system according to the embodiments of this disclosure. In addition, the high-speed interconnect monitoring and prediction system of the embodiments of this disclosure can also realize trend prediction of the high-speed interconnect status by obtaining high-speed interconnect status prediction and evaluation information of the OAM board based on multiple high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times.
[0093] Based on this, in the illustrative embodiment, the data processing module 20 is further configured to:
[0094] Based on multiple high-speed interconnect signal monitoring parameters collected at multiple data acquisition times, multiple signal quality scores, each associated with a different high-speed interconnect signal monitoring parameter, are obtained. A linear regression function, also associated with these multiple signal quality scores, is then derived. Based on the linear regression function, a quality change trend score, representing the trend of high-speed interconnect signal quality changes, is obtained. Based on the latest obtained signal quality score and a preset quality warning score, the current quality level of the high-speed interconnect signal corresponding to the latest obtained signal quality score is obtained. Finally, based on the quality change trend score and the preset trend warning score, the high-speed interconnect signal quality level corresponding to the quality change trend score is obtained. The high-speed interconnect status prediction and evaluation information includes: a signal quality score, a quality change trend score, the current quality level of the high-speed interconnect signal, a first signal quality score average decline rate corresponding to the current time window based on the latest preset number of signal quality scores from multiple signal quality scores, wherein the current time window includes a preset number of data acquisition times; and a signal quality acceleration decline score based on the first signal quality score average decline rate and the second signal quality score average decline rate corresponding to the previous time window, wherein the previous time window and the current time window are of equal duration, and the number of signal quality scores obtained in the previous time window is equal to the number of signal quality scores obtained in the current time window. The high-speed interconnect status prediction and evaluation information includes at least one of the following: signal quality score, quality change trend score, current quality level of the high-speed interconnect signal, quality change trend level of the high-speed interconnect signal, first signal quality score average decline rate, second signal quality score average decline rate, and signal quality acceleration decline score.
[0095] In the illustrative embodiment, multiple data acquisition moments can be set based on a preset fixed time period, and the interval between any two adjacent data acquisition moments is equal. In the illustrative embodiment, to obtain a trend change over a longer period, the time period is set to, for example, 24 hours (1 day). To ensure the accuracy of trend prediction, the multiple high-speed interconnect signal monitoring parameters acquired based on the multiple data acquisition moments should all be high-speed interconnect signal monitoring parameters obtained when the artificial intelligence server is in a relatively stable state. Therefore, in the illustrative embodiment, when acquiring high-speed interconnect signal monitoring parameters, the surface temperature information of the area where the high-speed connector pins of the OAM board are located, acquired by the infrared temperature sensor, and the vibration information of the area where the high-speed connector is located, acquired by the vibration sensor, should both be within the normal range. In other words, the high-speed interconnect signal monitoring parameters are acquired when the surface temperature information acquired by the infrared temperature sensor does not reach the abnormal temperature threshold and the vibration information acquired by the vibration sensor does not reach the abnormal vibration threshold.
[0096] In addition, to ensure the accuracy of trend prediction, the AI server's status should ideally remain consistent each time high-speed interconnect signal monitoring parameters are collected. When the AI server is busy, the uncertainty in the workload of the acceleration chips on the OAM board can cause fluctuations in the collected high-speed interconnect signal monitoring parameters. Therefore, it is preferable to acquire high-speed interconnect signal monitoring parameters when the AI server is relatively idle. Since the AI server is typically relatively idle in the early morning, it is preferable to acquire high-speed interconnect signal monitoring parameters at a fixed time each morning.
[0097] Furthermore, at fixed daily times when acquiring high-speed interconnect signal monitoring parameters, unpredictable sudden events may cause a short-term increase in temperature or vibration, leading to inaccurate high-speed interconnect signal monitoring parameters or the presence of noise in the acquired parameters. To overcome this problem, in the illustrative embodiment, the data processing module 20 is further configured to: acquire multiple high-speed interconnect signal monitoring parameters and multiple sensing state information corresponding to each of the multiple high-speed interconnect signal monitoring parameters within the data acquisition window time corresponding to the target data acquisition time, wherein the target data acquisition time is any one of the multiple data acquisition times; and determine the high-speed interconnect signal monitoring parameters corresponding to the sensing state information under preset stable conditions as the high-speed interconnect signal monitoring parameters acquired at the target data acquisition time.
[0098] As an example, the target data acquisition time can be set to 2:00 AM every day, and the data acquisition window time can be set to 1 hour. Based on this, in the illustrative embodiment, the specific time for data acquisition each day can be from 2:00 AM to 3:00 AM, or from 1:30 AM to 2:30 AM. The number of high-speed interconnect signal monitoring parameters and the time interval collected within the data acquisition window time can be set as needed. For example, the number of high-speed interconnect signal monitoring parameters collected within the data acquisition window time is, for example, 7, and the time interval is, for example, 10 minutes. Taking the specific time for data acquisition as 2:00 AM to 3:00 AM as an example, high-speed interconnect signal monitoring parameters and corresponding sensing status information can be collected once each at 2:00 AM, 2:10 AM, 2:20 AM, 2:30 AM, 2:40 AM, 2:50 AM, and 3:00 AM. In an illustrative embodiment, if two or more sensing state information acquisitions are both under stable conditions, then the high-speed interconnect signal monitoring parameter corresponding to any one of the two or more sensing state information acquisitions can be used as the high-speed interconnect signal monitoring parameter received based on the data acquisition time period, or the average value corresponding to the two or more sensing state information acquisitions can be used as the high-speed interconnect signal monitoring parameter received based on the data acquisition time period.
[0099] The stability conditions include a stable temperature threshold and a stable vibration threshold. Specifically, the surface temperature information is less than the stable temperature threshold (reaching or exceeding the stable temperature threshold indicates excessive temperature), and the vibration information is less than the stable vibration threshold (reaching or exceeding the stable vibration threshold indicates excessive vibration). In an illustrative embodiment, the stable temperature threshold can be equal to or less than the abnormal temperature threshold, and the stable vibration threshold can be equal to or less than the abnormal vibration threshold. When both the stable temperature threshold and the stable vibration threshold are less than the abnormal vibration threshold, monitoring parameters of multiple high-speed interconnect signals acquired at preset data acquisition times may provide a more reliable prediction of the high-speed interconnect state change trend.
[0100] The following example of a specific algorithm process will further illustrate how to obtain high-speed interconnect status prediction and evaluation information for the OAM board based on monitoring parameters of multiple high-speed interconnect signals collected at multiple preset data acquisition times.
[0101] Firstly, data acquisition of high-speed interconnect signal monitoring parameters is performed at fixed intervals.
[0102] As explained above, data acquisition is performed, for example, every 24 hours. Data acquisition requires a stable environment, determined by the temperature information collected by the infrared temperature sensor and the vibration information collected by the vibration sensor. For details on how to acquire high-speed interconnect signal monitoring parameters under stable environmental conditions, please refer to the above explanation.
[0103] The acquisition of high-speed interconnect signal monitoring parameters needs to be obtained from the serializer / deserializer at the signal receiver. This can be achieved by accessing the internal diagnostic registers of the serializer / deserializer. Frequent readings of these internal diagnostic registers through a suitable management interface (e.g., MDIO for PCIe / CXL) can yield the high-speed interconnect signal monitoring parameters under stable environmental conditions. The process may involve the signal receiver running an adaptive EQ (equalizer) algorithm to find the optimal EQ setting. Under this optimal EQ setting, key signal quality indicators, i.e., high-speed interconnect signal monitoring parameters, are measured, including bit error rate, eye width margin, eye height margin, and total jitter.
[0104] Secondly, based on the obtained calculated signal quality score.
[0105] In an illustrative embodiment, if the high-speed interconnect signal monitoring parameters include bit error rate, eye diagram width margin, and eye diagram height margin, then the expression for the signal quality score is:
[0106] SQ = f(BER, Eye H Eye W )
[0107] Where SQ is the signal quality score, BER is the bit error rate, and Eye... H For eye diagram height margin, Eye W This is the eye diagram width margin.
[0108] In the illustrative embodiment, the specific expression for the specific signal quality score is as follows:
[0109]
[0110] in, The maximum permissible bit error rate, for example, is 10. -6 , As the baseline value for eye height, This is the baseline value for eye width. The SQ score ranges from 0 to 100, with 100 being the best and 0 being the worst.
[0111] In an illustrative embodiment, if the high-speed interconnect signal monitoring parameters include bit error rate, eye diagram height margin, and total signal jitter, then the expression for the signal quality score is:
[0112] SQ = f(BER, Eye H Jitter)
[0113] Jitter refers to the total jitter of the signal.
[0114] In the illustrative embodiment, the specific expression for the specific signal quality score is as follows:
[0115]
[0116] in, For signal jitter, This represents the maximum permissible total jitter.
[0117] The above formula is only an example. Depending on the application scenario, other different or similar formulas can be used to obtain the signal quality score.
[0118] Thirdly, through the first and second aspects mentioned above, multiple signal quality scores arranged in chronological order are obtained continuously at fixed time intervals, and trend analysis is performed based on these signal quality scores.
[0119] In an illustrative embodiment, multiple signal quality scores need to reflect the trend changes of multiple signal quality scores over a longer period of time. Therefore, the specific number of multiple signal quality scores should not be too small. In one example, prediction can be made on a monthly basis, that is, on a 30-day basis. By continuously collecting 30 signal quality scores, the trend of signal quality score changes over a month can be reflected.
[0120] In an illustrative embodiment, trend analysis can be achieved by calculating linear regression, and the linear regression formula is as follows:
[0121]
[0122] in, For the number of days, For the first The signal quality score for the day. The intercept, in physical terms, represents the initial state, i.e. The predicted signal quality score when it is 0. The slope, in physical terms, represents the rate of change (the strength of the trend). The average change in signal quality score for every 1 unit change This refers to random error, which physically means measurement noise or random error. Among these, the slope... This is the score representing the trend of quality change.
[0123] Fourthly, based on the signal quality score and quality change trend score obtained above, the current quality level of the high-speed interconnect signal, the quality change trend level of the high-speed interconnect signal, the average rate of decrease of the first signal quality score, the average rate of decrease of the second signal quality score, and the signal quality acceleration decrease score are obtained.
[0124] In an illustrative embodiment, the current quality level of the high-speed interconnect signal corresponding to the latest signal quality score is obtained based on the latest obtained signal quality score and the preset quality warning score.
[0125] The quality warning score can be set according to the actual application scenario. For example, the quality warning score can be set to 70, 50, and 30 points, corresponding to four intervals from 0 to 100 points. These four intervals correspond to four quality levels: green, yellow, orange, and red. Specifically, if the latest signal quality score is greater than or equal to 70, it is at the green level, indicating good signal quality. If the latest signal quality score is less than 70 but greater than or equal to 50, it is at the yellow level, indicating that the signal quality is deteriorating but can still maintain normal signal transmission. If the latest signal quality score is less than 50 but greater than or equal to 30, it is at the orange level, indicating that the signal quality is becoming abnormal and may affect normal signal transmission, requiring attention. If the latest signal quality score is less than 30, it is at the red level, indicating that the signal quality is in a dangerous state and may have already affected normal signal transmission, requiring intervention and maintenance.
[0126] In an illustrative embodiment, the quality change trend level of the high-speed interconnect signal corresponding to the quality change trend score is obtained based on the quality change trend score and a preset trend warning score.
[0127] The trend warning score can be set according to the actual application scenario. For example, the trend warning score can be set to -1.0, -2.0, and -3.0, corresponding to four intervals. These four intervals correspond to four quality change trend levels: green, yellow, orange, and red. The quality change trend score (slope) is further calculated based on the trend score. A score of -1.0 or higher is considered green, indicating that the signal quality trend remains unchanged or is slowly declining, and the signal quality may continue to remain stable for a relatively long time. A score less than -1.0 and greater than or equal to -2.0 is yellow, indicating that the rate of signal quality decline is accelerating, and the time for the signal quality to stabilize is shortening. A score less than -2.0 and greater than or equal to -3.0 is orange, indicating that the rate of signal quality decline is accelerating further, and the time for the signal quality to remain stable may be very short, requiring attention. A score less than -3.0 is red, indicating that the rate of signal quality decline is rapidly deteriorating, and the signal quality may soon or has already affected normal signal transmission, requiring intervention and maintenance.
[0128] In an illustrative embodiment, a first average rate of decrease in signal quality score corresponding to the current time window is obtained based on a preset number of the latest signal quality scores among a plurality of signal quality scores.
[0129] The preset quantity can be set according to the actual application scenario. For example, the preset quantity can be in weeks, i.e., 7 days, corresponding to 7 signal quality scores. In this way, the current time window is the time window of the most recent 7 days.
[0130] In an illustrative embodiment, the average rate of decrease in the first signal quality score can be obtained as follows:
[0131] Arrange the seven signal quality scores within the current time window according to time, and name them, for example, Signal Quality Score A, Signal Quality Score B, Signal Quality Score C, Signal Quality Score D, Signal Quality Score E, Signal Quality Score F, and Signal Quality Score G. Take the difference between the preceding and following scores of any two adjacent signal quality scores as the rate of decline of the adjacent signal quality score. For example, the difference between signal quality score B and signal quality score A is taken as the first adjacent signal quality score decline rate, the difference between signal quality score C and signal quality score B is taken as the second adjacent signal quality score decline rate, and so on. The difference between signal quality score G and signal quality score F is taken as the sixth adjacent signal quality score decline rate. The average of all adjacent signal quality score decline rates is determined as the first average rate of decline of the signal quality score. For example, the first average rate of decline of the signal quality score is obtained by adding the decline rates of the first to sixth adjacent signal quality scores and then dividing by 6.
[0132] In an illustrative embodiment, a signal quality acceleration decline score is obtained based on the first average decline rate of the signal quality score and the second average decline rate of the signal quality score corresponding to the previous time window obtained in the previous time window before the current time window.
[0133] In this illustrative embodiment, the previous time window and the current time window are adjacent and do not intersect. In this illustrative embodiment, the average rate of decrease in the second signal quality score is determined in the same way as the average rate of decrease in the first signal quality score described above.
[0134] In an illustrative embodiment, the method for obtaining the signal quality acceleration degradation score can be determined based on the specific application scenario. For example, the difference between the average rate of decline of the first signal quality score and twice the average rate of decline of the second signal quality score can be determined as the signal quality acceleration degradation score.
[0135] In addition, different early warning processing methods can be adopted according to the actual application scenario, and regardless of the method used, it is preferable to record relevant logs to facilitate message tracing.
[0136] The following is another monitoring and early warning method, which includes four levels.
[0137] Level 1: Information Level (represented in blue):
[0138] Condition: The current signal quality score is less than 20% lower than the previous signal command score, or the slope is less than -0.5;
[0139] Action taken: Log the information and continue monitoring.
[0140] Level 2: Attention Level (indicated in yellow):
[0141] Condition: The current signal quality score has decreased by 20% to 35% compared to the previous signal command score, or the slope is less than -1.0;
[0142] Actions taken: Increase monitoring frequency to shorten the interval for acquiring monitoring parameters of high-speed interconnect signals, and prepare relevant maintenance spare parts;
[0143] Level 3: Warning Level (indicated in orange):
[0144] Condition: The current signal quality score has decreased by 35% to 50% compared to the previous signal command score, or the slope is less than -2.0;
[0145] Action to take: Plan the subsequent maintenance window and test redundant links;
[0146] Level 4: Emergency (indicated in red):
[0147] Condition: The current signal quality score has decreased by more than 50% compared to the previous signal command score, or the slope is less than -3.0;
[0148] Action to take: Perform maintenance or switch links immediately.
[0149] After obtaining the high-speed interconnect status prediction and assessment information of the OAM board, in order to promptly present or notify relevant personnel to quickly understand the high-speed interconnect status of the OAM board and take timely action to eliminate potential risks, in an illustrative embodiment, the data processing module 20 is also used to generate early warning information related to the high-speed interconnect status prediction and assessment information.
[0150] Specifically, in the illustrative embodiment, the data processing module 20 is further configured to: generate warning information associated with the current quality level when the current quality level is obtained; generate warning information associated with the quality change trend level when the quality change trend level is obtained; and generate warning information associated with the accelerated decline trend of signal quality when the signal quality acceleration decline score exceeds the preset signal quality acceleration decline warning value.
[0151] In an illustrative embodiment, the warning value for accelerated signal quality degradation can be, for example, 0, indicating that the accelerated signal quality degradation score exceeds 0, that is, the average rate of degradation of the first signal quality score exceeds twice the average rate of degradation of the second signal quality score, and a corresponding warning needs to be issued.
[0152] In an illustrative embodiment, upon obtaining high-speed interconnect status prediction and assessment information and generating early warning information, the data processing module 20 further adjusts the physical layer parameters of the signal transmitter to improve the high-speed interconnect signal quality. The high-speed interconnect signal quality can be characterized by a signal quality score. Based on the above description, the target data acquisition time is set during system idle periods or periods of low business load, and the level and slope of the signal quality score reflect the degradation trend of the high-speed interconnect signal quality. Therefore, each time the high-speed interconnect status prediction and assessment information is obtained and it is determined that the degradation of the high-speed interconnect signal quality is becoming severe (e.g., a low signal quality score and / or a large slope) but data transmission is still possible, the physical layer parameters of the signal transmitter can be adjusted immediately. This achieves predictive adjustment of the high-speed interconnect signal quality without affecting the normal operation of the artificial intelligence server.
[0153] Figure 2 This is a schematic diagram of another embodiment of the high-speed interconnect monitoring and prediction system of this disclosure, as shown below. Figure 2 As shown, in order to achieve unified early warning management of a large number of artificial intelligence servers and improve maintenance efficiency, in the illustrative embodiment, the high-speed interconnect monitoring and prediction system of this disclosure further includes a high-speed interconnect monitoring and early warning network 30 and a high-speed interconnect monitoring and early warning server 40. The high-speed interconnect monitoring and early warning network 30 is coupled to at least one artificial intelligence server 100 and is used to transmit early warning information from at least one artificial intelligence server 100. The high-speed interconnect monitoring and early warning server 40 is coupled to the high-speed interconnect monitoring and early warning network 30 and is used to receive and manage the early warning information from at least one artificial intelligence server 100.
[0154] In the illustrative embodiment, the high-speed interconnect monitoring and early warning network 30 and the high-speed interconnect monitoring and early warning server 40 are dedicated networks and dedicated servers, specifically used to monitor and predict the high-speed interconnect status of the OAM boards 110 of multiple artificial intelligence servers 100. This ensures physical isolation between the high-speed interconnect monitoring and prediction system and the inference computing tasks of the artificial intelligence servers 100, and achieves high-level, security, real-time and reliability assurance of the high-speed interconnect status of the OAM boards, while also achieving the goal of monitoring without interfering with the normal operation of the artificial intelligence servers 100.
[0155] In the illustrative embodiment, the data processing module 20 is an MCU (Micro Controller Unit). Using an MCU as the data processing module 20 enables signal integrity assurance operations and obtains high-speed interconnect status prediction and evaluation information under resource-constrained conditions. The MCU can be integrated into the OAM board 110 or installed as a standalone module in the artificial intelligence server 100, and connected to the high-speed interconnect monitoring and early warning network 30 via a dedicated independent network port. This achieves lightweight high-speed interconnect monitoring of the artificial intelligence server 100.
[0156] Figure 3 This is a schematic diagram of the technical architecture of the high-speed interconnect monitoring and prediction system according to an embodiment of this disclosure, such as... Figure 3 In conjunction with the relevant descriptions of the above embodiments, the high-speed interconnect monitoring and prediction system of this disclosure constructs a clear three-layer technical architecture.
[0157] The first layer: Real-time monitoring and sensing network. By deploying miniature sensors at key interconnection locations on the OAM board (such as near high-speed connectors or along high-speed signal line paths) and accessing the serializer / deserializer, the MCU can collect and correlate multi-dimensional data. This multi-dimensional data includes physical layer environmental data and link layer electrical data. Physical layer environmental data includes information such as local temperature of the high-speed connector, board deformation, or vibration micro-strain. Link layer electrical data, for example, can be obtained periodically or triggered by the MCU through a built-in loopback test or pseudo-random code sequence (PRBS) generator, allowing the MCU to acquire high-speed interconnection signal monitoring parameters from the OAM board. The real-time monitoring and sensing network constitutes the "sensory organs" of the high-speed interconnection monitoring and prediction system of this embodiment. The loopback test is a local closed-loop self-testing method that directly loops the output signal from the serializer / deserializer transmitter back to the receiver, performing self-diagnosis and self-verification of the link's signal integrity, clock recovery performance, and physical layer parameters without relying on external channels or remote devices, using a built-in bit error rate detector (BERT) and eye diagram analyzer. Among them, the pseudo-random code sequence generator is a standardized self-test code generation module that generates a bit stream with random statistical characteristics, repeatability and known period through a deterministic algorithm. It is used to simulate real data traffic to stimulate the serial deserializer link, thereby accurately measuring signal integrity parameters such as bit error rate, eye diagram margin and jitter.
[0158] The second layer: Intelligent Diagnosis and Decision Engine. This layer utilizes the MCU to run lightweight diagnostic algorithms, including data correlation analysis and dynamic parameter adjustment decisions. Data correlation analysis correlates signal degradation (such as increased bit error rate, eye diagram closure) with data synchronously acquired by sensors in the time domain. This correlation allows the MCU to determine whether the current degradation of high-speed interconnect signal monitoring parameters is caused by changes in environmental conditions. For example, it determines whether the current increase in bit error rate is due to thermal expansion caused by the heat generated by the accelerator chip on a nearby OAM board, or whether it is due to vibration caused by the chassis fan. Dynamic parameter adjustment decisions are the content involved in the signal integrity assurance operation described above. Based on the diagnostic results, the MCU uses I... 2 Buses such as C and SPI send instructions to the relevant registers of the serializer / deserializer at the data transmitting end to dynamically fine-tune its physical layer parameters, such as Preset parameters and pre-emphasis parameters. In extreme cases, the speed can be controlled to decrease (e.g., from PCIe 5.0 x16 to PCIe 4.0 x16) to ensure reliability while maintaining connectivity.
[0159] Layer Three: Predictive Maintenance and Execution. This layer utilizes the MCU for health modeling, trend prediction, and early warning actions. Regarding health modeling and trend prediction, the MCU continuously records historical sequences of high-speed interconnect signal monitoring parameters and sensing status information. By analyzing the slow degradation trend of a specific high-speed connector signal, a "health" model is established, predicting the remaining reliable lifetime based on changes in signal quality scores and the magnitude of the slope. Regarding early warning actions, when a failure risk is predicted, the MCU can send an early warning to the high-speed interconnect monitoring and early warning server and automatically execute contingency plans, such as migrating critical tasks to other links or recommending downtime for maintenance.
[0160] The high-speed interconnect monitoring and prediction system of this disclosure utilizes a sensor array deployed at specific locations on the high-speed connector of the OAM board to achieve multi-dimensional information perception beyond high-speed signals. Furthermore, it employs relatively simple prediction logic to achieve lightweight prediction running on resource-constrained data processing modules, such as MCUs, enabling real-time prediction at the board level. Compared to related technologies that rely on cloud AI and discrete components, this achieves fast, low-power, and low-cost monitoring and prediction. Moreover, by accessing relevant registers in the serializers / deserializers at the signal transmitting and receiving ends, it achieves rapid adaptive adjustment of the physical layer parameters at the signal transmitting end to improve high-speed signal quality. From sensors and lightweight algorithms in the data processing module to relatively simple execution control logic, the high-speed interconnect monitoring and prediction system of this disclosure provides a complete board-level integrated solution for high-speed interconnect monitoring that can be deployed on a single OAM board.
[0161] This disclosure also provides a high-speed interconnect monitoring and prediction method. Figure 4 This is a schematic flowchart illustrating the high-speed interconnect monitoring and prediction method according to an illustrative embodiment, as shown below. Figure 4 As shown in the illustrative embodiment, the high-speed interconnect monitoring and prediction method mainly includes the following steps 401 to 403.
[0162] Step 401: Collect the perception status information and high-speed interconnect signal monitoring parameters of the OAM board associated with the interconnection location of the artificial intelligence server.
[0163] The OAM board is an artificial intelligence computing acceleration unit with an acceleration chip as its core and an integrated serial deserializer. The acceleration chip is used for artificial intelligence computing, and the serial deserializer is used for high-speed serial data transmission (e.g., for high-speed serial data transmission between different acceleration chips, and / or for high-speed serial data transmission between the acceleration chip and the central processing unit). High-speed interconnect signal monitoring parameters are collected from the serial deserializer.
[0164] Step 402: Based on the sensing status information, high-speed interconnect signal monitoring parameters, and preset abnormal critical conditions, perform signal integrity protection operations.
[0165] Step 403: Based on the high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times, obtain the high-speed interconnect status prediction and evaluation information of the OAM board.
[0166] In an illustrative embodiment, the sensing state information includes at least one of the following: surface temperature information of the area where the high-speed connector pins of the OAM board are located, deformation information of the area where the high-speed connector is located, and vibration information of the area where the high-speed connector is located.
[0167] In the illustrative embodiment, the signal integrity assurance operation in step 402 mainly includes: generating high-speed interconnect alarm information associated with the abnormal critical condition when either the sensing status information or the high-speed interconnect signal monitoring parameter meets a preset abnormal critical condition; and adjusting the physical layer parameters of the signal transmitter when the high-speed interconnect signal monitoring parameter meets the preset abnormal critical condition, so that the high-speed interconnect signal monitoring parameter is restored to the normal range that does not meet the abnormal critical condition.
[0168] Among them, the high-speed interconnect signal monitoring parameters are derived from the signal receiving end, which includes at least one of the receiving end of the OAM board and the receiving end of the central processing unit in the artificial intelligence server, and the signal transmitting end includes at least one of the transmitting end of the OAM board associated with the signal receiving end and the transmitting end of the central processing unit.
[0169] In an illustrative embodiment, the abnormal critical conditions are: the perceived state information reaches or exceeds a preset abnormal state threshold, and / or the high-speed interconnect signal monitoring parameters reach or exceed a preset abnormal parameter threshold.
[0170] In an illustrative embodiment, the high-speed interconnect alarm information includes: sensing status information when abnormal critical conditions are met and high-speed interconnect signal monitoring parameters.
[0171] In an illustrative embodiment, the high-speed interconnect signal monitoring parameters include at least one of the bit error rate of the signal received by the signal receiver, the eye diagram width margin, and the eye diagram height margin.
[0172] In an illustrative embodiment, the physical layer parameters include the Preset parameter.
[0173] Figure 5 This is a schematic diagram illustrating the process of obtaining high-speed interconnect status prediction and evaluation information of an OAM board according to an illustrative embodiment, such as... Figure 5 As shown, in the illustrative embodiment, step 403 may specifically include steps 501 to 507.
[0174] Step 501: Based on multiple high-speed interconnect signal monitoring parameters collected at multiple data acquisition times, obtain multiple signal quality scores that are respectively associated with the multiple high-speed interconnect signal monitoring parameters.
[0175] Step 502: Based on multiple signal quality scores, obtain a linear regression function that is correlated with the multiple signal quality scores.
[0176] Step 503: Based on the linear regression function, obtain the quality change trend score used to characterize the quality change trend of high-speed interconnect signals.
[0177] Step 504: Based on the latest signal quality score among multiple signal quality scores and the preset quality warning score, obtain the current quality level of the high-speed interconnect signal corresponding to the latest signal quality score.
[0178] Step 505: Based on the quality change trend score and the preset trend warning score, obtain the quality change trend level of the high-speed interconnect signal corresponding to the quality change trend score.
[0179] Step 506: Based on the latest preset number of signal quality scores among multiple signal quality scores, obtain the average rate of decrease of the first signal quality score corresponding to the current time window.
[0180] The current time window includes a preset number of data collection times.
[0181] Step 507: Based on the average rate of decline of the first signal quality score and the average rate of decline of the second signal quality score corresponding to the previous time window obtained in the previous time window before the current time window, obtain the signal quality acceleration decline score.
[0182] The duration of the previous time window and the current time window are equal, and the number of signal quality scores obtained in the previous time window is equal to the number of signal quality scores obtained in the current time window.
[0183] The high-speed interconnect status prediction and evaluation information includes at least one of the following: signal quality score, quality change trend score, current quality level of high-speed interconnect signal, quality change trend level of high-speed interconnect signal, average rate of decrease of first signal quality score, average rate of decrease of second signal quality score, and signal quality acceleration decrease score.
[0184] In an illustrative embodiment, in step 403, when the high-speed interconnect status prediction and evaluation information of the OAM board is obtained, the high-speed interconnect monitoring and prediction method may further include: generating early warning information associated with the high-speed interconnect status prediction and evaluation information.
[0185] In an illustrative embodiment, generating warning information related to high-speed interconnect status prediction and evaluation information may specifically include: generating warning information related to the current quality level when the current quality level is obtained; generating warning information related to the quality change trend level when the quantity change trend level is obtained; and generating warning information related to the accelerated decline trend of signal quality when the signal quality acceleration decline score exceeds the preset signal quality acceleration decline warning value.
[0186] In an illustrative embodiment, the high-speed interconnect monitoring and prediction method may further include: uploading early warning information from at least one artificial intelligence server to a high-speed interconnect monitoring and early warning server.
[0187] In an illustrative embodiment, the high-speed interconnect signal monitoring parameters acquired at the target data acquisition time can be obtained through the following process: within the data acquisition window time corresponding to the target data acquisition time, multiple high-speed interconnect signal monitoring parameters and multiple sensing state information corresponding one-to-one with the multiple high-speed interconnect signal monitoring parameters are acquired, wherein the target data acquisition time is any one of the multiple data acquisition times; the high-speed interconnect signal monitoring parameters corresponding to the sensing state information under preset stable conditions are determined as the high-speed interconnect signal monitoring parameters acquired at the target data acquisition time.
[0188] In the illustrative embodiment, multiple data acquisition times are arranged based on a preset fixed time period.
[0189] For any aspects of the high-speed interconnect monitoring and prediction method in the above embodiments that are not described in detail, they have already been described in detail in the high-speed interconnect monitoring and prediction system in the above embodiments, and will not be elaborated here.
[0190] In an illustrative embodiment, an artificial intelligence server is also provided, which includes a high-speed interconnect monitoring and prediction system as described in any of the embodiments above.
[0191] In the illustrative embodiments, the artificial intelligence server to which the high-speed interconnect monitoring and prediction system of this disclosure is applicable includes a variety of functional chips, such as any one of CPU (Central Processing Unit), GPU (Graphics Processing Unit), TPU (Tensor Processing Unit), NPU (Neural Network Processing Unit), DPU (Deep Learning Processing Unit), APU (Accelerated Processing Unit), and GPGPU (General-Purpose computing on Graphics Processing Unit).
[0192] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this disclosure. In some embodiments, the electronic device is a server. The electronic device 600 can vary considerably due to different configurations or performance, and may include one or more processors 601 and one or more memories 602, wherein the memory 602 stores at least one line of program code, which is loaded and executed by the processor 601 to implement the high-speed interconnect monitoring and prediction method provided in the various embodiments described above. Of course, the electronic device 600 may also have wired or wireless network interfaces, a keyboard, and input / output interfaces for input and output. The electronic device 600 may also include other components for implementing device functions, which will not be elaborated here.
[0193] In an exemplary embodiment, a computer-readable storage medium including at least one instruction, such as a memory including at least one instruction, is also provided, wherein the at least one instruction can be executed by a processor in a computer device to perform the high-speed interconnect monitoring and prediction method in the above embodiments.
[0194] Optionally, the aforementioned computer-readable storage medium may be a non-transitory computer-readable storage medium, such as ROM (Read-Only Memory), RAM (Random-Access Memory), CD-ROM (Compact Disc Read-Only Memory), magnetic tape, floppy disk, and optical data storage devices.
[0195] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.
Claims
1. A high-speed interconnected monitoring and prediction system, characterized in that, include: A sensor group is deployed in the artificial intelligence server to collect sensing status information associated with the interconnection location of the OAM board within the artificial intelligence server. The OAM board is an artificial intelligence computing acceleration unit with an acceleration chip as its core and an integrated serial deserializer. The acceleration chip is used for artificial intelligence computing, and the serial deserializer is used for high-speed serial data transmission. The data processing module, located within the artificial intelligence server and coupled to the sensor group and the serializer / deserializer, is used for: Receive the sensing status information and receive the high-speed interconnect signal monitoring parameters of the OAM board from the serializer; Based on the sensing status information, the high-speed interconnect signal monitoring parameters, and the preset abnormal critical conditions, perform signal integrity protection operations; as well as, Based on multiple high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times, the high-speed interconnect status prediction and evaluation information of the OAM board is obtained.
2. The high-speed interconnection monitoring and prediction system according to claim 1, characterized in that: The sensor group includes at least one of an infrared temperature sensor, a strain sensor, and a vibration sensor; The infrared temperature sensor is located inside the artificial intelligence server and is used to collect surface temperature information of the area where the high-speed connector pins of the OAM board are located in a non-contact manner. The strain sensor is mounted on the PCB in the area where the high-speed connector is located, and is used to collect deformation information in the area where the high-speed connector is located. The vibration sensor is mounted on the PCB in the area where the high-speed connector is located, and is used to collect vibration information in the area where the high-speed connector is located. The sensed state information includes at least one of the surface temperature information, the deformation information, and the vibration information.
3. The high-speed interconnection monitoring and prediction system according to claim 1, characterized in that, The signal integrity protection operation includes: If either the sensing status information or the high-speed interconnect signal monitoring parameter satisfies a preset abnormal critical condition, a high-speed interconnect alarm message associated with the abnormal critical condition is generated. If the high-speed interconnect signal monitoring parameters meet the preset abnormal critical conditions, adjust the physical layer parameters of the signal transmitting end so that the high-speed interconnect signal monitoring parameters are restored to the normal range that does not meet the abnormal critical conditions.
4. The high-speed interconnection monitoring and prediction system according to claim 1, characterized in that, The abnormal critical condition is: The sensed state information reaches or exceeds a preset abnormal state threshold, and / or the high-speed interconnect signal monitoring parameters reach or exceed a preset abnormal parameter threshold.
5. The high-speed interconnection monitoring and prediction system according to claim 3, characterized in that, The high-speed interconnect alarm information includes: The sensing state information and the high-speed interconnect signal monitoring parameters when the abnormal critical conditions are met.
6. The high-speed interconnection monitoring and prediction system according to claim 1, characterized in that: The data processing module is further used for: Based on the multiple high-speed interconnect signal monitoring parameters collected at the multiple data acquisition times, multiple signal quality scores are obtained, each associated with one of the multiple high-speed interconnect signal monitoring parameters. Based on the multiple signal quality scores, a linear regression function related to the multiple signal quality scores is obtained; Based on the linear regression function, a quality change trend score is obtained to characterize the quality change trend of high-speed interconnect signals; Based on the latest signal quality score among the multiple signal quality scores and the preset quality warning score, the current quality level of the high-speed interconnect signal corresponding to the latest signal quality score is obtained; Based on the quality change trend score and the preset trend warning score, the quality change trend level of the high-speed interconnect signal corresponding to the quality change trend score is obtained; Based on the latest preset number of signal quality scores among the plurality of signal quality scores, a first signal quality score average decrease rate corresponding to the current time window is obtained, wherein the current time window includes the preset number of the data acquisition times; Based on the first average rate of decrease in signal quality score and the second average rate of decrease in signal quality score corresponding to the previous time window obtained before the current time window, a signal quality acceleration decrease score is obtained, wherein the duration of the previous time window and the current time window are equal, and the number of signal quality scores obtained in the previous time window is equal to the number of signal quality scores obtained in the current time window.
7. The high-speed interconnection monitoring and prediction system according to claim 1, characterized in that: The data processing module is also used to generate early warning information related to the high-speed interconnect status prediction and evaluation information.
8. The high-speed interconnection monitoring and prediction system according to claim 6, characterized in that, The data processing module is also used for: Upon obtaining the current quality level, a warning message associated with the current quality level is generated; Upon obtaining the quality change trend level, an early warning message associated with the quality change trend level is generated; When the signal quality acceleration decline score exceeds the preset signal quality acceleration decline warning value, a warning message related to the acceleration decline trend of signal quality is generated.
9. The high-speed interconnection monitoring and prediction system according to claim 7, characterized in that, The high-speed interconnect monitoring and prediction system also includes: A high-speed interconnected monitoring and early warning network, coupled to at least one of the aforementioned artificial intelligence servers, is used to transmit the early warning information from at least one of the aforementioned artificial intelligence servers; A high-speed interconnect monitoring and early warning server, coupled to the high-speed interconnect monitoring and early warning network, is used to receive and manage the early warning information of at least one of the artificial intelligence servers.
10. The high-speed interconnection monitoring and prediction system according to claim 1, characterized in that, The data processing module is also used for: Within the data acquisition window time corresponding to the target data acquisition time, multiple high-speed interconnect signal monitoring parameters and multiple sensing state information corresponding one-to-one with the multiple high-speed interconnect signal monitoring parameters are acquired, wherein the target data acquisition time is any one of the multiple data acquisition times; The high-speed interconnect signal monitoring parameters corresponding to the sensing state information under preset stable conditions are determined as the high-speed interconnect signal monitoring parameters collected at the target data acquisition time.
11. A high-speed interconnect monitoring and prediction method, characterized in that, include: The system collects perception status information associated with the interconnection location of the OAM board within the artificial intelligence server and high-speed interconnection signal monitoring parameters of the OAM board. The OAM board is an artificial intelligence computing acceleration unit with an acceleration chip as its core and an integrated serial deserializer. The acceleration chip is used for artificial intelligence computing, the serial deserializer is used for high-speed serial data transmission, and the high-speed interconnection signal monitoring parameters are collected from the serial deserializer. Based on the sensing status information, the high-speed interconnect signal monitoring parameters, and the preset abnormal critical conditions, perform signal integrity protection operations; Based on multiple high-speed interconnect signal monitoring parameters collected at multiple preset data acquisition times, the high-speed interconnect status prediction and evaluation information of the OAM board is obtained.
12. An artificial intelligence server, characterized in that, Includes the high-speed interconnect monitoring and prediction system as described in any one of claims 1 to 10.