Data processing method and device, data acquisition system and computer readable storage medium

Abstract

The application relates to a data processing method and device, a data acquisition system and a computer readable storage medium, which comprises the following steps: establishing isochronous synchronous communication with a remote acquisition device via a bus, acquiring a bus cycle and an oversampling rate determined according to the signal frequency collected by a sensor; at the end of each bus cycle, receiving a sampling data set from the remote acquisition device, the sampling data set being generated by the remote acquisition device based on the oversampling rate, dividing the bus cycle into n subcycles and performing sampling on the signal once in each subcycle; writing the sampling data set into a current writing buffer in two buffers alternately serving as a current writing buffer and a current reading buffer; accumulating the amount of data written in the current writing buffer; when the amount of data reaches a preset block size: switching the current writing buffer to the current reading buffer for reading by a data reading device; and switching the previous reading buffer to the current writing buffer to continue writing a new sampling data set.

Description

Technical Field

[0001] This application relates to the field of data acquisition technology, specifically to a data processing method and apparatus for high-frequency data acquisition, a data acquisition system including the apparatus, and a computer-readable storage medium for implementing the method. Background Technology

[0002] For data acquisition systems, sampling frequency is the most critical technical parameter, and in practice, it depends on the maximum frequency of the signal to be measured. According to the Nyquist theorem, sampling at twice the highest frequency of the original signal allows for accurate signal reconstruction. However, in practice, the sampling rate should be at least 10 times the maximum frequency to correctly reproduce the signal's shape. Therefore, choosing a data acquisition system with a sampling rate at least 10 times the signal frequency ensures more accurate signal measurements.

[0003] For example, to measure a sine wave with a frequency of 1 kHz, according to the Nyquist theorem, a sampling frequency of at least 2 kHz must be used. However, in practical applications, sampling at a frequency of 10 kHz is recommended, as this yields a more accurate signal curve.

[0004] In practical applications, data acquisition above 1kHz falls into the category of high-frequency sampling, which is difficult for general control systems to achieve. Existing data acquisition systems capable of high-frequency sampling consist of a chassis, controller, and signal acquisition modules. However, these systems are expensive and complex to configure. Users need to select appropriate hardware modules based on the signal type and different sampling frequency requirements, making the application process cumbersome, inflexible, and difficult to adapt to diverse measurement needs.

[0005] Therefore, a data acquisition system suitable for high-frequency data acquisition is desired, which can acquire data of different signal types (voltage / current) and different sampling frequencies using a single module, and can be flexibly adjusted according to the actual sampling frequency required, while also being inexpensive. Summary of the Invention

[0006] This application is made in view of the above-mentioned problems. The main purpose of this application is to provide a data processing method and apparatus, a data acquisition system and a computer-readable storage medium to solve the technical problems of existing high-frequency data acquisition systems, such as complex configuration, poor flexibility and difficulty in adapting to diverse signal types and sampling frequency requirements through a single module.

[0007] To achieve the above objectives, according to one aspect of this application, a data processing method is provided, comprising: establishing isochronous synchronous communication with a remote acquisition device via a bus to acquire a bus period and an oversampling rate, wherein the bus period and the oversampling rate are determined based on the frequency of the signal acquired by the sensor; at the end of each bus period, receiving a sampled dataset from the remote acquisition device, wherein the sampled dataset is generated by the remote acquisition device based on the oversampling rate, dividing the bus period into n sub-cycles and performing sampling on the signal acquired by the sensor once in each sub-cycle, where n is an integer greater than 1; writing the sampled dataset into a current write buffer in a preset dual buffer, wherein the dual buffer includes a first buffer and a second buffer, the first buffer and the second buffer alternately serving as the current write buffer and the current read buffer; accumulating the amount of data written in the current write buffer; when the amount of data written in the current write buffer reaches a preset block size: switching the current write buffer to the current read buffer for reading by a data reading device; and switching the previous read buffer to the new current write buffer to continue writing new sampled datasets.

[0008] In this way, the determinism of the sampling timing is ensured through isochronous synchronous communication, and the alternating write and read mechanism of the dual buffer ensures that the continuous writing of high-speed sampling data and the reading of the data reading device do not block each other, thereby realizing seamless continuous transmission of high-frequency sampling data. The bus period and oversampling rate can be flexibly set according to the known frequency of the signals collected by the sensor, and diverse high-frequency sampling needs can be met without relying on expensive dedicated acquisition hardware.

[0009] Furthermore, according to one embodiment of this application, each buffer is configured with a status field, a timestamp field, and an interval counter field. The status field is used to indicate whether the buffer is in a readable or writable state, the timestamp field is used to record the time when the buffer last switched from a writable state to a readable state, and the interval counter field is used to record the cumulative number of times the buffer has switched from a writable state to a readable state.

[0010] In this way, the read and write status of each buffer can be tracked in real time through the status field, and the time point and cumulative number of buffer switching can be recorded through timestamps and interval counters. This provides a basis for the timing monitoring and status tracking of the data acquisition process and helps to achieve consistent storage of high-speed acquired data.

[0011] Furthermore, according to one embodiment of this application, each buffer is configured with a buffer full flag. Switching the current write buffer to the current read buffer includes: setting the buffer full flag of the current write buffer; in response to the buffer full flag being set, updating the value of the timestamp field and the value of the interval counter field of the current write buffer; and switching the status field of the current write buffer from a writable state to a readable state, so as to switch the current write buffer to the current read buffer.

[0012] In this way, the status field, timestamp, and interval counter can be updated uniformly by using the buffer full flag, thereby completing the buffer switching.

[0013] Furthermore, according to one embodiment of this application, each buffer is also configured with a read-allow flag bit, and the data processing method further includes: after the current write buffer is switched to the current read buffer, setting the read-allow flag bit of the current read buffer to notify the data reading device that the sampled dataset in the current read buffer can be read.

[0014] In this way, the data reading device can determine when to read data from the buffer by using the read-enable flag.

[0015] Furthermore, according to one embodiment of this application, when the sampled dataset in the current read buffer is read by the data reading device, the data reading device performs a consistency read check. In the consistency read check, the data reading device reads and compares the values ​​of the timestamp field and the interval counter field before and after reading all the sampled datasets in the current read buffer, respectively, to determine whether all sampled datasets have been read consistently.

[0016] In this way, the data reading device can detect whether the buffer state has changed during the reading by comparing the values ​​of the timestamp and the interval counter before and after reading the sampled dataset, thereby determining whether the reading has obtained complete and consistent sampled data.

[0017] Furthermore, according to an embodiment of this application, the data processing method further includes: in response to the consistent reading of the sampled dataset in the current read buffer by the data reading device, determining whether the buffer full flag of the current write buffer is set; in response to the buffer full flag of the current write buffer being set, switching the status field of the current read buffer to a writable state, making the current read buffer the switched current write buffer; and resetting the read-allow flag of the switched current write buffer and the buffer full flag of the previous current write buffer.

[0018] In this way, the data processing device only switches the state of the current read buffer after all sampled data sets in the current read buffer have been read consistently and the full flag of the current write buffer has been set. This ensures that the state switching of the current read buffer and the state switching of the current write buffer are synchronized, thereby enabling cyclic reading and writing of each buffer without overwriting the read data.

[0019] Furthermore, according to one embodiment of this application, each buffer is configured with a buffer full flag, and determining the previous read buffer as the new current write buffer includes: after the sampled dataset in the previous read buffer is successfully read by the data reading device, checking whether the buffer full flag of the current write buffer before the switch is set; in response to the buffer full flag being set, switching the status field of the previous read buffer from a readable state to a writable state.

[0020] In this way, by detecting the full flag of the other buffer before switching, a strict timing dependency of buffer state switching is ensured—that is, the previous read buffer is only allowed to switch to a writable state after the other buffer has been completely filled and the switch is triggered, thus ensuring zero conflict between data writing and reading operations.

[0021] Furthermore, according to one embodiment of this application, updating the value of the timestamp field and the interval counter field of the current write buffer includes: updating the timestamp field of the current write buffer to the current system time, and incrementing the value of the interval counter field of the current write buffer by one.

[0022] In this way, the current system time and accumulated count can be used to accurately record buffer switching events, thereby providing an accurate time reference for the timing alignment of sampled data and the statistics of acquisition frequency.

[0023] According to another aspect of this application, a data processing apparatus is provided, comprising: a synchronous communication module for establishing isochronous synchronous communication with a remote acquisition device via a bus; a configuration module for acquiring a bus period and an oversampling rate, the bus period and the oversampling rate being determined based on the frequency of the signal acquired by the sensor; a data receiving module for receiving a sampled dataset from the remote acquisition device at the end of each bus period, the sampled dataset being generated by the remote acquisition device based on the oversampling rate, dividing the bus period into n sub-periods and performing sampling on the signal acquired by the sensor once in each sub-period, where n is an integer greater than 1; a dual buffer, including a first buffer and a second buffer, the first buffer and the second buffer alternating as the current write buffer and the current read buffer; a write control module for writing the sampled dataset into the current write buffer in the dual buffer and accumulating the amount of data written in the current write buffer; and a switching control module for performing the following operations when the amount of data written in the current write buffer reaches a preset block size: switching the current write buffer to the current read buffer for reading by a data reading device; and switching the previous read buffer to the new current write buffer to continue writing new sampled datasets.

[0024] According to another aspect of this application, a data acquisition system is provided, comprising: the aforementioned data processing device, and a data reading device for reading a sampled dataset from the double buffer of the data processing device.

[0025] Furthermore, according to one embodiment of this application, the data acquisition system further includes: a sensor for real-time acquisition of analog signals of the load; and a remote acquisition device connected to the sensor, the remote acquisition device being used to: divide the bus cycle into n sub-cycles based on the oversampling rate, and perform sampling once on the analog signals acquired by the sensor in each sub-cycle to generate a sampled dataset, and send the generated sampled dataset to the data processing device at the end of each bus cycle, where n is an integer greater than 1.

[0026] Furthermore, according to one embodiment of this application, the remote acquisition device includes an analog input module, which is used to: perform sampling on the analog signal acquired by the sensor once in each sub-cycle to generate a sampling dataset.

[0027] According to another aspect of this application, a data processing method is provided, comprising: establishing isochronous synchronous communication with a remote acquisition device via a bus to acquire a bus period and an oversampling rate, wherein the bus period and the oversampling rate are determined according to the frequency of the signal acquired by the sensor; at the end of each bus period, receiving a sampled dataset from the remote acquisition device, wherein the sampled dataset is generated by the remote acquisition device based on the oversampling rate, dividing the bus period into n sub-periods and sampling the signal acquired by the sensor once in each sub-period, where n is an integer greater than 1; and writing the sampled dataset into a current write buffer in a preset double buffer, wherein the double buffer includes a first buffer and a second buffer, the first buffer and the second buffer... The buffer alternates between being the current write buffer and the current read buffer; the amount of data written in the current write buffer is accumulated; when the amount of data written in the current write buffer reaches the preset block size: the current write buffer is switched to the current read buffer for the data reading device to read; and the previous read buffer is switched to the new current write buffer to continue writing new sampled datasets. This solves the technical problems of complex configuration, poor flexibility, and difficulty in adapting to diverse signal types and sampling frequency requirements with a single module in existing high-frequency data acquisition systems. It achieves the technical effect of supporting different signal types such as voltage / current with a single module, flexibly adjusting the sampling frequency, reducing system costs, and improving the flexibility and applicability of data acquisition. Attached Figure Description

[0028] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0029] Figure 1 A block diagram of a data acquisition system according to an embodiment of this application is shown;

[0030] Figure 2 This is a flowchart of a data processing method performed by a data processing apparatus according to an embodiment of this application;

[0031] Figure 3 The graph shows the relationship between the acquisition period and frequency under the combination of bus period and sampling rate;

[0032] Figure 4 A schematic diagram illustrating the principle of consistent storage of high-speed acquired data is shown.

[0033] Figure 5 A schematic diagram illustrating the consistent storage process for high-speed acquired data is shown.

[0034] Figure 6 A flowchart illustrating high-speed data acquisition and transmission of a data acquisition system according to an embodiment of this application is shown.

[0035] The above figures include the following reference numerals:

[0036] 1000 Data acquisition system 1100 Data processing device 1111 Process Image Area 1120 Double buffer 1121 First buffer zone 1122 Second buffer 1200 Data reading device 1300 sensor 1400 Remote data acquisition equipment 1410 Analog input module 1411 Data buffer 1421 Interface module buffer Detailed Implementation

[0037] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0038] It should be noted that, unless otherwise specified, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0039] In this application, unless otherwise stated, directional terms such as "upper," "lower," "top," and "bottom" are generally used in relation to the direction shown in the accompanying drawings, or in relation to the vertical, perpendicular, or gravitational direction of the component itself; similarly, for ease of understanding and description, "inner" and "outer" refer to the inner and outer contours of each component itself, but the above directional terms are not intended to limit this application.

[0040] The purpose of this application is to provide a data acquisition system suitable for sampling frequencies above 1kHz, which can realize data acquisition of different signal types (voltage / current) and different sampling frequencies, and can be flexibly adjusted according to the actual sampling frequency required, while being low in cost and simple in hardware structure.

[0041] Figure 1 A block diagram of a data acquisition system according to an embodiment of this application is shown. Figure 1 As shown, this application provides a data acquisition system 1000, which includes a data processing device 1100 and a data reading device 1200 connected via Ethernet. For example, a TCP / IP protocol suite can be run on this Ethernet to achieve reliable data transmission. The data acquisition system 1000 may also include a sensor 1300 and a remote acquisition device 1400. The sensor 1300 is used to acquire analog signals of a load. For example, the sensor can acquire analog signals (e.g., voltage or current signals with a frequency of approximately 1 kHz) of a load (e.g., a field device in operation) in real time. The sensor 1300 is connected to the remote acquisition device 1400 and transmits the real-time acquired signals to it. The remote acquisition device 1400 may also be connected to the data processing device 1100.

[0042] Next, we will refer to Figures 2 to 6 The technical solution of this application is described in detail. Figure 2 It is a flowchart of a data processing method executed by a data processing device. For example... Figure 2 As shown, the data processing method includes:

[0043] S210: Establishes isochronous synchronous communication with remote acquisition device 1400 via bus.

[0044] In step S210, the data processing device 1100 establishes isochronous synchronous communication with the remote acquisition device 1400 via a bus. In this embodiment, the bus can be a PROFINET bus, and the data processing device 1100 can be a PLC controller. The isochronous synchronous communication can be PROFINET IRT (Isochronous Real-Time) communication. Isochronous synchronous communication can establish a synchronization domain, designating the data processing device 1100 as the synchronization master and configuring the remote acquisition device 1400 as the synchronization slave, so that all devices within the synchronization domain share a unified clock reference, thereby ensuring that data is transmitted within a precise time window. In this way, isochronous synchronous communication provides a microsecond-level precise time reference for subsequent bus cycle-based oversampling operations, enabling multiple sampled values ​​acquired within each bus cycle to be transmitted to the data processing device 1100 in a deterministic timing sequence.

[0045] S220: Obtain the bus period and oversampling rate, which are determined based on the frequency of the signal acquired by the sensor.

[0046] In an exemplary embodiment, the bus cycle T DP For example, the time can be set between 125 µs and 64 ms. In another exemplary embodiment, steps S210 and S220 can be interchanged.

[0047] In this application, the frequency f of the signal acquired by the sensor S It is known in advance that it can be above 1kHz. The relationship between bus cycle and oversampling rate and the frequency of the signal acquired by the sensor is detailed in the reference below. Figure 3 The description.

[0048] S230: At the end of each bus cycle, receive the sampling dataset from the remote acquisition device. The sampling dataset is generated by the remote acquisition device 1400 based on the oversampling rate, dividing the bus cycle into n sub-cycles and performing one sampling on the signal acquired by the sensor in each sub-cycle, where n is an integer greater than 1.

[0049] In step S230, at the end of each bus cycle, the data processing device 1100 can receive a sampled dataset from the remote acquisition device 1400. This sampled dataset is generated by the remote acquisition device 1400 through the channel oversampling function. Oversampling refers to dividing a bus cycle into n equal sub-cycles, and sampling the signal acquired by the sensor once in each sub-cycle, thereby obtaining n sampled values ​​in one bus cycle, achieving an effective sampling frequency higher than the bus frequency. n is also called the oversampling rate. n is an integer greater than 1; in the exemplary embodiment, 1 < n ≤ 16. The duration of the sub-cycle is consistent with the sampling time of the channel.

[0050] The following is combined Figure 3 The oversampling mechanism will be further explained. Figure 3 The relationship between the acquisition period and frequency is shown under the combination of bus period and oversampling rate. For example... Figure 3 As shown, A_Sig represents the analog input signal from sensor 1300. Remote acquisition device 1400 performs oversampling on this analog input signal in each bus cycle. Specifically, remote acquisition device 1400 reads one measurement value in each sub-cycle of each bus cycle, thus reading n measurement values ​​in one bus cycle. Figure 2 In the example, bus cycle T DP = 1 ms, oversampling rate n = 16, meaning that 16 actual data points can be collected within one bus cycle (e.g., Figure 3 Data points 1 to 16 are shown in the table. Correspondingly, the data acquisition sub-cycle T... sub-cycle = T DP / n = 1 ms / 16 = 62.5 µs, corresponding to the sampling frequency f = n / T DP = 16 / 1 ms = 16 kHz. Therefore, by selecting different bus cycles T by the user... DP By combining it with the oversampling rate n, different data acquisition cycles can be flexibly implemented, thereby meeting different needs of high-frequency sampling.

[0051] As mentioned earlier, the frequency f of the signal acquired by the sensor S It can be above 1kHz. However, according to the Nyquist theorem, the final sampling frequency f must be the signal frequency f. S A realistic signal measurement curve can only be obtained if the magnitude is more than twice that of the given value (e.g., 2 to 10 times). That is, f ≥ 2f must be satisfied. S Since the final sampling frequency f = 1 / (T) DP / n)=n / T DP Therefore, the oversampling rate n and the bus period T DP and the frequency f of the acquired signal itselfS The following relationship must be satisfied between them: n / T DP ≥2f S For example, when T DP =1 ms, f S When the frequency is 1kHz, n≥2 must be satisfied.

[0052] S240: Write the sampled dataset into the current write buffer in the preset double buffer 1120, wherein the double buffer 1120 includes a first buffer 1121 and a second buffer 1122, and the first buffer 1121 and the second buffer 1122 alternately serve as the current write buffer and the current read buffer.

[0053] In this embodiment, the data processing device 1100 continuously receives the sampled dataset at a bus cycle-level rate (e.g., milliseconds or sub-milliseconds), while the data reading device 1200 (e.g., upper-level monitoring software) typically reads data asynchronously via Ethernet at a lower rate. For example, the data reading device 1200 and the data processing device 1100 can communicate asynchronously and non-real-time via the TCP / IP protocol, with a minimum communication cycle of, for example, 100 ms. Due to the significant difference in their rates, if only a single buffer is used, the data processing device 1100 may continue to write new data to the same buffer while the data reading device 1200 is reading data, leading to data inconsistency. Therefore, this embodiment sets up a dual buffer 1120, so that while data in one buffer is being read by the data reading device 1200, the other buffer can continue to receive and write new sampled datasets, thereby avoiding read-write conflicts and ensuring the integrity and consistency of data transmission. The specific structure of the dual buffer 1120 is described in the following reference. Figure 4 and Figure 5 The description.

[0054] S250: The total amount of data written in the current write buffer.

[0055] In step S250, the data processing device 1100 accumulates the amount of data written in the current write buffer. Specifically, after each bus cycle ends and the data processing device 1100 writes the sampled dataset (containing n sampled values) corresponding to that bus cycle into the current write buffer, it increments the number of written sampled values ​​by n. This accumulated value is used in step S260 to determine whether the current write buffer is full, i.e., whether the preset block size has been reached.

[0056] S260: When the amount of data written in the current write buffer reaches the preset block size: switch the current write buffer to the current read buffer for the data reading device 1200 to read; and switch the previous read buffer to the new current write buffer to continue writing the new sampled dataset.

[0057] In step S260, when the amount of data written in the current write buffer reaches a preset block size, the data processing device 1100 performs a buffer switch: switching the current write buffer to the current read buffer for the data reading device 1200 to read the data therein; simultaneously, switching the previous read buffer to the new current write buffer to continue writing the sampled dataset received in subsequent bus cycles. In this way, the data acquisition process is not interrupted by buffer switching, achieving continuous and seamless high-speed data acquisition.

[0058] The preset block size can be determined based on the communication cycle between the data reading device 1200 and the data processing device 1100. For example, when the minimum communication cycle of the data reading device 1200 is T... min Furthermore, when the data reading device is allowed 1200M repeated read attempts (to handle single read failures), the time required for the buffer to fill should not be less than M × T. min Accordingly, the preset block size can be set to be no less than M × T. min × n / T DP The amount of data corresponding to each sample value. For example, when T min = 100 ms, M = 3, T DP When n = 15 and the time interval is 750 µs, the preset block size can be set to no less than 3 × 100 ms × 15 / 0.75 ms = 400 × 15 = 6000 sample values. Under this condition, the time taken for the CPU of the data processing device 1100 to fill one buffer is exactly equal to the time taken for the data reading device 1200 to read another buffer three times. This timing-matching design ensures that during buffer switching, the write end will not overwrite data that has not been read, and the read end does not need to wait for data to be written, thereby effectively avoiding data loss and achieving seamless and continuous data transmission.

[0059] Next, combined Figures 4 to 5 The consistent data storage process of this application will be illustrated with a specific numerical example. Figure 4 A schematic diagram illustrating the principle of consistent storage of high-speed acquired data is shown. Figure 5 A schematic diagram illustrating the consistent storage process of high-speed acquired data is shown. In an exemplary embodiment of this application, the remote acquisition device 1400 may include an analog input module 1410. The channel oversampling function of the remote acquisition device 1400 can be implemented by the analog input module 1410. That is, the analog input module 1410 can be used to: based on n sub-cycles divided into a bus cycle, perform real-time acquisition of signals (e.g., voltage or current signals) from the sensor 1300 within each sub-cycle. Figure 5The example in the text is a voltage signal V_Signal. A single sampling is performed, thereby performing oversampling to generate a sampled dataset.

[0060] exist Figure 4 and Figure 5 In this context, it is assumed that the PROFINET bus cycle T DP = 750 µs, oversampling rate n = 15, minimum communication period T between data reading device 1200 and data processing device 1100 min = 100 ms, safety factor M = 3. Thus, the data acquisition sub-cycle T sub-cycle = T DP / n = 750 µs / 15 = 50 µs, corresponding to a sampling frequency f = n / T DP = 15 / 0.75 ms = 20 kHz. That is, the analog input module 1410 of the remote acquisition device 1400 samples the real-time acquisition signal of the sensor 1300 15 times at 50µs intervals within each bus cycle, generating a sampled dataset containing 15 sampled values. Correspondingly, the time required to fill a single buffer is set to M × T. min = 3 × 100 ms = 300 ms. Within 300 ms, the data processing device 1100 needs to execute 300 ms / 750 µs = 400 bus cycles. These 400 bus cycles will write 400 × 15 = 6000 sample values. That is, the preset block size is set to 6000 sample values.

[0061] like Figure 4 As shown, the analog input module 1410 samples the real-time acquisition signal from the sensor 1300 in each sub-cycle of a bus cycle. The n sampled values ​​acquired by the analog input module 1410 in one bus cycle are first buffered in the data buffer 1411 of the analog input module 1410. In the next bus cycle, these n sampled values ​​are synchronously transmitted to the interface module buffer 1421 of the remote acquisition device 1400 via the backplane bus. After another bus cycle, these n sampled values ​​are synchronously transmitted in the form of data packets via the PROFINET bus to the process image area 1111 of the data processing device 1100. Subsequently, the synchronous refresh organization block of the data processing device 1100 (not shown in the figure, its application cycle is consistent with the bus cycle) is triggered, and the data processing device 1100 writes the sampled data in the process image area 1111 into the dual buffer 1120. The above process is repeated in each bus cycle, thereby realizing the continuous transmission of sampled data from the process image area 1111 to the dual buffer 1120.

[0062] A dual buffer can be created in the CPU of the data processing device 1100. The dual buffer 1120 includes a first buffer 1121 and a second buffer 1122, which alternately serve as the current write buffer and the current read buffer.

[0063] In an exemplary embodiment of this application, each buffer is configured with a status field, a timestamp field, and an interval counter field. The status field indicates whether the buffer is currently in a readable or writable state; the timestamp field records the system time of the last time the buffer switched from a writable state to a readable state; and the interval counter field records the cumulative number of times the buffer switched from a writable state to a readable state.

[0064] like Figure 5 As shown, the data structure of each buffer consists of three parts: a timestamp T_S, an array of sampled values ​​(shown as v1~v6000 in the diagram), and an interval counter. The sampled value array is used to store the accumulated sampled values ​​written over multiple bus cycles, and its length corresponds to the preset block size. Figure 5 The default block size is 6000 sample values, and the data is written to the two buffers within bus cycles C1~C400 and C401~C800 respectively. Each sample value in the sample value array can be a floating-point type. The timestamp T_S can be located at the beginning of the buffer data structure.

[0065] In this way, by configuring status fields, timestamp fields, and interval counter fields for each buffer, precise management of buffer read and write status can be achieved, and the necessary metadata baseline can be provided for subsequent data consistency verification.

[0066] Furthermore, in this embodiment, each buffer is configured with a buffer full flag. When the amount of data written in the current write buffer in step S260 reaches a preset block size, the step of switching the current write buffer to the current read buffer includes: first, setting the buffer full flag of the current write buffer to indicate that the current write buffer is full; then, in response to the buffer full flag being set, updating the value of the timestamp field and the value of the interval counter field of the current write buffer; finally, switching the status field of the current write buffer from the writable state to the readable state to switch the current write buffer to the current read buffer.

[0067] In this way, by setting the buffer full flag and updating the timestamp and interval counter synchronously before the buffer state switch, the consistency between the buffer metadata and the data content is ensured, providing a reliable reference for the consistency reading verification of the subsequent data reading device 1200.

[0068] Furthermore, in this embodiment, the steps of updating the timestamp field and interval counter field of the current write buffer specifically include: updating the timestamp field of the current write buffer to the current system time, and incrementing the interval counter field of the current write buffer by one. In this way, the timestamp records the precise moment when the buffer was last filled, while the interval counter records the cumulative number of times the buffer has switched from a writable state to a readable state. The combination of the two can be used for subsequent consistency read verification—if a new buffer switch occurs during data reading, the values ​​of the timestamp or interval counter will change, thus being detectable by the data reading device 1200.

[0069] Furthermore, in this embodiment, each buffer is also configured with a read-allow flag. The data processing method according to this example further includes: after the current write buffer is switched to the current read buffer, setting the read-allow flag of the current read buffer to notify the data reading device 1200 that the sampled dataset in the current read buffer can be read.

[0070] In this embodiment, the data reading device 1200 can be upper-level monitoring software (e.g., WinCC). The data reading device 1200 can communicate asynchronously and non-real-time with the data processing device 1100 via Ethernet (e.g., TCP / IP protocol). The data reading device 1200 can monitor the status of the read-allowed flag bit through polling. When the read-allowed flag bit is detected to be set, the data reading device 1200 initiates a data read request for the current read buffer (e.g., via S7 communication service).

[0071] In this way, an asynchronous handshake notification mechanism can be implemented between the data processing device 1100 and the data reading device 1200, so that the data reading device 1200 only performs the reading operation when the data in the current read buffer is ready, thus avoiding invalid reading of incomplete data.

[0072] Furthermore, in this embodiment, the step of switching the previous read buffer to the new current write buffer while switching the current write buffer to the current read buffer includes: after the sampled dataset in the previous read buffer is successfully read by the data reading device 1200, checking whether the buffer full flag of the current write buffer before the switch is set; in response to the buffer full flag being set, switching the status field of the previous read buffer from the readable state to the writable state.

[0073] For example, after the data in the second buffer 1122, which serves as a read buffer, is successfully read by the data reading device 1200, the data processing device 1100 monitors the full flag of the first buffer 1121, which serves as the current write buffer. When the first buffer 1121 is full, its full flag is set. In response to the full flag of the first buffer 1121 being set, the data processing device 1100 switches the status field of the first buffer 1121 from a writable state to a readable state, and simultaneously switches the status field of the second buffer 1122 from a readable state to a writable state.

[0074] In this way, it is ensured that when the previous read buffer is switched to the new current write buffer, the other buffer, which was the previous write buffer, can also switch states synchronously, thus ensuring synchronous read and write state switching of the dual buffers and avoiding write and read conflicts.

[0075] like Figure 5 As shown, the consistent storage process for high-speed acquired data is as follows:

[0076] After data acquisition begins, it is assumed that the first buffer 1121 is designated as the initial current write buffer. At the end of each bus cycle, the data processing device 1100 receives 15 sampled values ​​from the remote acquisition device 1400 and writes them into the first buffer 1121. After 400 bus cycles (i.e., 300ms), a total of 6000 sampled values ​​have been written into the first buffer 1121, reaching the preset block size. At this point, the data processing device 1100 performs a buffer switching operation: setting the full flag of the first buffer 1121, incrementing the interval counter of the first buffer 1121, updating the timestamp of the first buffer 1121 to the current system time, switching the status field of the first buffer 1121 to a readable state, and setting the read-allow flag of the first buffer 1121. Simultaneously, the data processing device 1100 switches the status field of the second buffer 1122 to a writable state, uses the second buffer 1122 as the new current write buffer, and continues writing the sampled dataset for subsequent bus cycles.

[0077] After detecting that the read-allow flag of the first buffer 1121 is set, the data reading device 1200 initiates a read request for the first buffer 1121 via the S7 communication service. The data reading device 1200 first reads the timestamp and interval counter values ​​of the first buffer 1121, then reads 6000 sampled values ​​from the first buffer 1121. After reading is complete, it reads the timestamp and interval counter values ​​again. If the timestamp values ​​and interval counter values ​​are consistent in both reads, it is determined that the data in the first buffer 1121 has been read consistently.

[0078] In this application, each buffer may also be configured with a successfully read dataset flag. After determining that the data in the first buffer 1121 has been read consistently, the data reading device 1200 sets the successfully read dataset flag of the first buffer 1121. After detecting that the data reading device 1200 has successfully read the dataset (i.e., detecting that the successfully read dataset flag is set) and waiting for the buffer full flag of the second buffer 1122 to be set, the data processing device 1100 synchronously switches the read / write states of the first buffer 1121 and the second buffer 1122. That is, it switches the first buffer 1121 to a writable state and the second buffer 1122 to a readable state. Then, the data processing device 1100 resets the read-allow flag of the first buffer 1121, resets the buffer full flag of the second buffer 1122, and resets the successfully read dataset flag of the first buffer 1121. The first buffer 1121 can thus be used again as the current write buffer, and the data processing device 1100 can repeat the above-described write, switch, read, and restore process.

[0079] The processing of the second buffer 1122 is similar to that of the first buffer 1121, and will not be described again here. This alternating cycle continues, with data being continuously written to the dual buffers and sequentially read by the data reading device 1200 until a command to stop data acquisition is received.

[0080] In this manner, high-speed acquired data is collected from sensor 1300 via analog input module 1410 of remote acquisition device 1400, then sequentially transmitted via backplane bus, interface module buffer, and PROFINET bus to process image area of ​​data processing device 1100, written to dual buffer 1120, and finally reliably retrieved by data reading device 1200 through a consistent reading mechanism. Each link in the entire chain ensures the integrity and consistency of data transmission.

[0081] Figure 6 A flowchart illustrating high-speed data acquisition and transmission is shown. This process is executed collaboratively by a data processing device 1100 (e.g., a PLC controller) and a data reading device 1200 (e.g., WinCC supervisory control software). Figure 6 As shown, the process includes an initialization phase (steps S601-S605), a data writing phase (steps S606-S613, executed by the data processing device 1100), a data reading phase (steps S614-S617, executed by the data reading device 1200), and a buffer recovery phase (steps S618-S620, executed by the data processing device 1100). Each step is described below.

[0082] Initialization phase (steps S601~S605)

[0083] During the initialization phase, the data processing device 1100 sequentially performs the following configuration operations:

[0084] S601: Set the signal sampling frequency, i.e., determine the frequency range of the signal monitored by sensor 1300 (e.g., the monitored signal is the operation of a solenoid valve switch, and its frequency is approximately 1Hz); S602: Select the bus cycle T DP S603: Select oversampling rate n; S604: Configure read and write data buffers, i.e., initialize dual buffer 1120 (including first buffer 1121 and second buffer 1122); S605: Start data acquisition.

[0085] Data writing stage (steps S606~S613, executed by data processing device 1100)

[0086] After data acquisition is initiated in step S605, the data processing device 1100 begins writing data to the current write buffer (left branch arrow of step S605). Simultaneously, the data reading device 1200 reads data from the current read buffer (right branch arrow of step S605). For clarity, the same buffer will be described throughout. Figure 6 As shown on the left:

[0087] S606: Confirm that the current write buffer's full flag is 0, meaning the current write buffer is not full and is in a writable state. S607: Write the sampled data received at the end of the current bus cycle into the current write buffer. S608: Determine if the current write buffer is full, i.e., whether the amount of data written has reached the preset block size. If not full (N), return to step S607 to continue writing the sampled data for the next bus cycle; if full (Y), continue to step S609. S609: Set the current write buffer's full flag (i.e., set its value to 1) to indicate that the current write buffer is full. S610: Update the interval counter, incrementing its value by one. S611: Update the timestamp, recording it as the current system time. S612: Switch the current write buffer's status field from writable to readable, i.e., switch the current write buffer to the current read buffer. S613: Set the current read buffer's read-allow flag (i.e., set its value to 1) to notify the data reading device 1200 that the data in the current read buffer is ready.

[0088] After step S613 is completed, the data processing device 1100 then continues to execute the write loop on another buffer (i.e., the new current write buffer).

[0089] Data reading stage (steps S614~S617, executed by data reading device 1200)

[0090] Next, the data reading device 1200 performs a data reading process on the switched current read buffer. For example... Figure 6 As shown on the right:

[0091] S614: Check if the read-allow flag of the current read buffer is 1. When the read-allow flag is 1, it indicates that the data in the current read buffer is ready, and continue to execute step S615. When the read-allow flag is 0, continue to monitor the read-allow flag.

[0092] S615: Read the sampled dataset in the current read buffer. In this embodiment, step S615 specifically includes the following sub-steps: The data reading device 1200 first reads the value of the timestamp field and the value of the interval counter field of the current read buffer; then reads all the sampled datasets in the current read buffer; after reading is completed, it reads the value of the timestamp field and the value of the interval counter field of the current read buffer again.

[0093] S616: Determine if the consistent read was successful, i.e., check if the values ​​of the timestamp field and the interval counter field are the same in the two reads. If they are different (N), return to step S615 and re-execute the read operation; if they are the same (Y), it indicates that the current read buffer has not undergone a state switch or data overwriting during the read process, and the sampled dataset has been read consistently, so continue to step S617.

[0094] In this way, by obtaining the timestamp and interval counter before and after reading in step S615 and comparing them in step S616, it is possible to effectively detect whether a change in the buffer state has occurred during the reading process, thereby ensuring that the data reading device 1200 obtains a complete and consistent dataset.

[0095] S617: Set the successfully read dataset flag of the current read buffer to notify the data processing device 1100 that the sampled dataset of the current read buffer has been successfully read.

[0096] Buffer recovery phase (steps S618-S620, executed by data processing device 1100)

[0097] S618: In response to the successful read data set flag being set in the current read buffer, the data processing device 1100 determines whether the buffer full flag in the current write buffer is set, i.e., whether the value of the buffer full flag is 1. If the buffer full flag is set (i.e., the value is 1), then proceed to step S619. If the buffer full flag is not set (i.e., the value is 0), then continue monitoring the buffer full flag in the current write buffer. In this way, the buffer recovery operation is initiated for the current read buffer only after all sampled data sets in the current read buffer have been read consistently and the other buffer (i.e., the current write buffer) has been filled and meets the conditions for switching to a readable buffer, thereby ensuring that the read and write state switching of the two buffers is synchronized.

[0098] S619: Switch the status field of the current read buffer from readable to writable. Thus, the current read buffer is restored to the switched current write buffer. Furthermore, while switching the status field of the current read buffer, the status field of another buffer (i.e., the current write buffer) is also switched from writable to readable. That is, steps S619 and S612 are executed simultaneously.

[0099] S620: Reset the read-allow flag and the successfully read dataset flag of the current write buffer after the switch, and reset the buffer full flag of the current write buffer before the switch. That is, set the values ​​of the read-allow flag, the buffer full flag, and the successfully read dataset flag to 0.

[0100] After step S620 is completed, the switched current write buffer can accept data writing. The data processing device 1100 can perform data writing operations on the switched current write buffer again (steps S606~S613).

[0101] In this way, through the writing and switching in steps S606~S613, the reading and verification in steps S614~S617, and the recovery in steps S618~S620, a complete buffer read-write alternation cycle is completed, ensuring the continuous and seamless operation of high-speed data acquisition and the consistency of data transmission.

[0102] According to another embodiment of this application, a data reading method is also provided, executed by a data reading device 1200 connected to the data processing device 1100 described above. In this embodiment, each buffer is configured with an enable read flag. The data reading method includes: monitoring the enable read flag of the current read buffer; in response to detecting that the enable read flag is set, obtaining the values ​​of a timestamp field and an interval counter field of the current read buffer before reading the sampled dataset of the current read buffer; reading all sampled datasets in the current read buffer; after reading all sampled datasets, obtaining the values ​​of the timestamp field and the interval counter field of the current read buffer again; if the values ​​of the timestamp field and the interval counter field obtained twice are the same, it is determined that all sampled datasets in the current read buffer have been read consistently.

[0103] Furthermore, in this embodiment, in response to determining that all sampled datasets in the current read buffer have been read consistently, the data reading device 1200 can set the successfully read dataset flag of the current read buffer to notify the data processing device 1100 that the sampled datasets in the current read buffer have been successfully read. This can trigger the processing device 100 to determine whether the buffer full flag of the current write buffer is set, thereby determining whether to perform a buffer switch.

[0104] In this way, the data reading device 1200 performs consistency checks by acquiring and comparing timestamps and interval counters before and after reading, ensuring that the read dataset is not modified or overwritten during the reading process. The specific execution flow of the above data reading method can be found in [reference needed]. Figure 6 Steps S614 to S617 will not be described in detail here.

[0105] According to an embodiment of this application, a data processing apparatus is also provided. The data processing apparatus 1100 includes: a synchronous communication module for establishing isochronous synchronous communication with a remote acquisition device 1400 via a bus; a configuration module for acquiring the bus period and oversampling rate, the bus period and oversampling rate being determined based on the frequency of the signals acquired by the sensors; a data receiving module for receiving a sampled dataset from the remote acquisition device 1400 at the end of each bus period, the sampled dataset being generated by the remote acquisition device 1400 dividing the bus period into n sub-periods based on the oversampling rate and performing one sampling of the signals acquired by the connected sensors 1300 in each sub-period, where n is an integer greater than 1; and a double buffer 1. 120 includes a first buffer 1121 and a second buffer 1122, which alternately serve as the current write buffer and the current read buffer; a write control module is used to write the sampled dataset into the current write buffer in the dual buffer 1120 and accumulate the amount of data written in the current write buffer; a switching control module is used to perform the following operations when the amount of data written in the current write buffer reaches a preset block size: switch the current write buffer to the current read buffer for the data reading device 1200 to read; and switch the previous read buffer to the new current write buffer to continue writing new sampled datasets.

[0106] For details on the implementation methods and workflows of the above modules, please refer to [link / reference]. Figures 2 to 6 The corresponding steps in the described data processing method will not be repeated here. In particular, the write control module and the switching control module of the data processing device 1100 can be integrated into the CPU.

[0107] Furthermore, in this application, the remote acquisition device 1400 can be an ET-200SP remote station, the data processing device 1100 can be an S7-1500 PLC controller (e.g., including CPU-1517), and the data reading device 1200 can be WinCC upper-level monitoring software.

[0108] According to an embodiment of this application, a data reading device 1200 is also provided for performing the above-described data reading method.

[0109] Furthermore, in the data acquisition system 1000 of this application, the sensor 1300 is used to acquire analog signals of the load in real time, such as voltage or current analog signals. The remote acquisition device 1400 is connected to the sensor 1300 and is used to: divide the bus cycle into n sub-cycles based on the oversampling rate, and perform sampling once on the analog signal acquired in real time by the sensor 1300 in each sub-cycle to generate a sampling dataset, and send the generated sampling dataset to the data processing device 1100 at the end of each bus cycle, where n is an integer greater than 1.

[0110] Furthermore, in this embodiment, the remote acquisition device 1400 includes an analog input module 1410. The analog input module 1410 is used to sample the analog signal acquired by the sensor 1300 once in each sub-cycle to generate a sampled dataset. The analog input module 1410 supports both voltage-type and current-type sensors, and the signal type selection can be flexibly implemented through software configuration.

[0111] Furthermore, in this embodiment, the load can be a solenoid valve, and the sensor 1300 can collect the current signal during the charging and discharging of the solenoid valve in real time. The frequency of this current signal is the switching frequency of the solenoid valve. For example, in the aerospace field, solenoid valves are used to control fuel delivery, and their response time is very fast. By collecting the current charging and discharging signal of the solenoid valve during operation through the sensor 1300, and performing high-speed acquisition and consistent storage through the aforementioned data acquisition system 1000, the current change process during the charging and discharging of the solenoid valve can be accurately reconstructed, thereby analyzing whether there are any abnormalities in the switching action of the solenoid valve.

[0112] The configuration and startup steps of the data acquisition system 1000 according to this application are as follows: 1. Configure PROFINET isochronous synchronous communication (IRT) between the data processing device and the remote acquisition device. In the synchronization domain, designate the data processing device as the synchronous master and configure the remote acquisition device as the synchronous slave. 2. Select the PROFINET bus period, for example, set the bus period to 0.75ms. 3. Configure isochronous synchronous communication of the remote acquisition device. 4. Activate the synchronization mode of the data processing device, specify the process image area and the synchronous refresh organization block. 5. Activate the channel oversampling function of the data processing device and select the oversampling rate. 6. Select the application period for the synchronous refresh organization block, which is consistent with the bus period. 7. Assign a process image sub-address to the oversampling channel. 8. Define the oversampling data type, create the synchronous refresh organization block and the alternating read / write data buffer (i.e., double buffer). 9. After configuration, start the data acquisition and reading process.

[0113] According to an embodiment of this application, a computer-readable storage medium is also provided, on which a program is stored. When executed by a processor, the program causes the processor to perform the aforementioned data processing method (i.e., steps S210 to S260 and corresponding subordinate steps). The computer-readable storage medium may include, but is not limited to, various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0114] Furthermore, according to embodiments of this application, a computer program product is also provided, comprising a program that, when executed by a processor, causes the processor to perform the above-described data processing method (i.e., steps S210 to S260 and corresponding subordinate steps).

[0115] It should be noted that the data processing method and apparatus proposed in this application are not only applicable to the aforementioned S7-1500 PLC controller, but also adaptable to other PLC controllers that conform to the IEC 61131-3 standard and support isochronous synchronous communication (e.g., PROFINET IRT, EtherNet / IP CIP Sync, etc.) and process image area mechanisms, such as Rockwell ControlLogix, Schneider M580, and Mitsubishi Q series. As long as the controller supports periodic synchronous tasks (e.g., a mechanism similar to the synchronization organization block OB61) and process image area data exchange, the oversampling data acquisition, double-buffered consistent storage, and asynchronous data transmission functions described in this application can be realized. This enables a high-speed data acquisition system capable of high-frequency data acquisition, with the sampling frequency adjustable according to actual needs, while maintaining low cost.

[0116] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0117] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Nouns and pronouns relating to persons in this patent application are not limited to specific genders.

[0118] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A data processing method, characterized in that, include: Time-synchronous communication with remote acquisition devices is established via a bus. The bus period and oversampling rate are obtained, and the bus period and oversampling rate are determined based on the frequency of the signal acquired by the sensor; At the end of each bus cycle, a sampled dataset is received from the remote acquisition device. The sampled dataset is generated by the remote acquisition device based on the oversampling rate, dividing the bus cycle into n sub-cycles and sampling the signal acquired by the sensor once in each sub-cycle, where n is an integer greater than 1. The sampled dataset is written into the current write buffer of a preset double buffer, wherein the double buffer includes a first buffer and a second buffer, and the first buffer and the second buffer are used alternately as the current write buffer and the current read buffer; The total amount of data written in the current write buffer; When the amount of data written in the current write buffer reaches the preset block size: The current write buffer is switched to the current read buffer for the data reading device to read; and Switch the previous read buffer to the new current write buffer to continue writing the new sampled dataset.

2. The data processing method according to claim 1, characterized in that, Each buffer is configured with a status field, a timestamp field, and an interval counter field. The status field is used to indicate whether the buffer is in a readable or writable state. The timestamp field is used to record the time when the buffer last switched from a writable state to a readable state. The interval counter field is used to record the cumulative number of times the buffer switches from a writable state to a readable state.

3. The data processing method according to claim 2, characterized in that, Each buffer is configured with a full flag. Switching the current write buffer to the current read buffer includes: Set the full flag of the current write buffer. In response to the buffer full flag being set, update the values ​​of the timestamp field and the interval counter field of the current write buffer; and Switch the status field of the current write buffer from the writable state to the readable state, so as to switch the current write buffer to the current read buffer.

4. The data processing method according to claim 3, characterized in that, Each buffer is also configured with a read-allow flag, and the data processing method further includes: After the current write buffer is switched to the current read buffer, the read enable flag of the current read buffer is set to notify the data reading device that the sampled dataset in the current read buffer can be read.

5. The data processing method according to claim 4, characterized in that, When the sampled dataset in the current read buffer is read by the data reading device, the data reading device performs a consistency read check. In the consistency read check, the data reading device reads and compares the values ​​of the timestamp field and the interval counter field before and after reading all sampled datasets in the current read buffer to determine whether all sampled datasets have been read consistently.

6. The data processing method according to claim 5, characterized in that, The data processing method further includes: In response to the consistent reading of the sampled dataset in the current read buffer by the data reading device, it is determined whether the buffer full flag of the current write buffer is set; In response to the current write buffer being full flag being set, the status field of the current read buffer is switched to a writable state, making the current read buffer the switched current write buffer; Reset the read-allow flag of the current write buffer after the switch and the full flag of the current write buffer before the switch.

7. The data processing method according to claim 2, characterized in that, Each buffer is configured with a full flag, and the switching from the previous read buffer to the new current write buffer includes: After the sampled dataset in the previous read buffer is successfully read by the data reading device, check whether the buffer full flag of the current write buffer before the switch is set; In response to the buffer full flag being set, the status field of the previously read buffer is switched from readable to writable.

8. The data processing method according to claim 3, characterized in that, The process of updating the timestamp field and the interval counter field of the current write buffer includes: Update the timestamp field of the current write buffer to the current system time, and Increment the value of the interval counter field of the current write buffer by one.

9. A data processing apparatus, characterized in that, include: The synchronous communication module is used to establish isochronous synchronous communication with the remote acquisition device via a bus; The configuration module acquires the bus cycle and oversampling rate, which are determined based on the frequency of the signals acquired by the sensor. The data receiving module is configured to receive a sampled dataset from the remote acquisition device at the end of each bus cycle. The sampled dataset is generated by the remote acquisition device based on the oversampling rate, dividing the bus cycle into n sub-cycles and performing one sampling on the signal acquired by the sensor in each sub-cycle, where n is an integer greater than 1. The system consists of a first buffer and a second buffer, which alternately serve as the current write buffer and the current read buffer. The write control module is used to write the sampled dataset into the current write buffer in the double buffer, and to accumulate the amount of data written into the current write buffer; The switching control module is used to perform the following operations when the amount of data written in the current write buffer reaches a preset block size: The current write buffer is switched to the current read buffer for the data reading device to read; and Switch the previous read buffer to the new current write buffer to continue writing the new sampled dataset.

10. A data acquisition system, characterized in that, The data acquisition system include: The data processing apparatus according to claim 9, and A data reading device for reading the sampled dataset from the double buffer of the data processing device.

11. The data acquisition system according to claim 10, characterized in that, The data acquisition system also includes: Sensors that acquire analog signals from the load in real time; A remote acquisition device is connected to the sensor. The remote acquisition device is used to: divide the bus cycle into n sub-cycles based on the oversampling rate, and perform sampling once on the analog signal acquired by the sensor in each sub-cycle to generate a sampling dataset, and send the generated sampling dataset to the data processing device at the end of each bus cycle, where n is an integer greater than 1.

12. The data acquisition system according to claim 11, characterized in that, The remote acquisition device includes an analog input module, which is used to sample the analog signal acquired by the sensor once in each sub-cycle to generate the sampled dataset.

13. A computer-readable storage medium, characterized in that, It stores a program that, when executed by a processor, causes the processor to perform the data processing method according to any one of claims 1 to 8.

Images