A method for extracting and counting the defective connected regions of a configurable FPGA

Abstract

This invention provides a method for extracting and statistically analyzing defective connected regions using a configurable FPGA, relating to the field of image processing technology. The invention acquires a multi-channel linear array image stream of high-speed roll material, encoder pulse data, camera calibration data, and defect type configuration data; performs run-length encoding on multi-channel defect candidate masks to form abnormal line segments in the continuous input image stream; calculates the cross-line label retention index based on the lateral overlap, inter-line spacing, response channel consistency, and center displacement between the abnormal line segments and historical unclosed label line segments; calculates the pseudo-anomaly suppression index during connected region growth to remove pseudo-anomaly connected regions from the real defect regions; finally, it outputs the defect's physical location, physical area, physical length, physical width, number of response channels, statistical confidence coefficient, and re-inspection priority to improve the real-time differentiation capability of discontinuous defects, cross-line defects, and single-modal pseudo-anomaly regions in high-speed linear array image streams.

Description

Technical Field

[0001] This invention relates to the field of image processing technology, specifically to a method for extracting and statistically analyzing defective connected regions using a configurable FPGA. Background Technology

[0002] In high-speed roll-to-roll production line visual inspection, a line scan camera acquires images line by line along the roll's running direction, and multiple line scans are continuously stitched together to form a long image. This method is suitable for online inspection of continuous materials such as lithium-ion battery ceramic-coated separators, films, paper, metal foils, coating materials, and composite films. Due to the high speed of roll-to-roll operation, large image data volume, and significant differences in defect morphology, defects such as black spots, pinholes, scratches, missed coatings, wrinkles, horizontal lines, vertical lines, particle agglomerates, burrs, gaps, and edge cracks exhibit inconsistent responses in different optical channels.

[0003] Existing image processing methods mostly perform thresholding, edge extraction, connected component labeling, and area calculation on complete image blocks within CPUs, GPUs, or backend industrial control computers. While this approach is feasible for static or low-speed images, it suffers from the following problems in high-speed linear array continuous image streams: First, linear array images are long images that are continuously input line by line, making it impossible to cache the complete image for an extended period on the FPGA. Ordinary connected component algorithms, which process complete two-dimensional images, are ill-suited to the real-time connected component extraction requirements of infinitely long roll image streams.

[0004] Second, defects such as scratches, edge cracks, longitudinal lines, and wrinkles often appear as elongated, discontinuous, and cross-line abnormal segments. Affected by coating texture, lighting variations, and acquisition noise, the same physical defect may exhibit brief breaks, slight lateral shifts, and localized missing areas between adjacent line scans. If directly labeled according to the connectivity of adjacent pixels, the same defect is easily split into multiple small connected regions, causing distortion in the statistical area, length, and quantity.

[0005] Third, surface reflections, shadows, background texture fluctuations, and edge jitter on the roll material can create bright or dark gray abnormal areas in a single channel. If the FPGA generates candidate masks based solely on single-channel thresholds and performs connected region growth, single-modal pseudo-abnormal areas will be mistakenly counted as real defects, increasing the burden on subsequent AI recognition and manual re-inspection.

[0006] Fourth, different defect types exhibit varying dependencies on bright-field, dark-field, transmission, polarization, and near-infrared channels. Pinholes and punctures rely more on transmission response, scratches and cracks on dark-field edge response, missed coatings and uneven thickness on near-infrared material response, and oil stains and reflective artifacts on polarization differences. Existing FPGA connected component processing often employs fixed thresholds and fixed masking rules, making it difficult to dynamically configure response channels, channel weights, and statistical fields based on defect type. Summary of the Invention

[0007] The purpose of this invention is to provide a method for extracting and statistically analyzing defective connected regions in a configurable FPGA, in order to solve the problems mentioned in the background art.

[0008] To achieve the above objectives, the present invention provides the following technical solution: A method for extracting and statistically analyzing defective connected regions in a configurable FPGA, comprising the following steps: Step 1: Acquire multi-channel linear array image stream, encoder pulse data, camera calibration data, defect type configuration data, and FPGA hardware resource configuration data of high-speed running roll material, and map the multi-channel linear array image stream to the physical coordinates of the roll material according to the line scan number; Step 2: Configure data based on defect type. Configure the response channel, channel threshold, logic combination method and output statistics field corresponding to each defect type in the FPGA, and generate a multi-channel defect candidate mask based on the configuration results. Step 3: Perform run-length encoding on the multi-channel defect candidate mask, extract the abnormal row segments in each line scan, and record the row number, start column, end column, center column, response channel label and mask confidence value of the abnormal row segment; Step 4: Compare the abnormal row segments in the current line scan with the historical unclosed label row segments, calculate the cross-row label retention index based on horizontal overlap, inter-row spacing, response channel consistency and center displacement, and perform label inheritance, delayed merging or new label creation according to the cross-row label retention index; Step 5: During the growth of connected regions, calculate the pseudo-anomaly suppression index based on the proportion of single-modal response, the coverage value of mutual verification channels, the bright field isolated highlight value, and the texture perturbation support value, and stop merging pseudo-anomaly rows into real defect labels according to the pseudo-anomaly suppression index. Step 6: When the connected region meets the closure condition, the FPGA performs statistics on the connected region and outputs the physical location, physical area, physical length, physical width, number of response channels, statistical confidence coefficient, and re-inspection priority of the defect.

[0009] Preferably, in step one, the multi-channel linear array image stream includes at least two of the following: bright-field linear array image stream, dark-field linear array image stream, transmission linear array image stream, polarization linear array image stream, and near-infrared linear array image stream; the encoder pulse data includes the encoder pulse sequence number, the roll running distance corresponding to a single encoder pulse, and the line scan trigger timestamp; the camera calibration data includes the column direction single pixel width calibration coefficient, channel mounting offset, and grayscale normalization parameters for each image channel; the defect type configuration data includes surface defect configuration, penetration defect configuration, structural defect configuration, coating defect configuration, and edge defect configuration; and the FPGA hardware resource configuration data includes the tag table capacity, delay merging buffer capacity, maximum number of hold rows, minimum output area, and resource occupancy threshold.

[0010] Preferably, in step two, the FPGA generates a multi-channel defect candidate mask based on defect type configuration data, including: When the defect type is configured as surface defect, enable the bright field anomaly channel, dark field edge channel, and polarization response channel; When the defect type is configured as a translucent defect, enable the transmission anomaly channel and the bright field edge auxiliary channel; When the defect type is configured as structural defect, enable the dark edge channel, bright texture channel, and polarization scattering channel. When the defect type is configured as coating defect, enable the near-infrared material response channel, polarization response channel, and bright field grayscale variation channel. When the defect type is configured as edge defect, enable the edge baseline channel, dark field crack channel, and bright field missing channel.

[0011] Preferably, in step two, the FPGA performs threshold judgment on the current pixel or current pixel block of each image channel, generates the binary response result of the corresponding channel, and obtains the fusion candidate mask according to the logical combination method in the defect type configuration data; the logical combination method includes the main response channel satisfying the condition, the main response channel and the auxiliary response channel jointly satisfying the condition, the weighted satisfaction of multiple response channels, and the edge region dedicated response condition.

[0012] Preferably, in step three, the abnormal row segment is generated by run-length encoding; the FPGA scans the multi-channel defect candidate mask according to the line scan line input order, and when the number of consecutive candidate pixels reaches the minimum row segment width, an abnormal row segment is formed; the abnormal row segment record fields include row segment number, line scan line number, start column, end column, center column, row segment width, response channel set, main response channel, mask confidence value and candidate defect type.

[0013] Preferably, in step four, the cross-line label retention index is calculated based on the lateral overlap adaptation value, inter-line retention adaptation value, response channel consistency value, and center displacement adaptation value between the current abnormal line segment and the historical unclosed label line segment; when the cross-line label retention index reaches the first retention threshold, the current abnormal line segment inherits the historical unclosed label; when the cross-line label retention index is less than the first retention threshold and reaches the second retention threshold, the current abnormal line segment enters the delayed merging cache; when the cross-line label retention index is less than the second retention threshold, the FPGA creates a new label for the current abnormal line segment.

[0014] Preferably, the delayed merge buffer stores the tag number, row number, start column, end column, response channel set, candidate defect type, and number of buffered rows for the abnormal row segment to be merged; when an abnormal row segment that meets the tag continuation condition with the abnormal row segment to be merged in the subsequent line scan appears, the FPGA merges the abnormal row segment in the delayed merge buffer with the subsequent abnormal row segment into the same defect tag; when the number of buffered rows for the abnormal row segment to be merged exceeds the maximum number of buffered rows, the FPGA closes the abnormal row segment to be merged as an independent candidate region and outputs it.

[0015] Preferably, in step five, the pseudo-anomaly suppression index is calculated based on the single-mode response ratio, mutual verification channel coverage value, bright-field isolated highlight value, and texture perturbation support value. When the pseudo-anomaly suppression index reaches the first suppression threshold, the FPGA stops merging the current abnormal row segment into the real defect label and marks the corresponding connected region as a single-mode pseudo-anomaly region. When the pseudo-anomaly suppression index is less than the first suppression threshold and reaches the second suppression threshold, the FPGA marks the corresponding connected region as a connected region to be re-inspected. When the pseudo-anomaly suppression index is less than the second suppression threshold, the FPGA allows the current abnormal row segment to continue participating in the growth of the real defect connected region.

[0016] Preferably, in step six, the FPGA converts the number of pixel rows, number of pixel columns, circumscribed rectangle, center point, and area of ​​the connected region into the physical length, physical width, physical area, width direction position, and running direction position of the roll material based on the encoder pulse data and camera calibration data.

[0017] Preferably, in step six, the statistical confidence coefficient is calculated based on the label stability value, the reverse value of pseudo-anomaly suppression, the mask confidence mean, and the physical size stability value; when the statistical confidence coefficient reaches the first statistical confidence threshold, the statistical result of the true defect connected region is output; when the statistical confidence coefficient is less than the first statistical confidence threshold but reaches the second statistical confidence threshold, the statistical result of the connected region to be re-inspected is output; when the statistical confidence coefficient is less than the second statistical confidence threshold, the pseudo-anomaly suppression result is output.

[0018] Compared with the prior art, the beneficial effects of the present invention are: This invention configures response channels, channel thresholds, and logic combination methods for surface, penetrating, structural, coating, and edge defects in the FPGA by configuring defect type configuration data. This makes the generation of candidate masks on the FPGA no longer dependent on a fixed single-channel threshold, thereby improving the adaptability of candidate region extraction for different defect types in high-speed linear array image streams.

[0019] This invention calculates the cross-line label retention index under the condition of line-by-line image input by using abnormal line segment travel encoding, historical unclosed label table and delayed merging cache. This enables cross-line defects such as discontinuous scratches, edge cracks, vertical lines and wrinkles to maintain the same label under the conditions of brief breakage, slight lateral offset and local missingness, reducing the situation where the same physical defect is split into multiple connected regions.

[0020] This invention calculates the pseudo-anomaly suppression index by using the proportion of single-modal response, the coverage value of mutual verification channels, the value of isolated bright field highlights, and the support value of texture perturbation. It suppresses pseudo-anomaly regions formed by bright field reflection, shadows, and background texture perturbation during the connected region growth stage, so that single-modal pseudo-anomaly regions do not directly enter the real defect statistics results, reducing the burden of subsequent AI recognition and manual re-inspection.

[0021] This invention uses encoder pulse data and camera calibration data to convert the pixel area, pixel length, and pixel width obtained from FPGA statistics into the physical area, physical length, physical width, and physical coordinates of the roll material. It also combines statistical confidence coefficients to output the true defect connected regions, the connected regions to be re-inspected, and the results of pseudo-anomaly suppression, so that the statistical results of connected regions can directly serve the quality control of high-speed roll materials. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the overall method flow of the present invention; Figure 2 This is a schematic diagram illustrating the generation of a configurable multi-channel defect candidate mask according to the present invention; Figure 3 This is a schematic diagram illustrating the abnormal line segment travel encoding and cross-line label retention of the present invention; Figure 4 This is a schematic diagram of the delayed merging cache processing of the present invention; Figure 5 This is a schematic diagram of the single-modal pseudo-anomaly suppression type connected region growth of the present invention; Figure 6 This is a schematic diagram of the output of the connected region statistical results of the present invention. Detailed Implementation

[0023] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0024] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0025] The purpose of this invention is to provide a configurable FPGA-based method for defect connectivity region extraction and statistical analysis. This method controls multi-channel candidate mask generation through defect type configuration data; reduces FPGA cache pressure through run-length encoding; handles discontinuous, elongated defects through a cross-line label retention index and a delay merging mechanism; restricts single-modal pseudo-abnormal regions from entering the real defect connectivity region through a pseudo-abnormality suppression index; and outputs connectivity region statistical results for roll material quality control through physical size conversion and statistical reliability coefficients. The FPGA's role is to perform threshold judgment, mask generation, abnormal line segment extraction, label inheritance, delay merging, and statistical output in real time as the image stream enters the chip, without waiting for the entire image to be formed. An FPGA is a field-programmable gate array chip whose internal logic resources, storage resources, and input / output interfaces can be reconfigured according to the detection task. In high-speed line scan camera detection scenarios, the FPGA can directly receive the line scan image stream and encoder pulse signals, and perform threshold comparison, candidate mask generation, run-length encoding, label table updating, and statistical result output in a hardware pipeline manner. Unlike general-purpose CPUs that process complete images frame by frame, FPGAs can simultaneously extract candidate regions for defects during the line-by-line input of an image.

[0026] This invention proposes a method for extracting and statistically analyzing defective connected regions in a configurable FPGA, the specific steps of which include: Step 1: Acquire multi-channel linear array image stream, encoder pulse data, camera calibration data, defect type configuration data, and FPGA hardware resource configuration data of high-speed running roll material, and map the multi-channel linear array image stream to the physical coordinates of the roll material according to the line scan number; Step 2: Configure data based on defect type. Configure the response channel, channel threshold, logic combination method and output statistics field corresponding to each defect type in the FPGA, and generate a multi-channel defect candidate mask based on the configuration results. Step 3: Perform run-length encoding on the multi-channel defect candidate mask, extract the abnormal row segments in each line scan, and record the row number, start column, end column, center column, response channel label and mask confidence value of the abnormal row segment; Step 4: Compare the abnormal row segments in the current line scan with the historical unclosed label row segments, calculate the cross-row label retention index based on horizontal overlap, inter-row spacing, response channel consistency and center displacement, and perform label inheritance, delayed merging or new label creation according to the cross-row label retention index; Step 5: During the growth of connected regions, calculate the pseudo-anomaly suppression index based on the proportion of single-modal response, the coverage value of mutual verification channels, the bright field isolated highlight value, and the texture perturbation support value, and stop merging pseudo-anomaly rows into real defect labels according to the pseudo-anomaly suppression index. Step 6: When the connected region meets the closure condition, the FPGA performs statistics on the connected region and outputs the physical location, physical area, physical length, physical width, number of response channels, statistical confidence coefficient, and re-inspection priority of the defect.

[0027] To make the technical solution, processing flow, and implementation effect of this invention clearer, the invention will be described below in the context of a high-speed roll material inspection scenario. This embodiment uses a high-speed inspection production line for lithium-ion battery ceramic-coated separator roll materials as an application scenario. The effective width of the roll material is 1200 mm, the operating speed is 120 meters per minute, and the inspection targets include black spots, pinholes, fine scratches, missed coatings, oil stains, wrinkles, edge cracks, and bright-field reflective artifacts.

[0028] The core processing logic of this invention does not perform ordinary connected component labeling on complete image blocks. Instead, during the line-by-line input of high-speed linear array images, the FPGA generates multi-channel candidate masks based on the defect type configuration data, and then performs run-length encoding, cross-line label preservation, delay merging, pseudo-anomaly suppression, and physical size statistics on the candidate masks. Figure 1 In the above, the linear scan camera group, encoder, FPGA processing board, configuration register, tag table, delay merging buffer and statistical output interface correspond to steps one to six, which are used to express the overall process of high-speed linear scan image stream from acquisition input to connected region statistical output.

[0029] Example 1 This embodiment corresponds to step one, which involves acquiring multi-channel linear array image streams, encoder pulse data, camera calibration data, defect type configuration data, and FPGA hardware resource configuration data of the high-speed running roll material, and mapping the multi-channel linear array image streams to the physical coordinates of the roll material according to the line scan row number.

[0030] In this embodiment, the multi-channel linear array image stream includes a bright-field linear array image stream, a dark-field linear array image stream, a transmission linear array image stream, a polarization linear array image stream, and a near-infrared linear array image stream. Each image channel is acquired by the same encoder pulse trigger, enabling the same line scan in different optical channels to correspond to the same physical position in the roll material's running direction.

[0031] No. The physical position of the roll material running direction corresponding to each line sweep is calculated according to the following formula:

[0032] In the formula, Indicates the first The physical position of the roll material running direction corresponding to each line scan is in millimeters; This indicates the line scan row number, which is obtained from the FPGA row counter. This indicates the roll travel distance corresponding to a single encoder pulse, in millimeters per pulse, obtained through encoder calibration data.

[0033] No. The physical position of the column pixel in the roll width direction is calculated according to the following formula:

[0034] In the formula, Indicates the first The first image channel The physical position of the roll width direction corresponding to the column pixel, in millimeters; Indicates the first The physical position of the roll width direction corresponding to the calibration start point of each image channel is obtained through the camera calibration plate; The image column number is obtained from the FPGA column counter; Indicates the first The calibration start column number of each image channel; Indicates the first The single-pixel width calibration coefficient for each image channel, in millimeters per pixel, is obtained through camera calibration data. In this embodiment, the roll running distance corresponding to the encoder pulse is preferably 0.05 mm per pulse, and the single-pixel width calibration coefficients for the bright field, dark field, transmission, polarization, and near-infrared channels are preferably 0.040 mm per pixel, 0.040 mm per pixel, 0.042 mm per pixel, 0.040 mm per pixel, and 0.045 mm per pixel, respectively.

[0035] The FPGA hardware resource configuration data includes tag table capacity, delay merging buffer capacity, maximum number of rows to hold, minimum output area, and resource occupancy thresholds. Preferably, the tag table capacity is 4096 tags, the delay merging buffer capacity is 512 abnormal rows, the maximum number of rows to hold is 3, the minimum output area is 6 pixels, the first resource occupancy threshold is 80%, and the second resource occupancy threshold is 92%. An example of this implementation is shown in Table 1 below.

[0036] Table 1: Sample Table of High-Speed ​​Linear Array Image Stream and FPGA Configuration

[0037] The technical principle of this embodiment is that each row of the linear array image is associated with an encoder pulse, and the image column number is associated with the physical coordinates along the width of the roll. Therefore, when processing the image stream, the FPGA not only obtains the pixel positions but also the actual physical position of the roll, providing a basis for subsequent physical dimension statistics of connected regions.

[0038] Example 2 This embodiment corresponds to step two, which involves configuring data based on defect type, configuring the response channel, channel threshold, logic combination method, and output statistics field corresponding to each defect type in the FPGA, and generating a multi-channel defect candidate mask based on the configuration results.

[0039] In this embodiment, a defect type configuration register group is set up inside the FPGA. Each set of configuration registers corresponds to a candidate defect type, and the configuration content includes the main response channel, auxiliary response channel, channel threshold, channel weight, logic combination method, and output statistics fields.

[0040] For the The candidate pixel or candidate pixel block, the th candidate pixel or candidate pixel block, the th The binary response result of each response channel is calculated according to the following formula:

[0041] In the formula, Indicates the first The candidate pixel or candidate pixel block in the first Binary response results under each response channel; Indicates the first The candidate pixel or candidate pixel block in the first The normalized outlier values ​​under each response channel are obtained by the FPGA in real time from the grayscale, edge or material response of the current channel; Indicates the first The configuration threshold corresponding to each response channel is read from the defect type configuration register.

[0042] No. The multi-channel mask confidence value for a candidate pixel or candidate pixel block is calculated using the following formula:

[0043] In the formula, Indicates the first The multi-channel mask confidence value for each candidate pixel or candidate pixel block ranges from 0 to 1; This indicates the number of response channels involved in determining the current defect type. Indicates the first The configuration weight of each response channel is read from the defect type configuration register; Indicates the first The candidate pixel or candidate pixel block in the first Binary response results under each response channel.

[0044] When the multi-channel mask confidence value reaches the candidate mask threshold, the FPGA writes the corresponding pixel or pixel block into the defect candidate mask:

[0045] In the formula, Indicates the first The fusion candidate mask result of candidate pixels or candidate pixel blocks; This represents the candidate mask threshold, with a preferred value of 0.60, which is read from the FPGA configuration register.

[0046] The specific strategies are as follows: When surface defect configuration is enabled, the FPGA uses the bright-field anomaly channel as the primary response channel and the dark-field edge channel and polarization response channel as secondary response channels; when transmission defect configuration is enabled, the FPGA uses the transmission anomaly channel as the primary response channel and the bright-field edge channel as the secondary response channel; when structural defect configuration is enabled, the FPGA uses the dark-field edge channel and bright-field texture channel as the primary response channels and the polarization scattering channel as the secondary response channel; when coating defect configuration is enabled, the FPGA uses the near-infrared material response channel as the primary response channel and the polarization response channel and bright-field grayscale variation channel as secondary response channels; when edge defect configuration is enabled, the FPGA uses the edge baseline channel and dark-field crack channel as the primary response channels and the bright-field missing channel as the secondary response channel. Example of embodiment two is shown in Table 2 below.

[0047] Table 2: Configurable Defect Types and Multi-channel Mask Generation Sample Table

[0048] As shown in Table 2, different defect types are not generated using the same fixed threshold. Instead, different response channels and logic combinations are enabled based on the defect type configuration data. This design enables the FPGA to have configurable defect candidate region extraction capabilities on the hardware side.

[0049] Figure 2 In the process, five input channels—bright field, dark field, transmission, polarization, and near-infrared—enter the channel threshold judgment unit, which is connected to the defect type configuration register. The configuration register outputs the corresponding channel weights and logical combination methods, ultimately generating a fusion candidate mask. Figure 2 This is used to illustrate the multi-channel candidate mask generation process in this embodiment.

[0050] Example 3 This embodiment corresponds to steps three and four. Step three is to perform run encoding on the multi-channel defect candidate mask and extract abnormal line segments in each line scan. Step four is to calculate the cross-line label retention index and perform label inheritance, delayed merging, or new label creation based on the cross-line label retention index.

[0051] In this embodiment, the FPGA scans the fusion candidate masks in each line scan. When the number of consecutive candidate pixels in the same line scan reaches the minimum line segment width, an abnormal line segment is formed. The abnormal line segment is denoted as... , indicating the first The first line scan in the line scan An abnormal line segment.

[0052] Abnormal line segment The fields include the line scan number. , starting column End column , center column Line width Response channel set and mask confidence value .

[0053] The line segment width is calculated using the following formula:

[0054] In the formula, Indicates the first The first line is being scanned. The line segment width of each abnormal line segment, in pixels; The column indicating the end of the abnormal row segment is obtained from the FPGA column counter; The starting column of the abnormal row segment is obtained from the FPGA column counter.

[0055] The horizontal overlap fit value between the current abnormal line segment and the historical unclosed label line segment is calculated according to the following formula:

[0056] In the formula, Indicates the current abnormal line segment Unclosed historical tag line The horizontal overlap adaptation value between them; The starting column of the historical unclosed label row segment is read from the label table; The last column of the unclosed historical label row segment is read from the label table; Indicates the width of the historical unclosed tag line segment, read from the tag table; This represents an extremely small positive number to prevent the denominator from being zero; the preferred value is 0.001.

[0057] The line-keeping fit value is calculated using the following formula:

[0058] In the formula, This indicates that the interline values ​​between the current abnormal line segment and the historical unclosed labeled line segment should be maintained. This indicates the line interval between the current abnormal line segment scan line number and the last occurrence line number of the historical unclosed tag, which is read by the FPGA line counter and tag table; This indicates the maximum number of rows to retain, with a preferred value of 3 rows. When Greater than hour, The limit is 0.

[0059] The response channel consistency value is calculated using the following formula:

[0060] In the formula, This indicates the consistency value of the response channel between the current abnormal line segment and the historical unclosed label line segment; This represents the set of response channels for the current abnormal row segment, output by the multi-channel mask generation unit; This represents the set of response channels corresponding to historical unclosed tags, which is read from the tag table.

[0061] The center displacement fit value is calculated according to the following formula:

[0062] In the formula, This indicates the center displacement adaptation value between the current abnormal row segment and the historical unclosed label row segment; Indicates the center column of the current abnormal row segment; Indicates the center column of an unclosed historical label row segment; This indicates the allowable center displacement threshold, with a preferred value of 12 pixels. When Greater than hour, The limit is 0.

[0063] Cross-line label retention index is calculated using the following formula:

[0064] In the formula, Indicates the current abnormal line segment Unclosed tags of history Maintain an index between cross-line labels; This indicates the weight of the horizontal overlap adaptation value, with a preferred value of 0.35; This indicates the weight of maintaining the fit between rows, with a preferred value of 0.20; This represents the consistency value weight of the response channel, with a preferred value of 0.25. This represents the weight of the center displacement adaptation value, with a preferred value of 0.20.

[0065] The selection criteria for the above weights are as follows: lateral overlap directly reflects the spatial connectivity of adjacent rows in the width direction of the roll material, so it has the highest weight; response channel consistency is used to distinguish between real continuous defects and abnormal areas with different causes, so it has the second highest weight; inter-row retention and center displacement are used to handle discontinuity and offset situations, serving as auxiliary conditions for continuation.

[0066] This embodiment sets a first holding threshold. The second holding threshold is 0.78. The value is 0.58. The label preservation and delayed merging strategy is as follows: when When the FPGA determines that the current abnormal row segment and the historical unclosed label belong to the same defect area, it directly merges the current abnormal row segment into the historical label and updates the boundary range, area count, response channel set and last occurrence row number of the label. when When the FPGA determines that the current abnormal line segment may be continuation with a historical tag, it writes the current abnormal line segment into the delayed merging buffer and then... Continue searching for abnormal line segments within the line that meet the continuation conditions; when When the FPGA determines that the current abnormal row segment and the historical unclosed label do not belong to the same defect area, a new label is created for the current abnormal row segment.

[0067] Example of Example 3 is shown in Table 3 below.

[0068] Table 3: Sample Table of Cross-line Label Preservation and Delayed Merging

[0069] Taking the R3 fine scratch discontinuous segment as an example, its horizontal overlap adaptation value is 0.48, interline consistency adaptation value is 0.67, response channel consistency value is 0.92, and center displacement adaptation value is 0.78. Substituting these values ​​into the formula for the cross-line label retention index, we get: ; because Therefore, the FPGA does not immediately classify the abnormal row segment as a new defect, but instead writes it into the delayed merging buffer. If another abnormal row segment appears within the next 3 rows that meets the continuation conditions of the previous row segment in terms of direction, response channel, and center position, it is merged with the previous fine scratch label into the same connected region.

[0070] Figure 3In the table, the short black lines in each row represent abnormal rows, the label table on the left stores unclosed labels, and the arrows on the right indicate the continuation judgment between the current row and historical labels. Figure 4 In this process, a delayed merge cache stores short, thin, flawed line segments that are briefly broken, and merges them once subsequent line segments appear. Figure 3 and Figure 4 This is used to describe the process of maintaining and delaying the merging of cross-line labels in this embodiment.

[0071] Example 4 This embodiment corresponds to step five, which involves calculating the pseudo-anomaly suppression index based on the single-modal response ratio, mutual verification channel coverage value, bright field isolated highlight value, and texture perturbation support value during the connected region growth process, and stopping the incorporation of pseudo-anomaly rows into real defect labels based on the pseudo-anomaly suppression index.

[0072] In high-speed roll-to-roll production lines, bright-field reflections, shadows, and background texture fluctuations often create localized bright or low-gray anomalies in a single channel. If this anomalous area lacks corroborating responses such as dark-field edges, transmission, polarization, near-infrared, or texture perturbations, it should not be directly grown as a genuine defect area. Therefore, this embodiment introduces a pseudo-anomaly suppression index during the FPGA connected region growth process.

[0073] The proportion of single-mode response is calculated according to the following formula:

[0074] In the formula, Indicates the first The proportion of single-mode responses in each connected region; Indicates the first The number of abnormal pixels in a single channel with the largest response area in each connected region is obtained by the FPGA channel counter. Indicates the first The total number of abnormal pixels in all response channels of each connected region is obtained by the FPGA channel counter. This represents an extremely small positive number to prevent the denominator from being zero; the preferred value is 0.001. The closer it is to 1, the more concentrated the connected region is in a single image channel.

[0075] The mutual verification channel coverage value is calculated according to the following formula:

[0076] In the formula, Indicates the first The mutual verification channel coverage value of each connected region; Indicates the first The number of channels that actually meet the response conditions in each connected region is obtained by statistical analysis of the FPGA response channel set; This indicates the number of mutual verification channels required by the current defect type configuration, which is read from the defect type configuration register. The higher the value, the more comprehensive the multi-channel mutual verification response of the connected region.

[0077] The isolated highlight value in bright field is calculated using the following formula:

[0078] In the formula, Indicates the first Bright-field isolated highlight value of each connected region; Indicates the first Does each connected region meet the bright field high brightness response condition? Indicates the first Does each connected region satisfy the dark field edge response condition? Indicates the first Does each connected region satisfy the transmission response condition? Indicates the first Does each connected region satisfy the polarization response condition? Indicates the first Does each connected region satisfy the near-infrared response condition? Furthermore, the first... The response conditions for each channel in each connected region are generated by the FPGA channel threshold judgment unit. Within the pixel set corresponding to each connected region, local response data of bright-field linear array image, dark-field linear array image, transmission linear array image, polarization linear array image, and near-infrared linear array image are read respectively, and then... The neighborhood background region formed by the expansion of each connected region is used as the background reference, and bright field high brightness response markers, dark field edge response markers, transmission response markers, polarization response markers and near-infrared response markers are obtained respectively.

[0079] Based on the The bright field grayscale value of each pixel within each connected region, the average bright field grayscale value of the neighboring background region, and the bright field highlight grayscale difference threshold are statistically analyzed by FPGA. The number of pixels satisfying the bright field highlight condition within each connected region is used to obtain the bright field highlight coverage ratio. : In the formula, Indicates the first The percentage of bright field highlight coverage in each connected region; Indicates the first The number of pixels that meet the bright field high brightness condition within a connected region is obtained by the FPGA bright field channel threshold judgment unit. Indicates the first The total number of pixels within each connected region is obtained by counting the area counter of the connected region on the FPGA; This represents an extremely small positive number to prevent the denominator from being zero; the preferred value is 0.001.

[0080] Based on the The FPGA obtains the bright field intensity value by taking the average bright field gray value within each connected region and the average bright field gray value of the neighboring background region. : In the formula, Indicates the first Bright field intensity values ​​of each connected region; Indicates the first The average bright-field grayscale value within each connected region is obtained by the FPGA bright-field grayscale accumulator. Indicates the first The average bright field grayscale value of each connected region corresponding to the neighboring background region is obtained by the FPGA background grayscale statistics unit. This represents the maximum grayscale value of the current brightfield linear array image; 255 for an 8-bit grayscale image and 4095 for a 12-bit grayscale image. When the brightfield highlight coverage ratio reaches the preset brightfield coverage threshold, and the brightfield highlight intensity value reaches the preset brightfield intensity threshold, the FPGA will... The bright-field highlight response flag for each connected region is set to 1; if the above conditions are not met simultaneously, it is set to 0, as shown in the following expression:

[0081] In the formula, Indicates the first Whether a connected region satisfies the bright field highlight response condition, with a value of 0 or 1; This represents the bright-field coverage threshold, read from the defect type configuration register, with a preferred value of 0.30. This represents the bright field intensity threshold, which is read from the defect type configuration register, with a preferred value of 0.18.

[0082] The acquisition of dark field edge response markers is based on the first Dark field edge gradient values ​​and dark field edge gradient thresholds for each pixel within a connected region, FPGA statistics for the th The number of pixels satisfying the dark field edge condition within each connected region is used to obtain the dark field edge coverage ratio. : In the formula, Indicates the first The percentage of dark field edge coverage in each connected region; Indicates the first The number of pixels that meet the dark field edge conditions within a connected region is obtained by statistics from the FPGA dark field edge channel.

[0083] Based on the The FPGA obtains the dark field edge intensity value by taking the mean and maximum calibrated values ​​of the dark field edge gradients within each connected region. In the formula, Indicates the first Dark field edge intensity values ​​of each connected region; Indicates the first The average gradient of the dark field edge in each connected region is obtained by the FPGA gradient calculation unit. This represents the maximum calibration value of the gradient at the dark field edge, obtained from camera calibration data or historical sample calibration data. When the dark field edge coverage reaches the dark field coverage threshold, and the dark field edge intensity value reaches the dark field edge intensity threshold, the FPGA will... The dark field edge response flag for each connected region is set to 1; if the above conditions are not met simultaneously, it is set to 0, as shown in the following expression:

[0084] In the formula, Indicates the first Whether a connected region satisfies the dark field edge response condition, with a value of 0 or 1; This represents the dark field coverage threshold, with a preferred value of 0.20. This represents the threshold intensity at the edge of the dark field, with a preferred value of 0.16.

[0085] The acquisition of transmission response markers is based on the first The transmitted grayscale value of each pixel within a connected region, the average transmitted grayscale value of the neighboring background region, and the transmitted grayscale difference threshold are statistically analyzed by the FPGA. The number of pixels satisfying the light transmission enhancement condition within each connected region is used to obtain the transmission response coverage ratio. : In the formula, Indicates the first The percentage of transmission response coverage in each connected region; Indicates the first The number of pixels satisfying the light transmission enhancement condition within each connected region is statistically obtained by the FPGA transmission channel threshold judgment unit. Based on the first... The FPGA obtains the transmission response intensity value by taking the average gray value of transmission within a connected region and the average gray value of transmission within the neighboring background region. In the formula, Indicates the first Transmission response intensity values ​​of each connected region; Indicates the first The average gray value of transmission within each connected region; Indicates the first The average grayscale value of the transmission of each connected region corresponds to the average grayscale value of the neighboring background region. When the transmission response coverage ratio reaches the transmission coverage threshold and the transmission response intensity value reaches the transmission intensity threshold, the FPGA will... The transmission response flag for each connected region is set to 1; if the above conditions are not met simultaneously, it is set to 0, as shown in the following expression:

[0086] In the formula, Indicates the first Whether a connected region satisfies the transmission response condition, with a value of 0 or 1; This represents the transmission coverage threshold, with a preferred value of 0.18. This represents the transmission intensity threshold, with a preferred value of 0.15.

[0087] The acquisition of polarization response markers is based on the first The grayscale difference between cross-polarized and parallel-polarized images within each connected region is statistically analyzed by FPGA. The number of pixels satisfying the polarization difference condition within each connected region is used to obtain the polarization response coverage ratio. : In the formula, Indicates the first The polarization response coverage percentage of each connected region; Indicates the first The number of pixels satisfying the polarization difference condition within each connected region is statistically obtained by the FPGA polarization channel threshold judgment unit. Based on the first... The FPGA obtains the polarization response intensity value by calculating the average grayscale difference between cross-polarized and parallel-polarized images within a connected region. In the formula, Indicates the first Polarization response intensity values ​​of each connected region; Indicates the first The average gray value of the cross-polarized image within each connected region; Indicates the first The average grayscale value of parallel polarized images within each connected region. When the polarization response coverage ratio reaches the polarization coverage threshold and the polarization response intensity value reaches the polarization intensity threshold, the FPGA will... The polarization response flag of each connected region is set to 1; if the above conditions are not met simultaneously, it is set to 0, as shown in the following expression:

[0088] In the formula, Indicates the first Whether a connected region satisfies the polarization response condition, with a value of 0 or 1; This represents the polarization coverage threshold, with a preferred value of 0.18. This represents the polarization intensity threshold, with a preferred value of 0.12.

[0089] The acquisition of near-infrared response markers is based on the first Near-infrared grayscale values ​​within each connected region, the average near-infrared grayscale value of the neighboring background region, and the near-infrared material response threshold are statistically analyzed by FPGA. The number of pixels within a connected region that satisfy the near-infrared material response conditions is used to obtain the near-infrared response coverage ratio. : In the formula, Indicates the first Near-infrared response coverage percentage of each connected region; Indicates the first The number of pixels satisfying the near-infrared material response conditions within each connected region is statistically obtained by the FPGA near-infrared channel threshold judgment unit. Based on the first... The FPGA obtains the near-infrared response intensity value by taking the average near-infrared gray value within a connected region and the average near-infrared gray value of the neighboring background region. In the formula, Indicates the first Near-infrared response intensity values ​​of each connected region; Indicates the first The average near-infrared gray value within each connected region; Indicates the first The near-infrared average grayscale value of the neighboring background region corresponds to each connected region. When the near-infrared response coverage ratio reaches the near-infrared coverage threshold and the near-infrared response intensity value reaches the near-infrared intensity threshold, the FPGA will... The near-infrared response flag of each connected region is set to 1; if the above conditions are not met simultaneously, it is set to 0, as shown in the following expression:

[0090] In the formula, Indicates the first Whether a connected region satisfies the near-infrared response condition, with a value of 0 or 1; This represents the near-infrared coverage threshold, with a preferred value of 0.18. The near-infrared intensity threshold is represented, with a preferred value of 0.14. Therefore, the bright-field highlight response marker, dark-field edge response marker, transmission response marker, polarization response marker, and near-infrared response marker are all determined by the coverage ratio and response intensity of the corresponding image channel, rather than directly by the instantaneous grayscale value of a single pixel. This processing method avoids isolated noise points, single-line interference, and local brightness abrupt changes directly altering the pseudo-anomaly suppression judgment results of connected regions.

[0091] Furthermore, texture perturbation support values ​​are used to characterize the first... Whether each connected region has continuous edge support and texture perturbation support. Based on the first... The FPGA will use the long side of the circumscribed rectangle of the connected region as the direction of the first... Each connected region is divided into several texture statistical segments along the main extension direction; based on the number of dark field edge response pixels, the number of bright field texture perturbation pixels, and the total number of pixels in each segment, the edge continuous response value and the texture direction change response value are obtained respectively.

[0092] Based on the The first connected region For each texture statistical segment, the FPGA reads the dark field edge channel threshold judgment result, and counts the number of pixels that meet the dark field edge threshold and the total number of pixels within that texture statistical segment, obtaining the segment's dark field edge response ratio.

[0093] In the formula, Indicates the first In the connected regions, the first The percentage of dark field edge response in each texture statistical segment; Indicates the first In the connected regions, the first The number of pixels that meet the dark field edge threshold within each texture statistical segment is obtained by the FPGA dark field edge channel threshold judgment unit. Indicates the first In the connected regions, the first The total number of pixels within each texture segment is obtained by the FPGA segment pixel counter. This represents an extremely small positive number to prevent the denominator from being zero; the preferred value is 0.001.

[0094] When the proportion of segmented dark field edge response reaches a preset segmented edge proportion threshold, the FPGA marks the texture statistics segment as a valid edge support segment. Based on the number of valid edge support segments and the total number of texture statistics segments, the [number]th segment is obtained. Continuous edge response values ​​of connected regions:

[0095] In the formula, Indicates the first The edge continuous response values ​​of each connected region range from 0 to 1; Indicates the first The number of effective edge support segments in each connected region is statistically satisfied by the FPGA. The number of texture segments is obtained. Indicates the first The total number of texture statistical segments obtained by dividing a connected region along the main extension direction is obtained by the FPGA by segment counting according to the preset segment length and the main extension length of the connected region. This represents the preset threshold for the percentage of segment edges, which is read from the defect type configuration register, with a preferred value of 0.20.

[0096] Based on the The first connected region For each texture statistical segment, the FPGA reads the threshold judgment result of the bright field texture channel; when a preprocessed texture channel is configured, the FPGA reads the threshold judgment result of the preprocessed texture channel. Based on the number of pixels in the enabled texture channel that meet the texture perturbation threshold and the total number of pixels in the texture statistical segment, the segment texture perturbation ratio is obtained:

[0097] In the formula, Indicates the first In the connected regions, the first The percentage of texture perturbation in each texture statistical segment; Indicates the first In the connected regions, the first The number of pixels that meet the texture perturbation threshold within each texture statistical segment is obtained by the FPGA bright field texture channel threshold judgment unit or the preprocessing texture channel statistical unit. Indicates the first In the connected regions, the first The total number of pixels within a texture statistics segment. When the percentage of texture perturbation in a segment reaches a preset threshold for the percentage of texture perturbation in a segment, the FPGA marks that texture statistics segment as a valid texture perturbation segment.

[0098] Based on the number of effective texture perturbation segments and the total number of texture statistical segments, obtain the first... Texture orientation change response value for each connected region:

[0099] In the formula, Indicates the first The texture direction change response value of each connected region ranges from 0 to 1; Indicates the first The number of effective texture perturbation segments in each connected region is statistically satisfied by the FPGA. The number of texture segments is obtained. Indicates the first The total number of texture statistical segments obtained by dividing each connected region along the main extension direction; This indicates the preset threshold for the percentage of segmented texture disturbance, which is read from the defect type configuration register, with a preferred value of 0.20.

[0100] Based on edge continuity response values ​​and texture orientation change response values, obtain texture perturbation support values:

[0101] In the formula, Indicates the first Texture perturbation support values ​​for each connected region, ranging from 0 to 1; Indicates the first Continuous response values ​​at the edges of connected regions; Indicates the first The texture direction change response value of each connected region.

[0102] The pseudo-anomaly suppression index is calculated using the following formula:

[0103] In the formula, Indicates the first The pseudo-anomaly suppression index of each connected region ranges from 0 to 1. The larger the value, the more the connected region tends to be a single-modal pseudo-anomaly. This indicates the weight of the single-mode response, with a preferred value of 0.30. This indicates a missing weight for the mutual verification channel, with a preferred value of 0.30. This indicates the weight of isolated bright-field highlights, with an optimal value of 0.25; This represents the weight for missing texture perturbations, with a preferred value of 0.15. The rationale for this weight selection is that missing single-modal responses and mutual verification channels are the primary criteria for identifying false anomalies. and All values ​​are taken as 0.30; bright-field isolated high brightness directly corresponds to the reflective artifact of the roll material, therefore The value is set to 0.25; the missing texture perturbation is used to help distinguish between real fine imperfections and background fluctuations, therefore... Take 0.15.

[0104] This embodiment sets a first suppression threshold. The second inhibition threshold is 0.72. The value is 0.50. The pseudo-anomaly suppression strategy is as follows: when At that time, the FPGA determines the first If a connected region belongs to a single-modal pseudo-anomaly region, stop its incorporation into the real defect label and output a pseudo-anomaly suppression flag. when At that time, the FPGA determines the first If a connected region has a risk of false anomalies, it will be marked as a connected region to be re-inspected, and its location, area, and response channel statistics will be retained. when At that time, the FPGA determines the first Each connected region possesses a multi-channel mutual verification basis, allowing it to continue participating in the growth of real flawed connected regions. An example of Implementation Example 4 is shown in Table 4 below.

[0105] Table 4: Sample Table for Calculating the Pseudo-Abnormality Suppression Index

[0106] Taking R8 bright-field reflection artifacts as an example, its single-mode response ratio is 0.94, the cross-validation channel coverage value is 0.20, the bright-field isolated highlight value is 1.00, and the texture perturbation support value is 0.10. Substituting these values ​​into the pseudo-anomaly suppression index formula yields:

[0107] because The FPGA determines this region to be a single-mode pseudo-abnormal region and stops merging it into the real defect label. Therefore, bright-field reflection artifacts will not be directly output as real defect connected regions.

[0108] Figure 5 In the process, the bright-field highlight mask enters the pseudo-anomaly suppression judgment unit, and the dark-field, transmission, polarization, and near-infrared cross-verification channels serve as the suppression judgment inputs. When the bright-field highlight region lacks a cross-verification response, the growth path of the connected region is blocked; when the multi-channel response meets the cross-verification condition, the connected region continues to grow. Figure 5 This is used to describe the single-modal pseudo-anomaly suppression type connected region growth process in this embodiment.

[0109] Example 5 In this embodiment, step six is ​​to perform statistics on the connected regions when the connected regions meet the closure condition, and output the physical location, physical area, physical length, physical width, number of response channels, statistical confidence coefficient, and re-inspection priority of the defects.

[0110] In this embodiment, when a certain label is in continuous If no abnormal row segment satisfying the label preservation condition is received within a row, the FPGA determines that the connected region corresponding to the label is closed. After closure, the FPGA reads the minimum row number, maximum row number, minimum column number, maximum column number, pixel area, response channel set, average mask confidence value, average label preservation index, and average pseudo-anomaly suppression index of the connected region from the label table.

[0111] The physical length of a connected region is calculated using the following formula:

[0112] In the formula, Indicates the first The physical length of each connected region, in millimeters; Indicates the first The maximum line scan number of each connected region is read from the label table; Indicates the first The minimum line scan number of each connected region is read from the label table; This indicates the roll travel distance corresponding to a single encoder pulse, obtained through encoder calibration data.

[0113] The physical width of a connected region is calculated using the following formula:

[0114] In the formula, Indicates the first The physical width of each connected region, in millimeters; Indicates the first The maximum column number of each connected region is read from the label table; Indicates the first The minimum column number of each connected region is read from the label table; This represents the calibration coefficient for the single pixel width in the column direction, obtained through camera calibration data.

[0115] The physical area of ​​a connected region is calculated using the following formula:

[0116] In the formula, Indicates the first The physical area of ​​each connected region, in square millimeters; Indicates the first The number of candidate pixels contained in each connected region is obtained by counting the area counter of the FPGA; Indicates the physical calibration coefficient for the direction of operation; This represents the physical calibration coefficient in the width direction.

[0117] The statistical confidence coefficient is calculated using the following formula:

[0118] In the formula, Indicates the first Statistical confidence coefficient of each connected region; Indicates the first The average cross-row label retention index of each connected region during the growth process is obtained by cumulative calculation from the label table; Indicates the first The average pseudo-anomaly suppression index of each connected region during the growth process is obtained by cumulative calculation of pseudo-anomaly suppression units. Indicates the first The average mask confidence value of each connected region is obtained by cumulative calculation from the multi-channel mask generation unit; Indicates the first The stable physical dimensions of each connected region are calculated by checking whether the length, width, and area of ​​the connected region meet the physical constraints of the corresponding defect type. This indicates that the label maintains a stable weight, with a preferred value of 0.30; This represents the reverse weight for suppressing pseudo-anomalies, with a preferred value of 0.30. This represents the mask confidence weight, with a preferred value of 0.25. This represents the physical size stability weight, with a preferred value of 0.15.

[0119] This embodiment sets a first statistical confidence threshold. The second statistical confidence threshold is 0.75. The value is 0.55. The statistical output strategy is as follows: when At that time, the FPGA outputs the statistical results of the actual defect connected regions, including the physical location, physical area, physical length, physical width, number of response channels, and candidate defect type of the defect; when At that time, the FPGA outputs the statistical results of the connected regions to be re-inspected, including the location, size, response channels, and re-inspection mark of the connected regions; when At that time, the FPGA outputs the pseudo-anomaly suppression result and excludes the region from the real defect statistics.

[0120] The priority of re-inspection is calculated according to the following formula:

[0121] In the formula, Indicates the first The re-inspection priority of each connected region; Indicates the statistical confidence coefficient; This represents the estimated defect level, obtained by weighting physical area, physical length, and grayscale difference. The physical area ratio is the ratio of the physical area of ​​the j-th connected region to the preset level assessment area benchmark value; the physical length ratio is the ratio of the physical length of the j-th connected region to the preset level assessment length benchmark value; and the grayscale difference ratio is the ratio of the difference between the average grayscale value of the main response channel and the average grayscale value of the neighboring background in the j-th connected region, relative to the preset grayscale difference benchmark value. When any of these ratios exceeds 1, it is treated as 1. The larger the physical area ratio, physical length ratio, and grayscale difference ratio, the higher the defect level is considered to be. The larger the value, the higher the risk level of the defect corresponding to the connected region; The edge risk value is represented by the edge location ratio and the edge defect response ratio. The edge location ratio is the ratio of the number of pixels in the j-th connected region that fall into the edge detection zone of the roll material to the total number of pixels in that connected region. The edge defect response ratio is the ratio of the number of pixels in the j-th connected region that satisfy the edge crack response condition or the edge notch response condition to the total number of pixels in that connected region. When both the edge location ratio and the edge defect response ratio increase simultaneously, An increase indicates that the connected region is closer to edge cracks, edge gaps, or edge tears. This represents the normalized value of the number of response channels, obtained by dividing the number of response channels by the number of configured channels. , , and The values ​​represent the priority weights for re-inspection, with preferred values ​​of 0.35, 0.30, 0.20, and 0.15.

[0122] The re-inspection priority strategy is as follows: when When a high-priority re-examination prompt is output, the coordinates of the connected region are sent to the subsequent AI recognition module; when When this happens, the output includes a priority review prompt, and the statistical data for that connected region is retained; when At this time, a low-priority re-inspection prompt will be output or only batch statistical records will be made. Example of Implementation 5 is shown in Table 5 below.

[0123] Table 5: Sample Table of Statistical Output of Connected Regions

[0124] As shown in Table 5, although the R3 fine scratch has discontinuous segments, it forms a connected region after delayed merging, and its statistical confidence coefficient is 0.758, reaching the first statistical confidence threshold. Therefore, the output is a real defect. Although the R8 bright-field reflection artifact has a large physical area, its average pseudo-anomaly suppression index is 0.907, and the statistical confidence coefficient is only 0.312. Therefore, the output is a pseudo-anomaly suppression result. The R7 edge crack has a statistical confidence coefficient of 0.732 because the cross-line retention index is near the boundary value. The output is pending re-inspection for further confirmation by the subsequent AI recognition module or manual re-inspection system.

[0125] Figure 6 In the process, closed connected regions enter the physical size statistics unit, which outputs the length, width, area, and center position respectively; the statistical confidence judgment unit outputs the results of real defects, those to be re-inspected, and those of pseudo-anomalies based on the average cross-line label retention index, the average pseudo-anomaly suppression index, the average mask confidence value, and the physical size stability value. Figure 6 This is used to describe the process of outputting the statistical results of the connected regions in this embodiment.

[0126] Example 6 This embodiment illustrates the resource occupancy monitoring and processing of the present invention under FPGA resource-constrained conditions.

[0127] In high-speed roll-to-roll production lines, when abnormal light sources, full-width reflections, large-area coating anomalies, or background contamination occur, the number of abnormal pixels in the candidate mask increases rapidly, leading to increased occupancy rates in the label table and delay merging buffer. To prevent FPGA resource overflow, this embodiment includes a resource occupancy monitoring unit.

[0128] Tag table resource utilization is calculated using the following formula:

[0129] In the formula, This indicates the resource utilization rate of the label table; The current number of unclosed tags is obtained from the FPGA tag table counter; This indicates the maximum capacity of the tag table, which is obtained from the FPGA hardware resource configuration data.

[0130] The cache utilization rate for delayed merging is calculated using the following formula:

[0131] In the formula, This indicates the cache occupancy rate for delayed merging; The number of abnormal line segments in the current delayed merge cache is indicated by the FPGA cache counter; This indicates the maximum capacity of the delayed merging cache, which is obtained from the FPGA hardware resource configuration data.

[0132] The hardware resource congestion index is calculated using the following formula:

[0133] In the formula, This indicates the hardware resource congestion index; This indicates the resource utilization rate of the label table; This indicates the cache occupancy rate for delayed merging; This indicates the current line scan abnormality coverage rate, which is obtained by dividing the number of abnormal pixels in the current line scan by the total number of pixels. , and This represents the resource usage weight, with preferred values ​​of 0.40, 0.35, and 0.25.

[0134] This embodiment sets a first resource threshold. The second resource threshold is 0.80. The value is 0.92. The resource usage strategy is as follows: when At that time, the FPGA performs normal connectivity region extraction and statistics; when When this happens, the FPGA enters a compression output strategy, compressing low-area connected regions and prioritizing the retention of connected regions with high mask confidence values, high re-inspection priority, and high edge risk. when When this occurs, the FPGA enters the hardware congestion protection strategy, stops creating new low-response tags, outputs the abnormal coverage, maximum external range, and hardware congestion flag of the current processing window, and sends a prompt for light source verification or production line status verification to the host computer. Example of Implementation Six is ​​shown in Table 6 below.

[0135] Table 6: Sample Table of FPGA Resource Usage Monitoring

[0136] The technical principle of this embodiment is that FPGA resources are limited, and the tag table and delay merging buffer cannot grow indefinitely. Through the resource occupancy monitoring unit, when there are too many candidate abnormal regions, high-risk connected regions are prioritized for retention, low-area regions are compressed, and hardware congestion flags are output when there is severe congestion, so as to avoid tag table overflow during high-speed production line image stream processing.

[0137] in conclusion This invention establishes a method for extracting and statistically analyzing connected regions of defects at the FPGA end, suitable for high-speed linear array continuous image streams. This method employs configurable multi-channel mask generation, run-length encoded abnormal line segment extraction, cross-line label preservation and delayed merging, single-modal pseudo-anomaly suppression-type connected region growth, physical size statistics, and resource occupancy monitoring. The method can stably merge discontinuous, elongated defects, suppress single-modal reflection artifacts, and output the results of real defects, areas to be re-inspected, and pseudo-anomaly suppression. This provides structured region data for subsequent multimodal AI defect detection, defect cause layer identification, and quality level assessment.

[0138] Figure 1This diagram showcases a high-speed roll-to-roll production line, a multi-channel linear scan camera acquisition structure, an encoder synchronization structure, an FPGA real-time processing unit, a line-stream image processing structure, and a defect statistics output structure. It uses four flowcharts to illustrate the core technical routes of multi-channel acquisition and coordinate mapping, configurable masks and line segment encoding, cross-line label retention and delay merging, and pseudo-anomaly suppression and statistical output. The high-speed roll-to-roll material, linear scan camera, multi-channel optical acquisition unit, encoder wheel, and physical coordinate mapping structure in the attached diagram correspond to step one, representing the acquisition of multi-channel linear scan image streams, encoder pulse data, camera calibration data, defect type configuration data, and FPGA hardware resource configuration data, and mapping the linear scan image stream to the roll-to-roll physical coordinates. The multi-channel input, candidate mask layer, and line segment encoding structure within the FPGA processing unit in the attached diagram correspond to steps two and three, representing the configuration of response channels, channel thresholds, logic combination methods, and output statistical fields based on defect type configuration data, the generation of multi-channel defect candidate masks, and the extraction of abnormal line segments through run-length encoding. The historical unclosed label table, cross-line label preservation structure, and delayed merging cache in the attached diagram correspond to step four. They represent the calculation of the cross-line label preservation index based on horizontal overlap, inter-line spacing, response channel consistency, and center displacement, and the execution of label inheritance, delayed merging, or new label creation. The pseudo-anomaly suppression panel, connected region growth panel, and statistical output panel in the attached diagram correspond to steps five and six. They represent the suppression of pseudo-anomaly regions formed by single-modal reflections, shadows, and background texture perturbations during connected region growth, and the output of the physical location, physical area, physical length, physical width, number of response channels, statistical confidence coefficient, and re-inspection priority of defects after connected region closure.

[0139] It should be noted that all calculation formulas in this application employ regression analysis, including but not limited to machine learning algorithms, to deeply analyze the collected parameters and identify their natural trends and interrelationships. Specialized software, such as Python's Scikit-learn library or the R language, is used to automatically generate mathematical models that match the data. Then, cross-validation and other methods are used to objectively evaluate the model performance, and continuous feedback and optimization are combined to ensure that the created formulas truly reflect the inherent laws of the data, thereby guaranteeing their effectiveness and accuracy. In all calculation formulas in this application, the parameters in each formula undergo dimensionless processing within a consistent range to ensure that different physical quantities are compared on the same scale; dimensionless processing techniques include, but are not limited to, min-max-normalization and Z-score standardization. The algorithm of this invention is implemented as a Python script. Before executing the core logic, the program first executes a data loading module (e.g., using the widely used pandas library in Python) configured to read the aforementioned spreadsheet file and load its contents into the program's working memory (e.g., a DataFrame data structure). Subsequent algorithm steps will directly query and retrieve the required configuration parameters from this in-memory data structure.

[0140] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for extracting and statistically analyzing defective connected regions in a configurable FPGA, characterized in that, The specific steps include: Step 1: Acquire multi-channel linear array image stream, encoder pulse data, camera calibration data, defect type configuration data, and FPGA hardware resource configuration data of high-speed running roll material, and map the multi-channel linear array image stream to the physical coordinates of the roll material according to the line scan number; Step 2: Configure data based on defect type. Configure the response channel, channel threshold, logic combination method and output statistics field corresponding to each defect type in the FPGA, and generate a multi-channel defect candidate mask based on the configuration results. Step 3: Perform run-length encoding on the multi-channel defect candidate mask, extract the abnormal row segments in each line scan, and record the row number, start column, end column, center column, response channel label and mask confidence value of the abnormal row segment; Step 4: Compare the abnormal row segments in the current line scan with the historical unclosed label row segments, calculate the cross-row label retention index based on horizontal overlap, inter-row spacing, response channel consistency and center displacement, and perform label inheritance, delayed merging or new label creation according to the cross-row label retention index; Step 5: During the growth of connected regions, calculate the pseudo-anomaly suppression index based on the proportion of single-modal response, the coverage value of mutual verification channels, the bright field isolated highlight value, and the texture perturbation support value, and stop merging pseudo-anomaly rows into real defect labels according to the pseudo-anomaly suppression index. Step 6: When the connected region meets the closure condition, the FPGA performs statistics on the connected region and outputs the physical location, physical area, physical length, physical width, number of response channels, statistical confidence coefficient, and re-inspection priority of the defect.

2. The method for extracting and statistically analyzing defective connected regions in a configurable FPGA according to claim 1, characterized in that, In step one, the multi-channel linear array image stream includes at least two of the following: bright-field linear array image stream, dark-field linear array image stream, transmission linear array image stream, polarization linear array image stream, and near-infrared linear array image stream; the encoder pulse data includes the encoder pulse sequence number, the roll running distance corresponding to a single encoder pulse, and the line scan trigger timestamp; the camera calibration data includes the column direction single pixel width calibration coefficient, channel mounting offset, and grayscale normalization parameters for each image channel; the defect type configuration data includes surface defect configuration, penetration defect configuration, structural defect configuration, coating defect configuration, and edge defect configuration; and the FPGA hardware resource configuration data includes the tag table capacity, delay merging buffer capacity, maximum number of hold rows, minimum output area, and resource occupancy threshold.

3. The defective connectivity region extraction and statistical method for a configurable FPGA according to claim 1, characterized in that, In step two, the FPGA generates a multi-channel defect candidate mask based on the defect type configuration data, including: When the defect type is configured as surface defect, enable the bright field anomaly channel, dark field edge channel, and polarization response channel; When the defect type is configured as a translucent defect, enable the transmission anomaly channel and the bright field edge auxiliary channel; When the defect type is configured as structural defect, enable the dark edge channel, bright texture channel, and polarization scattering channel. When the defect type is configured as coating defect, enable the near-infrared material response channel, polarization response channel, and bright field grayscale variation channel. When the defect type is configured as edge defect, enable the edge baseline channel, dark field crack channel, and bright field missing channel.

4. The defective connectivity region extraction and statistical method for a configurable FPGA according to claim 1, characterized in that, In step two, the FPGA performs threshold judgment on the current pixel or current pixel block of each image channel, generates the binary response result of the corresponding channel, and obtains the fusion candidate mask according to the logical combination method in the defect type configuration data. The logical combination method includes the main response channel satisfying the condition, the main response channel and the auxiliary response channel jointly satisfying the condition, the weighted satisfaction of multiple response channels, and the edge region dedicated response condition.

5. The defective connectivity region extraction and statistical method for a configurable FPGA according to claim 1, characterized in that, In step three, abnormal row segments are generated using run-length encoding. The FPGA scans the multi-channel defect candidate mask according to the line scan input order. When the number of consecutive candidate pixels reaches the minimum row segment width, an abnormal row segment is formed. The abnormal row segment record fields include row segment number, line scan row number, start column, end column, center column, row segment width, response channel set, main response channel, mask confidence value, and candidate defect type.

6. The method for extracting and statistically analyzing defective connected regions in a configurable FPGA according to claim 1, characterized in that, In step four, the cross-line label holding index is calculated based on the lateral overlap adaptation value, inter-line holding adaptation value, response channel consistency value, and center displacement adaptation value between the current abnormal line segment and the historical unclosed label line segment. When the cross-line label holding index reaches the first holding threshold, the current abnormal line segment inherits the historical unclosed label. When the cross-line label holding index is less than the first holding threshold and reaches the second holding threshold, the current abnormal line segment enters the delayed merging buffer. When the cross-line label holding index is less than the second holding threshold, the FPGA creates a new label for the current abnormal line segment.

7. The defective connectivity region extraction and statistical method for a configurable FPGA according to claim 1, characterized in that, The delayed merge buffer stores the tag number, row number, start column, end column, response channel set, candidate defect type, and buffer hold number of the defective row segments to be merged. When a defective row segment in the subsequent line scan meets the tag continuation condition with the defective row segment in the delayed merge buffer, the FPGA merges the defective row segment in the delayed merge buffer with the subsequent defective row segment into the same defect tag. When the buffer hold number of the defective row segment to be merged exceeds the maximum hold number, the FPGA closes the defective row segment to be merged as an independent candidate region and outputs it.

8. The method for extracting and statistically analyzing defective connected regions in a configurable FPGA according to claim 1, characterized in that, In step five, the pseudo-anomaly suppression index is calculated based on the proportion of single-mode response, the coverage value of mutual verification channels, the value of bright-field isolated highlight, and the support value of texture perturbation. When the pseudo-anomaly suppression index reaches the first suppression threshold, the FPGA stops merging the current abnormal row segment into the real defect label and marks the corresponding connected region as a single-mode pseudo-anomaly region. When the pseudo-anomaly suppression index is less than the first suppression threshold and reaches the second suppression threshold, the FPGA marks the corresponding connected region as a connected region to be re-inspected; when the pseudo-anomaly suppression index is less than the second suppression threshold, the FPGA allows the current abnormal row segment to continue to participate in the growth of the real defective connected region.

9. The defective connectivity region extraction and statistical method for a configurable FPGA according to claim 1, characterized in that, In step six, the FPGA converts the number of pixel rows, number of pixel columns, circumscribed rectangle, center point, and area of ​​the connected region into the physical length, physical width, physical area, width direction position, and running direction position of the roll material based on the encoder pulse data and camera calibration data.

10. The method for extracting and statistically analyzing defective connected regions in a configurable FPGA according to claim 1, characterized in that, In step six, the statistical confidence coefficient is calculated based on the label stability value, the reverse value of pseudo-anomaly suppression, the mask confidence mean, and the physical size stability value. When the statistical confidence coefficient reaches the first statistical confidence threshold, the statistical results of the actual defective connected region are output. When the statistical confidence coefficient is less than the first statistical confidence threshold but reaches the second statistical confidence threshold, the statistical results of the connected region to be re-inspected are output. When the statistical confidence coefficient is less than the second statistical confidence threshold, the pseudo-anomaly suppression result is output.

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