Capacitive coupling signal transmission transient charge and discharge current impact protection circuit and method

Abstract

This application discloses a protection circuit and method for transient charging and discharging current surges in capacitively coupled signal transmission, belonging to the field of integrated circuit technology. It includes: a reference signal input terminal, connected to a reference signal V1 that is not impacted by the transient current; an interference signal input terminal, connected to an output signal Vout that may be impacted; a reference current source; a deviation detection and current regulation circuit, which detects the potential deviation between Vout and V1 and generates a regulation current positively correlated with the deviation amplitude; a positive feedback trigger circuit, which converts the regulation current change into a voltage change, triggering the switching of the device's operating region to form positive feedback to amplify the regulation current; and a compensation current output circuit, which converts the amplified regulation current into a compensation current output to the Vout node, charging when Vout is too low and discharging when Vout is too high. This application achieves adaptive compensation for transient surges, with a response time in the nanosecond range, capable of handling surges above 10mA, and with extremely low power consumption under normal conditions, making it easy to integrate.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a protection circuit and protection method for transient charging and discharging current surges during capacitively coupled signal transmission. Background Technology

[0002] In power integrated circuits, capacitive coupling is often used to enable signal transmission across isolation barriers. For example... Figure 1 As shown, the signal processing circuit transmits the digital signal to the receiving end via a buffer and coupling capacitor. However, sudden level changes may occur at the receiving end (such as ground potential fluctuations or power supply ripples), which generate transient charging and discharging current surges through the coupling capacitor. In practical applications, such as capacitive isolation driver chips, this transient current can reach over 10mA. Such a large transient current will subject the transmitting buffer to voltage or current stresses exceeding its tolerance range, leading to thermal failure or electromigration damage, significantly reducing the long-term reliability of the circuit.

[0003] In existing technologies, this problem is typically mitigated by increasing the size of the buffer or adding a current-limiting resistor. However, this approach increases chip area, introduces additional parasitic parameters, and struggles to effectively respond to transient surges within nanosecond timeframes. Therefore, there is an urgent need for a protection scheme that can both rapidly respond to transient currents and maintain signal transmission under normal conditions. Summary of the Invention

[0004] This application aims to solve the above problems by providing a protection circuit and method for transient charging and discharging current surges in capacitively coupled signal transmission.

[0005] To achieve the above objectives, this application adopts the following technical solution: In a first aspect, this application provides a protection circuit against transient charging and discharging current surges in capacitively coupled signal transmission, comprising: The reference signal input terminal is used to connect the reference signal V1 that has not been impacted by the transient charging and discharging current; The interference signal input terminal is used to connect the output signal Vout, which may be affected by transient charging and discharging current surges. A reference current source is used to provide a reference current. The deviation detection and current regulation circuit is connected to the reference signal input terminal, the interference signal input terminal and the reference current source, respectively, to detect the potential deviation between Vout and V1, and generate a corresponding regulation current according to the magnitude of the potential deviation. The regulation current is positively correlated with the magnitude of the potential deviation. A positive feedback trigger circuit, connected to the deviation detection and current regulation circuit, is used to convert the change in the regulation current into a voltage change, and trigger the switching of the operating region of the device in the deviation detection and current regulation circuit through the voltage change, thereby forming positive feedback to further amplify the regulation current. The compensation current output circuit is connected to the deviation detection and current regulation circuit. It is used to convert the amplified regulation current into a compensation current and output it to the signal transmission node where the output signal Vout is located, so as to provide charging current when Vout is too low and discharging current when Vout is too high. When the output signal Vout is substantially equal to the reference signal V1, the regulating current is limited to a micro current, and the compensation current output circuit provides no or only negligible charging and discharging current so as not to affect normal signal transmission.

[0006] Furthermore, the deviation detection and current regulation circuit includes a first MOS transistor and a second MOS transistor. The gate of the first MOS transistor is connected to the reference signal V1, the source is connected to the interference signal input terminal, and the drain is connected to the first node. The gate and drain of the second MOS transistor are connected to the second node, and the source is connected to the interference signal input terminal.

[0007] Furthermore, the deviation detection and current regulation circuit also includes a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor; the drain of the third MOS transistor is connected to the first node, the source is grounded, and the gate is connected to the third node; the drain of the fourth MOS transistor is connected to the second node, the source is grounded, and the gate is connected to the drain of the fourth MOS transistor; the drain of the fifth MOS transistor is connected to the gate of the fourth MOS transistor, the source is grounded, and the gate is connected to the first node.

[0008] Furthermore, the size of the first MOSFET is smaller than that of the third MOSFET, and the size of the fourth MOSFET is smaller than that of the fifth MOSFET. Through asymmetric size design, the regulating current is limited to a micro current when Vout is equal to V1.

[0009] Furthermore, the positive feedback trigger circuit includes a resistor connected between the gate of the third MOS transistor and ground; when the regulating current increases, the voltage drop across the resistor increases, causing the third MOS transistor to switch from the saturation region to the linear region, thereby further increasing the regulating current and forming positive feedback.

[0010] Furthermore, the compensation current output circuit includes a seventh MOS transistor, the gate of which is connected to the gate of the third MOS transistor, the drain of which is connected to the power supply, and the source of which is connected to the signal transmission node, for providing charging current when Vout is too low.

[0011] Furthermore, it also includes a discharge current output circuit symmetrically arranged with the seventh MOS transistor, used to provide discharge current when Vout is too high. The structure of the discharge current output circuit is the same as that of the charging circuit, and it detects the potential deviation with V1 as a reference, and realizes adaptive amplification of the discharge current through a positive feedback loop.

[0012] Furthermore, the reference current source is provided by a current mirror consisting of the third MOS transistor and the eleventh MOS transistor.

[0013] Furthermore, the protection circuit shares the same power supply domain with the buffer that drives the output signal Vout, and the power supply voltage is 1.8V.

[0014] Furthermore, the positive feedback trigger circuit has a working area switching response speed in the nanosecond range, which can adapt to high-impact scenarios with transient currents of 10mA or more.

[0015] Furthermore, the protection circuit can adapt to two scenarios where the duration of the level change is greater than or less than the duration of the digital signal pulse. It drives the compensation current amplification through deviation amplitude to avoid overcompensation or undercompensation.

[0016] Secondly, this application provides a protection method for transient charging and discharging current surges in capacitively coupled signal transmission, applied in a protection circuit that shares a power domain with the transmitting buffer, comprising the following steps: Obtain a reference signal, which is the original signal that has not been impacted by transient charging and discharging current; Acquire the interfered output signal, wherein the interfered output signal is the buffer output signal that may be affected by transient current surges; The potential deviation between the interfered output signal and the reference signal is compared in real time. A regulating current is generated based on the magnitude of the potential deviation, and the magnitude of the regulating current is positively correlated with the magnitude of the potential deviation. The change in the regulating current is converted into a voltage change, and the voltage change triggers the switching of the device's operating region, forming positive feedback to further amplify the regulating current. The amplified regulating current is converted into a compensation current and output to the signal transmission node where the interfered output signal is located. When the interfered output signal is lower than the reference signal, the compensation current is a charging current used to raise the potential of the interfered output signal; When the interfered output signal is higher than the reference signal, the compensation current is a discharge current used to pull down the potential of the interfered output signal; When the interfered output signal is substantially equal to the reference signal, the regulating current is limited to a micro current, and the compensation current is negligible so as not to affect normal signal transmission.

[0017] Alternatively, the micro-current limiting of the regulated current in the absence of deviation is achieved by using a MOS transistor with an asymmetric size design, wherein the size of the input transistor used to detect deviation is smaller than the size of the transistor used for current regulation, so as to maintain the micro-current state in the absence of deviation.

[0018] Optionally, the change in the regulating current is converted into a voltage change through a resistor, and the voltage change is used to trigger the MOSFET to switch from the saturation region to the linear region, thereby realizing the positive feedback amplification.

[0019] Optionally, the method responds to transient current surges within nanosecond timeframes, can adapt to transient current amplitudes above 10mA, and is applicable to various scenarios where the duration of level change is greater than or less than the duration of a digital signal pulse.

[0020] Compared with the prior art, this application has at least the following beneficial effects: This application achieves rapid and effective suppression of transient current surges by dynamically comparing the deviation between the interfered output signal and the reference signal, and adaptively adjusting the charging and discharging compensation current according to the deviation amplitude. The larger the deviation, the stronger the compensation capability.

[0021] Furthermore, the use of MOSFETs with asymmetrical size design limits the regulation current to a micro-current under normal conditions, without affecting the normal signal transmission. At the same time, it avoids the introduction of large-size transistors or high-impedance nodes, reducing circuit parasitic parameters and complexity.

[0022] By converting the change in regulating current into a change in voltage through a resistor, the switching of the MOSFET's operating region is triggered to form positive feedback, which realizes the rapid amplification of the compensation current, with a response speed of nanosecond level, and can cope with transient impacts of more than 10mA.

[0023] The charging and discharging circuits are symmetrically arranged, which can protect against both excessively high and excessively low level changes at the same time. They also share the power domain with the buffer, making them easy to integrate. Attached Figure Description

[0024] Figure 1 This is a schematic diagram illustrating the application scenario for which this application pertains; Figure 2 This is a schematic diagram of the output signal Vout when the level changes abruptly. Figure 3 This is a circuit diagram of a specific implementation of the protection circuit of this application. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0026] Terminology Explanation Transient charge / discharge current surge: In capacitively coupled signal transmission scenarios, when a sudden level change occurs at the receiving end, this change acts on the output node of the transmitter buffer through the coupling capacitor, generating a large instantaneous current. This current amplitude can reach over 10mA, with an extremely short duration (nanoseconds), but it is sufficient to subject the buffer to voltage or current stress exceeding its tolerance range, leading to thermal failure or electromigration damage. The protection circuit in this patent is specifically designed to address this type of destructive surge.

[0027] Reference signal (V1): refers to the original signal that is from the same source as the disturbed output signal (Vout), has undergone the same buffer processing, but has not been affected by transient current surges. In this invention, V1 is used as a comparison benchmark. Its special feature is that its waveform is consistent with Vout under normal conditions, so it can accurately reflect the potential deviation caused by transient surges, without relying on an externally fixed reference voltage.

[0028] Interference-affected output signal (Vout): refers to the buffer output signal that may be affected by transient charging and discharging current surges. This signal may exhibit excessively high or low potential shifts during level transitions, and is the target of monitoring and compensation by the protection circuit of this patent.

[0029] Regulation current: refers to the internal current in the circuit that changes with the magnitude of the potential deviation between Vout and V1. This current is generated by the deviation detection and current regulation circuit, and its magnitude is positively correlated with the deviation amplitude, serving as the basis for subsequent positive feedback amplification and compensation output.

[0030] Positive feedback amplification loop: This refers to a local positive feedback structure consisting of a MOSFET M0 and a resistor R1. Its working principle is as follows: an increase in the regulating current leads to an increase in the voltage drop across R1, which in turn raises the gate voltage of M0, enhancing its conduction and further increasing the regulating current. This positive feedback process can rapidly amplify the regulating current, allowing the compensation current to quickly reach the desired value, achieving a nanosecond-level response. This loop is only activated during transient deviations and remains in standby mode under normal conditions.

[0031] Operating region switching: This refers to the process by which MOSFET M0 switches from the saturation region to the linear region during a transient operation. This switching is triggered by the voltage drop across R1 and is a key step in positive feedback amplification. Through region switching, the conduction capability of M0 is significantly improved, thereby driving the subsequent compensation current output circuit to provide a large current.

[0032] Asymmetric size design: This refers to the use of different channel width-to-length ratios for paired MOSFETs (such as M1 and M0, M4 and M5) in a circuit, specifically, M1 is smaller than M0 and M4 is smaller than M5. This design allows the regulation current to be limited to a microcurrent (e.g., Ix = (1 / 3)I1) when there is no transient bias, thus consuming almost no static power; while in the case of transient bias, the positive feedback amplification can overcome the size limitation and provide a large compensation current.

[0033] Micro-current sleep mode: This refers to a state where, in the absence of transient deviation (V1=Vout), the regulating current inside the protection circuit is suppressed to an extremely low level, the compensation output circuit does not operate, and it consumes almost no additional power. This characteristic ensures that the protection circuit does not affect normal signal transmission under normal conditions, and its own power consumption is extremely low.

[0034] Adaptive matching: This means that the magnitude of the compensation current is automatically proportional to the intensity of the transient impact (i.e., the deviation between Vout and V1). The stronger the impact, the larger the compensation current, without the need for external control signals or threshold settings. This feature is achieved through a linkage mechanism between deviation detection and a positive feedback amplification loop.

[0035] Deviation amplitude driven: This means that the entire protection circuit's action strength and response speed are determined by the absolute value of the instantaneous potential difference between Vout and V1, rather than depending on a time threshold or external trigger. This allows the protection circuit to accurately match transient impacts of various amplitudes and durations.

[0036] Same-source configuration: This refers to a discharge protection circuit using the exact same architecture, operating principle, and signal flow logic as the charging protection circuit, only with the NMOS / PMOS roles interchanged, to achieve symmetrical protection against excessively high and low level transitions. This configuration ensures consistent charging and discharging protection performance.

[0037] Nanosecond-level response: refers to the time delay from the occurrence of a transient impact to the output compensation current of the protection circuit being on the order of nanoseconds. This fast response is due to the absence of high-impedance nodes in the circuit, the pure analog positive feedback structure, and the rapid switching of the device's operating region.

[0038] The duration of the level change can be greater than or less than the digital signal pulse: This means that the protection circuit of this invention does not rely on time judgment, but only on the instantaneous deviation amplitude. Therefore, regardless of whether the duration of the level change is long (such as power supply disturbance) or short (such as narrow pulse interference), it can respond correctly, avoiding the problems of overcompensation or undercompensation.

[0039] like Figure 1As shown, the digital signal output from the signal processing circuit is transmitted to the receiving end via a buffer and a coupling capacitor Ciso. A sudden level change (e.g., ground potential fluctuation) may occur at the receiving end, which generates a transient charging and discharging current surge through the capacitor Ciso, affecting the buffer output Vout. The protection circuit of this application (…) Figure 1 (As shown in the dashed box) It shares the power supply VDD (1.8V) and ground with the transmitter buffer. Its input terminals are connected to the reference signal V1 and the interfered output signal Vout, respectively. Among them, V1 is a signal that is from the same source as Vout and is processed by the same buffer, but since it is not subjected to transient current impact (for example, it is directly drawn from the buffer), it can be used as an interference-free reference.

[0040] like Figure 2 As shown, the buffer output signal Vout may overshoot or undershoot during level transitions. Figure 2 Segments 1, 3, and 5 are dangerous periods when Vout is too low (below the normal low level), requiring the protection circuit to provide charging current to raise the potential. Segments 6, 8, and 10 are dangerous periods when Vout is too high (above the normal high level), requiring discharging current to pull the potential low. Segments 2, 4, 7, and 9 are normal level holding periods, during which the protection circuit should not operate. The duration of the level change can be greater than or less than the pulse width of the digital signal. The protection circuit of this application uses deviation amplitude to drive compensation current amplification, which does not rely on time threshold judgment. Therefore, it can adapt to both scenarios and avoid overcompensation or undercompensation.

[0041] Figure 3 A specific embodiment of the protection circuit of this application is shown. The circuit includes the following modules, and the configuration and connection relationship of each module are as follows: Reference current source: A current mirror is formed by PMOS transistors M3 and M11. The sources of M3 and M11 are connected to the power supply VDD, and their gates are interconnected and connected to the drain of M3. The drain of M3 is grounded through a current source (not labeled in the figure), and the drain of M11 outputs a reference current I1 to node N1.

[0042] Deviation detection and current regulation circuit: includes NMOS transistors M0, M1, M2, M4, and M5. M1's gate is connected to the reference signal V1 (as the reference signal input), its source is connected to the output signal Vout (as the interference signal input), and its drain is connected to node A. M2's gate and drain are shorted to node B, and its source is connected to Vout. M0's drain is connected to node A, its source is grounded, and its gate is connected to node C. M4's drain is connected to node B, its source is grounded, and its gate and drain are shorted. M5's drain is connected to M4's gate, its source is grounded, and its gate is connected to node A. M4 and M5 form a current mirror; the current of M5 mirrors the current of M4. M1 and M2 form an input pair to detect the deviation between V1 and Vout.

[0043] Positive feedback trigger circuit: It consists of resistor R1, which is connected between node C and ground.

[0044] Compensation current output circuit (charging): includes PMOS transistor M7, whose gate is connected to node C, source is connected to power supply VDD, and drain is connected to node Vout (actually connected to the Vout line to provide charging current).

[0045] Discharge current output circuit: Based on the principle of symmetry, a discharge circuit similar to the charging circuit is set up. Figure 3 (Not fully shown, but can be inferred from the concept of this application), for example, using PMOS input pairs, NMOS output transistors, etc., its structure and working principle are symmetrical with the charging circuit, providing a discharge path when Vout is detected to be too high with V1 as a reference. This discharge circuit also includes deviation detection, positive feedback triggering and current output modules, and through asymmetrical size design, it has no discharge current under normal conditions, only working when Vout is too high.

[0046] Static operating point analysis: The aspect ratio of M1 is smaller than that of M0, and the aspect ratio of M4 is smaller than that of M5. The dimensions of the remaining components are as follows: Figure 3 As shown. When there is no transient deviation (V1 = Vout), let the current flowing through M4 be Ix. According to the current mirror relationship, the current through M5 is also Ix, and the current through M2 is 2Ix (since M1 and M2 have the same size and their sources are at the same potential, the current through M1 is also Ix at equilibrium; therefore, Ix = (1 / 3)I1). Since Ix is small, the voltage drop across R1 is insufficient to bring M0 into the linear region, so M0 operates in the saturation region. The current flowing through M0 is approximately 2Ix, and the overall static current is very small. The voltage at node C is low, the gate voltage of M7 is close to the power supply, M7 is cut off, and there is no charging current. Therefore, Vout ≈ V1, and the signal is transmitted normally. This achieves the function of "micro-current sleep mode in the absence of transients".

[0047] The transient low voltage protection (charging) process includes: When Vout falls below V1 due to a sudden level change (e.g.) Figure 2In sections 1, 3, and 5, the source potential of M1 decreases, and its gate-source voltage |Vgs| increases, leading to an increase in the current Ia flowing through M1. Due to the increased potential at node A, the gate voltage of M5 increases, and the current Ib of M5 increases. Simultaneously, the increased current of M2 causes an increase in the current Ix flowing through M4 (because the current of M2 is mirrored to M4). The increase in Ix leads to an increase in the current flowing through R1 (the current of R1 is the current of M0, Ic = Ia + Ib), increasing the voltage drop across R1, increasing the voltage at node C, and increasing the gate voltage of M0. M0 was originally operating in the saturation region; the increased gate voltage increases its drain current, further pushing up the voltage at node C, forming positive feedback. Once M0 enters the linear region, its drain voltage (at node A) decreases, but the positive feedback continues: Ix increases → R1 voltage drop increases → M0 gate voltage increases → M0 conduction is enhanced → Ic further increases → Ix further increases (through coupling via M4 and M5), while the currents of M1 and M2 also further increase. Ultimately, the voltage at node C is raised to near the supply voltage, the gate voltage of M7 decreases, M7 turns on, and a large current is injected from the supply through M7 into the Vout node, rapidly raising the Vout potential. The magnitude of the compensation current is determined by the deviation amplitude: the larger the deviation, the larger the initial Ia, the stronger the positive feedback, and the larger the current ultimately provided by M7, achieving adaptive matching.

[0048] Figure 3 The protection circuit shares a 1.8V power supply and ground with the transmitter buffer. It is the core hardware carrier for implementing charging protection when the Vout level is too low. The discharge path design logic when Vout is too high is completely identical to that of this circuit. It also includes a local positive feedback link. The whole circuit takes the reference signal V1 and the interference signal Vout as inputs, and the charging current output by M7 as the final output. The reference current I1 is the current reference for the entire circuit. None of the modules have independent power supplies. They all receive the base current from the current mirror module. Through the linkage of each module, the circuit achieves the function of no interference from microcurrents when there are no transients, and positive feedback amplification of the charging current during transients.

[0049] The reference current mirror module, composed of components M3 and M11, is the "basic current source" of the entire circuit. Its core function is to provide a stable reference current I1 for the entire protection circuit, providing a reference basis for all subsequent current adjustment actions.

[0050] The potential reference input module has no independent hardware components. It is a dedicated input interface for the external reference signal V1 and the interference-affected output signal Vout. Its core function is to introduce V1 and Vout, which are from the same source and processed by the same buffer, into the circuit as the original signal for potential detection. It is also the signal trigger terminal for circuit startup or sleep.

[0051] The MOSFET core adjustment module, composed of components M0, M1, M2, M4, and M5, is the core hub of the entire circuit. Its core function is to detect the potential deviation between V1 and Vout, convert the deviation signal into the initial adjustment and secondary amplification of the current Ix, and at the same time realize the signal linkage with other modules.

[0052] The resistor divider trigger module, with R1 as its component, is a key bridge between "current change" and "circuit state switching" in the circuit. Its core function is to convert the current Ix output by the MOSFET core regulation module into a corresponding voltage change, thereby triggering the switching of the working region of M0 in the MOSFET core regulation module.

[0053] The charging current output module, composed of component M7, is the execution terminal of the protection circuit. Its core function is to convert the current Ix amplified by the MOSFET core regulation module into a charging current output to the external isolation capacitor, thereby directly realizing the protection action of raising the Vout potential.

[0054] The reference current mirror module provides the basic reference current I1 for all other modules and is the core power supply for all modules. The potential reference input module directly inputs the potential signal to the MOSFET core adjustment module and is the signal drive terminal of the MOSFET core adjustment module. The MOSFET core adjustment module receives I1 from the reference current mirror module and V1 and Vout from the potential reference input module, and outputs current Ix to the resistor divider trigger module. It is the core connecting the reference and voltage divider modules. The resistor divider trigger module and the MOSFET core adjustment module form a bidirectional linkage. It receives Ix from the MOSFET core adjustment module and feeds back the divided voltage to the MOSFET core adjustment module to change its operating state. The charging current output module is driven by the current of the MOSFET core adjustment module and outputs the corresponding charging current only according to the amplified Ix.

[0055] The global signal flow of the circuit follows a fixed transmission path: First, the reference current mirror module outputs a reference current I1, and the potential reference input module simultaneously introduces external V1 and Vout; then, the two signals are input to the MOSFET core adjustment module, which detects the potential deviation between V1 and Vout and initially adjusts the current Ix; after Ix flows into the resistor divider trigger module, it is converted into the corresponding divider voltage, which is fed back to the MOSFET core adjustment module, triggering the switching of its internal device operating state and realizing the secondary positive feedback amplification of Ix; the amplified Ix continues to be transmitted to the charging current output module, which converts it into a charging current and outputs it to the external isolation capacitor; finally, the charging current replenishes the charge of the isolation capacitor, realizing the protection output of raising the Vout potential. At the same time, there is a local positive feedback signal flow in the circuit: the increase of Ix drives the increase of the R1 divider voltage, the increase of the divider voltage triggers the switching of the M0 operating region, which in turn raises the gate voltage of M1 and M2, and the increase of the gate voltage further drives the increase of Ix, and this cycle continues until the charging current matches the compensation requirements of transient impact.

[0056] When Vout is higher than V1 (e.g.) Figure 2 The discharge circuit (symmetrically configured) operates in sections 6, 8, and 10. Taking the PMOS input pair as an example, when Vout is higher than V1, it causes a deviation current in the PMOS pair. After positive feedback amplification, this current drives the NMOS discharge transistor to conduct, drawing current from the Vout node to ground and pulling Vout low. Its detailed operation is symmetrical to the charging circuit and will not be described further.

[0057] Because there are no high-impedance nodes in the circuit, all MOSFETs operate in the saturation or linear region, resulting in extremely low signal transmission delay and a positive feedback setup time in the nanosecond range, which is sufficient to handle transient current surges of over 10mA with pulse widths in the nanosecond range.

[0058] Based on the above circuit, this application also provides a protection method, including the following steps: Obtain the reference signal V1 that is not affected by the transient current and the output signal Vout that may be affected by the current. Real-time comparison of the potential deviation between Vout and V1; The regulating current is generated based on the deviation amplitude; the larger the deviation, the larger the regulating current. The regulating current is converted into voltage through a resistor, which triggers the switching of the MOSFET's operating region, forming positive feedback to further amplify the regulating current. The amplified regulating current is converted into a compensation current and output to the Vout node; If Vout is lower than V1, the compensation current is the charging current; if Vout is higher than V1, the compensation current is the discharging current. When Vout equals V1, the regulating current is a micro current, and there is no compensated output.

[0059] In addition, the method further includes the following dependent features: Implementing the micro-current limit of the regulated current without deviation through MOS transistor pairs (M1 < M0, M4 < M5) with asymmetric size design; Converting the change of the regulated current into a voltage change through resistor R1, and using this voltage change to trigger MOS transistor M0 to switch from the saturation region to the linear region, thereby achieving positive feedback amplification; The method responds to transient current shocks within nanoseconds, can adapt to transient current amplitudes above 10 mA, and is applicable to various scenarios where the duration of level mutation is greater than or less than the duration of digital signal pulses.

[0060] This application can be widely applied to various products such as capacitive coupling isolation chips, power integrated circuits, digital isolators, etc., effectively improving the reliability of the system in harsh electromagnetic environments, being easy to integrate, and not increasing additional power consumption.

[0061] The third object of the embodiments of this application is to provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the protection method for transient charging and discharging current shocks of capacitive coupling signal transmission is implemented.

[0062] The fourth object of the embodiments of this application is to provide a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the protection method for transient charging and discharging current shocks of capacitive coupling signal transmission is implemented.

[0063] The fifth object of the embodiments of this application is to provide a computer program product. The computer program product includes computer instructions, and the computer instructions instruct a computer to execute the protection method for transient charging and discharging current shocks of capacitive coupling signal transmission.

[0064] These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured product including an instruction device, and the instruction device implements the functions specified in the process Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0065] These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to generate computer-implemented processing. Therefore, the instructions executed on the computer or other programmable device provide for implementing the functions in the process Figure 1 one process or multiple processes and / or blocks Figure 1 The steps of the function specified in one or more boxes.

[0066] This application may take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application may take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, readable storage media, optical storage, etc.) containing computer-usable program code.

[0067] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0068] Obviously, the described embodiments are only some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort should fall within the scope of protection of this application.

[0069] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and not to limit them. Although this application has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation methods of this application. Any modifications or equivalent substitutions that do not depart from the spirit and scope of this application should be covered within the protection scope of this application.

Claims

1. A protection circuit for transient charging and discharging current surges in capacitively coupled signal transmission, characterized in that, include: The reference signal input terminal is used to connect the reference signal V1 that has not been impacted by the transient charging and discharging current; The interference signal input terminal is used to connect the output signal Vout, which may be affected by transient charging and discharging current surges. A reference current source is used to provide a reference current. The deviation detection and current regulation circuit is connected to the reference signal input terminal, the interference signal input terminal and the reference current source, respectively, to detect the potential deviation between Vout and V1, and generate a corresponding regulation current according to the magnitude of the potential deviation. The regulation current is positively correlated with the magnitude of the potential deviation. A positive feedback trigger circuit, connected to the deviation detection and current regulation circuit, is used to convert the change in the regulation current into a voltage change, and trigger the switching of the operating region of the device in the deviation detection and current regulation circuit through the voltage change, thereby forming positive feedback to further amplify the regulation current. The compensation current output circuit is connected to the deviation detection and current regulation circuit. It is used to convert the amplified regulation current into a compensation current and output it to the signal transmission node where the output signal Vout is located, so as to provide charging current when Vout is too low and discharging current when Vout is too high. When the output signal Vout is substantially equal to the reference signal V1, the regulating current is limited to a micro current, and the compensation current output circuit provides no or only negligible charging and discharging current so as not to affect normal signal transmission.

2. The protection circuit according to claim 1, characterized in that, The deviation detection and current regulation circuit includes a first MOS transistor (M1) and a second MOS transistor (M2). The gate of the first MOS transistor (M1) is connected to the reference signal V1, the source is connected to the interference signal input terminal, and the drain is connected to the first node. The gate and drain of the second MOS transistor (M2) are connected to the second node, and the source is connected to the interference signal input terminal.

3. The protection circuit according to claim 2, characterized in that, The deviation detection and current regulation circuit further includes a third MOSFET (M0), a fourth MOSFET (M4), and a fifth MOSFET (M5); the drain of the third MOSFET (M0) is connected to the first node, the source is grounded, and the gate is connected to the third node; the drain of the fourth MOSFET (M4) is connected to the second node, the source is grounded, and the gate is connected to the drain of the fourth MOSFET (M4). The drain of the fifth MOS transistor (M5) is connected to the gate of the fourth MOS transistor (M4), the source is grounded, and the gate is connected to the first node.

4. The protection circuit according to claim 3, characterized in that, The size of the first MOSFET (M1) is smaller than that of the third MOSFET (M0), and the size of the fourth MOSFET (M4) is smaller than that of the fifth MOSFET (M5). Through asymmetric size design, the regulating current is limited to a micro current when Vout is equal to V1.

5. The protection circuit according to claim 3, characterized in that, The positive feedback trigger circuit includes a resistor (R1) connected between the gate of the third MOS transistor (M0) and ground. When the regulating current increases, the voltage drop across the resistor (R1) increases, causing the third MOS transistor (M0) to switch from the saturation region to the linear region, thereby further increasing the regulating current and forming positive feedback.

6. The protection circuit according to claim 3, characterized in that, The compensation current output circuit includes a seventh MOS transistor (M7), whose gate is connected to the gate of the third MOS transistor (M0), whose drain is connected to the power supply, and whose source is connected to the signal transmission node, for providing charging current when Vout is too low.

7. The protection circuit according to claim 6, characterized in that, It also includes a discharge current output circuit symmetrically arranged with the seventh MOS transistor (M7) to provide discharge current when Vout is too high. The structure of the discharge current output circuit is the same as that of the charging circuit. It detects the potential deviation with V1 as a reference and realizes adaptive amplification of the discharge current through a positive feedback loop.

8. The protection circuit according to claim 3, characterized in that, The reference current source is provided by a current mirror consisting of the third MOS transistor (M3) and the eleventh MOS transistor (M11).

9. The protection circuit according to claim 1, characterized in that, The protection circuit shares the same power supply domain with the buffer that drives the output signal Vout, and the power supply voltage is 1.8V. The working area switching response speed of the positive feedback trigger circuit is on the nanosecond level, so as to adapt to high impact scenarios with transient currents of 10mA or more. The protection circuit can adapt to two scenarios where the duration of the level change is greater than or less than the duration of the digital signal pulse. It uses deviation amplitude to drive compensation current amplification to avoid overcompensation or undercompensation.

10. A protection method for transient charging and discharging current surges in capacitively coupled signal transmission, based on the protection circuit described in any one of claims 1 to 9, applied in a protection circuit sharing a power domain with a transmitting buffer, characterized in that, Includes the following steps: Obtain a reference signal, which is the original signal that has not been impacted by transient charging and discharging current; Acquire the interfered output signal, wherein the interfered output signal is the buffer output signal that may be affected by transient current surges; The potential deviation between the interfered output signal and the reference signal is compared in real time. A regulating current is generated based on the magnitude of the potential deviation, and the magnitude of the regulating current is positively correlated with the magnitude of the potential deviation. The change in the regulating current is converted into a voltage change, and the voltage change triggers the switching of the device's operating region, forming positive feedback to further amplify the regulating current. The amplified regulating current is converted into a compensation current and output to the signal transmission node where the interfered output signal is located. When the interfered output signal is lower than the reference signal, the compensation current is a charging current used to raise the potential of the interfered output signal; When the interfered output signal is higher than the reference signal, the compensation current is a discharge current used to pull down the potential of the interfered output signal; When the interfered output signal is substantially equal to the reference signal, the regulating current is limited to a micro current, and the compensation current is negligible so as not to affect normal signal transmission.

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