Method for bypassing failed cells and system redundancy operation of a cascaded battery pack

Abstract

The application discloses a kind of fault cell bypass and system redundancy operation method of cascaded battery pack, it includes the following steps: the operating state data of cascaded battery pack is collected and the target cell of failure and its target three-switch unit are identified;Response generates and executes soft drop power instruction to adjust loop current to safe switching interval;Then generate bypass control signal and apply to target three-switch unit, realize bypass with main string loop;Recalculate and update operating parameter set;Each protection parameter is re-updated into redundancy continuation mode, continuously supplies power to outside and improves the sampling monitoring frequency of each non-target three-switch unit remaining, while recording failure log;Also continuously monitor the parameter recovery condition of being bypassed, according to its failure type classification and set recovery determination condition, when meeting, generate reverse recovery control signal, to re-input target cell into main string loop.The application can greatly improve the working condition fault tolerance of battery system.

Description

Technical Field

[0001] This invention relates to the field of battery management technology, and more specifically, to a method for bypassing faulty cells and redundancy operation of a cascaded battery pack. Background Technology

[0002] During long-term charge-discharge cycles and complex operating conditions, battery cells are highly susceptible to various individual failures such as undervoltage, overvoltage, overtemperature, internal short circuits, and capacity decay. Because traditional battery packs use a fixed rigid series topology, the operating states of the cells are strongly coupled and their operation is highly correlated, exhibiting a typical "barrel effect." Failure of any single cell will directly affect the safe and stable operation of the entire battery circuit, severely restricting the continuous and reliable power supply of the battery system.

[0003] Currently, the fault management logic of traditional series battery systems is relatively crude. When the BMS detects an abnormal fault in a single cell, in order to avoid safety risks such as thermal runaway, overcurrent, and overvoltage, it usually adopts a protection strategy of shutting down the entire string or forcibly limiting power, resulting in equipment shutdown and power outage. Although this passive protection method can ensure battery safety, it greatly reduces the power supply reliability and fault tolerance of the battery system. In scenarios with extremely high requirements for operational continuity, such as energy storage grid connection, vehicle operation, and continuous industrial operations, it can easily cause business interruption, equipment downtime, economic losses, and even on-site safety accidents, and cannot achieve independent isolation of faulty cells and uninterrupted redundant operation of the system. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a method for bypassing faulty cells and achieving system redundancy in a cascaded battery pack. The cascaded battery pack consists of… The three-switch units are cascaded in sequence, the first... The three-stage switching unit includes one battery cell. and three-power switching devices , , , The power switching device mentioned above The drain is connected to the cell in the previous three-switch unit. The positive and source terminals are connected to the battery cell. Positive electrode, the power switching device The drain is connected to the cell. The positive and source terminals are connected to a power switching device. Drain and cell The negative terminal of the power switching device The source is connected to the cell. The power switching devices in the negative electrode and the next stage three-switch unit Drain, where the cell The positive and negative terminals serve as the output terminals of this stage's three-switch unit. Drain and The drain, serving as the input terminal of this stage's three-switch unit, includes the following steps: Step S1: Collect the operating status data of each of the three switching units in the cascaded battery pack through the main controller BMS, and identify the target cell that has failed based on the operating status data. and the first One target three-switch unit, ; Step S2: The main controller (BMS) responds to the identified target battery cell. It generates and executes a soft power reduction command to adjust the loop current of the cascaded battery pack to a safe switching range. It locks the current output voltage target and freezes the balancing and reconfiguration actions of other non-target three-switch units. Step S3: After executing the soft power reduction command, the main controller (BMS) generates a bypass control signal and applies it to the target three-switch unit. The bypass control signal is used to turn off... and And conduct This allows the circuit current to bypass the target battery cell. To achieve the target battery cell The bypass of the main series circuit inside the cascaded battery pack; Step S4: The main controller (BMS) completes the selection of the target battery cell. After bypassing, the operating parameter set of the cascaded battery pack is recalculated and updated based on the remaining number of available battery cells. The operating parameter set includes at least the effective number of series connections, the upper limit of voltage output, and the lower limit of voltage output. Based on the operating parameter set, the various protection parameters are updated again to generate a set of redundant operating configuration parameters suitable for low-cell operating conditions. Step S5: The main controller (BMS) controls the cascaded battery pack to enter a redundant operation mode based on the redundant operation configuration parameters. In this mode, the battery pack continuously supplies power and increases the sampling and monitoring frequency of the remaining non-target three-switch units, while simultaneously recording the target cell. Fault logs; Step S6: In the redundant continuation mode, the main controller (BMS) continues to monitor the bypassed target battery cell. The parameters are assessed for recovery status, categorized according to fault type, and recovery judgment conditions are set. When the recovery judgment conditions are met, a reverse recovery control signal is generated to restore the target cell. Reconnect the main series circuit.

[0005] Furthermore, step S1 includes the following steps: Step S11: The main controller (BMS) collects data on the battery cells in each of the three-switch units in a first cycle of 5ms. Voltage data and temperature data Simultaneously, the loop current data of the cascaded battery pack is collected. ; Step S12: The main controller (BMS) determines the voltage data based on the voltage data. The temperature data and the loop current data Estimate the value of each of the said cells internal resistance estimate ; Step S13: The main controller (BMS) transmits the voltage data. The temperature data and the estimated internal resistance value Each fault is compared with a preset fault threshold. When any of the following faults is detected to exceed the corresponding fault threshold: single cell overvoltage, single cell undervoltage, single cell overtemperature, sudden change in differential pressure, or abnormal increase in internal resistance, a fault flag bit is generated. Step S14: The main controller (BMS) locates the cell that generated the fault flag bit based on the fault flag bit, and identifies it as the target cell. Simultaneously record the target battery cell The target three-switch unit is located and the target battery cell is marked. The main series circuit cannot be connected.

[0006] Furthermore, the generation and execution of the soft power reduction command in step S2 includes: The main controller (BMS) acquires the current loop current data. And read the safe switching current threshold from the preset parameter storage area. Wherein, the safe switching current threshold Specifically, the nominal capacity of the cascaded battery pack is obtained through the main controller (BMS). and the nominal capacity Multiply by the preset safety switching factor The safe switching current threshold is obtained. The safety switching ratio coefficient This ensures that the loop current of the cascaded battery pack during fault cell bypass switching is limited to a certain value per unit time. Within the safe switching range below, avoid damage to the power switching devices and the remaining non-target cells caused by arcing or voltage surges due to high current switching; The main controller (BMS) compares the loop current data. With the safety switching current threshold If the former is greater than the latter, a current reduction request is generated. The current reduction request includes a target current value, which is less than or equal to the safe switching current threshold. ; In response to the current reduction request, the main controller (BMS) sends power to the power switching devices connected to the input or output terminals of the cascaded battery pack. and Send a soft power reduction command to linearly or stepwise reduce the loop current of the cascaded battery pack until the loop current data is reached. To achieve the target current value; The main controller (BMS) in the loop current data Once the target current value is reached, the total output voltage value of the cascaded battery pack at the current moment is locked as the current output voltage target, and a freeze command is sent to all non-target three-switch units to suspend their equalization and topology reconfiguration control actions.

[0007] Furthermore, the realization of the target battery cell described in step S3... The bypass to the main series circuit within the cascaded battery pack includes: The main controller (BMS) extracts the current voltage reference from the output voltage target and, based on the target cell... The target three-switch unit is configured to generate a switching action sequence for the target three-switch unit, the switching action sequence including turning off the power switching device. Turn off power switching devices and conduction power switching devices The time sequence; The main controller (BMS) converts the switching action sequence into gate drive level signals and outputs them to the three power switching devices of the target three-switch unit. , , The gate; After issuing the gate drive level signal, the main controller (BMS) monitors the voltage difference across the target three-switch unit. When the voltage difference drops to within a preset threshold close to zero, the target cell is confirmed. It has been successfully bypassed, and a confirmation signal has been generated; Based on the successful confirmation signal, the main controller (BMS) updates the system topology status register and sets the target battery cell... The status is marked as bypassed, and the number of effective series cells in the cascaded battery pack is reduced by one.

[0008] Furthermore, step S4 includes the following steps: The main controller (BMS) reads the total number of cells currently marked as bypassed from the system topology status register and compares it with the total number of cells in the cascaded battery pack. Subtracting the two numbers yields the effective number of cells connected in series. ; Based on the number of effective series-connected cells By combining the current state of charge (SOC) and open-circuit voltage (OCV) curves of each non-target cell, a new maximum available system voltage is calculated. and a new system minimum available voltage ;in, ; In the formula, To bypass and remove the target cell that has failed. The remaining usable cell set has the number of elements equal to the number of effective series-connected cells. , For the first The open-circuit voltage value corresponding to a non-target cell when it is fully charged (SOC equals 100%). For the first The open-circuit voltage value corresponding to the non-target cell in the discharge cut-off state, i.e., when the SOC is equal to 0% or the corresponding minimum allowable discharge SOC. and The first The highest and lowest open-circuit voltages of each non-target cell are obtained by looking up their open-circuit voltage (OCV) curves in a table; if all non-target cells are of the same model and have the same OCV curve, then the process is simplified to... , ; Based on the highest available voltage of the system and the lowest available voltage of the system A series of protection parameters are recalculated and set based on preset safety margin coefficients. These protection parameters include the maximum allowable total charging voltage, the maximum allowable total discharging voltage, the ultimate protection voltage, the current limiting protection value, and the power limiting value. The preset safety margin coefficients include charging, discharging, overvoltage, and undervoltage safety margin coefficients. The maximum allowable total charging voltage... Maximum permissible total discharge voltage Limit protection voltage , Current limiting protection value Power limiting value ,in For charging safety margin coefficient, This is the discharge safety margin factor. This is the overvoltage limit protection voltage. This is the undervoltage limit protection voltage. This is the overvoltage safety margin factor. This is the undervoltage safety margin factor. The rated discharge current of the cascaded battery pack is... Based on the highest available voltage of the system With rated voltage The current limiting coefficient obtained by ratio correction ,in The preset current limiting factor is... This is a system efficiency correction factor; The number of effective series-connected cells The system's highest available voltage The minimum usable voltage of the system All the recalculated protection parameters are packaged into the redundant operation configuration parameters and written to the operation parameter storage area, replacing the original configuration parameters.

[0009] Furthermore, step S5 includes the following steps: The main controller (BMS) acquires the redundant operation configuration parameters and determines the number of effective series-connected cells accordingly. Adjust the reference commands for the output voltage and current to match the load requirements. The main controller (BMS) controls the cascaded battery pack to enter the redundant continuation mode based on the reference instructions, shortening the first cycle of 5ms to the second cycle of 1ms to process the voltage data of the remaining non-target cells. and the temperature data Perform high-frequency data acquisition; The input parameters for fault comparison are dynamically adjusted based on the high-frequency collected data to improve the early warning sensitivity for potential faults in the remaining non-target cells. Record the target battery cell corresponding to this fault event. The relevant information, including the target battery cell The fault log includes the target three-switch unit, the time of fault occurrence, the duration of fault, and the original fault data that caused the fault, including the overvoltage peak value, the undervoltage valley value, the overtemperature peak value, and the internal resistance mutation rate.

[0010] Furthermore, step S6 includes the following steps: The main controller (BMS) bypasses the target battery cell. Subsequently, the target battery cell was continuously monitored. Voltage recovery data and temperature recovery data in the redundant continuation mode; Based on the original fault data, it is classified into recoverable faults or permanent faults, and the recovery judgment conditions are set based on the classification results. The voltage recovery data and the temperature recovery data are continuously compared with the recovery determination conditions. When the recovery determination conditions are met and the data remains stable for a period of time, a recovery enable signal is generated. In response to the recovery enable signal, the main controller (BMS) generates a reverse recovery control signal, which is used to turn off the target three-switch unit. and reconnect and To deliver the target battery cell Reconnect the main series circuit.

[0011] Furthermore, setting the recovery determination conditions based on the classification results includes: The original fault data is compared with a preset fault type database. If the original fault data falls under the category of instantaneous overvoltage or brief overtemperature, then the target cell is... Classified as a recoverable fault; For the target battery cell classified as having the recoverable fault Based on the overvoltage peak or overtemperature peak in its original fault data, calculate the recovery voltage threshold and recovery temperature threshold. The recovery voltage threshold and the recovery temperature threshold are combined to form the recovery determination condition. The recovery determination condition is considered to be satisfied only when the voltage recovery data and the temperature recovery data are both lower than their respective thresholds.

[0012] Furthermore, the generation of the recovery enable signal includes: The voltage recovery data and temperature recovery data are continuously acquired and compared with the recovery voltage threshold and the recovery temperature threshold. When the main controller (BMS) detects that the voltage recovery data is less than the recovery voltage threshold and the temperature recovery data is less than the recovery temperature threshold, and this state continues for a stable time window, the system will continue to acquire these data. Then, a temporary recovery permit is generated; After generating the temporary recovery permission flag, the active balancing operation for other non-target cells is paused, and the total voltage of the current cascaded battery pack is checked again to see if it is within a safe range. After confirming that the total voltage is within a safe range, the temporary recovery permission flag is upgraded to the recovery enable signal.

[0013] Furthermore, the main controller (BMS), in response to the recovery enable signal, generates a reverse recovery control signal including: The main controller (BMS) receives the recovery enable signal and reads the target battery cell from the system topology status register. The target three-switch unit and its current bypass status; Based on the target three-switch unit, a reverse switch action sequence is generated, the reverse switch action sequence including turn-off. After a dead zone period, conduct simultaneously. and The time sequence; The reverse switching action sequence is converted into a corresponding gate drive level signal and output to the three power switching devices of the target three-switch unit. , , The gate; After the gate drive level signal is issued, the target cell that is re-engaged in the main series circuit is monitored. The voltage change rate and current surge are monitored. If both are within a preset safety range, the system topology status register is updated, and the target battery cell is... The status has been restored from bypassed to online.

[0014] The beneficial effects of this application are as follows: By real-time acquisition of the operating status data of each of the three switching units inside the cascaded battery pack through the main controller BMS, and by relying on the full range of operating parameters, anomaly identification is completed, and the faulty cell and its corresponding three switching units are located. This effectively solves the industry shortcomings of traditional series battery system fault diagnosis methods, such as being crude, unable to locate the faulty cell, and having a single fault identification dimension. This step relies on a multi-unit real-time status monitoring mechanism to achieve independent acquisition and analysis of the operating data of each cell. It can identify the faulty cell and its corresponding unit separately from the highly coupled series system, breaking the limitation of traditional systems that cannot locate individual cells. This provides a clear fault target basis for subsequent cell bypass isolation and system fault-tolerant operation, and solves the problem of strong blindness in the fault handling of traditional battery systems from the monitoring level. After identifying the faulty cell, a soft power reduction command is actively executed to adjust the loop current to a safe switching range, lock the target output voltage of the battery pack, and freeze the balancing and reconfiguration actions of the remaining normal units. This step achieves a smooth current drop through soft power reduction, controlling the operating current within a safe switching low current range and avoiding risks such as arcing and overcurrent during hardware switching. By locking the output voltage and freezing the normal unit's operation, the system's operating state during the fault handling phase is unified, eliminating the superimposed interference of various control actions and providing a stable and safe system operating environment for bypassing faulty cells. Secondly, after the system operating conditions stabilize, a bypass control signal is output. By turning off the switches on both sides of the corresponding unit and turning on the bypass switch, the circuit current bypasses the faulty cell, achieving physical isolation between the faulty cell and the main series circuit. This step relies on the reconfigurable topology of the three-switch unit to independently perform bypass switching operations on the unit containing the faulty cell, without cutting off the overall battery pack power supply circuit. Faulty cell isolation can be completed while the system continues to operate under load. This completely eliminates the operational coupling shortcomings of traditional series structures, removes the constraints of a single cell fault on the overall circuit, achieves independent isolation of the faulty cell, and ensures uninterrupted power supply capability of the battery system. After bypassing and isolating the faulty cell, the battery pack operating parameters are recalculated based on the remaining usable cells. The effective series connection quantity and voltage upper and lower limits are updated, and various system protection parameters are iterated simultaneously to construct a redundant operating configuration adapted to the condition of few cells. This step dynamically reconstructs the entire operating parameter system based on the real-time cell redundancy status, conforming to the output capacity and electrical characteristics of the battery pack under the condition of few cells, and simultaneously correcting various protection thresholds to avoid operational mismatch problems caused by fixed parameters. This ensures that the battery system still has a standardized and safe operating constraint system even when a single cell is missing. Then, based on the new redundant configuration parameters, the battery pack redundant continuation mode is started to maintain continuous power supply to the outside world, increase the status sampling and monitoring frequency of normal cells, and simultaneously record the complete log of the faulty cell. This step achieves uninterrupted power supply under fault conditions through redundant operation mode, significantly improving the battery system's fault tolerance and power supply continuity, and meeting the continuous operation requirements of energy storage, vehicle, and industrial equipment.By increasing the monitoring frequency of normal battery cells, the system enhances its state awareness during redundant operation, promptly identifies secondary abnormal operating conditions, and retains complete operating logs for the period of the fault, providing comprehensive data support for subsequent fault tracing, cell repair, and system optimization. Finally, by continuously monitoring parameter changes of bypassed faulty cells during redundant operation, and setting corresponding recovery judgment conditions based on different fault types, reverse reconnection control is executed after the recovery criteria are met, reconnecting the repaired cell to the main series circuit. This step achieves continuous tracking of the faulty cell's state, distinguishes between permanent and recoverable temporary faults, and enables automatic cell reconnection through intelligent condition judgment, restoring the battery pack to full series operation without manual intervention. This ensures continuous system operation during faults and restores the battery's original capacity and output performance after the fault is eliminated, significantly improving the battery system's self-healing capability, operating condition adaptability, and long-term operational stability. Attached Figure Description

[0015] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a schematic diagram of the topology of the three switching units in the embodiment; Figure 2 This is a schematic diagram of the topology of the cascaded battery pack in the embodiment; Figure 3 This is a flowchart illustrating the steps of the method for bypassing faulty cells and operating system redundancy in a cascaded battery pack in an embodiment. Figure 4 for Figure 3 A detailed flowchart illustrating the implementation steps of step S1. Detailed Implementation

[0016] The following drawings disclose several embodiments of the present invention. For clarity, many practical details will be described in the following description. However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not essential. Furthermore, for the sake of simplicity, some conventional structures and components will be shown in the drawings in a simple schematic manner.

[0017] To further understand the invention's content, features, and effects, the following embodiments are provided, along with detailed descriptions in conjunction with the accompanying drawings: Reference Figure 1-3 , Figure 1 This is a schematic diagram of the topology of the three switching units in the embodiment; Figure 2 This is a schematic diagram of the topology of the cascaded battery pack in the embodiment; Figure 3This is a flowchart illustrating the steps of the fault cell bypass and system redundancy operation method for a cascaded battery pack in this embodiment. The cascaded battery pack in this embodiment consists of... The three-switch units are cascaded in sequence, the first... The three-stage switching unit includes one battery cell. and three-power switching devices , , , The power switching device mentioned above The drain is connected to the cell in the previous three-switch unit. The positive and source terminals are connected to the battery cell. Positive electrode, the power switching device The drain is connected to the cell. The positive and source terminals are connected to a power switching device. Drain and cell The negative terminal of the power switching device The source is connected to the cell. The power switching devices in the negative electrode and the next stage three-switch unit Drain, in which, cell The positive and negative terminals serve as the output terminals of this stage's three-switch unit. Drain and The drain, serving as the input terminal of this stage's three-switch unit, includes the following steps: Step S1: Collect the operating status data of each of the three switching units in the cascaded battery pack through the main controller BMS, and identify the target cell that has failed based on the operating status data. and the first One target three-switch unit, ; In this embodiment of the invention, the main controller (BMS) uses an internally integrated multi-channel analog-to-digital converter to collect data on the cells in each three-switch unit at a first cycle of 5ms. Voltage data and temperature data Simultaneously, loop current data is acquired through a Hall effect current sensor connected in series in the main circuit. Voltage data The data is collected through parallel connection in the battery cell. A precision resistor voltage divider network is used to achieve temperature data. The data is collected by attaching it to the battery cell. This is achieved using a surface-mount negative temperature coefficient thermistor. The main controller (BMS) uses voltage data... Temperature data and loop current data Estimate the value of each cell internal resistance estimate Internal resistance estimation is based on Ohm's law. ,in and These are two consecutive sampling times. Temperature data. This is used to perform temperature compensation correction on the estimated internal resistance value. The main controller BMS internally stores a table of correction coefficients for cell internal resistance changes with temperature, based on the current temperature. The correction factor is obtained by looking up the table. Corrected internal resistance estimate The main controller (BMS) will transmit voltage data. Temperature data and the corrected internal resistance estimate Each fault is compared with a preset fault threshold, including a single-unit overvoltage threshold. Individual undervoltage threshold Single-unit temperature too high threshold Pressure differential change threshold and threshold for abnormal increase in internal resistance When any of the following fault conditions are detected—overvoltage, undervoltage, overtemperature, sudden voltage drop, or abnormal increase in internal resistance—exceeding the corresponding fault threshold, a fault flag is generated. The main controller (BMS) then uses this fault flag to locate the cell that generated the flag and designates it as the target cell. Simultaneously record the target battery cell The target three-switch unit is located and the target cell is marked. It cannot be used in the main series circuit.

[0018] Step S2: The main controller (BMS) responds to the identified target battery cell. It generates and executes a soft power reduction command to adjust the loop current of the cascaded battery pack to a safe switching range. It locks the current output voltage target and freezes the balancing and reconfiguration actions of other non-target three-switch units. In this embodiment of the invention, the main controller (BMS) responds to the identified target battery cell. It generates and executes a soft power reduction command to adjust the loop current of the cascaded battery pack to a safe switching range. It locks the current output voltage target and freezes the balancing and reconfiguration actions of other non-target three-switch units. The main controller (BMS) acquires the current loop current data. And read the safe switching current threshold from the preset parameter storage area. , The calculation formula is: ,in This refers to the nominal capacity of the cascaded battery pack. To ensure safe switching of the scaling factor, The value is Ensure that the loop current is limited to 0.05. and below. Main controller (BMS) compares loop current data. With safety switching current threshold ,like Greater than Then a current reduction request is generated, with a target current value. Set as Ninety percent. The main controller (BMS) supplies power to the power switching devices connected to the input or output terminals of the cascaded battery pack. and Send a soft power reduction command to linearly reduce the loop current by gradually decreasing the pulse width of the gate drive signal until the loop current data is reached. Achieve target current value Once the loop current reaches the target current value, the main controller (BMS) locks the total output voltage of the cascaded battery pack at the current moment. As the output voltage target, a freeze command is sent to all non-target three-switch units to suspend their equalization and topology reconfiguration control actions, ensuring topology stability during switching.

[0019] Step S3: After executing the soft power reduction command, the main controller (BMS) generates a bypass control signal and applies it to the target three-switch unit. The bypass control signal is used to turn off... and And conduct This allows the circuit current to bypass the target battery cell. To achieve the target battery cell The bypass of the main series circuit inside the cascaded battery pack; In this embodiment of the invention, after executing the soft power reduction command, the main controller (BMS) generates a bypass control signal and applies it to the target three-switch unit. The bypass control signal is used to turn off... and And conduct This allows the circuit current to bypass the target cell. To achieve the target battery cell Bypass to the main series circuit within the cascaded battery pack. The main controller (BMS) extracts the current voltage reference from the output voltage target and bases it on the target cell. The target three-switch unit is located in which a switching action sequence is generated for the target three-switch unit. This sequence includes first turning off... and 100 microseconds delay before reconnection The timing sequence. The main controller (BMS) converts the switching action sequence into gate drive level signals, which are then output to the isolation driver chip via the general purpose input / output ports. , , The gate. After the main controller (BMS) sends a gate drive level signal, it monitors the voltage difference across the target three-switch unit. When the voltage difference drops to within a preset threshold close to zero, the target cell is confirmed. The target cell has been successfully bypassed, and a success confirmation signal has been generated. The main controller (BMS) updates the system topology status register based on the success confirmation signal, and then... The status is marked as bypassed, and the number of effective series cells in the cascaded battery pack is reduced by one.

[0020] Step S4: The main controller (BMS) completes the selection of the target battery cell. After bypassing, the operating parameter set of the cascaded battery pack is recalculated and updated based on the remaining number of available battery cells. The operating parameter set includes at least the effective number of series connections, the upper limit of voltage output, and the lower limit of voltage output. Based on the operating parameter set, the various protection parameters are updated again to generate a set of redundant operating configuration parameters suitable for low-cell operating conditions. In this embodiment of the invention, the main controller (BMS) completes the target cell... After bypassing, the operating parameter set of the cascaded battery pack is recalculated and updated based on the remaining available cell count. This operating parameter set includes at least the effective number of cells connected in series, the upper voltage output limit, and the lower voltage output limit. The main controller (BMS) reads the total number of cells currently marked as bypassed from the system topology status register and compares it with the total number of cells in the cascaded battery pack. Subtraction yields the effective number of series-connected cells. Based on the number of effective series-connected cells Combining the current state of charge (SOC) and open-circuit voltage (OCV) curves of each non-target cell (in this example, all non-target cells are of the same model and have identical OCV curves), the new maximum usable system voltage is calculated. and the new system's minimum available voltage ,in This represents the open-circuit voltage of the battery cell when it is fully charged. This represents the open-circuit voltage of the battery cell when it is in the discharged off-state. Based on the system's highest available voltage. and the system's minimum available voltage A series of protection parameters, including the maximum allowable total charging voltage, are recalculated based on the preset safety margin coefficient. Maximum permissible total discharge voltage Limit protection voltage , Current limiting protection value and power limiting value The main controller (BMS) will effectively connect the number of battery cells in series. The system's highest available voltage Minimum available voltage of the system All recalculated protection parameters are packaged into redundant operating configuration parameters and written to the operating parameter storage area, replacing the original configuration parameters.

[0021] Step S5: The main controller (BMS) controls the cascaded battery pack to enter a redundant operation mode based on the redundant operation configuration parameters. In this mode, the battery pack continuously supplies power and increases the sampling and monitoring frequency of the remaining non-target three-switch units, while simultaneously recording the target cell. Fault logs; In this embodiment of the invention, the main controller (BMS) acquires redundant operation configuration parameters and determines the number of effective series-connected cells. The reference commands for output voltage and current are adjusted to match load requirements. The main controller (BMS) shortens the sampling period from 5ms in the first cycle to 1ms in the second cycle for the remaining voltage data of non-target cells. and temperature data High-frequency data acquisition is performed. Based on the acquired data, the input parameters for fault comparison are dynamically adjusted, including dynamic scaling of the differential pressure surge threshold and dynamic updating of the internal resistance abnormal increase threshold, to improve the early warning sensitivity for potential faults in remaining non-target cells. The main controller (BMS) records the target cell corresponding to this fault event. Relevant information, including target battery cells The target three-switch unit, the time of the fault occurrence, the duration of the fault, and the original fault data that caused the fault, including the overvoltage peak value, the undervoltage valley value, the overtemperature peak value, and the internal resistance mutation rate, are stored in the fault log storage area in the non-volatile memory.

[0022] Step S6: In the redundant continuation mode, the main controller (BMS) continues to monitor the bypassed target battery cell. The parameters are assessed for recovery status, categorized according to fault type, and recovery judgment conditions are set. When the recovery judgment conditions are met, a reverse recovery control signal is generated to restore the target cell. Reconnect the main series circuit.

[0023] In this embodiment of the invention, the main controller (BMS) bypasses the target battery cell. Then, the target cell is continuously monitored in a second cycle of 1ms. Voltage recovery data and temperature recovery data The main controller (BMS) compares the original fault data with a preset fault type database. If the original fault data falls under the category of instantaneous overvoltage or brief overtemperature, the target cell will be... This is classified as a recoverable fault. For recoverable faults, the main controller (BMS) calculates the recovery voltage threshold based on the overvoltage peak or overtemperature peak. and recovery temperature threshold , , ,in and This is the hysteresis coefficient dynamically calculated based on the deviation. The main controller (BMS) continuously compares the voltage recovery data and temperature recovery data with the recovery judgment conditions. Less than and Less than The state continues to reach a stable time window Then, a recovery enable signal is generated. In response to the recovery enable signal, the main controller (BMS) generates a reverse recovery control signal, first shutting down... After a dead time delay, conduct simultaneously and Target cell The main series circuit is re-engaged. After issuing the gate drive level signal, the main controller (BMS) monitors the cells that are re-engaged in the main circuit. If the voltage change rate and current surge are both within the preset safety range, the system topology status register is updated, and the target cell is... The system's status changes from bypassed to online, the sampling period returns to the first period of 5ms, and the system exits the redundant continuation mode and returns to the normal operation mode.

[0024] Furthermore, refer to Figure 4 , Figure 4 for Figure 3 A detailed flowchart illustrating the implementation steps of step S1 in this embodiment. Step S1 in this embodiment includes the following steps: Step S11: The main controller (BMS) collects data on the battery cells in each of the three-switch units in a first cycle of 5ms. Voltage data and temperature data Simultaneously, the loop current data of the cascaded battery pack is collected. ; In this embodiment of the invention, the main controller (BMS) uses an embedded microcontroller as its core processing unit, and achieves synchronous acquisition of analog signals through an internally integrated multi-channel analog-to-digital converter. Voltage data. The data is collected through the cells in each of the three-switch units. A resistor divider network connected in parallel between the positive and negative terminals is used to implement the voltage divider. The voltage signal after voltage division is filtered by an RC low-pass filter to remove high-frequency noise before being sent to the corresponding channel of the analog-to-digital converter. Temperature data The data is collected by attaching it to the battery cell. This is achieved using a surface-mount negative temperature coefficient thermistor. The thermistor's resistance changes with temperature. After being excited by a constant current source, the voltage drop across its terminals is measured, and after analog-to-digital conversion, it is converted into a temperature value by a lookup program inside the main controller (BMS). Loop current data. Data acquisition is achieved through a Hall effect current sensor connected in series in the main circuit. This sensor outputs a voltage signal proportional to the circuit current, which is isolated by an isolation amplifier before being sent to the analog-to-digital converter (ADC). The main controller (BMS) generates an interrupt every 5ms using an internal timer. Each interrupt trigger sequentially selects the ADC for each channel, completing the sampling of voltage, temperature, and circuit current for all cells. After sampling, the BMS temporarily stores the raw ADC results in a circular buffer within its internal random access memory for later use.

[0025] Step S12: The main controller (BMS) determines the voltage data based on the voltage data. The temperature data and the loop current data Estimate the value of each of the said cells internal resistance estimate ; In this embodiment of the invention, the internal resistance estimation is based on the Thevenin equivalent circuit model of the battery cell, which simplifies the battery cell as an ideal voltage source connected in series with an internal resistance. The internal resistance estimation value is calculated during the battery cell's charging and discharging dynamic process. The main controller (BMS) extracts voltage data and loop current data at two consecutive sampling times from the circular buffer. The first sampling time... The voltage value is The loop current value is Second sampling time The voltage value is The loop current value is The time interval between the two sampling times is 5ms. Estimated internal resistance value. The calculation formula is This formula, based on Ohm's law, divides the voltage change by the current change to obtain the internal resistance value. When the denominator... When the absolute value of the current change is less than the preset minimum threshold, the current change is considered too small to accurately calculate the internal resistance. In this case, the calculation is skipped, and the previous effective internal resistance estimate is used. Temperature data This is used to perform temperature compensation correction on the estimated internal resistance value. The main controller BMS internally stores a table of correction coefficients for cell internal resistance changes with temperature, based on the current temperature. The correction factor is obtained by looking up the table. Corrected internal resistance estimate The estimated internal resistance values ​​of all battery cells are organized into a one-dimensional array and stored in the internal data memory of the main controller (BMS), with the array index corresponding one-to-one with the cell number.

[0026] Step S13: The main controller (BMS) transmits the voltage data. The temperature data and the estimated internal resistance value Each fault is compared with a preset fault threshold. When any of the following faults is detected to exceed the corresponding fault threshold: single cell overvoltage, single cell undervoltage, single cell overtemperature, sudden change in differential pressure, or abnormal increase in internal resistance, a fault flag bit is generated. In this embodiment of the invention, the fault threshold preset by the main controller BMS includes a single-unit overvoltage threshold. Individual undervoltage threshold Single-unit temperature too high threshold Pressure differential change threshold and threshold for abnormal increase in internal resistance These thresholds are pre-calculated based on the cell's specifications and safety requirements and programmed into the read-only memory of the main controller (BMS). The main controller (BMS) iterates through all cells, processing each cell... Execute five comparison logic steps. Individual unit overvoltage comparison: If... Greater than Then an overvoltage fault flag will be generated. Individual undervoltage comparison: If Less than Then an undervoltage fault flag will be generated. Comparison of monomers with excessively high temperatures: If Greater than Then an over-temperature fault flag will be generated. Voltage drop abrupt change comparison: Calculate the current voltage. Voltage compared to the previous sampling period The absolute value of the difference ,like Greater than Then a differential pressure change fault flag will be generated. Comparison of abnormally increased internal resistance: The current estimated internal resistance value is compared... With respect to the initial internal resistance of the battery cell If a comparison is made, Greater than Multiply by a preset multiplier. Then an internal resistance abnormality fault flag bit is generated. The five fault flags are combined into a single comprehensive fault flag by a bitwise OR operation. The combined fault flag bits of all battery cells form a string of length [length missing]. The bit array is stored in the internal registers of the main controller BMS.

[0027] Step S14: The main controller (BMS) locates the cell that generated the fault flag bit based on the fault flag bit, and identifies it as the target cell. Simultaneously record the target battery cell The target three-switch unit is located and the target battery cell is marked. The main series circuit described above cannot be used.

[0028] In this embodiment of the invention, the main controller (BMS) traverses the generated comprehensive fault flag array and retrieves all... The cell number is 1. If multiple cells are found to have fault flags simultaneously, they are processed sequentially in ascending order of their cell numbers. The first faulty cell found is recorded as 1. The target battery cell was identified. Target battery cell The three-switch unit in question is the first one. A three-switch unit, the three power switching devices of which are , , The main controller (BMS) will target the battery cell. number Write the faulty cell record register, and simultaneously write the corresponding three-switch unit number to the target cell record register. Mark the target cell. Operations that prevent the battery from being connected to the main series circuit are implemented by modifying the cell status register. Each cell in the cell status register corresponds to a status bit; a status bit of 1 indicates that the cell is available, and a status bit of 0 indicates that the cell is unavailable. The main controller (BMS) will then... The status bit is cleared from 1 to 0, indicating that the cell has been marked as unsuitable for use in the main series circuit. Simultaneously, the main controller (BMS) increments the total number of faulty cells by 1, updating the number of valid cells in series in the system. The serial number, fault type, fault occurrence time, and marking status of all faulty cells are organized into a fault log record and stored in non-volatile memory for subsequent maintenance queries.

[0029] Furthermore, the generation and execution of the soft power reduction command in step S2 includes: The main controller (BMS) acquires the current loop current data. And read the safe switching current threshold from the preset parameter storage area. Wherein, the safe switching current threshold Specifically, the nominal capacity of the cascaded battery pack is obtained through the main controller (BMS). and the nominal capacity Multiply by the preset safety switching factor The safe switching current threshold is obtained. The safety switching ratio coefficient This ensures that the loop current of the cascaded battery pack during fault cell bypass switching is limited to a certain value per unit time. Within the safe switching range below, avoid damage to the power switching devices and the remaining non-target cells caused by arcing or voltage surges due to high current switching; In this embodiment of the invention, the main controller (BMS) acquires the current loop current data. And read the safe switching current threshold from the preset parameter storage area. The safe switching current threshold The specific calculation process is as follows: The main controller (BMS) reads the nominal capacity of the cascaded battery pack from its internal read-only memory. The nominal capacity This refers to the rated ampere-hours (Ahs) of the battery pack as specified at the factory. The main controller (BMS) simultaneously reads the preset safety switching rate coefficient. The coefficient The value range is a dimensionless value less than or equal to 0.05. The specific value is determined during the battery pack design phase based on the maximum safe shutdown current of the power switching devices and the short-circuit withstand capability of the cells, and is burned into the read-only memory. Due to the nominal capacity... The unit is ampere-hour, while the safe switching current threshold... The unit must be amperes, and a time conversion factor needs to be introduced into the calculation. The nominal capacity... Divide by the number of seconds corresponding to one hour (3600 seconds) to obtain the reference current value in amperes per second. Safe switching current threshold The calculation formula is After simplification For example, when the nominal capacity When the value is 100 amp-hours (i.e., 100 Ah), the safety switching factor k is taken as 0.05. The unit is amperes. This threshold ensures that the loop current of the cascaded battery pack is limited to 0.05 amperes per unit time during fault cell bypass switching. Within the safe switching range below, avoid damage to power switching devices and remaining non-target cells caused by arcing or voltage surges due to high-current switching. The main controller (BMS) will calculate the... Write to a temporary register for use by subsequent comparison logic.

[0030] The main controller (BMS) compares the loop current data. With the safety switching current threshold If the former is greater than the latter, a current reduction request is generated. The current reduction request includes a target current value, which is less than or equal to the safe switching current threshold. ; In this embodiment of the invention, the main controller (BMS) compares the loop current data. With safety switching current threshold If the former is greater than the latter, a current reduction request is generated. The current reduction request includes a target current value, which is less than or equal to the safe switching current threshold. The main controller (BMS) reads the current loop current data from the latest sampling results of the analog-to-digital converter. At the same time, the safe switching current threshold is read from the temporary register. The comparison logic is executed by the numerical comparator inside the main controller (BMS), which will... and Perform a size comparison. If Greater than If the circuit current exceeds the safe switching allowable range, a current reduction operation is required. The main controller (BMS) then generates a current reduction request, which is stored in an internal register as a data structure containing a request identifier field and a target current value field. The setting method is to take the safe switching current threshold. Ninety percent, that is Ensure the target current is strictly less than Leave a control margin. If Less than or equal to If the current reduction request is not generated, the main controller (BMS) will directly jump to the subsequent steps to execute the voltage lockout and freeze commands.

[0031] In response to the current reduction request, the main controller (BMS) sends power to the power switching devices connected to the input or output terminals of the cascaded battery pack. and Send a soft power reduction command to linearly or stepwise reduce the loop current of the cascaded battery pack until the loop current data is reached. To achieve the target current value; In this embodiment of the invention, after the main controller BMS detects that the request identifier field of the current reduction request register is valid, it initiates the soft power reduction execution process. The soft power reduction command is sent through the general-purpose input / output port of the main controller BMS connected to the power switching device. and The gate drive circuit is implemented. For schemes using MOSFETs as power switching devices, soft power reduction linearly reduces the conduction level of the switching transistor by gradually decreasing the duty cycle of the gate drive signal or gradually increasing the gate series resistance, thereby limiting the current path. The main controller BMS internal timer generates an interrupt with a period of 100 microseconds. Each interrupt cycle reduces the pulse width of the gate drive signal by a fixed step value. Step value The total pulse width range and the desired current reduction time are jointly determined. At the end of each interrupt cycle, the main controller (BMS) reads the current loop current data. Compare it with the target current value Compare. If Still greater than Then continue to decrease the pulse width; if Less than or equal to If the pulse width decreases, the reduction stops, and the current pulse width value is locked. The entire current reduction process exhibits a linear decreasing trend, decreasing from the initial current value to... The total time is controlled within 50 milliseconds to ensure that the current change rate is within the safe tolerance range of the power switching devices and the battery cell. When the loop current data... Achieve target current value At this time, the main controller BMS will set the soft power reduction completion flag.

[0032] The main controller (BMS) in the loop current data Once the target current value is reached, the total output voltage value of the cascaded battery pack at the current moment is locked as the current output voltage target, and a freeze command is sent to all non-target three-switch units to suspend their equalization and topology reconfiguration control actions.

[0033] In this embodiment of the invention, after the main controller BMS detects that the soft power reduction completion flag is set, it immediately performs a voltage lockout operation. Voltage lockout is achieved by acquiring the voltage value at the total output terminal of the cascaded battery pack through an analog-to-digital converter within the main controller BMS. This voltage value is obtained by summing the voltages of all available cells connected in series. Write to output voltage target register The value of this register remains constant during subsequent bypass switching, unaffected by instantaneous changes in the cell state, to prevent sudden voltage jumps during switching that could cause load malfunctions. The freeze command is broadcast via the BMS communication bus to all non-target three-switch units, containing an opcode field and a unit address field. The opcode is the hexadecimal code corresponding to the freeze operation, and the unit address is set to the broadcast address to apply to all units simultaneously. Upon receiving the freeze command, the BMS of a non-target three-switch unit immediately pauses the ongoing equalization control algorithm and topology reconfiguration algorithm, locking the states of the equalization and reconfiguration switches at the current moment and ceasing all switching actions. Simultaneously, the non-target three-switch unit returns a response frame to the BMS, confirming the freeze operation is complete. After receiving response frames from all non-target three-switch units, the BMS sets the freeze completion flag, signifying the completion of the soft power reduction and system freeze phases, allowing it to proceed to the next step of bypassing the faulty cell.

[0034] Furthermore, the realization of the target battery cell described in step S3... The bypass to the main series circuit within the cascaded battery pack includes: The main controller (BMS) extracts the current voltage reference from the output voltage target and, based on the target cell... The target three-switch unit is configured to generate a switching action sequence for the target three-switch unit, the switching action sequence including turning off the power switching device. Turn off power switching devices and conduction power switching devices The time sequence; In this embodiment of the invention, the main controller (BMS) retrieves the locked output voltage target register. The current voltage reference value is read, which serves as a reference for maintaining output stability during bypass switching. The target three-switch unit number... It has been recorded in the target unit's record register. The generation of the switching action sequence is based on the working principle of the three-switch unit: when and When simultaneously turned off, the battery cell Both the positive and negative connections to the main series circuit were disconnected, and the battery cell... Disconnect from the current path; when When the circuit is turned on, the input and output terminals of the target three-switch unit are connected through... The drain-source channel is directly short-circuited, allowing the current to bypass the cell. The flow continues to the next stage. The timing design of the switching action sequence is to first turn off. and Reconnect The time interval between the three is controlled by the internal timer of the main controller (BMS). Shutdown and The actions are executed simultaneously, with a 100-microsecond delay before activation. Actions to ensure that Before conduction and It has been completely shut down to prevent [the occurrence of] [the problem]. and or and Simultaneous conduction leads to a shoot-through short circuit. The main controller (BMS) stores the generated switching action sequence in an internal register as three Boolean variables, each corresponding to a different action. , , The switch state is as follows: off corresponds to logic 0, and on corresponds to logic 1.

[0035] The main controller (BMS) converts the switching action sequence into gate drive level signals and outputs them to the three power switching devices of the target three-switch unit. , , The gate; In this embodiment of the invention, the general-purpose input / output ports of the main controller BMS are connected to the gate of each power switching device through an isolation driver chip. The isolation driver chip provides electrical isolation and current amplification functions, ensuring that the low-voltage logic signals of the main controller BMS can reliably drive the gates of the power switching devices. The conversion process is as follows: The main controller BMS reads from its internal registers... , , The switch state Boolean value is used for each power switch device. If the switch state is logic 0 (off), the main controller BMS outputs a low level from the corresponding general-purpose input / output port. This low level is converted into a negative or zero voltage and applied to the gate after passing through the isolation driver chip, keeping the power switch device in the off state. If the switch state is logic 1 (on), the main controller BMS outputs a high level from the corresponding general-purpose input / output port. This high level is converted into a positive voltage and applied to the gate after passing through the isolation driver chip, keeping the power switch device in the saturated on state. The output of the three gate drive level signals is strictly executed according to the set timing sequence, with the main controller BMS internal timer triggering first. and The corresponding port outputs a low level simultaneously, triggering after a 100-microsecond delay. The corresponding port outputs a high level. After each output level switch, the main controller (BMS) confirms that the gate drive level has been correctly established by reading the status feedback pin of the isolation driver chip. If the feedback signal does not match the expectation, a hardware fault interrupt is triggered.

[0036] After issuing the gate drive level signal, the main controller (BMS) monitors the voltage difference across the target three-switch unit. When the voltage difference drops to within a preset threshold close to zero, the target cell is confirmed. It has been successfully bypassed, and a confirmation signal has been generated; In this embodiment of the invention, the voltage difference across the target three-switch unit refers to the potential difference between the input and output terminals of the unit. Before the bypass is successful, this voltage difference is equal to the potential difference between the battery cells. The terminal voltage; after successful bypass, due to With the input and output terminals short-circuited, the voltage difference should drop to near zero. The main controller (BMS) monitors this voltage difference in real time via a differential voltage sampling circuit connected between the input and output terminals of the target three-switch unit. The output of the differential voltage sampling circuit is converted into a digital value by an analog-to-digital converter and then sent to the main controller (BMS). The main controller (BMS) continuously reads this voltage difference value at a period of 10 microseconds. and compare it with the preset bypass confirmation threshold. Comparison, The value is usually one percent of the rated voltage of the battery cell. For example, when the rated voltage of the battery cell is 3.6 volts, Take 36 millivolts. When three consecutive readings are taken... All less than At that time, the target battery cell was determined. The bypass has been successfully completed. The main controller (BMS) then generates a success confirmation signal, which is a set flag stored in the internal status register. If no confirmation signal is detected after a preset timeout period, such as 5 milliseconds, after the gate drive level signal has been issued, the system will automatically bypass the gate drive signal. Down to If the bypass fails, the main controller (BMS) will generate a bypass failure alarm and restore all power switching devices to their initial safe state.

[0037] Based on the successful confirmation signal, the main controller (BMS) updates the system topology status register and sets the target battery cell... The status is marked as bypassed, and the number of effective series cells in the cascaded battery pack is reduced by one.

[0038] In this embodiment of the invention, after the main controller (BMS) detects that the generated confirmation success flag has been set, it performs a system topology status update operation. The system topology status register is a bit array, where each bit corresponds to the current topology status of a battery cell. A status value of 0 indicates that the battery cell is in the series main circuit, and a status value of 1 indicates that the battery cell has been bypassed and removed from the series main circuit. Each status bit is changed from 0 to 1, completing the target cell process. The status flag. Simultaneously, the main controller (BMS) reads the current number of valid series-connected cells from its internal registers. Subtract one from its value and write it back, that is The updated version This reflects the total number of cells actually involved in series connection after the bypass operation is completed. The main controller (BMS) also records relevant information about the bypass operation in the fault log, including the target cell number. The system updates include the bypass operation timestamp, the voltage difference change curve before and after bypass, and the generation time of the confirmation signal. After completing the above updates, the main controller (BMS) clears the set freeze completion flag and the generated confirmation success flag, preparing to enter the redundancy continuation mode. The updated values ​​of the system topology status register and the number of effective series cells provide the basic data for recalculating the available system outputs and protection parameters in subsequent steps.

[0039] Furthermore, step S4 includes the following steps: The main controller (BMS) reads the total number of cells currently marked as bypassed from the system topology status register and compares it with the total number of cells in the cascaded battery pack. Subtracting the two numbers yields the effective number of cells connected in series. ; In this embodiment of the invention, the main controller (BMS) reads the total number of cells currently marked as bypassed from the system topology status register and compares it with the total number of cells in the cascaded battery pack. Subtracting the two numbers yields the effective number of cells connected in series. The system topology status register is a bit array, where each bit corresponds to the topology status of a battery cell. A status bit of 1 indicates that the cell has been bypassed, while a status bit of 0 indicates that the cell is still in the series main circuit. The main controller (BMS) traverses this bit array, counting the bits with a status bit of 1 to obtain the total number of bypassed cells. Total number of cells in the cascaded battery pack This is a fixed value, read from read-only memory and stored in the system parameter register during system initialization. The formula for calculating the effective number of series-connected cells, m, is: The main controller (BMS) will calculate the... Write the number of valid series-connected cells to the register for use in subsequent steps.

[0040] Based on the number of effective series-connected cells By combining the current state of charge (SOC) and open-circuit voltage (OCV) curves of each non-target cell, a new maximum available system voltage is calculated. and a new system minimum available voltage ;in, ; In the formula, To bypass and remove the target cell that has failed. The remaining usable cell set has the number of elements equal to the number of effective series-connected cells. , For the first The open-circuit voltage value corresponding to a non-target cell when it is fully charged (SOC equals 100%). For the first The open-circuit voltage value corresponding to the non-target cell in the discharge cut-off state, i.e., when the SOC is equal to 0% or the corresponding minimum allowable discharge SOC. and The first The highest and lowest open-circuit voltages of each non-target cell are obtained by looking up their open-circuit voltage (OCV) curves in a table; if all non-target cells are of the same model and have the same OCV curve, then the process is simplified to... , ; In this embodiment of the invention, based on the effective number of series-connected cells By combining the current state of charge (SOC) and open-circuit voltage (OCV) curves of each non-target cell, a new maximum available system voltage is calculated. and a new system minimum available voltage The main controller (BMS) identifies all cells with a status bit of 0 from the system topology status register and groups these cell numbers into a set of usable cells. The number of elements in this set is equal to the number of effective series-connected battery cells. For each cell in the available cell set The main controller (BMS) reads the open-circuit voltage value of the cell when the state of charge (SOC) is 100% from its internally stored OCV curve lookup table. And the open-circuit voltage value corresponding to the discharge cutoff state when the SOC is equal to 0% or the corresponding minimum allowable discharge SOC. The system's highest available voltage The calculation formula is ,in For the first The highest open-circuit voltage of each non-target cell is obtained by looking up its open-circuit voltage (OCV) curve in a table. The minimum usable voltage of the system. The calculation formula is ,in For the first The lowest open-circuit voltage of each non-target cell is obtained by looking up its open-circuit voltage (OCV) curve in a table. When all non-target cells are of the same model and have identical OCV curves... All equal to That is, the open-circuit voltage value corresponding to all non-target cells under full charge. All are equal. All equal to That is, the open-circuit voltage value corresponding to all non-target cells in the discharge cut-off state or at the corresponding minimum allowable discharge SOC. They are all equal, and the calculation formula simplifies to: , The main controller (BMS) will calculate the... and Write to the system's highest available voltage register and the system's lowest available voltage register respectively.

[0041] Based on the highest available voltage of the system and the lowest available voltage of the system A series of protection parameters are recalculated and set based on preset safety margin coefficients. These protection parameters include the maximum allowable total charging voltage, the maximum allowable total discharging voltage, the ultimate protection voltage, the current limiting protection value, and the power limiting value. The preset safety margin coefficients include charging, discharging, overvoltage, and undervoltage safety margin coefficients. The maximum allowable total charging voltage... Maximum permissible total discharge voltage Limit protection voltage , Current limiting protection value Power limiting value ,in For charging safety margin coefficient, This is the discharge safety margin factor. This is the overvoltage limit protection voltage. This is the undervoltage limit protection voltage. This is the overvoltage safety margin factor. This is the undervoltage safety margin factor. The rated discharge current of the cascaded battery pack is... Based on the highest available voltage of the system With rated voltage The current limiting coefficient obtained by ratio correction ,in The preset current limiting factor is... This is a system efficiency correction factor; In this embodiment of the invention, the preset safety margin coefficient includes a charging safety margin coefficient. Discharge safety margin factor Overvoltage safety margin factor Undervoltage safety margin factor It also presets and calibrates the current limiting factor. and system efficiency correction coefficient These coefficients are pre-calibrated according to battery type and application scenario and stored in read-only memory. The specific calibration process for these coefficients is as follows: During the battery pack design finalization stage, at least 100 battery cell samples of the same batch and model are selected. In a constant temperature chamber, the temperature is set to five points: -20℃, 0℃, 25℃, 45℃, and 60℃. At each temperature point, a complete charge-discharge cycle test is performed on the battery cell using a charge-discharge test cabinet at a rate not exceeding 0.05C (e.g., for a nominal capacity of 100Ah, the charging or discharging current should not exceed 5A). The charging termination voltage, discharging termination voltage, internal resistance, and capacity data of the battery cell at each temperature point are recorded. Using a rate not exceeding 0.05C is to eliminate the influence of polarization voltage on threshold calibration, making the obtained voltage boundary close to the actual open-circuit state of the battery cell. Charging safety margin coefficient. The calibration is based on the negative temperature coefficient characteristic of the cell's charging termination voltage at low temperatures. The temperature drift ratio is obtained by dividing the difference between the measured charging termination voltage at -20℃ and the measured charging termination voltage at 25℃ by the charging termination voltage at 25℃. This ratio is then multiplied by a safety amplification factor of 1.2 (this value is determined by engineering experience and is used to reserve an additional 20% voltage margin on top of the temperature drift to prevent misjudgment of overvoltage due to temperature control errors or localized overcooling). The calibration value. Discharge safety margin factor. The calibration is based on the positive temperature coefficient characteristic of the cell's discharge termination voltage at high temperatures. The temperature drift ratio is obtained by dividing the difference between the measured discharge termination voltage at 60℃ and the measured discharge termination voltage at 25℃ by the discharge termination voltage at 25℃. This ratio is then multiplied by a safety amplification factor of 1.2 (also reserving a 20% margin to prevent premature undervoltage tripping due to localized overheating or sudden load increases). The calibration value. Overpressure safety margin factor. The calibration is based on cell overvoltage tolerance tests. A voltage is applied to the cell in increments of 0.1 volts, starting from the charging termination voltage, and held for 10 seconds at each voltage point. The critical overvoltage value at which irreversible capacity decay or internal short circuit occurs is recorded. The difference between the critical overvoltage value and the charging termination voltage is divided by the charging termination voltage to obtain the overvoltage tolerance margin ratio. This ratio is then multiplied by a derating factor of 0.8 (this value is determined by safety specifications; the experimentally measured critical overvoltage margin is used at 80% to avoid excessively approaching the cell's physical limits), resulting in the final value. The calibration value. Undervoltage safety margin factor. The calibration is based on a cell undervoltage tolerance test. A voltage is applied to the cell, decreasing in 0.1-volt increments from the discharge termination voltage, held for 10 seconds at each voltage point. The critical undervoltage value at which irreversible capacity decay or internal short circuit occurs is recorded. The difference between the discharge termination voltage and the critical undervoltage value is divided by the discharge termination voltage to obtain the undervoltage tolerance margin ratio. This ratio is then multiplied by a derating factor of 0.8 (again, the experimental critical margin is discounted by 80% to leave a safety margin), resulting in the final value. The calibration value. Current limiting factor. The calibration is based on the ratio of the maximum continuous drain current of the power switching device to the maximum continuous discharge current of the battery cell. The smaller of the two values ​​is divided by the rated discharge current, and then multiplied by a derating factor of 0.9 (to prevent temperature rise failure caused by long-term operation near the switching transistor's limiting current). The calibration value. System efficiency correction coefficient. The calibration is obtained by measuring the ratio of the actual output power to the theoretical output power of the cascaded battery pack under rated load. Discharge is performed at 25°C at a rate not exceeding 0.05C. The actual power at the total output terminal of the battery pack is measured using a power analyzer. Simultaneously, the theoretical power is calculated based on the voltage of each cell and the circuit current. The actual power is then divided by the theoretical power to obtain the final output power. The calibration values. After all calibrations are completed, , , , , , A total of six coefficients were programmed into the read-only memory (ROM) of the main controller (BMS) in floating-point format. Each coefficient occupied 4 bytes. After programming, a readback verification was performed to ensure data integrity. The main controller (BMS) reads the rated discharge current of the cascaded battery pack from the ROM. and rated voltage And based on the system's highest available voltage and the system's minimum available voltage Calculate the maximum allowable total charging voltage Maximum permissible total discharge voltage Overvoltage limit protection voltage Undervoltage limit protection voltage Current limiting coefficient Current limiting protection value Power limiting value The main controller (BMS) will calculate the... , , , , and Write the corresponding protection parameter registers to replace the old values.

[0042] The number of effective series-connected cells The system's highest available voltage The minimum usable voltage of the system All the recalculated protection parameters are packaged into the redundant operation configuration parameters and written to the operation parameter storage area, replacing the original configuration parameters.

[0043] In this embodiment of the invention, the main controller (BMS) allocates a contiguous storage area as a storage area for operating parameters, which is located in non-volatile memory. The packing operation is executed sequentially according to a predefined data structure, which includes the following fields: number of valid series-connected cells. Occupies 2 bytes, highest available system voltage Occupies 2 bytes, minimum available voltage for the system Occupies 2 bytes, maximum allowed total charging voltage Occupies 2 bytes, maximum allowable total discharge voltage Occupies 2 bytes, overvoltage limit protection voltage Occupies 2 bytes, undervoltage limit protection voltage Occupies 2 bytes, rate limiting protection value Occupies 2 bytes, power limit value Each field occupies 2 bytes. The main controller (BMS) writes the above fields sequentially to the starting address of the operating parameter storage area. After each field is written, a readback verification is performed immediately to ensure that the written value matches the original value. After writing is complete, the main controller (BMS) updates the checksum field in the operating parameter storage area to the sum of all field values ​​for integrity verification during subsequent reads. The original configuration parameters are completely overwritten, and subsequent charging / discharging control, protection logic, and power scheduling of the system are all executed based on the newly written parameters.

[0044] Furthermore, step S5 includes the following steps: The main controller (BMS) acquires the redundant operation configuration parameters and determines the number of effective series-connected cells accordingly. Adjust the reference commands for the output voltage and current to match the load requirements. In this embodiment of the invention, the main controller (BMS) reads the written redundant operating configuration parameters from the operating parameter storage area and extracts the effective number of series-connected cells from them. The system's highest available voltage and the system's minimum available voltage Load demand matching is achieved by adjusting the voltage reference command. and current reference command Implementation. Voltage reference command. The setting is based on the system's highest available voltage. Upper limit, minimum available voltage of the system The lower limit is based on the current power required by the load device. Calculations show that ,in This is the load equivalent resistance, obtained by the load device through feedback via the communication bus or by the main controller (BMS) in real time based on the current output voltage and current. Current reference command. The setting is based on the calculated current limiting protection value. As the upper limit, according to and Calculations show that The main controller (BMS) will and Write the data into the corresponding output register of the digital-to-analog converter. The digital-to-analog converter then converts the data into an analog voltage signal and sends it to the DC-DC converter or load management unit at the output of the cascaded battery pack to control the actual output voltage and current to follow the reference command.

[0045] The main controller (BMS) controls the cascaded battery pack to enter the redundant continuation mode based on the reference instructions, shortening the first cycle of 5ms to the second cycle of 1ms to process the voltage data of the remaining non-target cells. and the temperature data Perform high-frequency data acquisition; In this embodiment of the invention, after the main controller (BMS) detects that the system topology status register has been updated and the redundant operation configuration parameters have taken effect, it switches the system operation mode register from normal operation mode to redundant continuation mode. After the mode switch, the main controller (BMS) immediately adjusts the period register value of its internal timer, changing the sampling trigger period of the analog-to-digital converter (ADC) from 5ms to 1ms. The timer generates an interrupt with a period of 1ms. Each time an interrupt is triggered, the main controller (BMS) sequentially selects the ADC channels corresponding to all non-target cells to complete the voltage data processing. and temperature data Data collection. For target cells that have been bypassed. The corresponding analog-to-digital conversion channel is disabled and no longer participates in data acquisition to reduce the sampling cycle and lower the processing burden on the main controller (BMS). The acquired data is stored in an internal random access memory (RAM) in the form of a circular buffer with a depth of 100 groups, storing historical data from the most recent 100ms for fault comparison and trend analysis. High-frequency acquisition enables the main controller (BMS) to detect subtle changes in cell voltage and temperature within a shorter time window, improving its ability to detect potential faults.

[0046] The input parameters for fault comparison are dynamically adjusted based on the high-frequency collected data to improve the early warning sensitivity for potential faults in the remaining non-target cells. In this embodiment of the invention, the main controller (BMS) reads the voltage data acquired in the most recent 1ms from the circular buffer. and temperature data The value is compared with the preset fault threshold. Dynamic adjustment is reflected in two aspects. The first aspect is the differential pressure change threshold. Dynamic scaling is achieved by the main controller (BMS) calculating the standard deviation of voltage data over the most recent 10 sampling periods. Adjust the differential pressure change threshold to ,in This is the sensitivity adjustment coefficient. When voltage fluctuations are large, the threshold is increased accordingly to avoid false alarms caused by normal fluctuations; when voltage fluctuations are small, the threshold is decreased accordingly to improve the detection sensitivity to small abnormal changes. The second aspect is the threshold for abnormally increasing internal resistance. The dynamic update involves the main controller (BMS) calculating the average value of the estimated internal resistance of all non-target cells every 100ms. The threshold for abnormal increase in internal resistance is adjusted to ,in This is a dynamic multiplier. When cell aging causes a general increase in internal resistance, the threshold increases accordingly to avoid frequent false alarms caused by normal aging. The adjusted dynamic threshold is written to the comparison register of the fault comparison logic in real time, replacing the original static threshold.

[0047] Record the target battery cell corresponding to this fault event. The relevant information, including the target battery cell The fault log includes the target three-switch unit, the time of fault occurrence, the duration of fault, and the original fault data that caused the fault, including the overvoltage peak value, the undervoltage valley value, the overtemperature peak value, and the internal resistance mutation rate.

[0048] In this embodiment of the invention, the main controller (BMS) records the previously identified target battery cell for this fault event. number The target three-switch unit number and bypass operation timestamp are included. The fault duration is calculated by subtracting the time when the fault was first detected from the current system time, in milliseconds. Raw fault data is extracted based on historical data from the most recent 10 sampling periods before the fault flag was triggered. The overvoltage peak value is the value triggered by the overvoltage fault flag. The previous maximum voltage value and the undervoltage valley value trigger the undervoltage fault flag. The previous minimum voltage value and the over-temperature peak value triggered the over-temperature fault flag. The maximum value of the previous temperature data. The formula for calculating the internal resistance mutation rate is: Internal Resistance Mutation Rate. ,in To trigger the internal resistance abnormality fault flag bit Estimated internal resistance value at time, The average value of the estimated internal resistance over the previous 10 cycles is used to trigger the system. The main controller (BMS) organizes this information according to a predefined log structure format. The structure includes a 1-byte target cell number field, a 1-byte target three-switch unit number field, a 4-byte fault occurrence time field, a 2-byte fault duration internal resistance field, a 2-byte overvoltage peak field, a 2-byte undervoltage valley field, a 2-byte overtemperature peak field, and a 2-byte internal resistance mutation rate field. After organization, the main controller (BMS) writes this structure to the fault log storage area in non-volatile memory, at the address currently pointed to by the log pointer. After writing, the log pointer is moved forward by one structure length. If the fault log storage area is full, the oldest log record is overwritten. After writing, the main controller (BMS) updates the total number of log entries, making it available for querying and reading by the host computer or maintenance personnel through the communication interface.

[0049] Furthermore, step S6 includes the following steps: The main controller (BMS) bypasses the target battery cell. Subsequently, the target battery cell was continuously monitored. Voltage recovery data and temperature recovery data in the redundant continuation mode; In this embodiment of the invention, the target battery cell Although it has been bypassed and disconnected from the main series circuit, its positive and negative terminals are still connected. The short-circuit channel is isolated from the main circuit, and the cell body is in an open-circuit state. The main controller (BMS) is connected to the target cell. An independent voltage sampling channel between the positive and negative terminals continuously samples the open-circuit voltage across the battery cell at a frequency of 1ms in the second cycle. At the same time, by attaching it to the target battery cell Independent temperature sensors on the surface collect cell surface temperature at the same 1ms cycle. Voltage recovery data and temperature recovery data are stored separately in two dedicated circular buffers, each with a depth of 1000 groups, corresponding to 1 second of historical data. At the end of each sampling period, the main controller (BMS) stores the latest data... and Write to the head of the buffer and overwrite the oldest set of data to ensure that the complete recovery process record of the most recent second is always preserved.

[0050] Based on the original fault data, it is classified into recoverable faults or permanent faults, and the recovery judgment conditions are set based on the classification results. In this embodiment of the invention, the main controller (BMS) reads the target battery cell from the recorded fault log. The original fault data, including overvoltage peak values. Low voltage trough Peak temperature and internal resistance mutation rate The classification logic is based on a preset fault type determination rule table, which is stored in read-only memory. The determination rule is as follows: if only overvoltage peaks appear in the original fault data... Exceeding the overvoltage threshold However, the overvoltage protection voltage was not exceeded. And the peak temperature Temperature threshold not exceeded And internal resistance mutation rate If the voltage is less than 20%, it is classified as a recoverable overvoltage fault. If only undervoltage troughs occur... Below the undervoltage threshold However, it did not fall below the undervoltage protection limit voltage. And the peak temperature Temperature threshold not exceeded And internal resistance mutation rate If the voltage drop is less than 20%, it is classified as a recoverable undervoltage fault. If only a temperature peak occurs... Exceeding the temperature threshold However, it did not exceed the absolute maximum allowable temperature of the battery cell. And internal resistance mutation rate If the rate is less than 20%, it is classified as a recoverable over-temperature fault. If the internal resistance mutation rate in the original fault data... Greater than or equal to 20%, or peak overpressure Exceeding the overvoltage protection limit voltage or undervoltage trough value Below the undervoltage protection limit voltage or peak temperature Exceeding the absolute maximum allowable temperature of the battery cell If the fault is not clear, it is classified as a permanent fault. For recoverable faults, the recovery criterion is set to voltage recovery data. Falling back to the recovery voltage threshold The following is the temperature recovery data. Falling back to the recovery temperature threshold The following conditions must be met simultaneously for both voltage and temperature, and these conditions must remain stable for a period of time. , The value is 30 seconds. Recovery voltage threshold. and recovery temperature threshold The recovery is dynamically calculated based on the overvoltage or overtemperature peak values ​​in the original fault data. For permanent faults, the recovery criteria are set to never be met, meaning the main controller (BMS) will no longer attempt to recover the cell.

[0051] The voltage recovery data and the temperature recovery data are continuously compared with the recovery determination conditions. When the recovery determination conditions are met and the data remains stable for a period of time, a recovery enable signal is generated. In this embodiment of the invention, the main controller (BMS) reads the latest voltage recovery data from the circular buffer at the end of each sampling cycle. and temperature recovery data It is compared with the set recovery judgment conditions. The comparison logic includes three sub-conditions: Sub-condition one is... Less than the recovery voltage threshold Sub-condition two is Less than the recovery temperature threshold Sub-condition three requires that sub-conditions one and two be met simultaneously. When all three sub-conditions are satisfied, the main controller (BMS) starts a continuous stabilization timer, which increments in 1ms increments. During the timer incrementing process, the BMS continuously checks in each sampling period whether all three sub-conditions are still satisfied. If any sub-condition is not satisfied, the timer is immediately reset and restarted. The timer continues until the accumulated value reaches the set continuous stabilization duration. At 30 seconds, the main controller (BMS) determines that the recovery condition has been met and generates a recovery enable signal. This signal is a set flag stored in the internal status register. If the recovery condition is not met during redundant continuation mode operation, the recovery enable signal remains in an invalid state.

[0052] In response to the recovery enable signal, the main controller (BMS) generates a reverse recovery control signal, which is used to turn off the target three-switch unit. and reconnect and To deliver the target battery cell Reconnect the main series circuit.

[0053] In this embodiment of the invention, after the main controller (BMS) detects that the recovery enable flag is set, it immediately executes the reverse recovery control process. The generation of the reverse recovery control signal is the reverse of the switching action sequence, and its timing is designed to first turn off. Reconnect and The main controller's internal BMS timer is triggered first. The corresponding general purpose input / output port outputs a low level, making The gate drive voltage drops to zero or a negative voltage. The circuit is shut off, breaking the short circuit between the input and output terminals of the target three-switch unit. After a 100-microsecond delay, the main controller (BMS) is simultaneously triggered. and The corresponding general purpose input / output port outputs a high level, making and The gate drive voltage rises to a positive voltage. and Conduction, target cell The positive electrode passes through Connected to the output terminal of the upper-level unit, the negative terminal is through Connected to the input terminal of the next-level unit, the battery cell The target cell is reconnected to the main circuit. After issuing the reverse recovery control signal, the main controller (BMS) monitors the voltage difference across the target three-switch unit. When the voltage difference recovers to a normal range matching the sum of the voltages of adjacent cells, the recovery is confirmed as successful. The main controller (BMS) then updates the system topology status register, reconnecting the target cell... The corresponding status bit is changed back from 1 to 0, and the number of effective series-connected cells is changed. Increment by one. Simultaneously, the main controller (BMS) records the recovery event in the fault log, including the recovery timestamp and a recovery success flag. The sampling period is restored from 1ms in the second period to 5ms in the first period, and the system exits the redundancy continuation mode and returns to normal operation mode.

[0054] Furthermore, setting the recovery determination conditions based on the classification results includes: The original fault data is compared with a preset fault type database. If the original fault data falls under the category of instantaneous overvoltage or brief overtemperature, then the target cell is... Classified as a recoverable fault; In this embodiment of the invention, a preset fault type database is stored in a read-only memory. The database is organized in tabular form, with each row corresponding to a fault mode and including a fault type identifier field, a judgment condition field, and a recovery attribute field. The judgment condition for instantaneous overvoltage is the overvoltage peak value. greater than the overvoltage threshold But it is less than the overvoltage limit protection voltage. Furthermore, the overvoltage duration is less than 500 milliseconds, and the internal resistance mutation rate is... Less than 20%. The criterion for determining transient overtemperature is the peak overtemperature value. greater than the temperature threshold But below the absolute maximum allowable temperature of the battery cell. Furthermore, the overtemperature duration is less than 2 seconds, and the internal resistance mutation rate is... Less than 20%. The main controller (BMS) reads the target cell from the recorded fault log. The original fault data is compared field by field with each judgment condition in the database. When the original fault data completely matches the judgment condition of instantaneous overvoltage or brief overtemperature, the main controller BMS will target the battery cell. The fault is classified as a recoverable fault, and the corresponding fault type identifier is written to the fault type field in the recovery status register. If the original fault data does not match any of the above-mentioned recoverable fault determination conditions, it is classified as a permanent fault, and a permanent fault identifier is written to the fault type field in the recovery status register.

[0055] For the target battery cell classified as having the recoverable fault Based on the overvoltage peak or overtemperature peak in its original fault data, calculate the recovery voltage threshold and recovery temperature threshold. In this embodiment of the invention, the main controller (BMS) targets the battery cells classified as having recoverable faults. Based on the overvoltage or overtemperature peak values ​​in the original fault data, a recovery voltage threshold and a recovery temperature threshold are calculated. Recovery Voltage Threshold The calculation formula is: ,in This is the maximum allowable voltage for normal operation of the battery cell. This refers to the overvoltage peak value in the original fault data. This refers to the voltage recovery hysteresis coefficient. The determination method is as follows: the main controller (BMS) determines the overvoltage peak value. Maximum allowable voltage for normal operation of the battery cell Calculate the relative deviation of overpressure. Then, the normalized mapping function is used to determine... ,in The minimum hysteresis coefficient corresponds to slight overvoltage; The maximum hysteresis coefficient corresponds to severe overvoltage; This is the preset reference overpressure deviation threshold. The larger the value, the more severe the fault deviation. The recovery conditions are increased accordingly to tighten them. Recovery temperature threshold. The calculation formula is: ,in This is the maximum allowable temperature for normal operation of the battery cell. This refers to the over-temperature peak value in the original fault data. This refers to the temperature recovery hysteresis coefficient. The determination method is as follows: the main controller (BMS) determines the over-temperature peak value. Maximum allowable temperature for normal operation of the battery cell Calculate the relative deviation of the overtemperature Then, the normalized mapping function is used to determine... ,in This represents the minimum temperature hysteresis coefficient, corresponding to slight overtemperature. This represents the maximum temperature hysteresis coefficient, corresponding to severe overtemperature. This is the preset reference overtemperature deviation threshold. The larger the value, the more severe the fault deviation. The corresponding increase will tighten the recovery conditions. The main controller (BMS) will calculate the... and Write to the recovery threshold register.

[0056] The recovery voltage threshold and the recovery temperature threshold are combined to form the recovery determination condition. The recovery determination condition is considered to be satisfied only when the voltage recovery data and the temperature recovery data are both lower than their respective thresholds.

[0057] In this embodiment of the invention, the recovery determination condition is composed of two sub-conditions combined by a logical AND operation. Sub-condition one is the voltage recovery data. Less than the recovery voltage threshold Sub-condition two is temperature recovery data. Less than the recovery temperature threshold At the end of each sampling cycle, the main controller (BMS) reads the latest voltage recovery data from the circular buffer. and temperature recovery data , respectively with and Perform numerical comparisons. When Less than and Less than When both sub-conditions are simultaneously met, the recovery condition is established. The main controller (BMS) then starts a continuous stabilization timer, incrementing in 1ms steps. During the timer incrementing, the BMS continuously checks in each sampling period whether the two sub-conditions are still simultaneously met. If either sub-condition is not met, the timer is immediately reset and restarted. When the accumulated value of the timer reaches the preset continuous stabilization duration... At this time, the main controller (BMS) determines that the recovery conditions have been fully met and generates a recovery enable signal. If or If only one of the values ​​is below the corresponding threshold while the other is not, the recovery judgment condition is not met, and the timer remains at zero. This multi-dimensional judgment mechanism ensures that the voltage and temperature of the battery cell have both returned to a safe range, avoiding the risk of prematurely putting the battery cell into operation when one dimension has recovered but the other dimension is still in an abnormal state.

[0058] Furthermore, the generation of the recovery enable signal includes: The voltage recovery data and temperature recovery data are continuously acquired and compared with the recovery voltage threshold and the recovery temperature threshold. When the main controller (BMS) detects that the voltage recovery data is less than the recovery voltage threshold and the temperature recovery data is less than the recovery temperature threshold, and this state continues for a stable time window, the system will continue to acquire these data. Then, a temporary recovery permit is generated; In this embodiment of the invention, the main controller (BMS) reads the latest voltage recovery data from the circular buffer at 1ms intervals. and temperature recovery data Simultaneously, the recovery voltage threshold is read from the recovery threshold register. and recovery temperature threshold The comparison logic is executed in parallel by two independent numerical comparators, with comparator one outputting... The logical result, comparator two output The logical results are obtained by performing a logical AND operation on the two results through an AND gate. A high output from the AND gate indicates that both conditions are met simultaneously. The main controller (BMS) internally has a stable time counter that increments in 1ms steps. During each sampling period, if the AND gate output is high, the counter increments by one; if the output is low, the counter is immediately reset to zero. (Stable time window) The value is dynamically set according to the fault type. For instantaneous overvoltage faults, Take 10 seconds; for brief over-temperature faults, Set the counter to 30 seconds. When the counter's accumulated value reaches... At the corresponding millisecond count, the main controller (BMS) determines that the voltage and temperature have remained stable within the safe range and generates a temporary recovery permission flag. This flag is then stored in a temporary status register after being set.

[0059] After generating the temporary recovery permission flag, the active balancing operation for other non-target cells is paused, and the total voltage of the current cascaded battery pack is checked again to see if it is within a safe range. In this embodiment of the invention, after the main controller (BMS) detects that the temporary recovery permission flag is set, it immediately executes an active balancing pause operation. The active balancing pause is achieved by writing a balancing disable instruction to the balancing control register of all non-target three-switch units. The binary code for the balancing disable instruction is 0x00. After writing, each unit immediately stops its ongoing charge transfer operation, and all balancing MOSFETs are turned off. Simultaneously, the main controller (BMS) reads the voltage sample value at the total output terminal of the cascaded battery pack. This voltage value is acquired in real time by a differential voltage sampling circuit connected between the main positive and main negative terminals of the battery pack and obtained after analog-to-digital conversion. The criteria for determining the safe range are: Greater than the system's minimum available voltage And it is less than the system's maximum available voltage Umax. The main controller BMS will... and and Perform numerical comparisons, if Greater than and less than If so, the total voltage is determined to be within a safe range, and a total voltage safety confirmation flag is generated. If Less than or equal to or greater than or equal to If the total voltage exceeds the safe range, the main controller (BMS) will immediately clear the temporary recovery permission flag, resume active balancing operation, and terminate the recovery process.

[0060] After confirming that the total voltage is within a safe range, the temporary recovery permission flag is upgraded to the recovery enable signal.

[0061] In this embodiment of the invention, after the main controller BMS detects that the total voltage safety confirmation flag is set, it performs a flag upgrade operation. The upgrade operation is achieved by copying the temporary recovery permission flag bit in the temporary status register to the recovery enable flag bit in the recovery enable register. After the copying is complete, the temporary recovery permission flag bit in the temporary status register is cleared to distinguish the flag states of the two different stages. After the recovery enable flag bit is set, the main controller BMS generates a recovery enable interrupt signal, which directly triggers the reverse recovery control process. Simultaneously, the main controller BMS records detailed information about the recovery enable event in its internal event log, including the recovery enable generation time, the current total voltage value, and voltage recovery data. Temperature recovery data and stable time window The actual cumulative duration. If any abnormality occurs after the total voltage safety is confirmed but before the recovery enable flag is written, such as a sudden jump in the total voltage exceeding the safe range or a non-target cell triggering a new fault flag, the main controller BMS will immediately cancel the upgrade operation, clear the temporary recovery permission flag, and record the reason for cancellation.

[0062] Furthermore, the main controller (BMS), in response to the recovery enable signal, generates a reverse recovery control signal including: The main controller (BMS) receives the recovery enable signal and reads the target battery cell from the system topology status register. The target three-switch unit and its current bypass status; In this embodiment of the invention, after the main controller (BMS) detects that the recovery enable flag is set, it immediately triggers the recovery execution interrupt service routine. The interrupt service routine first accesses the system topology status register, which stores the topology status of each cell in the form of a bit array. A status bit of 1 indicates that it is bypassed, and a status bit of 0 indicates that it is online. The main controller (BMS) then determines the target cell number based on the recorded target cell number. Read the first data from the system topology status register. The value of the bit is checked to confirm that the current bit is 1, indicating a bypass state, ensuring that the object being restored is indeed in a bypass state and not in an online or other abnormal state. Simultaneously, the main controller (BMS) reads the target three-switch unit number from the target unit record register. The three power switching devices of this unit were confirmed. , , The identification identifier. After reading, the main controller (BMS) will restore the enable flag and target cell number. Target three switch unit number The current bypass status value is packaged into a recovery task data structure and stored in the internal task queue for subsequent steps to be executed sequentially.

[0063] Based on the target three-switch unit, a reverse switch action sequence is generated, the reverse switch action sequence including turn-off. After a dead zone period, conduct simultaneously. and The time sequence; In this embodiment of the invention, the main controller (BMS) extracts the target three-switch unit number from the recovery task data structure. This generates the reverse switch action sequence corresponding to the unit. The timing design of the reverse switch action sequence is the opposite of that of the forward bypass switch action sequence, with the timing being the first step of turn-off. The second step is to delay for a dead time period, and the third step is to simultaneously activate the circuit. and The value of the dead time is determined by the turn-off delay time and turn-on delay time of the power switching device. The main controller (BMS) reads the turn-off delay time of the power switching device from the read-only memory. and conduction delay time Dead time The calculation formula is: ,in To allow for a safety margin, for example, a value of 10 microseconds in this case. Using a typical MOSFET as an example... For 50 nanoseconds, If it is 30 nanoseconds, then ≈10.08 microseconds, actually rounded to 10 microseconds. The dead time setting ensures... After completely shut down and Only then can it be connected to prevent and or Simultaneous conduction causes a shoot-through short circuit. The main controller (BMS) stores the reverse switch action sequence in an internal register as three Boolean variables, each corresponding to a different action. , , The switch state is controlled by an internal timer. The switch is off, which corresponds to logic 0, and on, which corresponds to logic 1.

[0064] The reverse switching action sequence is converted into a corresponding gate drive level signal and output to the three power switching devices of the target three-switch unit. , , The gate; In this embodiment of the invention, the general-purpose input / output ports of the main controller (BMS) are connected to the gate of each power switching device via an isolation driver chip, which provides electrical isolation and current amplification. The conversion process is as follows: the main controller (BMS) reads from its internal registers... , , The switch status Boolean value. For When the switch is in logic 0 (off), the main controller (BMS) outputs a low level from the corresponding general-purpose input / output port. This low level is then converted into a negative or zero voltage by the isolation driver chip and applied to... The gate, making The system is in a closed state. The main controller (BMS) internal timer has started counting the dead time. During the dead zone time and The corresponding port maintains a low-level output to ensure and It is in the off state. After the dead timer completes, the main controller BMS will simultaneously... and The corresponding general purpose input / output port outputs a high level, which is converted into a positive voltage and applied after passing through an isolation driver chip. and The gate, making and Simultaneously, the main controller (BMS) confirms that the gate drive level has been correctly established by reading the status feedback pin of the isolation driver chip after each output level switch. If the feedback signal does not match the expectation, a hardware fault interrupt is triggered and the recovery process is aborted.

[0065] After the gate drive level signal is issued, the target cell that is re-engaged in the main series circuit is monitored. The voltage change rate and current surge are monitored. If both are within a preset safety range, the system topology status register is updated, and the target battery cell is... The status has been restored from bypassed to online.

[0066] In this embodiment of the invention, the main controller (BMS) is... and The monitoring process begins immediately upon activation. Voltage change rate is monitored via a connection to the target cell. A voltage sampling channel between the positive and negative terminals is implemented to continuously read the cell terminal voltage with a period of 10 microseconds. Calculate the voltage difference between two adjacent samples. Voltage change rate Monitoring of current surges is achieved through a current sensor connected in series at the input of the target three-switch unit, continuously reading the current flowing through it at a period of 10 microseconds. current Record the peak current at the moment of conduction. The preset safety range includes the upper limit of the voltage change rate. and the upper limit of current surge These two thresholds are pre-calibrated based on the electrical characteristics of the battery cell and stored in read-only memory. The main controller (BMS) continuously collects 10 sets of voltage change rate and current peak data within the first 100 microseconds after turn-on, and takes the maximum value. and .like Less than and Less than If the voltage change rate and current surge are both within safe limits, then the main controller (BMS) will update the system topology status register, setting the value of the first value to within safe limits. The status bit is changed from 1 to 0, indicating that the target battery cell is being targeted. It has been restored from bypass to online status. Simultaneously, the main controller (BMS) will effectively connect the number of cells in series. Increment the recovery timer and record the successful recovery event in the fault log, including the recovery timestamp, measured voltage change rate, measured current surge value, and a recovery success flag. If the voltage change rate or current surge exceeds the safe range, the main controller BMS immediately executes protection actions and shuts down again. and And conduct Target cell The system will bypass the circuit again, and a recovery failure alert will be recorded.

[0067] The above description is merely an embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of the claims of the present invention.

Claims

1. A method for bypassing faulty cells and redundancy operation of a cascaded battery pack, wherein the cascaded battery pack consists of... The three-switch units are cascaded in sequence, the first... The three-stage switching unit includes one battery cell. and three-power switching devices , , , The power switching device mentioned above The drain is connected to the cell in the previous three-switch unit. The positive and source terminals are connected to the battery cell. Positive electrode, the power switching device The drain is connected to the cell. The positive and source terminals are connected to a power switching device. Drain and cell The negative terminal of the power switching device The source is connected to the cell. The power switching devices in the negative electrode and the next stage three-switch unit Drain, of which, battery cells The positive and negative terminals serve as the output terminals of this stage's three-switch unit. Drain and The drain, serving as the input terminal of this stage's three-switch unit, is characterized by comprising the following steps: Step S1: Collect the operating status data of each of the three switching units in the cascaded battery pack through the main controller BMS, and identify the target cell that has failed based on the operating status data. and the first One target three-switch unit, ; Step S2: The main controller (BMS) responds to the identified target battery cell. It generates and executes a soft power reduction command to adjust the loop current of the cascaded battery pack to a safe switching range. It locks the current output voltage target and freezes the balancing and reconfiguration actions of other non-target three-switch units. Step S3: After executing the soft power reduction command, the main controller (BMS) generates a bypass control signal and applies it to the target three-switch unit. The bypass control signal is used to turn off... and And conduct This allows the circuit current to bypass the target battery cell. To achieve the target battery cell The bypass of the main series circuit inside the cascaded battery pack; Step S4: The main controller (BMS) completes the selection of the target battery cell. After bypassing, the operating parameter set of the cascaded battery pack is recalculated and updated based on the remaining number of available battery cells. The operating parameter set includes at least the effective number of series connections, the upper limit of voltage output, and the lower limit of voltage output. Based on the operating parameter set, the various protection parameters are updated again to generate a set of redundant operating configuration parameters suitable for low-cell operating conditions. Step S5: The main controller (BMS) controls the cascaded battery pack to enter a redundant operation mode based on the redundant operation configuration parameters. In this mode, the battery pack continuously supplies power and increases the sampling and monitoring frequency of the remaining non-target three-switch units, while simultaneously recording the target cell. Fault logs; Step S6: In the redundant continuation mode, the main controller (BMS) continues to monitor the bypassed target battery cell. The parameters are assessed for recovery status, categorized according to fault type, and recovery judgment conditions are set. When the recovery judgment conditions are met, a reverse recovery control signal is generated to restore the target cell. Reconnect the main series circuit.

2. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 1, characterized in that, Step S1 includes the following steps: Step S11: The main controller (BMS) collects data on the battery cells in each of the three-switch units in a first cycle of 5ms. Voltage data and temperature data Simultaneously, the loop current data of the cascaded battery pack is collected. ; Step S12: The main controller (BMS) determines the voltage data based on the voltage data. The temperature data and the loop current data Estimate the value of each of the said cells internal resistance estimate ; Step S13: The main controller (BMS) transmits the voltage data. The temperature data and the estimated internal resistance value Each fault is compared with a preset fault threshold. When any of the following faults is detected to exceed the corresponding fault threshold: single cell overvoltage, single cell undervoltage, single cell overtemperature, sudden change in differential pressure, or abnormal increase in internal resistance, a fault flag bit is generated. Step S14: The main controller (BMS) locates the cell that generated the fault flag bit based on the fault flag bit, and identifies it as the target cell. Simultaneously record the target battery cell The target three-switch unit is located and the target battery cell is marked. The main series circuit cannot be connected.

3. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 2, characterized in that, The generation and execution of the soft power reduction command in step S2 includes: The main controller (BMS) acquires the current loop current data. And read the safe switching current threshold from the preset parameter storage area. Wherein, the safe switching current threshold Specifically, the nominal capacity of the cascaded battery pack is obtained through the main controller (BMS). and the nominal capacity Multiply by the preset safety switching factor The safe switching current threshold is obtained. The safety switching ratio coefficient This ensures that the loop current of the cascaded battery pack during fault cell bypass switching is limited to a certain value per unit time. Within the safe switching range below, avoid damage to the power switching devices and the remaining non-target cells caused by arcing or voltage surges due to high current switching; The main controller (BMS) compares the loop current data. With the safety switching current threshold If the former is greater than the latter, a current reduction request is generated. The current reduction request includes a target current value, which is less than or equal to the safe switching current threshold. ; In response to the current reduction request, the main controller (BMS) sends power to the power switching devices connected to the input or output terminals of the cascaded battery pack. and Send a soft power reduction command to linearly or stepwise reduce the loop current of the cascaded battery pack until the loop current data is reached. To achieve the target current value; The main controller (BMS) in the loop current data Once the target current value is reached, the total output voltage value of the cascaded battery pack at the current moment is locked as the current output voltage target, and a freeze command is sent to all non-target three-switch units to suspend their equalization and topology reconfiguration control actions.

4. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 3, characterized in that, The realization of the target battery cell in step S3 The bypass to the main series circuit within the cascaded battery pack includes: The main controller (BMS) extracts the current voltage reference from the output voltage target and, based on the target cell... The target three-switch unit is configured to generate a switching action sequence for the target three-switch unit, the switching action sequence including turning off the power switching device. Turn off power switching devices and conduction power switching devices The time sequence; The main controller (BMS) converts the switching action sequence into gate drive level signals and outputs them to the three power switching devices of the target three-switch unit. , , The gate; After issuing the gate drive level signal, the main controller (BMS) monitors the voltage difference across the target three-switch unit. When the voltage difference drops to within a preset threshold close to zero, the target cell is confirmed. It has been successfully bypassed, and a confirmation signal has been generated; Based on the successful confirmation signal, the main controller (BMS) updates the system topology status register and sets the target battery cell... The status is marked as bypassed, and the number of effective series cells in the cascaded battery pack is reduced by one.

5. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 4, characterized in that, Step S4 includes the following steps: The main controller (BMS) reads the total number of cells currently marked as bypassed from the system topology status register and compares it with the total number of cells in the cascaded battery pack. Subtracting the two numbers yields the effective number of cells connected in series. ; Based on the number of effective series-connected cells By combining the current state of charge (SOC) and open-circuit voltage (OCV) curves of each non-target cell, a new maximum available system voltage is calculated. and a new system minimum available voltage ;in, ; In the formula, To bypass and remove the target cell that has failed. The remaining usable cell set has the number of elements equal to the number of effective series-connected cells. , For the first The open-circuit voltage value corresponding to a non-target cell when it is fully charged (SOC equals 100%). For the first The open-circuit voltage value corresponding to the non-target cell in the discharge cut-off state, i.e., when the SOC is equal to 0% or the corresponding minimum allowable discharge SOC. and The first The highest and lowest open-circuit voltages of each non-target cell are obtained by looking up their open-circuit voltage (OCV) curves in a table; if all non-target cells are of the same model and have the same OCV curve, then the process is simplified to... , ; Based on the highest available voltage of the system and the lowest available voltage of the system A series of protection parameters are recalculated and set based on preset safety margin coefficients. These protection parameters include the maximum allowable total charging voltage, the maximum allowable total discharging voltage, the ultimate protection voltage, the current limiting protection value, and the power limiting value. The preset safety margin coefficients include charging, discharging, overvoltage, and undervoltage safety margin coefficients. The maximum allowable total charging voltage... Maximum permissible total discharge voltage Limit protection voltage , Current limiting protection value Power limiting value ,in For charging safety margin coefficient, This is the discharge safety margin factor. This is the overvoltage limit protection voltage. This is the undervoltage limit protection voltage. This is the overvoltage safety margin factor. This is the undervoltage safety margin factor. The rated discharge current of the cascaded battery pack is... Based on the highest available voltage of the system With rated voltage The current limiting coefficient obtained by ratio correction ,in The preset current limiting factor is... This is a system efficiency correction factor; The number of effective series-connected cells The system's highest available voltage The minimum usable voltage of the system All the recalculated protection parameters are packaged into the redundant operation configuration parameters and written to the operation parameter storage area, replacing the original configuration parameters.

6. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 5, characterized in that, Step S5 includes the following steps: The main controller (BMS) acquires the redundant operation configuration parameters and determines the number of effective series-connected cells accordingly. Adjust the reference commands for the output voltage and current to match the load requirements. The main controller (BMS) controls the cascaded battery pack to enter the redundant continuation mode based on the reference instructions, shortening the first cycle of 5ms to the second cycle of 1ms to process the voltage data of the remaining non-target cells. and the temperature data Perform high-frequency data acquisition; The input parameters for fault comparison are dynamically adjusted based on the high-frequency collected data to improve the early warning sensitivity for potential faults in the remaining non-target cells. Record the target battery cell corresponding to this fault event. The relevant information, including the target battery cell The fault log includes the target three-switch unit, the time of fault occurrence, the duration of fault, and the original fault data that caused the fault, including the overvoltage peak value, the undervoltage valley value, the overtemperature peak value, and the internal resistance mutation rate.

7. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 6, characterized in that, Step S6 includes the following steps: The main controller (BMS) bypasses the target battery cell. Subsequently, the target battery cell was continuously monitored. Voltage recovery data and temperature recovery data in the redundant continuation mode; Based on the original fault data, it is classified into recoverable faults or permanent faults, and the recovery judgment conditions are set based on the classification results. The voltage recovery data and the temperature recovery data are continuously compared with the recovery determination conditions. When the recovery determination conditions are met and the data remains stable for a period of time, a recovery enable signal is generated. In response to the recovery enable signal, the main controller (BMS) generates a reverse recovery control signal, which is used to turn off the target three-switch unit. and reconnect and To deliver the target battery cell Reconnect the main series circuit.

8. The method for bypassing faulty cells and redundancy operation of a cascaded battery pack according to claim 7, characterized in that, The step of setting the recovery determination criteria based on the classification results includes: The original fault data is compared with a preset fault type database. If the original fault data falls under the category of instantaneous overvoltage or brief overtemperature, then the target cell is... Classified as a recoverable fault; For the target battery cell classified as having the recoverable fault Based on the overvoltage peak or overtemperature peak in its original fault data, calculate the recovery voltage threshold and recovery temperature threshold. The recovery voltage threshold and the recovery temperature threshold are combined to form the recovery determination condition. The recovery determination condition is considered to be satisfied only when the voltage recovery data and the temperature recovery data are both lower than their respective thresholds.

9. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 8, characterized in that, The generation of the recovery enable signal includes: The voltage recovery data and temperature recovery data are continuously acquired and compared with the recovery voltage threshold and the recovery temperature threshold. When the main controller (BMS) detects that the voltage recovery data is less than the recovery voltage threshold and the temperature recovery data is less than the recovery temperature threshold, and this state continues for a stable time window, the system will continue to acquire these data. Then, a temporary recovery permit is generated; After generating the temporary recovery permission flag, the active balancing operation for other non-target cells is paused, and the total voltage of the current cascaded battery pack is checked again to see if it is within a safe range. After confirming that the total voltage is within a safe range, the temporary recovery permission flag is upgraded to the recovery enable signal.

10. The method for bypassing faulty cells and operating system redundancy in a cascaded battery pack according to claim 9, characterized in that, In response to the recovery enable signal, the main controller (BMS) generates a reverse recovery control signal including: The main controller (BMS) receives the recovery enable signal and reads the target battery cell from the system topology status register. The target three-switch unit and its current bypass status; Based on the target three-switch unit, a reverse switch action sequence is generated, the reverse switch action sequence including turn-off. After a dead zone period, conduct simultaneously. and The time sequence; The reverse switching action sequence is converted into a corresponding gate drive level signal and output to the three power switching devices of the target three-switch unit. , , The gate; After the gate drive level signal is issued, the target cell that is re-engaged in the main series circuit is monitored. The voltage change rate and current surge are monitored. If both are within a preset safety range, the system topology status register is updated, and the target battery cell is... The status has been restored from bypassed to online.

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