Improved circuit for outputting under- and overvoltage, voltage converter

Abstract

Embodiments of this disclosure provide an output undervoltage and overvoltage improvement circuit and a voltage converter. The improvement circuit includes a reference voltage generation circuit and a reference voltage adjustment circuit. The reference voltage generation circuit is coupled to the voltage converter and configured to generate a second reference voltage based on a first reference voltage and a reference current source, and input the second reference voltage to the error amplifier of the voltage converter. The reference voltage adjustment circuit is coupled to both the reference voltage generation circuit and the voltage converter and configured to sample the load current of the voltage converter to obtain a sampling current, and generate an injection current or a extraction current based on a comparison between the sampling current and a preset current, and input the injection current or extraction current to the reference voltage generation circuit to adjust the voltage value of the second reference voltage. This addresses the problem of improving output voltage undervoltage and overvoltage.

Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and more specifically, to circuits for improving output undervoltage and overvoltage, and voltage converters. Background Technology

[0002] Low dropout linear regulators (LDOs) are common power supply chips characterized by simple structure, low cost, and low output voltage ripple, and are widely used in the electronics, automotive, and aerospace fields.

[0003] like Figure 1 As shown, a basic LDO circuit includes an error amplifier EA, a power transistor M0, a feedback resistor R1, and a capacitor C1. Specifically, it uses a feedback control mechanism to control the feedback voltage V. FB The error signal is compared with the reference voltage Vref0 and amplified. The power transistor M0 then adjusts its conduction level based on this signal, thereby controlling the output voltage Vout. When the output voltage Vout increases, the error signal output by the error amplifier EA decreases, and the conduction level of the power transistor M0 decreases, thus causing the output voltage Vout to drop. Conversely, when the output voltage Vout decreases, the error signal output by the error amplifier EA increases, and the conduction level of the power transistor M0 increases, thus causing the output voltage Vout to rise. This negative feedback regulation can suppress output voltage Vout fluctuations caused by changes in input voltage Vin or load current, maintaining a stable output voltage Vout. In practical applications, when the LDO encounters sudden load changes, such as a rapid change from heavy load to light load, or vice versa, the load jump can prevent the output voltage from changing quickly due to limitations in the LDO loop bandwidth and slew rate. This can lead to undervoltage and overvoltage phenomena, affecting subsequent circuits. Summary of the Invention

[0004] The embodiments described herein provide an output undervoltage and overvoltage improvement circuit and voltage converter to improve output voltage undervoltage or overvoltage caused by load transient changes.

[0005] According to a first aspect of this disclosure, an output undervoltage and overvoltage improvement circuit is provided. The improvement circuit is used to improve the output voltage of a voltage converter. The improvement circuit includes: a reference voltage generation circuit and a reference voltage adjustment circuit; wherein the reference voltage generation circuit is coupled to the voltage converter and configured to generate a second reference voltage based on a first reference voltage and a reference current source, and input the second reference voltage to an error amplifier of the voltage converter; the reference voltage adjustment circuit is coupled to the reference voltage generation circuit and the voltage converter, and configured to sample the load current of the voltage converter to obtain a sampling current, and generate an injection current or a extraction current based on a comparison result between the sampling current and a preset current, and input the injection current or extraction current to the reference voltage generation circuit to adjust the voltage value of the second reference voltage.

[0006] Optionally, the reference voltage generating circuit includes: a first operational amplifier, a first to third transistor, a first resistor, a second resistor, and the reference current source. The first input terminal of the first operational amplifier is coupled to a first reference voltage; the second input terminal of the first operational amplifier is coupled to one end of the first resistor and one end of the second resistor, respectively; the output terminal of the first operational amplifier is coupled to the control electrode of the first transistor; the first electrode of the first transistor is coupled to the other end of the first resistor; the second electrode of the first transistor is coupled to the power supply voltage; the first electrode of the first transistor outputs the second reference voltage; the other end of the second resistor is coupled to the second electrode of the third transistor; the control electrode of the second transistor is coupled to one end of the reference current source, the second electrode of the second transistor, the control electrode of the third transistor, and the output of the reference voltage adjustment circuit, respectively; the first electrodes of the second transistor and the first electrodes of the third transistor are both coupled to ground; the other end of the reference current source is coupled to the power supply voltage.

[0007] Optionally, the reference voltage regulation circuit includes: a first current sampling circuit, a current comparison circuit, and a regulation circuit, wherein the first current sampling circuit is coupled to a power transistor in the voltage converter and is configured to sample the load current through a first sampling transistor and a second sampling transistor to obtain a first sampling current and a second sampling current; the current comparison circuit is coupled to the first current sampling circuit and is configured to compare the first sampling current with a first preset current and output a first control signal, and compare the second sampling current with a second preset current and output a second control signal; the regulation circuit is coupled to the current comparison circuit and the reference voltage generation circuit and is configured to control whether to provide the injection current to the reference voltage generation circuit according to the first control signal, and control whether to provide the extraction current to the reference voltage generation circuit according to the second control signal.

[0008] Optionally, the reference voltage regulation circuit includes: a second current sampling circuit, a first adaptive regulation circuit, and a second adaptive regulation circuit. The second current sampling circuit is coupled to a power transistor in the voltage converter and configured to sample the load current using a third sampling transistor and a fourth sampling transistor to obtain a third sampling current and a fourth sampling current, wherein the third sampling transistor and the fourth sampling transistor have the same dimensions. The first adaptive regulation circuit is coupled to the third sampling current and the reference voltage generation circuit and configured to generate a first regulation current that changes negatively with the third sampling current when the third sampling current is less than a third preset current, and provide the first regulation current as the injection current to the reference voltage generation circuit. The second adaptive regulation circuit is coupled to the fourth sampling current and the reference voltage generation circuit and configured to generate a second regulation current that changes positively with the fourth sampling current when the fourth sampling current is greater than or equal to the third preset current, and provide the second regulation current as the extraction current to the reference voltage generation circuit.

[0009] Optionally, the first current sampling circuit includes a fourth transistor and a fifth transistor; wherein the control terminals of the fourth transistor and the fifth transistor are coupled to the control terminals of the power transistor in the voltage converter, the first terminals of the fourth transistor and the fifth transistor are both coupled to the input voltage of the voltage converter, and the second terminals of the fourth transistor and the fifth transistor are both coupled to the current comparison circuit; the fourth transistor serves as the first sampling transistor, and the current flowing through the fourth transistor is the first sampling current; the fifth transistor serves as the second sampling transistor, and the current flowing through the fifth transistor is the second sampling current.

[0010] Optionally, the current comparison circuit includes: a first Schmitt trigger, a second Schmitt trigger, an inverter, a first current source, and a second current source, wherein the input terminal of the first Schmitt trigger is coupled to the second terminal of the fourth transistor and one end of the first current source, and the output terminal of the first Schmitt trigger is coupled to the input terminal of the inverter; the output terminal of the inverter is coupled to the adjustment circuit and outputs the first control signal; the other end of the first current source is coupled to ground; the input terminal of the second Schmitt trigger is coupled to the second terminal of the fifth transistor and one end of the second current source, and the output terminal of the second Schmitt trigger is coupled to the adjustment circuit and outputs the second control signal; the other end of the second current source is coupled to ground; the first current source is used to provide the first preset current, and the second current source is used to provide the second preset current.

[0011] Optionally, the regulating circuit includes: a third current source, a fourth current source, a first switch, and a second switch; one end of the third current source is coupled to one end of the first switch, and the other end of the third current source is coupled to a power supply voltage; the control terminal of the first switch is coupled to the first control signal, and the other end of the first switch is coupled to the control electrode of the second transistor in the reference voltage generating circuit; one end of the fourth current source is coupled to one end of the second switch, and the other end of the fourth current source is coupled to a ground terminal; the control terminal of the second switch is coupled to the second control signal, and the other end of the second switch is coupled to the control electrode of the second transistor in the reference voltage generating circuit; the third current source is used to provide the injected current, and the fourth current source is used to provide the extracted current.

[0012] Optionally, the first adaptive adjustment circuit includes: a fifth current source, a sixth transistor, and a seventh transistor, wherein one end of the fifth current source is coupled to the third sampling current, the control electrode of the sixth transistor, the second electrode of the sixth transistor, and the control electrode of the seventh transistor, respectively, and the other end of the fifth current source is coupled to ground; the first electrodes of the sixth transistor and the first electrodes of the seventh transistor are both coupled to the input voltage of the voltage converter, and the second electrode of the seventh transistor is coupled to the control electrode of the second transistor in the reference voltage generation circuit; the fifth current source is used to provide the third preset current, and the current flowing through the seventh transistor is the first adjustment current.

[0013] Optionally, the second adaptive adjustment circuit includes: a sixth current source, an eighth transistor, and a ninth transistor, wherein one end of the sixth current source is coupled to the fourth sampling current, the control electrode of the eighth transistor, the second electrode of the eighth transistor, and the control electrode of the ninth transistor, respectively, and the other end of the sixth current source is coupled to a ground terminal; the first electrodes of the eighth transistor and the first electrodes of the ninth transistor are both coupled to a ground terminal, and the second electrode of the ninth transistor is coupled to the control electrode of the second transistor in the reference voltage generation circuit; the sixth current source is used to provide the third preset current, and the current flowing through the ninth transistor is the second adjustment current.

[0014] According to a second aspect of this disclosure, a voltage converter is provided, the voltage converter including at least one output undervoltage and overvoltage improvement circuit according to any one of the first aspects.

[0015] In the output undervoltage and overvoltage improvement circuit of the embodiments of this disclosure, a reference voltage generation circuit provides a second reference voltage as the reference voltage of the voltage converter, and a reference voltage adjustment circuit provides an injection current or a extraction current to the reference voltage generation circuit according to the change of load current to adjust the voltage value of the second reference voltage, thereby causing the output voltage under light load and heavy load to deviate from the set output voltage value, increasing the output voltage value under light load and decreasing the output voltage value under heavy load, thereby improving the undervoltage or overvoltage of the output voltage when the load changes from light load to heavy load or from heavy load to light load. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein:

[0017] Figure 1 A circuit example diagram of a low-dropout linear regulator in the related art is shown; Figure 2 A schematic block diagram of an output undervoltage and overvoltage improvement circuit according to an embodiment of the present disclosure is shown; Figure 3 An exemplary circuit diagram of a reference voltage generation circuit according to an embodiment of the present disclosure is shown; Figure 4 An exemplary circuit diagram of a reference voltage regulation circuit according to an embodiment of the present disclosure is shown; Figure 5 An exemplary circuit diagram of another reference voltage regulation circuit according to an embodiment of the present disclosure is shown; The elements in the attached diagram are schematic and not drawn to scale. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0019] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “connecting” or “coupling” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components.

[0020] In all embodiments of this disclosure, since the source and drain of a metal-oxide-semiconductor (MOS) transistor are symmetrical, and the conduction current directions between the source and drain of an N-type transistor and a P-type transistor are opposite, the controlled middle terminal of the MOS transistor is referred to as the control terminal, and the remaining two terminals of the MOS transistor are referred to as the first terminal and the second terminal, respectively. In all embodiments of this disclosure, terms such as "first" and "second" are used only to distinguish one component (or part of a component) from another component (or another part of a component).

[0021] To mitigate output voltage undervoltage or overvoltage caused by transient load changes, an undervoltage and overvoltage improvement circuit is proposed. In this embodiment, the improvement circuit dynamically adjusts the reference voltage of the voltage converter based on different load currents, intentionally adjusting the output voltage under light and heavy loads away from a set output voltage value. The output voltage is increased under light load and decreased under heavy load to reduce the impact on the output voltage when the load changes from light to heavy or vice versa. Furthermore, the circuit of this embodiment is simple, with minimal increase in power consumption, and is suitable not only for LDO circuits but also for various voltage conversion circuits such as buck converters, boost converters, and buck-boost converters. The undervoltage and overvoltage improvement circuit of this disclosure will be described in detail below.

[0022] Figure 2 A schematic block diagram of an output undervoltage and overvoltage improvement circuit 100 according to an embodiment of the present disclosure is shown. The output undervoltage and overvoltage improvement circuit 100 is coupled to a voltage converter 200, and the improvement circuit 100 is used to improve the output voltage Vout of the voltage converter 200, such as... Figure 2 As shown, the improvement circuit 100 includes: a reference voltage generation circuit 110 and a reference voltage adjustment circuit 120; The reference voltage generation circuit 110 is coupled to the voltage converter 200 and is configured to generate a second reference voltage Vref2 based on the first reference voltage Vref1 and the reference current source Ibais, so as to input the second reference voltage Vref2 into the error amplifier of the voltage converter 200.

[0023] The voltage converter 200 in this embodiment mainly refers to a DC-DC voltage converter, which can be an LDO circuit, LDO circuit, BUCK circuit, BOOST circuit, or BUCK_BOOST circuit. Adjusting the output voltage Vout of any voltage converter 200 involves adjusting based on the error between the feedback voltage and the reference voltage of the output voltage Vout. That is, the feedback voltage and reference voltage of the output voltage Vout are input to an error amplifier, and then further feedback adjustment is performed based on the output result of the error amplifier. The second reference voltage Vref2 generated by the reference voltage generation circuit 110 in this embodiment is used for comparison with the feedback voltage.

[0024] Furthermore, this disclosure provides a circuit example diagram of a reference voltage generation circuit 110, as shown in the embodiment below. Figure 3 As shown, the reference voltage generation circuit 110 includes: a first operational amplifier A1, first to third transistors (M1-M3), a first resistor R1, a second resistor R2, and the reference current source Ibais. The first input terminal of the first operational amplifier A1 is coupled to a first reference voltage Vref1; the second input terminal of the first operational amplifier A1 is coupled to one end of the first resistor R1 and one end of the second resistor R2; the output terminal of the first operational amplifier A1 is coupled to the control electrode of the first transistor M1; the first electrode of the first transistor M1 is coupled to the other end of the first resistor R1; and the second electrode of the first transistor M1 is coupled to the power supply voltage. Vcc; the first terminal of the first transistor M1 outputs the second reference voltage Vref2; the other end of the second resistor R2 is coupled to the second terminal of the third transistor M3; the control terminal of the second transistor M2 is coupled to one end of the reference current source Ibais, the second terminal of the second transistor M2, the control terminal of the third transistor M3, and the output of the reference voltage adjustment circuit 120 (specifically, the output injection current Isink or extraction current Isource); the first terminals of the second transistor M2 and the third transistor M3 are both coupled to the ground terminal; the other end of the reference current source Ibais is coupled to the power supply voltage Vcc.

[0025] from Figure 3As shown in the circuit diagram, the second reference voltage Vref2 is determined by the voltage across VA and R1. VA is stabilized at Vref1 through the action of A1, while the voltage across R1 is determined by the current flowing through R1. Therefore, the larger the current flowing through R1, the larger Vref2 is, and the smaller the current flowing through R1, the smaller Vref2 is. Without the influence of the injected current Isink or the extracted current Isource, the current flowing through R1 is affected by the reference current source Ibais. With the reference current source Ibais unchanged, the current flowing through R1 is affected by the injected current Isink or the extracted current Isource. The injected current increases the current flowing through R1, while the extracted current decreases the current flowing through R1. That is, the voltage value of the second reference voltage Vref2 is changed by the injected current Isink or the extracted current Isource. Additionally, it should be noted that R1 can be set as a variable resistor to fine-tune or adjust the final output value of Vref2, ensuring the accuracy of the circuit.

[0026] The reference voltage adjustment circuit 120 is coupled to the reference voltage generation circuit 110 and the voltage converter 200, and is configured to sample the load current of the voltage converter 200 to obtain a sampling current Isns, and generate an injection current Isink or a extraction current Isource based on the comparison result of the sampling current Isns and a preset current Ith, so as to input the injection current Isink or the extraction current Isource to the reference voltage generation circuit 110 to adjust the voltage value of the second reference voltage Vref2.

[0027] The reference voltage regulation circuit 120 generates an injection current Isink or a extraction current Isource to provide to the reference voltage generation circuit 110, thereby changing the current flowing through R1 and thus altering the value of the second reference voltage Vref2. Specifically, it first obtains the sampled load current Isns through current sampling and compares it with a preset current Ith. The preset current Ith is related to the load state, so the comparison result between the sampled current Isns and the preset current Ith reflects the load state. Then, it generates the injection current Isink or the extraction current Isource based on the comparison result. If the comparison result indicates a light load state, the injection current Isink is provided to the reference voltage generation circuit 110, increasing the current flowing through R1 and thus increasing the second reference voltage Vref2. When the second reference voltage Vref2 is increased under light load, the corresponding output voltage Vout will also increase. Thus, during the transition from light load to heavy load, because the rate of decrease remains constant, the lowest voltage value reached by the output voltage Vout is greater than when the second reference voltage Vref2 is not adjusted. In other words, the difference between this lowest voltage value and the ideal output voltage Vout in steady state is smaller than when the second reference voltage Vref2 is not adjusted, thus improving the undervoltage situation. If the comparison result indicates a heavy load, a extraction current Isource is provided to the reference voltage generation circuit 110, reducing the current flowing through R1 and consequently decreasing the second reference voltage Vref2. Conversely, when the second reference voltage Vref2 is decreased under heavy load, the corresponding output voltage Vout will also decrease. Thus, during the transition from heavy load to light load, because the rate of increase remains constant, the highest voltage value reached by the output voltage Vout is smaller than when the second reference voltage Vref2 is not adjusted. In other words, the difference between this highest voltage value and the ideal output voltage Vout in steady state is smaller than when the second reference voltage Vref2 is not adjusted, thus improving the overvoltage situation. Additionally, it should be noted that in practical applications, for example, if the full-load output range of an LDO circuit is 0-800mA, then when the load instantly changes from 0-800mA or 800mA-0, the undervoltage and overvoltage are at their maximum. However, such full-load jumps are relatively rare in actual applications; more often, the load jumps are small, such as from 10mA to 500mA or from 200mA to 800mA. The load jumps addressed in this disclosure embodiment are also mainly small load jumps.

[0028] In another embodiment, when generating the injection current Isink or the extraction current Isource based on the comparison result, a dynamically changing injection current Isink or extraction current Isource can also be provided to the reference voltage generation circuit 110 based on the comparison result, thereby dynamically adjusting the voltage value of the second reference voltage Vref2. The basic principle of adjustment is: when the load current is small, the second reference voltage Vref2 is increased, and the smaller the load current, the larger the injection current Isink, and the larger the second reference voltage Vref2; when the load current is large, the second reference voltage Vref2 is decreased, and the larger the load current, the larger the extraction current Isource, and the smaller the second reference voltage Vref2. This method of dynamically adjusting the second reference voltage Vref2 based on the load current has a more significant effect on improving undervoltage and overvoltage than the aforementioned embodiment.

[0029] As can be seen from the above description, the output undervoltage and overvoltage improvement circuit of the present disclosure embodiment provides a reference voltage for the voltage converter through a reference voltage generation circuit 110, and provides an injection current Isink or a extraction current Isource to the reference voltage generation circuit 110 according to the change of load current to adjust the magnitude of the reference voltage, thereby causing the output voltage Vout under light load and heavy load to deviate from the set output voltage Vout value, increasing the output voltage Vout value under light load and decreasing the output voltage Vout value under heavy load, thereby improving the undervoltage or overvoltage of the output voltage Vout when the load changes from light load to heavy load or from heavy load to light load.

[0030] Furthermore, such as Figure 4 As shown, the reference voltage regulation circuit 120 includes: a first current sampling circuit 121, a current comparison circuit 122, and a regulation circuit 123. The first current sampling circuit 121 is coupled to the power transistor in the voltage converter 200 and is configured to sample the load current through a first sampling transistor and a second sampling transistor to obtain a first sampling current Isns1 and a second sampling current Isns2. Further, as... Figure 4As shown, the first current sampling circuit 121 includes a fourth transistor M4 and a fifth transistor M5. The control terminals of the fourth transistor M4 and the fifth transistor M5 are coupled to the control terminals Vgate of the power transistor in the voltage converter 200. The first terminals of both the fourth transistor M4 and the fifth transistor M5 are coupled to the input voltage Vin of the voltage converter. The second terminals of both the fourth transistor M4 and the fifth transistor M5 are coupled to the current comparison circuit 122. The fourth transistor M4 serves as the first sampling transistor, and the current flowing through it is the first sampling current Isns1. The fifth transistor M5 serves as the second sampling transistor, and the current flowing through it is the second sampling current Isns2. Both the first sampling current Isns1 and the second sampling current Isns2 are proportional to the load current. For example, Isns1 can be set to Iload / h, and Isns2 can be set to Iload / i, where Iload is the load current, and h and i are proportionality coefficients. Setting two sampling currents is to correspond to the judgment of light load and heavy load respectively. In addition, when the voltage converter 200 is a BUCK circuit, BOOST circuit, or BUCK_BOOST circuit, the power transistor in the voltage converter 200 can be an upper power transistor.

[0031] like Figure 4 As shown, the current comparison circuit 122 is coupled to the first current sampling circuit 121 and is configured to compare the first sampled current Isns1 with a first preset current Ith1 and output a first control signal D1, and compare the second sampled current Isns2 with a second preset current Ith2 and output a second control signal D2; wherein, the values ​​of the first preset current Ith1 and the second preset current Ith2 are determined according to the load current value corresponding to the load state defined in the actual situation. For example, assume that the load current is less than or equal to 10%. Iall is a light load, greater than or equal to 90%. Iall is used as an overload, exceeding 10%. Iall and less than 90% Iall represents the medium load current, where Iall is the load current at full load; therefore, the first preset current Ith1 can be set to 10%. Iall / h, the second preset current Ith2 is 90%. Iall / i, thus, the first control signal D1 obtained by comparing the first sampled current Isns1 with the first preset current Ith1 can determine whether it is a light load, and the second control signal D2 obtained by comparing the second sampled current Isns2 with the second preset current Ith2 can determine whether it is a heavy load. It should be noted that 10% and 90% are exemplary values ​​and can be adjusted adaptively according to the actual situation.

[0032] Furthermore, such as Figure 4 As shown, the current comparison circuit 122 includes: a first Schmitt trigger (Schmitt1), a second Schmitt trigger (Schmitt2), an inverter INV1, a first current source Ib1, and a second current source Ib2. The input terminal of the first Schmitt trigger (Schmitt1) is coupled to the second terminal of the fourth transistor M4 and one terminal of the first current source Ib1, respectively. The output terminal of the first Schmitt trigger (Schmitt1) is coupled to the input terminal of the inverter INV1. The output terminal of the inverter INV1 is coupled to the adjustment circuit 123 and outputs the current comparison circuit 122. A control signal D1; the other end of the first current source Ib1 is coupled to the ground terminal; the input terminal of the second Schmitt trigger Schmitt2 is coupled to the second terminal of the fifth transistor M5 and one end of the second current source Ib2, respectively; the output terminal of the second Schmitt trigger Schmitt2 is coupled to the adjustment circuit 123 and outputs the second control signal D2; the other end of the second current source Ib2 is coupled to the ground terminal; the first current source Ib1 is used to provide the first preset current Ith1, and the second current source Ib2 is used to provide the second preset current Ith2.

[0033] like Figure 4 As shown, the regulating circuit 123 is coupled to the current comparison circuit 122 and the reference voltage generation circuit 110, and is configured to control whether to provide the injection current Isink to the reference voltage generation circuit 110 according to the first control signal D1, and to control whether to provide the extraction current Isource to the reference voltage generation circuit 110 according to the second control signal D2. Specifically, if the first control signal D1 indicates that the current voltage converter is under light load, the injection current Isink is provided to the reference voltage generation circuit 110 to increase the second reference voltage Vref2; if the second control signal D2 indicates that the current voltage converter is under heavy load, the extraction current Isource is provided to the reference voltage generation circuit 110 to decrease the second reference voltage Vref2.

[0034] Furthermore, such as Figure 4As shown, the adjustment circuit 123 includes: a third current source Ib3, a fourth current source Ib4, a first switch S1, and a second switch S2; one end of the third current source Ib3 is coupled to one end of the first switch S1, and the other end of the third current source Ib3 is coupled to the power supply voltage Vcc; the control terminal of the first switch S1 is coupled to the first control signal D1, and the other end of the first switch S1 is coupled to the control electrode of the second transistor M2 in the reference voltage generation circuit 110; one end of the fourth current source Ib4 is coupled to one end of the second switch S2, and the other end of the fourth current source Ib4 is coupled to the ground terminal; the control terminal of the second switch S2 is coupled to the second control signal D2, and the other end of the second switch S2 is coupled to the control electrode of the second transistor M2 in the reference voltage generation circuit 110; the third current source Ib3 is used to provide the injection current Isink, and the fourth current source Ib4 is used to provide the extraction current Isource.

[0035] Take Isns1= Iload / h, Isns2= Iload / i, Ith1=10% Iall / h, Ith2=90% Taking Iall / i as an example, combined with Figure 4 The circuit principle of the reference voltage regulation circuit 120 is explained as follows: The first sampling current Isns1 is obtained through the fourth transistor M4. Both the first sampling current Isns1 and the first preset current Ith1 pass through the input terminal of the first Schmitt trigger Schmitt1. When the first sampling current Isns1 is less than the first preset current Ith1 (i.e., Iload / h < 10%), After Iload / h, the first control signal D1 outputs a high level, the first switch S1 closes, and the current Isink generated by the third current source Ib3 is injected into the Vbais node of the reference voltage generation circuit 110, thereby increasing the second reference voltage Vref2; at this time, since Iload / h < 10% Iall / h, meaning Iload < 10% Iall, therefore Iload < 90% Iall, (Isns2= Iload / i)<(90% Since Iall / i=Ith2), the second control signal D2 is low, the second switch S2 is open, and the fourth current source Ib4 is not connected to the reference voltage generation circuit 110. When the first sampling current Isns1 is greater than the first preset current Ith1, the first control signal D1 outputs a low level, the first switch S1 is open, and the third current source Ib3 is not connected to the reference voltage generation circuit 110. At this time, Iload>10%. Iall, until Iload ≥ 90% Before Iall, the second control signal D2 is always low, and the fourth current source Ib4 will not be connected to the reference voltage generation circuit 110; when Iload ≥ 90% After Iall, the second sampling current Isns2 is greater than or equal to the second preset current Ith2 value, the second control signal D2 becomes high level, the fourth current source Ib4 is connected to the reference voltage generation circuit 110, and the current is drawn from the Vbais node in the reference voltage generation circuit 110, thereby reducing the second reference voltage Vref2.

[0036] Corresponding to the implementation of dynamically adjusting the second reference voltage Vref2 in the aforementioned embodiments, as follows: Figure 5 As shown, an exemplary circuit diagram of another reference voltage regulation circuit 120 is provided, including: a second current sampling circuit 124, a first adaptive regulation circuit 125, and a second adaptive regulation circuit 126. The second current sampling circuit 124 is coupled to a power transistor in the voltage converter 200 and is configured to sample the load current using a third sampling transistor and a fourth sampling transistor to obtain a third sampling current Isns3 and a fourth sampling current Isns4, wherein the third and fourth sampling transistors are of equal size. Further, as... Figure 5 As shown, the second current sampling circuit 124 includes a tenth transistor M10 and an eleventh transistor M11. The control terminals of the tenth transistor M10 and the eleventh transistor M11 are coupled to the control terminals Vgate of the power transistor in the voltage converter 200. The first terminals of both the tenth transistor M10 and the eleventh transistor M11 are coupled to the input voltage Vin of the voltage converter 200. The second terminal of the tenth transistor M10 is coupled to a first adaptive adjustment circuit 125, and the second terminal of the eleventh transistor M11 is coupled to a second adaptive adjustment circuit 126. The tenth transistor M10 serves as the third sampling transistor, and the current flowing through it is the third sampling current Isns3. The eleventh transistor M11 serves as the fourth sampling transistor, and the current flowing through it is the fourth sampling current Isns4. The third sampling current Isns3 is equal to the fourth sampling current Isns4, and both are proportional to the load current. For example, Isns3 can be set to Isns4 = Iload / g, where g is a proportionality coefficient. In addition, when the voltage converter 200 is a BUCK circuit, BOOST circuit, or BUCK_BOOST circuit, the power transistor in the voltage converter 200 can be an upper power transistor.

[0037] The first adaptive adjustment circuit 125 is coupled to the third sampling current Isns3 and the reference voltage generation circuit 110. It is configured to generate a first adjustment current Ia1 that changes negatively with the third sampling current Isns3 when the third sampling current Isns3 is less than the third preset current Ith3. This first adjustment current Ia1 is then provided to the reference voltage generation circuit 110 as the injection current Isink. That is, within the range where the third sampling current Isns3 is less than the third preset current Ith3, the smaller the third sampling current Isns3, the larger the first adjustment current Ia1, the larger the injection current Isink provided to the reference voltage generation circuit 110, and the larger the second reference voltage Vref2, resulting in a greater improvement in undervoltage. Furthermore, the third preset current Ith3 is also set based on the load current value, for example, it can be set to 50%. Iall / g, where Iall is the load current at full load. The 50% can be adjusted appropriately based on actual conditions.

[0038] Furthermore, such as Figure 5 As shown, the first adaptive adjustment circuit 125 includes: a fifth current source Ib5, a sixth transistor M6, and a seventh transistor M7, wherein one end of the fifth current source Ib5 is coupled to the third sampling current Isns3 (corresponding to...). Figure 5 Specifically, the fifth current source Ib5 is coupled to the second terminal of the tenth transistor M10, the control terminal of the sixth transistor M6, the second terminal of the sixth transistor M6, and the control terminal of the seventh transistor M7. The other end of the fifth current source Ib5 is coupled to the ground terminal. The first terminals of the sixth transistor M6 and the seventh transistor M7 are both coupled to the input voltage Vin of the voltage converter 200. The second terminal of the seventh transistor M7 is coupled to the control terminal of the second transistor M2 in the reference voltage generation circuit 110. The fifth current source Ib5 is used to provide the third preset current Ith3, and the current flowing through the seventh transistor M7 is the first adjustment current Ia1.

[0039] The second adaptive adjustment circuit 126 is coupled to the fourth sampling current Isns4 and the reference voltage generation circuit 110. It is configured to generate a second adjustment current Ia2 that changes positively correlated with the fourth sampling current Isns4 when the fourth sampling current Isns4 is greater than or equal to the third preset current Ith3. This second adjustment current Ia2 is then provided to the reference voltage generation circuit 110 as the extraction current Isource. In other words, within the range where the fourth sampling current Isns4 is greater than or equal to the third preset current Ith3, the larger the fourth sampling current Isns4, the larger the second adjustment current Ia2, the larger the extraction current Isource provided to the reference voltage generation circuit 110, and the smaller the second reference voltage Vref2, resulting in a greater degree of overvoltage improvement.

[0040] Furthermore, such as Figure 5 As shown, the second adaptive adjustment circuit 126 includes: a sixth current source Ib6, an eighth transistor M8, and a ninth transistor M9, wherein one end of the sixth current source Ib6 is coupled to the fourth sampling current Isns4 (corresponding to...). Figure 5 Specifically, the sixth current source Ib6 is coupled to the second terminal of the eleventh transistor M11, the control terminal of the eighth transistor M8, the second terminal of the eighth transistor M8, and the control terminal of the ninth transistor M9. The other end of the sixth current source Ib6 is coupled to the ground terminal. The first terminals of the eighth transistor M8 and the ninth transistor M9 are both coupled to the ground terminal. The second terminal of the ninth transistor M9 is coupled to the control terminal of the second transistor M2 in the reference voltage generation circuit 110. The sixth current source Ib6 is used to provide the third preset current Ith3, and the current flowing through the ninth transistor M9 is the second adjustment current Ia2.

[0041] With Isns3=Isns4=Iload / g, Ith3=50% Taking Iall / g as an example, combined with Figure 5 The circuit principle of the reference voltage regulation circuit 120 is explained as follows: The third sampling current Isns3 is obtained through the tenth transistor M10, and the fourth sampling current Isns4 is obtained through the eleventh transistor M11. The third sampling current Isns3 is equal to the fourth sampling current Isns4. Both the third sampling current Isns3 and the third preset current Ith3 pass through the control and second terminals of the sixth transistor M6. When the third sampling current Isns3 is less than the third preset current Ith3 (i.e., when the load current is less than 50% Iall), the first regulating current Ia1 = m (Ith3-Isns3), where m is the size ratio of the sixth transistor M6 to the seventh transistor M7, Ia1 is injected into the Vbais node of the reference voltage generation circuit 110, the smaller Isns3 is, the larger Ia1 is, which in turn makes the second reference voltage Vref2 larger; when the fourth sampling current Isns4 is greater than or equal to the third preset current Ith3 (i.e., when the load current is greater than or equal to 50% Iall), the second adjustment current Ia2 = n (Isns4-Ith3), where n is the size ratio of the eighth transistor M8 to the ninth transistor M9. Ia2 is connected to the reference voltage generation circuit 110. The larger Isns4 is, the larger Ia2 is, and the more current is drawn from the Vbais node in the reference voltage generation circuit 110, thus making the second reference voltage Vref2 smaller.

[0042] In summary, the output undervoltage and overvoltage improvement circuit 100 of this embodiment can adjust the magnitude of the second reference voltage Vref2 according to different load currents, reduce the impact on the output voltage Vout when the load changes from light load to heavy load or from heavy load to light load, improve the output voltage Vout and undervoltage or overvoltage, and thus improve the transient response capability of the voltage converter.

[0043] Furthermore, this disclosure also provides a voltage converter, which includes at least an output undervoltage and overvoltage improvement circuit 100 according to any of the foregoing embodiments. The second reference voltage Vref2 generated in the output undervoltage and overvoltage improvement circuit 100 is coupled to an error amplifier in the voltage converter, and a first current sampling circuit 121 or a second current sampling circuit 124 in the output undervoltage and overvoltage improvement circuit 100 is coupled. Because the voltage converter in this disclosure uses the output undervoltage and overvoltage improvement circuit 100 from the foregoing embodiments, it has better transient response capability. The voltage converter in this embodiment is a DC-DC voltage converter, specifically an LDO circuit, a BUCK circuit, a BOOST circuit, or a BUCK_BOOST circuit.

[0044] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.

[0045] Further aspects and scope of adaptation become apparent from the description provided herein. It should be understood that various aspects of this disclosure may be implemented individually or in combination with one or more other aspects. It should also be understood that the descriptions and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0046] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A circuit for improving output undervoltage and overvoltage, characterized in that, The improvement circuit is used to improve the output voltage of the voltage converter, and the improvement circuit includes: a reference voltage generation circuit and a reference voltage adjustment circuit; The reference voltage generation circuit is coupled to the voltage converter and is configured to generate a second reference voltage based on a first reference voltage and a reference current source, so as to input the second reference voltage into the error amplifier of the voltage converter. The reference voltage adjustment circuit is coupled to the reference voltage generation circuit and the voltage converter, and is configured to sample the load current of the voltage converter to obtain a sample current, and generate an injection current or a extraction current based on the comparison result of the sample current and a preset current, so as to input the injection current or extraction current to the reference voltage generation circuit to adjust the voltage value of the second reference voltage. Generating an injection current or a extraction current based on the comparison result of the sampled current and the preset current, and inputting the injection current or extraction current to the reference voltage generation circuit to adjust the voltage value of the second reference voltage includes: if the comparison result indicates that the load condition is light load, then providing an injection current to the reference voltage generation circuit to increase the current flowing through the first resistor in the reference voltage generation circuit, thereby increasing the second reference voltage; if the comparison result indicates that the load condition is heavy load, then providing an extraction current to the reference voltage generation circuit to decrease the current flowing through the first resistor, thereby decreasing the second reference voltage.

2. The output undervoltage and overvoltage improvement circuit according to claim 1, characterized in that, The reference voltage generation circuit includes: a first operational amplifier, first to third transistors, a first resistor, a second resistor, and the reference current source. Wherein, the first input terminal of the first operational amplifier is coupled to a first reference voltage, the second input terminal of the first operational amplifier is coupled to one end of the first resistor and one end of the second resistor respectively, and the output terminal of the first operational amplifier is coupled to the control electrode of the first transistor; The first terminal of the first transistor is coupled to the other end of the first resistor, and the second terminal of the first transistor is coupled to the power supply voltage; the first terminal of the first transistor outputs the second reference voltage. The other end of the second resistor is coupled to the second terminal of the third transistor; The control electrode of the second transistor is coupled to one end of the reference current source, the second electrode of the second transistor, the control electrode of the third transistor, and the output of the reference voltage adjustment circuit; the first electrodes of the second transistor and the first electrodes of the third transistor are both coupled to the ground terminal; the other end of the reference current source is coupled to the power supply voltage.

3. The output undervoltage and overvoltage improvement circuit according to claim 2, characterized in that, The reference voltage adjustment circuit includes: a first current sampling circuit, a current comparison circuit, and an adjustment circuit. The first current sampling circuit is coupled to the power transistor in the voltage converter and is configured to sample the load current through the first sampling transistor and the second sampling transistor to obtain the first sampling current and the second sampling current. The current comparison circuit is coupled to the first current sampling circuit and is configured to compare the first sampled current with a first preset current and output a first control signal, and compare the second sampled current with a second preset current and output a second control signal. The regulating circuit is coupled to the current comparison circuit and the reference voltage generation circuit, and is configured to control whether to provide the injection current to the reference voltage generation circuit according to the first control signal, and to control whether to provide the extraction current to the reference voltage generation circuit according to the second control signal.

4. The output undervoltage and overvoltage improvement circuit according to claim 2, characterized in that, The reference voltage regulation circuit includes: a second current sampling circuit, a first adaptive regulation circuit, and a second adaptive regulation circuit. The second current sampling circuit is coupled to the power transistor in the voltage converter and is configured to sample the load current through the third sampling transistor and the fourth sampling transistor to obtain the third sampling current and the fourth sampling current. The third sampling transistor and the fourth sampling transistor are of equal size. The first adaptive adjustment circuit is coupled to the third sampling current and the reference voltage generation circuit, and is configured to generate a first adjustment current that changes negatively with the third sampling current when the third sampling current is less than the third preset current, and provide the first adjustment current as the injection current to the reference voltage generation circuit. The second adaptive adjustment circuit is coupled to the fourth sampling current and the reference voltage generation circuit, and is configured to generate a second adjustment current that changes in a positive correlation with the fourth sampling current when the fourth sampling current is greater than or equal to the third preset current, and provide the second adjustment current as the extraction current to the reference voltage generation circuit.

5. The output undervoltage and overvoltage improvement circuit according to claim 3, characterized in that, The first current sampling circuit includes: a fourth transistor and a fifth transistor; The control terminals of the fourth transistor and the fifth transistor are coupled to the control terminals of the power transistor in the voltage converter. The first terminals of the fourth transistor and the fifth transistor are both coupled to the input voltage of the voltage converter. The second terminals of the fourth transistor and the fifth transistor are both coupled to the current comparison circuit. The fourth transistor serves as the first sampling transistor, and the current flowing through the fourth transistor is the first sampling current; the fifth transistor serves as the second sampling transistor, and the current flowing through the fifth transistor is the second sampling current.

6. The output undervoltage and overvoltage improvement circuit according to claim 5, characterized in that, The current comparison circuit includes: a first Schmitt trigger, a second Schmitt trigger, an inverter, a first current source, and a second current source. The input terminal of the first Schmitt trigger is coupled to the second terminal of the fourth transistor and one end of the first current source, respectively; the output terminal of the first Schmitt trigger is coupled to the input terminal of the inverter; the output terminal of the inverter is coupled to the adjustment circuit and outputs the first control signal; the other end of the first current source is coupled to the ground terminal. The input terminal of the second Schmitt trigger is coupled to the second terminal of the fifth transistor and one end of the second current source, respectively. The output terminal of the second Schmitt trigger is coupled to the adjustment circuit and outputs the second control signal. The other end of the second current source is coupled to the ground terminal. The first current source is used to provide the first preset current, and the second current source is used to provide the second preset current.

7. The output undervoltage and overvoltage improvement circuit according to claim 6, characterized in that, The regulating circuit includes: a third current source, a fourth current source, a first switch, and a second switch; One end of the third current source is coupled to one end of the first switch, and the other end of the third current source is coupled to the power supply voltage. The control terminal of the first switch is coupled to the first control signal, and the other end of the first switch is coupled to the control electrode of the second transistor in the reference voltage generation circuit. One end of the fourth current source is coupled to one end of the second switch, and the other end of the fourth current source is coupled to the ground terminal. The control terminal of the second switch is coupled to the second control signal, and the other end of the second switch is coupled to the control electrode of the second transistor in the reference voltage generation circuit. The third current source is used to provide the injection current, and the fourth current source is used to provide the extraction current.

8. The output undervoltage and overvoltage improvement circuit according to claim 4, characterized in that, The first adaptive adjustment circuit includes: a fifth current source, a sixth transistor, and a seventh transistor. One end of the fifth current source is coupled to the third sampling current, the control electrode of the sixth transistor, the second electrode of the sixth transistor, and the control electrode of the seventh transistor, respectively, and the other end of the fifth current source is coupled to the ground terminal; The first terminal of the sixth transistor and the first terminal of the seventh transistor are both coupled to the input voltage of the voltage converter, and the second terminal of the seventh transistor is coupled to the control terminal of the second transistor in the reference voltage generation circuit; The fifth current source is used to provide the third preset current, and the current flowing through the seventh transistor is the first regulating current.

9. The output undervoltage and overvoltage improvement circuit according to claim 4, characterized in that, The second adaptive adjustment circuit includes: a sixth current source, an eighth transistor, and a ninth transistor. Wherein, one end of the sixth current source is coupled to the fourth sampling current, the control electrode of the eighth transistor, the second electrode of the eighth transistor, and the control electrode of the ninth transistor, respectively, and the other end of the sixth current source is coupled to the ground terminal; The first terminal of the eighth transistor and the first terminal of the ninth transistor are both coupled to the ground terminal, and the second terminal of the ninth transistor is coupled to the control terminal of the second transistor in the reference voltage generation circuit; The sixth current source is used to provide the third preset current, and the current flowing through the ninth transistor is the second regulated current.

10. A voltage converter, characterized in that, The voltage converter includes at least one output undervoltage and overvoltage improvement circuit according to any one of claims 1 to 9.

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