A two-stage beamforming method for real-time reconfigurable three-dimensional digital array

Abstract

This invention discloses a two-stage beamforming method for real-time reconfigurable 3D digital arrays. Addressing the challenges of high computational load, unstable interfaces, and complex engineering adaptation in online weight updates for dynamic beamforming (DBF) scenarios, this invention proposes an efficient weight generation and update scheme. Through four core design elements—fixed-depth storage, identifier addressing, two-stage weight decomposition, and local subarray refresh—this scheme significantly reduces computational load and refresh latency while ensuring output interface stability. It also boasts excellent engineering feasibility, enabling the two-stage DBF link to be synthesizable, packaged as an IP core, and exhibit stable interfaces and predictable latency on an FPGA platform.

Description

Technical Field

[0001] This invention belongs to the field of array beamforming technology, specifically relating to a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays. Background Technology

[0002] In digital array system engineering, the relative positions of array elements, their operating states (transmit / receive / off), and subarrays may dynamically change over time. The core idea of ​​array digital beamforming is to apply a set of complex weights to the signals received or transmitted by each array element, so that signals from the desired direction are phase-aligned and amplitude-added when superimposed, thereby forming a main lobe pointing in that direction and suppressing energy from other directions. Taking a narrowband plane wave model as an example, for array elements at different positions, signals from the same direction will generate a phase difference corresponding to the path difference when they arrive at that element. In-phase superposition can be achieved by applying opposite phase compensation in the digital domain, and beam scanning can be achieved by changing the compensation weight coefficients. To implement algorithms such as adaptive beamforming, the array is often divided into multiple subarrays in engineering, using a two-level structure: first, phase compensation is performed on each array element within the subarray, and then subarray-level phase compensation is performed on each subarray. Finally, the total receiving weight of the array elements is obtained through complex multiplication. This can reduce the scale and computational cost of subsequent adaptive weight optimization algorithms.

[0003] Current mainstream beamforming technologies are mostly designed for fixed array scenarios. Although they can be deployed and accelerated on hardware platforms such as FPGAs and GPUs, they still have significant limitations in real-time reconfigurable applications. Existing technologies that centrally calculate weights on the host computer and then distribute them require recalculating the weights of the entire array and distributing all the data. This results in a linear increase in computational load and transmission bandwidth with the number of array elements, making it difficult to meet real-time requirements at high update frequencies. In addition, dynamic changes in the effective array element set can cause fluctuations in output dimensions and indices. This not only requires additional adaptation development for the FPGA interface and subsequent algorithms but also increases the complexity of engineering implementation, leading to a significant increase in the overall cost of system integration and debugging.

[0004] Existing technical solutions often involve a fixed array integration algorithm after initial setup or require recalculation and distribution of the entire array weights after each change, resulting in high computational and bandwidth overhead and high update latency. In engineering, if the array size and the number of effective array elements change dynamically, the dimension of the weight vector will be not fixed, making it difficult to implement interfaces and subsequent processing in an engineering manner, especially difficult to implement fixed data flow and deterministic latency on the FPGA side. Currently, adaptive algorithms are often added before beamforming in engineering, requiring two levels of beamforming (subarray level + within subarray). However, when the subarray center is determined by the average value of the members, changes in a single array element will affect the weights of all members in the same subarray. Existing solutions lack efficient and deterministic two-level beam generation and local refresh mechanisms. Summary of the Invention

[0005] To address the aforementioned problems in the existing technology, this invention provides a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays. In a first aspect, the present invention provides a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays, the method comprising: Initialize the digital array; It continuously receives input data streams, automatically identifies the instruction type of the input data streams, and allocates the input data streams to the corresponding single-element update branch or global configuration update branch according to the instruction type; In the single-element update branch, the element information is updated by parsing the input data stream, the subarray incremental maintenance is performed according to the state changes of the elements, and the affected subarrays are identified; according to the changes in the subarray center of the affected subarrays, a local refresh or a direct refresh is performed to obtain the corresponding subarray weights, relative weights within the subarray, total receiving weights, and transmitting weights. In the global configuration update branch, the input data stream is parsed, a full refresh is performed to obtain the updated subarray weights and relative weights within the subarray, and point-by-point updates are performed to obtain the updated total receiving weights and transmitting weights. The transmitting elements in the control digital array form a transmitting beam according to the transmitting weight, and the receiving elements form a receiving beam according to the total receiving weight. First-level beam synthesis is performed according to the relative weights within the subarray. Second-level beam synthesis is performed based on the first-level beam synthesis according to the subarray weights to generate a bipolar beam.

[0006] In one embodiment of the present invention, initializing the digital array includes: All elements of the control digital array are in the off / zero coordinate state; Initialization is completed by fixing the mapping relationship between array elements and weights through a static storage structure.

[0007] In one embodiment of the present invention, the process of allocating the input data stream to the corresponding single-element update branch or global configuration update branch according to the instruction type includes: For changes in the state, coordinates, or subarray affiliation of a single array element, the input data stream is distributed to the single array element update branch; For changes in global parameters corresponding to beam angle and wavelength, the input data stream is allocated to the global configuration update branch.

[0008] In one embodiment of the present invention, updating array element information by parsing the input data stream, performing subarray incremental maintenance based on array element state changes, and identifying affected subarrays include: By parsing the input data stream, we can obtain the unique identifier, three-dimensional coordinates, working status, and subarray affiliation information of the array elements. The storage address is located by a unique identifier, and the array element information is updated accordingly. Based on the changes in the working status of the array element and the subarray affiliation information, the statistical information of the original and new subarrays to which the array element belonged is incrementally maintained, and the affected subarrays are identified based on the subarray affiliation information.

[0009] In one embodiment of the present invention, the process of performing a partial refresh or a direct refresh based on the changes in the subarray center of the affected subarray to obtain the corresponding subarray weights, relative weights within the subarray, total reception weights, and transmission weights includes: Determine whether the center of the affected subarray has changed: If the center of the subarray changes, a local refresh is triggered to recalculate the weights of the effective array elements within the subarray, resulting in the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT. If the center of the subarray remains unchanged, a direct refresh is triggered to update the weights of the current array elements, resulting in the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT.

[0010] In one embodiment of the present invention, the expression for subarray weight L2 is as follows: ; Represents the natural exponential function , Represents the imaginary unit. Indicates wave number, Subarray The geometric mean of the center of the subarray, This represents the direction vector received in a three-dimensional coordinate system; The expression for the relative weight L1 within the subarray is as follows: ; The unique identifier representing the array element, Indicates the coordinates of the array elements; The expression for the total reception right (WR) is as follows: ; The expression for the transmission right WT is as follows: ; This represents the launch direction vector.

[0011] In one embodiment of the present invention, the process of parsing the input data stream, performing a full refresh to obtain the updated subarray weights and relative weights within the subarray, and updating point by point to obtain the updated total receiving weights and transmitting weights includes: By parsing the input data stream, the beam angle and wavelength parameters are obtained; Update the global wavenumber and direction vector based on the beam angle and wavelength parameters, trigger a full refresh, update the center coordinates and weight cache of all subarrays, and obtain the updated subarray weights and relative weights within the subarrays. Scan the array elements in order of their unique identifiers, and update them point by point to obtain the updated total reception and transmission rights.

[0012] In one embodiment of the present invention, a busy signal is generated synchronously when receiving an input data stream, and the busy signal is cleared when generating subarray weights, relative weights within the subarray, total receiving weights, and transmitting weights, so as to ensure the consistency of the state of downstream modules.

[0013] In a second aspect, the present invention provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; The memory is used to store computer programs; When the processor executes the program stored in the memory, it implements the steps of the two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays provided in the first aspect of the present invention.

[0014] Thirdly, the present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of a two-stage beamforming method for a real-time reconfigurable three-dimensional digital array provided in the first aspect of the present invention.

[0015] The beneficial effects of this invention are: The solution provided by this invention supports highly flexible dynamic configuration of the array surface parameters of a digital array. Through a stable single-point input interface, the state, coordinates, and other parameters of a single array element can be updated in real time, meeting the flexible control requirements in complex dynamic scenarios. By using a fixed-depth weight storage and identifier addressing mechanism, the system integration complexity caused by dimensional fluctuations is completely avoided, significantly improving the modular integration efficiency with subsequent algorithms. The full array recalculation is optimized into a lightweight process of "incremental maintenance of subarray statistics + local scanning of subarrays," which significantly reduces the average computational load during single-point updates of array elements and improves efficiency significantly. Attached Figure Description

[0016] Figure 1 This is a schematic diagram illustrating the steps of a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays provided in an embodiment of the present invention. Figure 2 This is a flowchart illustrating a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays provided in an embodiment of the present invention. Figure 3This is a system block diagram of a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0017] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0018] This invention provides a two-stage beamforming method, electronic device, and storage medium for real-time reconfigurable three-dimensional digital arrays.

[0019] Below, we will first introduce a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays provided by an embodiment of the present invention.

[0020] The present invention provides a two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays, such as... Figure 1 and Figure 2 As shown, it may include the following steps: S1, initializing the digital array, may include: All elements of the control digital array are in the off / zero coordinate state; Initialization is completed by fixing the mapping relationship between array elements and weights through a static storage structure.

[0021] The embodiments of the present invention solidify the mapping relationship between array elements and weights through a static storage structure, ensuring the stability of the output interface dimension from the initial state and laying a reliable foundation for subsequent dynamic updates.

[0022] This invention utilizes fixed-depth array element storage and unique array element number addressing, replacing the dynamic array element list with fixed address mapping, thereby achieving fixed input / output dimensions and stable interface.

[0023] S2 continuously receives input data streams using pre-packaged FPGA IP cores, automatically identifies the instruction type of the input data stream, and allocates the input data stream to the corresponding single-element update branch or global configuration update branch according to the instruction type.

[0024] The process in step S2, which allocates the input data stream to the corresponding single-element update branch or global configuration update branch according to the instruction type, may include: For changes in the state, coordinates, or subarray affiliation of a single array element, the input data stream is distributed to the single array element update branch; For changes in global parameters corresponding to beam angle and wavelength, the input data stream is allocated to the global configuration update branch.

[0025] In S3, the array element update branch updates the array element information by parsing the input data stream, performs subarray incremental maintenance based on the state changes of the array elements, and identifies the affected subarrays. Based on the changes in the subarray center of the affected subarrays, it performs local or direct refresh to obtain the corresponding subarray weights, relative weights within the subarray, total receiving weights, and transmitting weights.

[0026] In step S3, updating the array element information by parsing the input data stream, performing subarray incremental maintenance based on the state changes of the array elements, and identifying the affected subarrays may include: By parsing the input data stream, the unique identifier of the array element is obtained. tag 3D coordinates, working status state Information on the affiliation of the sub-array subID ; The storage address is located by a unique identifier, and the array element information is updated accordingly. Based on the changes in the working status of the array element and the subarray affiliation information, the statistical information of the original and new subarrays to which the array element belonged is incrementally maintained, and the affected subarrays are identified based on the subarray affiliation information.

[0027] state Indicates the working status of the array element (2-receive / 1-transmit / 0-off). subID This represents the subarray number, indicating which subarray the array element belongs to.

[0028] Based on the changes in the subarray centers of the affected subarrays, the process of performing partial or direct refresh to obtain the corresponding subarray weights, relative weights within the subarray, total receiving weights, and transmitting weights may include: Determine whether the center of the affected subarray has changed: If the center of the subarray changes, a local refresh is triggered to recalculate the weights of the effective array elements within the subarray, resulting in the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT. If the center of the subarray remains unchanged, a direct refresh is triggered to update the weights of the current array elements, resulting in the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT.

[0029] Understandably, in the above single-element update process, firstly, the unique identifier, three-dimensional coordinates, working status, and subarray affiliation information of the element are parsed. The storage address is directly located through the unique identifier of the element, achieving efficient updating of element information. Subsequently, based on the changes in the element's status, the statistical information of its original and new subarray affiliations is incrementally maintained, and the subarray affiliation information of the input element is parsed... subID )definition subIDThis subarray is the affected subarray, and it is marked as pending a refresh. The system then checks if the center of the affected subarray has changed: if the center has changed due to this update, the system will trigger a partial refresh process, updating the subarrays under the "dirty" category. subID L2, update all items belonging to dirty_ subID Below tag For each array element's L1, only the effective array elements within that subarray are recalculated to obtain the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT. If the subarray center remains unchanged, L2 does not need to be updated; instead, the weights of the current array elements are directly updated to obtain the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT. After the weight calculation is completed, the results are written to the storage unit. When receiving the input data stream, a busy signal is generated synchronously. When generating the subarray weights, the relative weights within the subarray, the total receiving weight, and the transmitting weight, the busy signal is cleared to ensure the consistency of the downstream modules' states.

[0030] The formula for calculating the output weights is as follows: Subarray center (geometric mean): Only the received state array elements are counted, among which, Subarray The geometric mean of the center of the subarray, For the sub-array The number of receiver state members, For the coordinates of the array elements, This indicates the storage block for array element information.

[0031] The expression for subarray weight L2 is as follows: ; Represents the natural exponential function , Represents the imaginary unit. Indicates wave number, = 2π / λ, Subarray The geometric mean of the subarray centers, where λ represents the wavelength. This represents the direction vector received in a three-dimensional coordinate system, determined by the beam elevation azimuth angle.

[0032] The expression for the relative weight L1 within the submatrix is ​​as follows: ; This is a unique identifier for each array element, representing the input array element number, ranging from (1 to Nmax), where Nmax is the maximum number of supported array elements. Represents the coordinates of the array elements.

[0033] The relative weight L1 within the subarray is calculated based on the coordinates of the array element relative to the center of the subarray and is only related to its position within the subarray.

[0034] The expression for the total acceptance weight (WR) is as follows: ; The expression for transmit right (WT) is as follows: ; This represents the transmission direction vector, which is determined by the transmission beam angle.

[0035] S4, in the global configuration update branch, parse the input data stream, perform a full refresh to obtain the updated subarray weights and relative weights within the subarray, and update point by point to obtain the updated total receiving weights and transmitting weights, which may include: By parsing the input data stream, the beam angle and wavelength parameters are obtained; Update the global wavenumber and direction vector based on the beam angle and wavelength parameters, trigger a full refresh, update the center coordinates and weight cache of all subarrays, and obtain the updated subarray weights and relative weights within the subarrays. Scan the array elements in order of their unique identifiers, and update them point by point to obtain the updated total reception and transmission rights.

[0036] During the global configuration update process, the beam angle and wavelength parameters are analyzed, and the global wavenumber and direction vector are updated accordingly, triggering a full refresh mechanism. The refresh process is divided into two stages: first, the center coordinates and weight caches of all subarrays are updated, and then the weights of the entire array are updated in the order of the unique identifiers of the array elements. After the full refresh is completed, the busy signal is automatically cleared and the system returns to the command receiving state.

[0037] Understandably, once the system completes the update task for the current frame, it will automatically return to the instruction receiving state, continue to process new input instructions, and advance the background refresh process during the input intervals, thereby forming a stable online closed-loop update mechanism to ensure the continuous and reliable operation of the system in dynamic scenarios.

[0038] A flowchart illustrating the two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays provided in this embodiment of the invention is shown below. Figure 2 As shown, the workflow of the two-stage beamforming method provided in this embodiment of the invention is divided into two types: single element update triggering local refresh and configuration change triggering full refresh. The workflow is divided into two core scenarios: single element update triggering local refresh and configuration change triggering full refresh. If an element update is triggered, the data flow along... Figure 2 Processing proceeds sequentially from left to right. If a configuration update is triggered, the data flow continues along... Figure 2 Process the right side of the middle section in sequence.

[0039] This invention constructs a two-level DBF link. Through subarray update marking and scan scheduling, it only refreshes the two-level weights and total weights of the affected subarray members, and provides two-level weight output interfaces for users to select and use.

[0040] S5 controls the transmitting elements in the digital array to form a transmitting beam according to the transmitting weight, and the receiving elements to form a receiving beam according to the total receiving weight. First-level beam synthesis is performed according to the relative weights within the subarray. Second-level synthesis is performed based on the first-level beam synthesis according to the subarray weights to generate a bipolar beam.

[0041] The system can read the weights based on the busy signal. When busy=0, it means the weights are the latest updated weights. Then, WT can be read and multiplied by WT*(tag) for each transmitting element tag to form the transmit beam. Similarly, WR can be read and multiplied by WR*(tag) for each receiving element tag to form the receive beam. For a subarray synthesis radar system, first, the receiving element tag in each subarray can be multiplied by L1*(tag) and added together for first-level synthesis. Then, based on the first-level synthesis, each synthesized subarray can be multiplied by L2*(subID) for second-level synthesis to obtain the final two-stage beam. Here, * represents conjugation.

[0042] The derivation of the three-dimensional beamforming formula is as follows: Assuming there exists in three-dimensional space Each array element is located at... Place, , Indicates the first i The three-dimensional coordinates of each array element. The first array element is located at the origin O, which is... = (0, 0, 0). Assume all array elements are located in the far-field space of the wave source, meaning the space wave travels as a plane wave. M Each array element, and then denotes the isochronous plane wave propagation surface. It is a unit normal vector that passes through the point The isochronous surface at (origin O) is a plane. S Clearly, the array element... To wait for the surface S distance d i That is, the wave reaches the array element. The extra distance traveled compared to reaching array element P1 can be calculated using the formula for the distance from a point to a plane: ; in, Denotes the incident normal vector. This indicates the direction from the origin O to the first... Individual The position vector.

[0043] The incident normal vector Transform to spherical coordinates hour, This can be viewed as the incident angle of the array, and the coordinate transformation formula is: ; Represents pitch angle, vector and Angle between planes Indicates the azimuth angle, as exist Projection on a plane and The angle along the positive direction of the axis. Representing vectors The length of the module.

[0044] because If it is a unit vector, then we have r =1. It can be seen that the plane wave reaches the first... i The path difference between each array element and the first array element is as follows: ; Let the wave propagation speed be... c Then the plane wave reaches the first i The time difference between each array element and the first array element is as follows: ; Let the frequency of the wave be... f According to the time-phase transformation formula: φ = 2 π ft Wavelength to frequency conversion formula: λ = c / f The plane wave reaches the first i The phase difference between each element and the first element is as follows: .

[0045] Understandably, the above calculation formulas are all relative to the path difference calculated with respect to the first array element. However, the essence of beamforming is to align the phase of each channel. Therefore, a fixed point, such as the origin / subarray center point, is taken as the reference point. In this embodiment of the invention, a fixed point is taken as the reference point to facilitate engineering implementation.

[0046] The two-stage beamforming method provided in this embodiment of the invention corresponds to a beamforming weight calculation and output system for real-time reconfigurable arrays, such as... Figure 3 As shown, this system achieves efficient and stable weight generation through a layered architecture, as detailed below: The system's input layer supports two types of commands: single-element update and global configuration update, driving system operation differently. The parsing module achieves precise storage location through identifier addressing, triggering incremental or full update processes. The storage layer adopts a fixed-capacity RAM design, with the element RAM maintaining element information, the subarray table RAM maintaining subarray statistics, and the weight RAM maintaining calculated weights. The refresh scheduling module triggers local refreshes by monitoring the subarray status, reducing the overhead of full recalculation. The output interface has a fixed dimension, with an output weight reading interface. Two-pole beams are generated based on subarray weights, relative weights within the subarray, total receiving weight, and transmitting weight.

[0047] This system effectively solves problems such as large computational load, unstable interface, and complex engineering adaptation in real-time reconfigurable scenarios through incremental maintenance, partial refresh, and fixed-dimensional interface design, significantly improving the system's real-time performance and engineering feasibility.

[0048] The system can adopt a pipelined architecture of "input-storage-computation-refresh-output", and the connection relationship between modules is as follows: Figure 3 As shown, both the array element RAM and the weight RAM have a fixed depth to ensure the stability of the interface dimension. The weight calculation module and the subarray accumulator module are decoupled to support parallel computing. The scheduling module, as the core control unit, coordinates the priority of partial refresh and full refresh to avoid conflicts.

[0049] The embodiments of this invention are adapted to three-dimensional coordinate array elements, the position and status of the array elements are controllable in real time, the basic radar parameter configuration can be updated, and the function pipeline is implemented based on HLS tools, which is integrated and packaged into an IP core, and the weights can be refreshed in real time.

[0050] The two-stage beamforming method provided in this embodiment of the invention has the following advantages: It supports highly flexible dynamic configuration of array parameters. Through a stable single-point input interface, the status, coordinates and other parameters of a single array element can be updated in real time, meeting the flexible control needs in complex dynamic scenarios.

[0051] In scenarios where the array structure changes dynamically, the external interface and data dimensions remain constant. By using a fixed-depth weight storage and identifier addressing mechanism, the system integration complexity caused by dimensional fluctuations is completely avoided, significantly improving the modular integration efficiency with subsequent algorithms.

[0052] The optimization of the entire array recalculation into a lightweight process of "incremental maintenance of subarray statistics + local scanning of subarrays" significantly reduces the average computational cost when updating array elements at a single point. This optimization can bring even more significant efficiency improvements when the subarray size is much smaller than the entire array or when update events are sparse.

[0053] This two-stage beamforming method distinguishes between partial refresh and full refresh modes and adopts a fixed-sequence scanning mechanism, which enables the system latency to be highly controllable and deterministic, better adapting to FPGA pipeline implementation and improving timing convergence efficiency.

[0054] The embodiments of this invention are implemented based on C++ and HLS, and can be directly packaged as FPGA IP cores. They have good cross-platform portability and are easy to deploy and integrate quickly on different hardware platforms.

[0055] Secondly, embodiments of the present invention also provide an electronic device, such as... Figure 4 As shown, it includes a processor 001, a communication interface 002, a memory 003, and a communication bus 004, wherein the processor 001, the communication interface 002, and the memory 003 communicate with each other through the communication bus 004. The memory is used to store computer programs; When the processor executes the program stored in the memory, it implements the steps of any of the two-stage beamforming methods for real-time reconfigurable three-dimensional digital arrays provided in the first aspect of the present invention.

[0056] The communication bus mentioned in the above electronic devices can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used to represent it in the diagram, but this does not mean that there is only one bus or one type of bus.

[0057] The communication interface is used for communication between the aforementioned electronic devices and other devices.

[0058] The memory may include random access memory (RAM) or non-volatile memory (NVM), such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0059] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0060] The method provided in this invention can be applied to electronic devices. Specifically, the electronic device can be a desktop computer, a portable computer, a smart mobile terminal, a server, etc. No limitation is made herein; any electronic device that can implement this invention falls within the protection scope of this invention.

[0061] Thirdly, corresponding to the two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays provided in the first aspect, this embodiment of the invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of any of the two-stage beamforming methods for real-time reconfigurable three-dimensional digital arrays provided in the first aspect of this invention.

[0062] For the embodiments of the device / electronic device / storage medium, since they are basically similar to the method embodiments, the description is relatively simple, and relevant parts can be referred to in the description of the method embodiments.

[0063] It should be noted that the electronic device and storage medium in the embodiments of the present invention are respectively electronic devices and storage media that apply the above-described two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays. Therefore, all embodiments of the above method are applicable to the electronic device and storage medium, and can achieve the same or similar beneficial effects.

[0064] It should be noted that, in the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0065] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays, characterized in that, include: Initialize the digital array; The system continuously receives input data streams using pre-packaged FPGA IP cores, automatically identifies the instruction type of the input data stream, and allocates the input data stream to the corresponding single-element update branch or global configuration update branch according to the instruction type. In the single-element update branch, the element information is updated by parsing the input data stream, the subarray incremental maintenance is performed according to the state changes of the elements, and the affected subarrays are identified; according to the changes in the subarray center of the affected subarrays, a local refresh or a direct refresh is performed to obtain the corresponding subarray weights, relative weights within the subarray, total receiving weights, and transmitting weights. In the global configuration update branch, the input data stream is parsed, a full refresh is performed to obtain the updated subarray weights and relative weights within the subarray, and point-by-point updates are performed to obtain the updated total receiving weights and transmitting weights. The transmitting elements in the control digital array form a transmitting beam according to the transmitting weight, and the receiving elements form a receiving beam according to the total receiving weight. First-level beam synthesis is performed according to the relative weights within the subarray. Second-level beam synthesis is performed based on the first-level beam synthesis according to the subarray weights to generate a bipolar beam.

2. The two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays according to claim 1, characterized in that, The initialization of the digital array includes: All elements of the control digital array are in the off / zero coordinate state; Initialization is completed by fixing the mapping relationship between array elements and weights through a static storage structure.

3. The two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays according to claim 1, characterized in that, The process of allocating the input data stream to the corresponding single-element update branch or global configuration update branch according to the instruction type includes: For changes in the state, coordinates, or subarray affiliation of a single array element, the input data stream is distributed to the single array element update branch; For changes in global parameters corresponding to beam angle and wavelength, the input data stream is allocated to the global configuration update branch.

4. The two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays according to claim 1, characterized in that, The process of updating array element information by parsing the input data stream, performing subarray incremental maintenance based on array element state changes, and identifying affected subarrays includes: By parsing the input data stream, we can obtain the unique identifier, three-dimensional coordinates, working status, and subarray affiliation information of the array elements. The storage address is located by a unique identifier, and the array element information is updated accordingly. Based on the changes in the working status of the array element and the subarray affiliation information, the statistical information of the original and new subarrays to which the array element belonged is incrementally maintained, and the affected subarrays are identified based on the subarray affiliation information.

5. A two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays according to claim 1, characterized in that, The process of performing a partial or direct refresh based on the changes in the subarray center of the affected subarray to obtain the corresponding subarray weights, relative weights within the subarray, total receiving weights, and transmitting weights includes: Determine whether the center of the affected subarray has changed: If the center of the subarray changes, a local refresh is triggered to recalculate the weights of the effective array elements within the subarray, resulting in the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT. If the center of the subarray remains unchanged, a direct refresh is triggered to update the weights of the current array elements, resulting in the subarray weight L2, the relative weight within the subarray L1, the total receiving weight WR, and the transmitting weight WT.

6. A two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays according to claim 5, characterized in that, The expression for the subarray weight L2 is as follows: ； Represents the natural exponential function , Represents the imaginary unit. Indicates wave number, Subarray The geometric mean of the center of the subarray, This represents the direction vector received in a three-dimensional coordinate system; The expression for the relative weight L1 within the subarray is as follows: ； The unique identifier representing the array element, Indicates the coordinates of the array elements; The expression for the total reception right (WR) is as follows: ； The expression for the transmission right WT is as follows: ; This represents the launch direction vector.

7. A two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays according to claim 1, characterized in that, The process of parsing the input data stream, performing a full refresh to obtain the updated subarray weights and relative weights within the subarray, and updating point by point to obtain the updated total receiving weights and transmitting weights includes: By parsing the input data stream, the beam angle and wavelength parameters are obtained; Update the global wavenumber and direction vector based on the beam angle and wavelength parameters, trigger a full refresh, update the center coordinates and weight cache of all subarrays, and obtain the updated subarray weights and relative weights within the subarrays. Scan the array elements in order of their unique identifiers, and update them point by point to obtain the updated total reception and transmission rights.

8. A two-stage beamforming method for real-time reconfigurable three-dimensional digital arrays according to claim 1, characterized in that, When receiving the input data stream, a busy signal is generated synchronously. When generating the subarray weights, relative weights within the subarray, total receiving weights, and transmitting weights, the busy signal is cleared to ensure the consistency of the downstream modules' states.

9. An electronic device, characterized in that, It includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; The memory is used to store computer programs; When the processor executes the program stored in the memory, it implements the steps of the two-stage beamforming method for a real-time reconfigurable three-dimensional digital array as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of a two-stage beamforming method for a real-time reconfigurable three-dimensional digital array as described in any one of claims 1-8.

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