Transient voltage suppressor based on path decoupling and electric field coupling triggering and manufacturing method thereof

Abstract

This invention provides a transient voltage suppressor based on path decoupling and electric field coupling triggering, and its manufacturing method. The transient voltage suppressor includes at least one device unit. The device unit includes a first electrode and a second electrode, a triggering unit, a dominant conduction unit, and a coupling unit. The triggering unit includes a second conductivity type highly doped region and a first conductivity type highly doped region. A local PN junction region is formed between the second conductivity type highly doped region and the first conductivity type low doped drift region, and the first conductivity type highly doped region is disposed on the coupling dielectric layer. When avalanche breakdown occurs in the local PN junction region, a displacement current is formed through the coupling dielectric layer and coupled to the dominant conduction unit, thereby triggering the dominant conduction unit to form a longitudinal low-resistance dominant conduction path. The dominant conduction unit is in a high-resistance state under static bias conditions, so that the static equivalent junction capacitance of the device is mainly determined by the local PN junction region, thereby taking into account low junction capacitance, low dynamic resistance, and high surge current carrying capacity.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor transient overvoltage protection device technology, specifically relating to a low junction capacitance transient voltage suppressor (TVS) structure and manufacturing method for high-speed interface electrostatic discharge (ESD) and surge protection, and particularly to a transient voltage suppressor based on path decoupling and electric field coupling triggering and its manufacturing method. Background Technology

[0002] Transient voltage suppressors (TVS) are widely used in the fields of electrostatic discharge (ESD) and surge protection of integrated circuits. Their basic working principle is to quickly discharge transient overcurrent to the reference potential by breaking down or triggering conduction under overvoltage conditions, thereby protecting the downstream circuit from overvoltage damage.

[0003] With the development of high-speed communication interfaces, high-speed data links, radio frequency systems, and high-speed vehicle networks, protection devices not only need to have high surge current carrying capacity and low dynamic resistance, but also low parasitic junction capacitance to reduce the adverse effects on high-speed signal integrity, insertion loss, and transmission bandwidth.

[0004] Existing TVS devices typically achieve voltage clamping functionality based on PN junction avalanche breakdown, Zener breakdown, punch-through breakdown, SCR structures, or combinations thereof. In these structures, triggering, capacitance formation, and surge conduction functions are usually shared by the same PN junction structure or the same conduction structure.

[0005] Therefore, in the existing structure: On the one hand, in order to reduce the trigger voltage, it is usually necessary to increase the local doping concentration, reduce the junction spacing, or enhance the local electric field. However, the above measures will lead to a reduction in the depletion layer width, thereby increasing the junction capacitance of the device. On the other hand, in order to improve the surge current carrying capacity, it is usually necessary to expand the conduction area or increase the conduction cross-sectional area, which will further increase the junction area and parasitic capacitance.

[0006] Therefore, existing technologies generally suffer from the problem of simultaneously achieving low trigger voltage, low junction capacitance, and high surge capability.

[0007] In addition, existing TVS devices based on SCR or parasitic bipolar structures typically rely on carrier injection to form a regenerative conduction mechanism, which can easily lead to latch-up risk, false triggering problems, and increased high-frequency parasitic effects, thus affecting the reliability of the devices in high-speed interfaces.

[0008] While existing technologies improve some performance indicators by optimizing doping distribution, drift region structure, SCR trigger structure, or composite clamp structure, the trigger path, dominant conduction path, and capacitance formation path are still handled by the same functional structure, making independent optimization difficult. There is a lack of a transient voltage suppressor structure in the current technology that can decouple the trigger path, dominant conduction path, and capacitance formation path at the structural level. Summary of the Invention

[0009] To address at least one technical problem in the prior art, embodiments of the present invention provide a transient voltage suppressor based on path decoupling and electric field coupling triggering, and its manufacturing method. The aim is to solve the performance coupling problem caused by the triggering function, main conduction function, and capacitance formation function being jointly undertaken by the same structure in existing transient voltage suppressors. Without excessively increasing the doping concentration or reducing the junction size, the invention achieves synergistic optimization among low trigger voltage, low junction capacitance, low dynamic resistance, and high surge withstand capability. To achieve the above technical objectives, the technical solution adopted by embodiments of the present invention is as follows: In a first aspect, embodiments of the present invention provide a transient voltage suppressor based on path decoupling and electric field coupling triggering, comprising at least one device unit; characterized in that the device unit comprises: First electrode and second electrode; Trigger unit; Main communication unit; Coupling unit; in, The dominant conduction unit includes a first conductivity type semiconductor substrate and a first conductivity type low-doped drift region formed on the first conductivity type semiconductor substrate; the first electrode is disposed on the front side of the first conductivity type low-doped drift region, and the second electrode is disposed on the back side of the first conductivity type semiconductor substrate; an interlayer dielectric layer is provided between the first conductivity type low-doped drift region and the first electrode. The triggering unit includes a second conductivity type highly doped region and a first conductivity type highly doped region; the second conductivity type highly doped region and the first conductivity type highly doped region are formed on top of the first conductivity type low doped drift region, and a lateral spacing d is maintained between them in the first lateral direction; the second conductivity type highly doped region and the first conductivity type highly doped region are electrically connected to the first electrode through contact holes; a local PN junction region is formed between the second conductivity type highly doped region and the first conductivity type low doped drift region; The coupling unit includes a coupling dielectric layer; the coupling dielectric layer is disposed between a highly doped region of the first conductivity type and a low-doped drift region of the first conductivity type; a static electrical isolation state is formed between the highly doped region of the first conductivity type and the low-doped drift region of the first conductivity type through the coupling dielectric layer; the coupling unit is used to establish an electric field coupling relationship between the triggering unit and the dominant pass unit. The lateral dielectric withstand voltage corresponding to the lateral spacing d is greater than the longitudinal avalanche breakdown voltage of the local PN junction region; The dominant pass unit is configured such that, under static bias conditions, its internal electric field is lower than the avalanche breakdown critical electric field, thus being in a high-resistance non-conducting state and not forming a longitudinal low-resistance dominant pass path that runs through the first electrode and the second electrode. The coupling unit is configured such that, under reverse bias conditions, when a local avalanche breakdown preferentially occurs in the local PN junction region of the trigger unit, it responds to the rapid change in potential near the local PN junction region by forming a displacement current through the coupling dielectric layer and acting on the dominant conduction unit through electric field coupling, thereby triggering dynamic electric field reconstruction inside the dominant conduction unit. This causes the electric field of the dynamically formed local high-field region inside the dominant conduction unit to reach the avalanche breakdown critical electric field, forming a longitudinal volumetric avalanche conduction region inside the dominant conduction unit, thereby establishing a longitudinal low-resistance dominant conduction path through the first electrode and the second electrode within the dominant conduction unit.

[0010] Furthermore, the doping concentration of the first conductivity type low-doped drift region is 1x10⁻⁶. 14 cm -3 Up to 1x10 16 cm -3 The thickness is 20–80 μm.

[0011] Furthermore, the lateral spacing d between the second conductivity type highly doped region and the first conductivity type highly doped region is 0.5 to 5 μm.

[0012] Furthermore, the junction depth of the second conductivity type highly doped region is less than 0.5 μm; the thickness of the first conductivity type highly doped region is 0.1–1.0 μm.

[0013] Furthermore, the junction area of ​​the local PN junction region is less than 10% of the effective conduction area of ​​the dominant conduction unit.

[0014] Furthermore, the thickness of the coupling medium layer is 10–50 nm.

[0015] Furthermore, the coupling dielectric layer is formed on the surface of the low-doped drift region of the first conductivity type, and the high-doped region of the first conductivity type is formed on the coupling dielectric layer; or, The coupling dielectric layer is formed on the inner wall of a shallow trench at the top of a low-doped drift region of the first conductivity type, and the high-doped region of the first conductivity type is formed in the shallow trench of the low-doped drift region of the first conductivity type.

[0016] Furthermore, the second conductivity type highly doped region is connected to the first electrode through a high-resistance connection structure; the high-resistance connection structure is used to provide a controlled charge discharge path during the recovery process after a static standby state or a surge.

[0017] Furthermore, the device unit also includes a deep trench isolation structure; the deep trench isolation structure is disposed in the two side boundary regions of the device unit in the first lateral direction and extends in the second lateral direction perpendicular to the first lateral direction; the deep trench isolation structure penetrates downward from the surface of the low-doped drift region of the first conductivity type to the semiconductor substrate of the first conductivity type.

[0018] Furthermore, the transient voltage suppressor includes multiple device units; the multiple device units are arranged in parallel in a first lateral direction and a second lateral direction perpendicular to the first lateral direction to form a two-dimensional array structure; and the multiple device units share a first electrode and a second electrode.

[0019] Secondly, embodiments of the present invention provide a method for manufacturing a transient voltage suppressor based on path decoupling and electric field coupling triggering, used to manufacture the transient voltage suppressor based on path decoupling and electric field coupling triggering as described above, characterized by comprising the following steps: Step S10: Provide a semiconductor substrate of the first conductivity type, and epitaxially grow a low-doped epitaxial layer of the first conductivity type on it to form a low-doped drift region of the first conductivity type, so as to form a dominant pass cell; Step S20: A coupling dielectric layer is formed on the surface and / or inside of the top of the main pass unit; wherein the coupling dielectric layer is formed on the top surface of the device or the inner wall of the top shallow trench; Step S30: A second conductivity type highly doped region is formed in a local region of the dominant pass unit by ion implantation, so as to form a local PN junction region between the dominant pass unit and the dominant pass unit; Step S40, optionally, a high-resistance connection structure is formed between the highly doped region of the second conductivity type and the reserved first electrode contact region; Step S50: Deposit conductive polysilicon on the coupling dielectric layer and perform first conductivity type doping to form a first conductivity type highly doped region; Step S60: Deposit an interlayer dielectric layer on the top surface of the main pass unit and etch to form contact holes; In step S70, a first electrode is formed on the front side of the low-doped drift region of the first conductivity type, and a second electrode is formed on the back side of the semiconductor substrate of the first conductivity type.

[0020] The beneficial effects of the technical solution provided by the embodiments of the present invention are as follows: 1) It is beneficial to achieve ultra-low junction capacitance Since the main conduction unit is in a high-resistance non-conducting state under static bias conditions, it does not constitute the main source of contribution to the device's equivalent junction capacitance. Therefore, the device's static equivalent junction capacitance is mainly formed by the local PN junction region of the trigger unit with a smaller junction area. This achieves decoupling between junction capacitance and surge conduction capability at the structural level and helps reduce the device's total capacitance.

[0021] 2) It facilitates the achievement of low trigger voltage and independent control. Since the triggering function is undertaken independently by the triggering unit, its breakdown characteristics are mainly determined by the local PN junction structure, lateral spacing and doping distribution, and are relatively independent of the dominant pass unit. Therefore, the trigger voltage can be adjusted by adjusting the structural parameters of the triggering unit without significantly affecting the junction capacitance of the device.

[0022] 3) It helps reduce dynamic resistance Since the dominant pass unit adopts a vertically low-doped drift region structure and forms a large cross-sectional area vertically low-resistance dominant pass path after triggering, it is beneficial to reduce the dynamic resistance of the device.

[0023] 4) It helps improve surge withstand capability. Since the surge current mainly expands longitudinally and diffuses laterally within the body region of the dominant conduction unit, it can reduce the local current density and increase the heat diffusion volume, thereby improving the thermal stability and surge current withstand capability of the device.

[0024] 5) It helps reduce the risk of latch-up. Since there is no continuous carrier regeneration conduction path between the triggering unit and the dominant conduction unit, and the conduction of the dominant conduction unit is mainly triggered by the displacement current generated by electric field coupling, the device can automatically return to the high-resistance cutoff state after the surge ends, which helps to reduce the latch-up risk in the traditional SCR structure.

[0025] 6) Good process compatibility This invention can be implemented based on conventional semiconductor processes, including epitaxial growth, shallow junction implantation, dielectric deposition, trench etching, and metal interconnection, without the need to introduce special materials or extreme process conditions. Therefore, it is advantageous to implement on existing CMOS, BCD, or bipolar process platforms. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the transient voltage suppressor structure in an embodiment of the present invention.

[0027] Figure 2 This is an equivalent circuit diagram of the transient voltage suppressor in an embodiment of the present invention.

[0028] Figure 3 This is a schematic diagram of the transient voltage suppressor IV characteristic curve in an embodiment of the present invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0030] In the description of the embodiments of the present invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention. In addition, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0031] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can also refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in the present invention based on the specific circumstances.

[0032] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0033] In the following embodiments, the first conductivity type is N-type and the second conductivity type is P-type.

[0034] (a) such as Figure 1 As shown, this embodiment of the invention proposes a transient voltage suppressor (hereinafter referred to as the device) based on path decoupling and electric field coupling triggering, comprising at least one device unit; the device unit includes: First electrode 100 and second electrode 600; Trigger unit 200; Main communication unit 300; Coupling unit 400; in, The dominant conduction unit 300 includes a first conductivity type semiconductor substrate 301 and a first conductivity type low-doped drift region 302 formed on the first conductivity type semiconductor substrate 301; the first electrode 100 is disposed on the front side of the first conductivity type low-doped drift region 302, and the second electrode 600 is disposed on the back side of the first conductivity type semiconductor substrate 301; an interlayer dielectric layer 700 is provided between the first conductivity type low-doped drift region 302 and the first electrode 100. The triggering unit 200 includes a second conductivity type highly doped region 201 and a first conductivity type highly doped region 202; the second conductivity type highly doped region 201 and the first conductivity type highly doped region 202 are formed on the top of the first conductivity type low doped drift region 302, and a lateral spacing d is maintained between them in the first lateral direction; Figure 1 The left-right direction is the first lateral direction, and the direction perpendicular to the paper plane is the second lateral direction; the second conductivity type highly doped region 201 and the first conductivity type highly doped region 202 are respectively electrically connected to the first electrode 100 through contact holes; a local PN junction region 203 is formed between the second conductivity type highly doped region 201 and the first conductivity type low doped drift region 302. The coupling unit 400 includes a coupling dielectric layer 401; the coupling dielectric layer 401 is disposed between a first conductivity type highly doped region 202 and a first conductivity type low doped drift region 302; the first conductivity type highly doped region 202 and the first conductivity type low doped drift region 302 form a static electrical isolation state through the coupling dielectric layer 401; the coupling unit 400 is used to establish the electric field coupling relationship between the triggering unit 200 and the dominant pass unit 300. The lateral dielectric withstand voltage corresponding to the lateral spacing d is greater than the longitudinal avalanche breakdown voltage of the local PN junction region 203; The dominant conduction unit 300 is configured such that, under static bias conditions, its internal electric field is lower than the avalanche breakdown critical electric field, thereby being in a high-resistance non-conducting state and not forming a longitudinal low-resistance dominant conduction path through the first electrode 100 and the second electrode 600. The coupling unit 400 is configured such that, under reverse bias conditions, when a local avalanche breakdown preferentially occurs in the local PN junction region 203 in the trigger unit 200, in response to the rapid change in potential near the local PN junction region 203, a displacement current is formed through the coupling dielectric layer 401 and acts on the dominant conduction unit 300 through electric field coupling, thereby triggering dynamic electric field reconstruction inside the dominant conduction unit 300, so that the electric field of the dynamically formed local high field region inside the dominant conduction unit 300 reaches the avalanche breakdown critical electric field, forming a longitudinal volumetric avalanche conduction region inside the dominant conduction unit 300, thereby establishing a longitudinal low-resistance dominant conduction path through the first electrode 100 and the second electrode 600 within the dominant conduction unit 300.

[0035] (II) The following is a detailed introduction to each component of the device unit.

[0036] 1) Overall Structure The triggering unit 200 is used to form a local PN junction region 203 and realize low voltage triggering; the main conduction unit 300 is used to form a longitudinal low-resistance main conduction path after triggering and to undertake the function of surge current discharge; the coupling unit 400 is disposed between the triggering unit 200 and the main conduction unit 300 to establish an electric field coupling relationship. The local PN junction region 203 in the trigger unit 200 has a small junction area, which can reduce the static equivalent junction capacitance of the device; while the main conduction unit 300 adopts a large-area vertical conduction structure to improve the surge current carrying capacity and reduce the dynamic resistance. Under static bias conditions, the dominant pass unit 300 is in a high-resistance non-conducting state and does not form a longitudinal low-resistance dominant pass path that runs through the first electrode 100 and the second electrode 600. The static equivalent junction capacitance of the device is mainly determined by the local PN junction region 203 in the trigger unit 200. The first conductivity type highly doped region 202 in the triggering unit 200 does not form a continuous carrier conduction path with the dominant conduction unit 300, but establishes an electric field coupling relationship through the coupling dielectric layer 401 in the coupling unit 400. When a local avalanche breakdown occurs in the local PN junction region 203 in the triggering unit 200, the local potential in its vicinity changes rapidly and a displacement current is generated through the coupling structure 400. The displacement current acts on the main conduction unit 300, changing the local potential and electric field distribution inside it, thereby causing the main conduction unit 300 to enter the conduction state and forming a longitudinal low-resistance main conduction path to realize surge current discharge. Through the above structural design, the present invention achieves structural decoupling between the trigger path, the capacitance formation path and the main conduction path, thereby realizing relatively independent optimization between the trigger voltage and the junction capacitance, while taking into account both low dynamic resistance and high surge current carrying capacity.

[0037] 2) Main communication unit 300 The dominant conduction unit 300 includes a first conductivity type semiconductor substrate 301 and a first conductivity type low-doped drift region 302 formed on the first conductivity type semiconductor substrate 301; The resistivity of the first conductivity type semiconductor substrate 301 is preferably 0.001 to 0.005 Ω•cm, which is used to form a low-resistivity lead-out path for the second electrode 600. A first conductivity type low-doped epitaxial layer is formed on a first conductivity type semiconductor substrate 301 to constitute a first conductivity type low-doped drift region 302; the doping concentration of the first conductivity type low-doped drift region 302 is 1x10⁻⁶.14 cm -3 Up to 1x10 16 cm -3 The thickness is 20–80 μm; The main conduction unit 300 is a longitudinal conduction structure, and its effective conduction area is significantly larger than the junction area of ​​the local PN junction region 203 of the trigger unit 200, which is used to undertake the main surge current discharge function after triggering. Under static bias conditions, the electric field inside the dominant pass unit 300 is lower than the avalanche breakdown critical electric field and remains in a high-resistance non-conducting state. Therefore, the static equivalent junction capacitance of the device is mainly determined by the local PN junction region 203 in the trigger unit 200. Since the dominant pass unit 300 does not form a large area depletion region under static bias conditions, its contribution to the static equivalent junction capacitance of the device is small. Under reverse bias conditions, when the device encounters a reverse transient overvoltage, the displacement current generated by the coupling unit 400 is used to change the electric field distribution inside the dominant conduction unit 300, so that the local high field region inside the dominant conduction unit 300 reaches the avalanche breakdown critical electric field, that is, the avalanche breakdown condition is met, and a longitudinal volume avalanche conduction region is formed inside the dominant conduction unit 300, thereby establishing a longitudinal low-resistance dominant conduction path through the first electrode 100 and the second electrode 600 inside the dominant conduction unit 300.

[0038] 3) Trigger unit 200 In the trigger unit 200, the second conductivity type highly doped region 201 and the first conductivity type highly doped region 202 maintain a lateral spacing d between them in the first lateral direction to reduce the risk of lateral leakage and parasitic surface conduction; the lateral spacing d between the second conductivity type highly doped region 201 and the first conductivity type highly doped region 202 is 0.5 to 5 μm; preferably 1 to 1.5 μm; The lateral spacing d is set based on the reverse breakdown voltage of the device. The corresponding lateral dielectric withstand voltage is greater than the longitudinal avalanche breakdown voltage of the local PN junction region 203, so that the device preferentially undergoes longitudinal avalanche breakdown in the local PN junction region 203 under reverse overvoltage conditions. In some embodiments, the junction depth of the second conductivity type highly doped region 201 is less than 0.5 μm, preferably 0.2 to 0.3 μm; the thickness of the first conductivity type highly doped region 202 is 0.1 to 1.0 μm. A local PN junction region 203 is formed between the second conductivity type highly doped region 201 and the first conductivity type low doped drift region 302; the first conductivity type highly doped region 202 is disposed on the coupling dielectric layer 401 and is used as a coupling electrode. A static electrical isolation state is formed between the first conductivity type highly doped region 202 and the first conductivity type low doped drift region 302 through the coupling dielectric layer 401; The trigger unit 200 adopts a small-area local structure to form a local high electric field region and reduce the static equivalent junction capacitance of the device; specifically, the junction area of ​​the local PN junction region 203 is less than 10% of the effective conduction area of ​​the main conduction unit 300, preferably less than 5%.

[0039] 4) Coupling unit 400 The coupling unit 400 includes a coupling medium layer 401; The thickness of the coupling dielectric layer 401 is 10-50 nm; preferably 20 nm; the coupling dielectric layer 401 can be formed by thermal oxidation or atomic layer deposition (ALD) process, and its material includes one or more combinations of silicon oxide, silicon nitride or high-k dielectric. In one specific embodiment, the coupling dielectric layer 401 is formed on the surface of the first conductivity type low-doped drift region 302, and the first conductivity type high-doped region 202 is formed on the coupling dielectric layer 401; in this embodiment, a surface silicon layer may be disposed on the coupling dielectric layer 401, and the second conductivity type high-doped region 201 and the first conductivity type high-doped region 202 are formed in the surface silicon layer and disposed separately from each other; In one specific embodiment, the coupling dielectric layer 401 is formed on the inner wall of a shallow trench at the top of the first conductivity type low-doped drift region 302, and the first conductivity type high-doped region 202 is formed in the shallow trench of the first conductivity type low-doped drift region 302; this structure can further enhance the coupling area and reduce the surface area occupied, thereby helping to further reduce parasitic capacitance and improve surge current carrying capacity; in this embodiment, the second conductivity type high-doped region 201 is formed in the first conductivity type low-doped drift region 302, located in the near-surface region at the top of the first conductivity type low-doped drift region 302; The first conductivity type highly doped region 202 forms an electric field coupling relationship with the dominant pass unit 300 through the coupling dielectric layer 401; the second conductivity type highly doped region 201 and the dominant pass unit 300 do not have a coupling dielectric layer 401 between them, so as to form a local PN junction region 203. It should be noted that the coupling dielectric layer 401 is mainly used to establish the electric field coupling relationship between the triggering unit 200 and the dominant pass unit 300 during the triggering phase, and to form a transient displacement current through its inherent coupling capacitance. After the dominant pass unit 300 is triggered, the surge current is mainly discharged between the first electrode 100 and the second electrode 600 through the longitudinal low-resistance dominant pass path formed inside the dominant pass unit 300, rather than being transmitted through the coupling dielectric layer 401. Therefore, a continuous carrier conduction path is not formed between the first conductivity type highly doped region 202 in the triggering unit 200 and the dominant pass unit 300.

[0040] 5) Electrode structure The first electrode 100 is formed on the front side of the low-doped drift region 302 of the first conductivity type; the second electrode 600 is formed on the back side of the semiconductor substrate 301 of the first conductivity type; the materials of the first electrode 100 and the second electrode 600 include Al, AlCu, Ti / Al, Ti / AlCu or other conductive metal materials. In one specific embodiment, the second conductivity type highly doped region 201 is connected to the first electrode 100 through a high-resistance connection structure 204; that is, the second conductivity type highly doped region 201 adopts a semi-floating structure; the high-resistance connection structure includes one or more combinations of low-doped polycrystalline silicon structure, amorphous silicon structure, long-distance low-doped diffusion region, partially compensated doped structure, and high-resistance conductive path. The semi-floating structure described above enables the highly doped region 201 of the second conductivity type to form a stable trigger PN junction under reverse bias conditions, while avoiding charge accumulation, parasitic conduction maintenance, or hot carrier injection problems caused by complete floating.

[0041] 6) Deep trench isolation structure 500 As a preferred embodiment, the device unit further includes a deep trench isolation structure 500; the deep trench isolation structure 500 is disposed in the two side boundary regions of the device unit in the first lateral direction and extends in a second lateral direction perpendicular to the first lateral direction; the deep trench isolation structure 500 penetrates downward from the surface of the first conductivity type low-doped drift region 302 to the first conductivity type semiconductor substrate 301. The deep trench isolation structure 500 includes a deep trench, a trench sidewall insulating layer, and a filling structure therein; the filling structure includes a polysilicon filling structure, a low dielectric constant filling structure, or an air gap structure, etc.; the deep trench depth of the deep trench isolation structure 500 is 5 to 20 μm, and the width is 0.2 to 2 μm; The deep trench isolation structure 500 is used to reduce parasitic coupling and lateral parasitic capacitance.

[0042] 7) Two-dimensional array structure of the device In a preferred embodiment, the transient voltage suppressor includes multiple device units; the multiple device units are arranged in parallel in a first lateral direction and in a second lateral direction perpendicular to the first lateral direction to form a two-dimensional array structure; and the multiple device units share a first electrode 100 and a second electrode 600. Two-dimensional array structures can further improve the uniformity of current distribution and the robustness of the device.

[0043] (III) The working mechanism of the embodiments of the invention will be described in detail below.

[0044] 1. Main control unit in static standby mode The dominant pass unit 300 is located vertically between the first electrode 100 and the second electrode 600. Under static bias conditions, since the dominant pass unit 300 is in a high-resistance non-conducting state, its internal electric field is lower than the avalanche breakdown critical electric field of the semiconductor material. Therefore, a longitudinal low-resistance dominant pass path will not be formed between the first electrode 100 and the second electrode 600. At this time, only a weak and relatively balanced spatial electric field distribution is formed inside the dominant pass unit 300. No obvious avalanche multiplication process occurs. The static equivalent junction capacitance of the device is mainly determined by the local PN junction region 203 in the trigger unit 200. Because the trigger unit 200 adopts a small-area local structure, it can achieve fast triggering under low trigger voltage conditions.

[0045] 2. Dynamic Triggering and Electric Field Reconstruction Process Under reverse bias conditions, when the first electrode 100 encounters a reverse transient overvoltage (caused by an external surge pulse), the local PN junction region 203 in the trigger unit 200 preferentially reaches the avalanche breakdown condition and preferentially undergoes local avalanche breakdown. After the local PN junction region 203 undergoes avalanche breakdown, the local potential in its vicinity changes rapidly, and a displacement current is generated through the coupling dielectric layer 401 in the coupling structure 400. The displacement current satisfies the following relationship: in, For displacement current, This is the inherent coupling capacitance of the coupling dielectric layer 401; The displacement current acts on a local region of the dominant pass unit 300 through electric field coupling, thereby breaking the original static electric field balance of the dominant pass unit 300 and triggering dynamic reconstruction of the local potential distribution and electric field distribution within the dominant pass unit 300. During the dynamic electric field reconstruction process, the local electric field peak inside the dominant pass unit 300 migrates and is enhanced, and gradually forms a local high field region inside the dominant pass unit 300. Since the dominant pass unit 300 preferably adopts a low-doped drift region structure, its internal depletion region is relatively wide and is more sensitive to transient electric field changes. Therefore, the local high field region can be rapidly enhanced under transient overvoltage conditions.

[0046] 3. Formation of the longitudinal low-resistance dominant path When the electric field of the local high field region inside the dominant pass unit 300 reaches the avalanche breakdown critical electric field of the semiconductor material, a longitudinal volume avalanche conduction region is formed inside the dominant pass unit 300. Under the action of the high field, the charge carrier collision ionization process is rapidly enhanced, thereby establishing a longitudinal low-resistance dominant pass path through the first electrode 100 and the second electrode 600 in the dominant pass unit 300 to realize the discharge of the main surge current. Therefore, the coupling dielectric layer 401 in this embodiment of the invention does not undertake the function of transmitting the main surge current. Its main function is to establish a transient electric field coupling relationship and form a displacement current trigger signal. The part that truly undertakes the function of discharging the main surge current is the longitudinal avalanche conduction region formed inside the main conduction unit 300 after dynamic electric field reconstruction. After the formation of the longitudinal avalanche conduction region, a high-density dynamic carrier is generated inside the main conduction unit 300 and a conductivity modulation region is formed, so that the surge current can be longitudinally expanded and laterally diffused within the main conduction unit 300, reducing the local current density and improving the surge current carrying capacity. This avoids the main surge current from concentrating in the small contact area of ​​the local PN junction region 203, and allows the surge current to be expanded within the main conduction unit 300 before being led out to the first electrode 100.

[0047] 4. Self-recovery process after the surge ends When the external surge pulse ends, the electric field inside the dominant pass unit 300 decreases, the avalanche multiplication process terminates, and the non-equilibrium carriers inside the device gradually recombine and return to the static depletion state. When the external reverse overvoltage disappears and the device terminal voltage drops below the avalanche breakdown voltage of the local PN junction region 203, the avalanche carrier generation process terminates, and the device automatically returns to the high-resistance cutoff state, thereby reducing the latch-up risk and improving the reliability of repeated surges.

[0048] (iv) Description of equivalent circuit.

[0049] The transient voltage suppressor proposed in this embodiment of the invention has the following equivalent circuit: Figure 2 This includes the trigger branch Dt, the coupling capacitor Ccoup, the controlled dominant pass branch M, and the isolation parasitic branches Ciso and Riso; The trigger branch Dt corresponds to the trigger unit 200, which can be equivalent to a nonlinear small capacitor branch with breakdown characteristics, including the static capacitance C_trigger and the breakdown voltage VBR; under static bias conditions, the equivalent junction capacitance of the device is mainly determined by the trigger branch Dt. The coupling capacitor Ccoup corresponds to the coupling unit 400 and is formed by the coupling dielectric layer 401; when the trigger unit 200 breaks down and generates a rapid voltage change, the coupling capacitor Ccoup generates a displacement current. The controlled dominant conduction branch M corresponds to the dominant conduction unit 300, which can be equivalent to the controlled conduction branch. The controlled dominant conduction branch M is only triggered to conduct after the coupling capacitor Ccoup generates sufficient displacement current. Under static bias conditions, it maintains a high-resistance non-conducting state and does not form a longitudinal low-resistance dominant conduction path. The trigger branch Dt and the controlled main conduction branch M are not directly connected in series or in parallel, but are connected by electric field coupling through the coupling capacitor Ccoup. The parasitic isolation branches Ciso and Riso are used to characterize the parasitic effects generated by deep trench isolation structures and high-resistance connection structures. Ciso corresponds to the parasitic isolation capacitor, and Riso corresponds to the isolation resistor or high-resistance connection structure.

[0050] (v) Description of device IV characteristics.

[0051] The transient voltage suppressor proposed in this embodiment of the invention has the following IV characteristics: Figure 3 As shown, it includes a forward conduction area, a reverse standby area (shutdown area), a reverse trigger area, and a reverse conduction area; In the first quadrant, under forward bias conditions, for devices containing the local PN junction region 203, the device exhibits PN junction forward conduction characteristics, with a forward conduction voltage VF of approximately 0.7–1.2V. In the third quadrant, under reverse bias conditions, when the reverse voltage is lower than the breakdown voltage VBR of the trigger unit 200, there is only a small leakage current in the device, and the main conduction unit 300 remains in a high-resistance state; the static equivalent junction capacitance of the device is mainly determined by the local PN junction region 203 in the trigger unit 200. When the reverse voltage approaches or reaches the breakdown voltage VBR of the trigger unit 200, the local PN junction region 203 in the trigger unit 200 undergoes avalanche breakdown and generates a rapid voltage change; this voltage change forms a displacement current through the coupling dielectric layer 401, thereby triggering the dominant pass unit 300. In the reverse conduction region, the dominant conduction unit 300 is activated and forms a longitudinal low-resistance dominant conduction path, effectively clamping the device voltage and exhibiting low dynamic resistance characteristics; in some embodiments, the device dynamic resistance Rdyn can be less than 0.5Ω.

[0052] The above-mentioned IV characteristics indicate that the present invention establishes a triggering association between the triggering unit 200 and the main conduction unit 300 through electric field coupling, maintains a low capacitance state before triggering, and achieves longitudinal low-resistance surge discharge after triggering.

[0053] (vi) This invention also proposes a method for manufacturing a transient voltage suppressor based on path decoupling and electric field coupling triggering, comprising the following steps: Step S10: Provide a first conductivity type semiconductor substrate 301, and epitaxially grow a first conductivity type low doping epitaxial layer on it to form a first conductivity type low doping drift region 302, so as to form a dominant pass unit 300. Step S20: A coupling dielectric layer 401 is formed on the surface and / or inside the top of the main pass unit 300; wherein the coupling dielectric layer 401 is formed on the top surface of the device or the inner wall of the top shallow trench; Step S30: A second conductivity type highly doped region 201 is formed in a local region of the dominant pass unit 300 by ion implantation, so that a local PN junction region 203 is formed between it and the dominant pass unit 300. In step S40, optionally, a high-resistance connection structure 204 is formed between the second conductivity type highly doped region 201 and the reserved first electrode contact region. Step S50: Deposit conductive polysilicon on the coupling dielectric layer 401 and perform first conductivity type doping to form a first conductivity type highly doped region 202. Step S60: Deposit an interlayer dielectric layer 700 on the top surface of the main pass unit 300 and etch to form a contact hole; In step S70, a first electrode 100 is formed on the front side of the first conductivity type low-doped drift region 302, and a second electrode 600 is formed on the back side of the first conductivity type semiconductor substrate 301.

[0054] Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A transient voltage suppressor based on path decoupling and electric field coupling triggering, comprising at least one device unit; characterized in that, The device unit includes: First electrode (100) and second electrode (600); Trigger unit (200); Main communication unit (300); Coupling unit (400); in, The dominant pass unit (300) includes a first conductivity type semiconductor substrate (301) and a first conductivity type low-doped drift region (302) formed on the first conductivity type semiconductor substrate (301); the first electrode (100) is disposed on the front side of the first conductivity type low-doped drift region (302), and the second electrode (600) is disposed on the back side of the first conductivity type semiconductor substrate (301); an interlayer dielectric layer (700) is provided between the first conductivity type low-doped drift region (302) and the first electrode (100); The trigger unit (200) includes a second conductivity type highly doped region (201) and a first conductivity type highly doped region (202); the second conductivity type highly doped region (201) and the first conductivity type highly doped region (202) are formed on top of the first conductivity type low doped drift region (302), and maintain a lateral spacing d between them in the first lateral direction; the second conductivity type highly doped region (201) and the first conductivity type highly doped region (202) are electrically connected to the first electrode (100) through contact holes respectively; a local PN junction region (203) is formed between the second conductivity type highly doped region (201) and the first conductivity type low doped drift region (302); The coupling unit (400) includes a coupling dielectric layer (401); the coupling dielectric layer (401) is disposed between a first conductivity type highly doped region (202) and a first conductivity type low doped drift region (302); the first conductivity type highly doped region (202) and the first conductivity type low doped drift region (302) form a static electrical isolation state through the coupling dielectric layer (401); the coupling unit (400) is used to establish an electric field coupling relationship between the trigger unit (200) and the dominant pass unit (300); The lateral dielectric withstand voltage corresponding to the lateral spacing d is greater than the longitudinal avalanche breakdown voltage of the local PN junction region (203); The dominant pass unit (300) is configured such that, under static bias conditions, its internal electric field is lower than the avalanche breakdown critical electric field, thereby being in a high-resistance non-conducting state and not forming a longitudinal low-resistance dominant pass path through the first electrode (100) and the second electrode (600). The coupling unit (400) is configured such that, under reverse bias conditions, when a local avalanche breakdown preferentially occurs in the local PN junction region (203) in the trigger unit (200), in response to the rapid change in potential near the local PN junction region (203), a displacement current is formed through the coupling dielectric layer (401) and acts on the dominant conduction unit (300) through electric field coupling, thereby triggering dynamic electric field reconstruction inside the dominant conduction unit (300), so that the electric field of the dynamically formed local high field region inside the dominant conduction unit (300) reaches the critical electric field of avalanche breakdown, forming a longitudinal volume avalanche conduction region inside the dominant conduction unit (300), thereby establishing a longitudinal low-resistance dominant conduction path through the first electrode (100) and the second electrode (600) inside the dominant conduction unit (300).

2. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The doping concentration of the first conductivity type low-doped drift region (302) is 1x10⁻⁶. 14 cm -3 Up to 1x10 16 cm -3 The thickness is 20–80 μm.

3. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The lateral spacing d between the second conductivity type highly doped region (201) and the first conductivity type highly doped region (202) is 0.5 to 5 μm.

4. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The junction depth of the second conductivity type highly doped region (201) is less than 0.5 μm; the thickness of the first conductivity type highly doped region (202) is 0.1 to 1.0 μm.

5. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The junction area of ​​the local PN junction region (203) is less than 10% of the effective conduction area of ​​the main conduction unit (300).

6. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The thickness of the coupling medium layer (401) is 10-50 nm.

7. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The coupling dielectric layer (401) is formed on the surface of the low-doped drift region (302) of the first conductivity type, and the high-doped region (202) of the first conductivity type is formed on the coupling dielectric layer (401); or, The coupling dielectric layer (401) is formed on the inner wall of a shallow trench at the top of the low-doped drift region (302) of the first conductivity type, and the high-doped region (202) of the first conductivity type is formed in the shallow trench of the low-doped drift region (302) of the first conductivity type.

8. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The second conductivity type highly doped region (201) is connected to the first electrode (100) through a high-resistance connection structure (204); the high-resistance connection structure (204) is used to provide a controlled charge discharge path during the recovery process after the static standby state or after the surge ends.

9. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 1, characterized in that, The device unit further includes a deep trench isolation structure (500); the deep trench isolation structure (500) is disposed in the two side boundary regions of the device unit in the first lateral direction and extends in a second lateral direction perpendicular to the first lateral direction; the deep trench isolation structure (500) penetrates downward from the surface of the first conductivity type low doped drift region (302) to the first conductivity type semiconductor substrate (301).

10. The transient voltage suppressor based on path decoupling and electric field coupling triggering as described in any one of claims 1 to 9, characterized in that, The transient voltage suppressor includes multiple device units; the multiple device units are arranged in parallel in a first lateral direction and a second lateral direction perpendicular to the first lateral direction to form a two-dimensional array structure; and the multiple device units share a first electrode (100) and a second electrode (600).

11. A method for manufacturing a transient voltage suppressor based on path decoupling and electric field coupling triggering, used to manufacture the transient voltage suppressor based on path decoupling and electric field coupling triggering as described in any one of claims 1 to 10, characterized in that, Includes the following steps: Step S10: Provide a semiconductor substrate of the first conductivity type (301) and epitaxially grow a low-doped epitaxial layer of the first conductivity type on it to form a low-doped drift region of the first conductivity type (302) to form a dominant pass unit (300). Step S20, forming a coupling dielectric layer (401) on the surface and / or interior of the top of the main pass unit (300); wherein the coupling dielectric layer (401) is formed on the top surface of the device or the inner wall of the top shallow trench; Step S30: A second conductivity type highly doped region (201) is formed in a local region of the dominant pass unit (300) by ion implantation, so that a local PN junction region (203) is formed between it and the dominant pass unit (300); Step S50: Deposit conductive polysilicon on the coupling dielectric layer (401) and perform first conductivity type doping to form a first conductivity type highly doped region (202); Step S60: Deposit an interlayer dielectric layer (700) on the top surface of the main pass unit (300) and etch to form a contact hole; In step S70, a first electrode (100) is formed on the front side of the first conductivity type low-doped drift region (302), and a second electrode (600) is formed on the back side of the first conductivity type semiconductor substrate (301).

12. The manufacturing method of the transient voltage suppressor based on path decoupling and electric field coupling triggering as described in claim 11, characterized in that, Between step S30 and step S50, the following is also included: In step S40, a high-resistance connection structure (204) is formed between the second conductivity type highly doped region (201) and the reserved first electrode contact region.

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