Back contact cell string and cell assembly

Abstract

This application relates to a back-contact battery string and battery assembly, including multiple battery cells and solder ribbons; battery cells; multiple fine grids; an insulating layer disposed on the side of the fine grids facing away from the semiconductor substrate, the insulating layer including an edge insulating strip and a central insulating strip; wherein, the edge insulating strip is located in a first region and covers all the fine grids in the first region and the gaps between adjacent fine grids to isolate the solder ribbons from the semiconductor substrate; the central insulating strip is located in a second region and is disposed between a portion of the solder ribbons and a portion of the fine grids. This application forms a continuous cover layer by setting an edge insulating strip in the first region of the battery cell and making the edge insulating strip cover all the fine grids in the first region and the gaps between adjacent fine grids. During the lamination process, when the solder paste or solder on the surface of the solder ribbon melts and flows due to heat, it will be blocked by the edge insulating strip in the first region of the battery cell (corresponding to the edge area), thereby blocking the path of solder penetration.

Description

Technical Field

[0001] This application relates to the field of photovoltaic cell technology, and in particular to back-contact cell strings and cell modules. Background Technology

[0002] As photovoltaic technology develops towards higher efficiency and lower cost, back-contact batteries have become one of the mainstream high-efficiency battery technologies due to their advantages of no metal obstruction on the front, high short-circuit current, and significant conversion efficiency. In this type of battery, both the positive and negative grid lines are located on the back side (backlight side), while the front side (light-receiving side) is unobstructed by grid lines, thus achieving higher photoelectric conversion efficiency.

[0003] In the manufacturing process of back-contact battery modules, multiple battery cells are typically connected in series to form a battery string using solder ribbons. The solder ribbons are laid along the extension direction of the grid on the back of the battery cell, and electrical connections are achieved with the grid and connection structure of the corresponding polarity using conductive materials such as solder paste or conductive adhesive. To prevent short circuits caused by contact between solder ribbons of different polarities and grids of opposite polarities, an insulating layer must be pre-placed above the grids of the opposite polarity.

[0004] However, in the traditional insulation layer design, during the lamination process, the solder paste or solder on the surface of the solder strip can easily flow across the insulation protection area after being heated and melted, and come into contact with the opposite polarity fine grid area, thereby causing short circuit or leakage risk, leading to power degradation or even failure of photovoltaic modules. Summary of the Invention

[0005] Based on this, it is necessary to address the issue that the traditional insulation layer setting may cause the solder on the surface of the solder strip to melt and flow to the opposite polarity fine grid area, thereby causing short circuits or leakage. Therefore, a back contact battery string and battery assembly are provided.

[0006] In a first aspect, embodiments of this application provide a back-contact battery string, comprising a plurality of battery cells and a solder strip, wherein the plurality of battery cells are arranged along a first direction, and the solder strip connects two adjacent battery cells in series; the battery cells include:

[0007] A semiconductor substrate has a first surface and a second surface opposite to each other. The first surface includes two first regions and a second region, the two first regions being located on opposite sides of the second region along the first direction.

[0008] Multiple fine grids are disposed in the first region and the second region and extend along the second direction. The multiple fine grids are arranged at intervals along the first direction, and the second direction intersects the first direction.

[0009] An insulating layer is disposed on the side of the fine gate opposite to the semiconductor substrate, the insulating layer including an edge insulating strip and a central insulating strip;

[0010] The edge insulating strip is located in the first region and covers all the fine gates located in the first region and the gaps between adjacent fine gates to isolate the solder strip from the semiconductor substrate; the middle insulating strip is located in the second region and is disposed between a portion of the solder strip and a portion of the fine gates.

[0011] The dimension of the edge insulating strip along the first direction is greater than the dimension of the middle insulating strip along the first direction.

[0012] In one embodiment, the semiconductor substrate has a chamfered edge at the corner; the edge insulating strip extends along the second direction, and the orthographic projection of the end of the edge insulating strip on the first surface includes at least one first boundary segment and at least one second boundary segment, the first boundary segment and the second boundary segment are alternately connected, and the extension directions of the first boundary segment and the second boundary segment intersect, and at least partially adjacent first boundary segments and second boundary segments form a receiving space with the chamfer.

[0013] In one embodiment, the first boundary segment extends along the first direction, and the second boundary segment extends along the second direction.

[0014] In one embodiment, one end of the edge insulating strip has a plurality of first boundary segments and a plurality of second boundary segments; the edge insulating strip includes a plurality of sub-insulating strips corresponding to the plurality of first boundary segments, and the size of the plurality of sub-insulating strips decreases sequentially along the second direction from the second region to the first region;

[0015] The plurality of sub-insulating strips are arranged sequentially along the first direction and are in contact with each other.

[0016] In one embodiment, the plurality of fine gates include a first fine gate and a second fine gate, the first fine gate and the second fine gate being arranged alternately and at intervals along the first direction and having different polarities;

[0017] The solder strip includes a first solder strip and a second solder strip, wherein the first solder strip has the same polarity as the first fine gate, and the second solder strip has the same polarity as the second fine gate;

[0018] The number of central insulating strips is multiple, with the central insulating strip provided between the first solder strip and the second fine grid, and between the second solder strip and the first fine grid.

[0019] In one embodiment, the plurality of central insulating strips are arranged at intervals along the first direction and the second direction; along the first direction, the distance between two adjacent central insulating strips is less than the distance between two adjacent fine grids of the same polarity;

[0020] Along the second direction, the distance between two adjacent central insulating strips is greater than the distance between the adjacent first solder strip and the second solder strip;

[0021] And / or, the dimension of each of the central insulating strips along the second direction is greater than the dimension of the solder strip along the second direction;

[0022] And / or, the distances from both ends of each of the central insulating strips along the second direction to the corresponding solder strips are equal.

[0023] In one embodiment, the orthographic projection of the first or second solder strip onto the first surface overlaps with one of the first and second regions and is located outside the other of the first regions.

[0024] In one embodiment, the battery cell further includes a connection structure disposed on the first surface and near the edge of the semiconductor substrate along the first direction;

[0025] The connection structure includes a conductive component and a positioning gate line, the positioning gate line extending along the first direction and at least partially located in the first region; the conductive component is located on the side of the positioning gate line away from the first region and is electrically connected to at least one of the fine gates; the fine gate, at least partially of the same polarity, located between the conductive component and the edge of the semiconductor substrate, is electrically connected to the positioning gate line, and the positioning gate line is electrically connected to the conductive component at least through a portion of the fine gate.

[0026] In one embodiment, the conductive component and the semiconductor substrate have a plurality of fine gates of the same polarity along the edge of the first direction; the positioning gate line is electrically connected to all the fine gates of the same polarity located between the conductive component and the edge of the semiconductor substrate;

[0027] The first surface has a plurality of connecting structures arranged at intervals along the second direction, and each connecting structure is connected to a corresponding solder strip; the first surface has two connecting structures arranged at intervals along the first direction, and a plurality of fine grids are provided between the two connecting structures;

[0028] The central insulating strip is broken at the conductive component.

[0029] In one embodiment, the fine grid includes a plurality of sub-fine grids arranged at intervals along the second direction, with a discontinuity region between adjacent sub-fine grids, and a docking portion in the discontinuity region connecting adjacent sub-fine grids;

[0030] The conductive component further includes the docking portion, which is arranged at intervals along the first direction;

[0031] The positioning grid wires are electrically connected to a plurality of the docking portions arranged along the first direction;

[0032] The back contact battery also includes a conductor disposed on the conductive component and on all mating portions of the same polarity between two conductive components arranged along the first direction, and the conductor is electrically connected to the welding strip.

[0033] In one embodiment, the back contact battery further includes a first edge grid line and a second edge grid line, both of which are disposed on the first surface and extend along the first direction. The first edge grid line and the second edge grid line are respectively located near the two sides of the first surface along the second direction. The first edge grid line is used to connect the ends of a plurality of first fine grids arranged along the first direction, and the second edge grid line is used to connect the ends of a plurality of second fine grids arranged along the first direction.

[0034] The insulating layer further includes a first insulating strip, which covers the side of the first edge gate line and the second edge gate line away from the semiconductor substrate, and the end of the first insulating strip along the first direction is connected to the edge insulating strip.

[0035] In one embodiment, the connection structure includes a first connection structure and a second connection structure, wherein the first connection structure is electrically connected to the first fine gate, and the second connection structure is electrically connected to the second fine gate; the first connection structure and the second connection structure are alternately arranged along the second direction;

[0036] The connection structure further includes a third connection structure and a fourth connection structure, which are respectively disposed on both sides of the semiconductor substrate along the second direction; the first edge gate line is electrically connected to the third connection structure at least through the first fine gate; and the second edge gate line is electrically connected to the fourth connection structure at least through the second fine gate.

[0037] In one embodiment, the positioning grid line in the third connection structure connects two adjacent first fine grids; the positioning grid line in the fourth connection structure connects two adjacent second fine grids.

[0038] The back contact battery also includes a plurality of first short grid lines and a plurality of second short grid lines, wherein the first short grid lines and the second short grid lines extend along the second direction;

[0039] The second fine gate is disconnected at the third connection structure, and the first short gate line is used to connect the disconnected second fine gate;

[0040] The first fine gate is disconnected at the fourth connection structure, and the second short gate line is used to connect the disconnected first fine gate;

[0041] The insulating layer further includes a second insulating strip, which covers the side of the first short gate line and the second short gate line away from the semiconductor substrate, and is connected to two adjacent middle insulating strips.

[0042] In one embodiment, the ratio of the dimension of the edge insulating strip along the first direction to the dimension of the middle insulating strip along the first direction is 1:10;

[0043] And / or, the distance between the edge insulating strip and the edge of the first surface along the first direction is 0.1mm-0.3mm;

[0044] And / or, the number of fine grids located in the first region is 2-10;

[0045] And / or, the dimension of the edge insulating strip along the first direction is 1mm-2mm;

[0046] And / or, the dimension of the central insulating strip along the first direction is 0.2mm-0.5mm;

[0047] And / or, the insulating layer is integrally printed;

[0048] And / or, the material of the insulating layer includes insulating adhesive, insulating ink, or insulating film.

[0049] In one embodiment, the back contact battery string further includes a fixing member disposed between the conductive component and the edge of the semiconductor substrate, and located in the second region, for fixing the solder ribbon to the semiconductor substrate.

[0050] Secondly, embodiments of this application provide a battery assembly including a plurality of back contact battery strings as described in the first aspect, wherein the plurality of back contact battery strings are arranged in an array.

[0051] The aforementioned back-contact battery string and battery assembly form a continuous cover layer by setting an edge insulating strip in the first region of the battery cell, covering all the fine grids within the first region and the gaps between adjacent fine grids. During the lamination process, when the solder paste or solder on the solder ribbon surface melts and flows due to heat, it will be blocked by the edge insulating strip in the first region of the battery cell (corresponding to the edge area), thereby blocking the solder penetration path, reducing or avoiding the risk of short circuits or leakage, and improving the reliability of the back-contact battery string during the manufacturing process. Attached Figure Description

[0052] Figure 1This is a partial back structure diagram of a back contact battery string provided according to some embodiments of this application.

[0053] Figure 2 for Figure 1 A schematic diagram of the structure at point A in the middle.

[0054] Figure 3 for Figure 1 A schematic diagram of the structure at point B.

[0055] Figure 4 This is a schematic diagram of the partial back structure of a back contact battery string with the insulating layer removed, according to some embodiments of this application.

[0056] Figure 5 for Figure 4 A schematic diagram of the structure at point C.

[0057] Figure 6 for Figure 4 A schematic diagram of the structure at point D.

[0058] Figure 7 This is a schematic diagram of the back structure of a back contact battery string provided according to some embodiments of this application, with the insulation layer, fixing members, and conductors removed.

[0059] Figure 8 for Figure 7 A schematic diagram of the structure at point E in the middle.

[0060] Figure 9 for Figure 7 A schematic diagram of the structure at point F.

[0061] Figure 10 This is a schematic diagram of the back structure of a battery cell provided according to some embodiments of this application.

[0062] Figure 11 for Figure 10 A schematic diagram of the structure at point G.

[0063] Figure 12 This is a schematic diagram of a battery cell connection structure provided according to some embodiments of this application.

[0064] Figure 13 This is a schematic diagram of another battery cell connection structure provided according to some embodiments of this application.

[0065] Figure 14 for Figure 10 A schematic diagram of the structure at point H.

[0066] Icon labels:

[0067] 100, Semiconductor substrate; 110, Beveled edge; AA, Region 1; BB, Region 2;

[0068] 200, fine grid; 210, first fine grid; 220, second fine grid;

[0069] 300. Connecting structure; 310. First connecting structure; 320. Second connecting structure; 330. Conductive component; 331. Reinforcing grid line; 332. Butt joint; 340. Positioning grid line; 350. Flow guiding grid line; 360. Third connecting structure; 370. Fourth connecting structure;

[0070] 410, First edge grid line; 420, Second edge grid line;

[0071] 510, Second short gate line; 520, First short gate line;

[0072] 600, welding strip; 610, first welding strip; 620, second welding strip;

[0073] 700. Fasteners;

[0074] 800. Conductor;

[0075] 900, Insulating layer; 910, Edge insulating strip; 911, First boundary segment; 912, Second boundary segment; 920, Middle insulating strip; 930, First insulating strip; 940, Second insulating strip;

[0076] First direction - Y direction; Second direction - X direction. Detailed Implementation

[0077] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0078] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0079] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0080] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0081] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0082] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0083] As described in the background section, traditional insulating layers typically employ a strip structure, with each strip corresponding to a single non-polarity grid. The width of each insulating strip along the grid's extension direction is generally consistent. Therefore, the flowing material from the solder ribbon, after being heated, can easily seep into the gaps between adjacent insulating strips, thus coming into contact with the non-polarity grid. This problem is particularly pronounced in the area between the solder ribbon end and the cell edge, as the solder ribbon end is typically a high-risk location for solder overflow.

[0084] Based on the aforementioned problems, this application provides a back-contact battery string, see reference. Figure 1 and Figure 2 , Figure 1 This is a partial back structure diagram of a back contact battery string provided according to some embodiments of this application. Figure 2 for Figure 1 The diagram shows the structure at point A. This back-contact battery string can include multiple battery cells and solder ribbons 600. The multiple battery cells are arranged along a first direction (Y direction), and the solder ribbons 600 connect adjacent battery cells in series. Each battery cell includes a semiconductor substrate 100, multiple fine gates 200, and an insulating layer 900. The semiconductor substrate 100 has opposing first and second surfaces. The first surface includes two first regions AA and a second region BB. The two first regions AA are located on opposite sides of the second region BB along the first direction (Y direction). Multiple fine gates 200 are disposed in the first regions AA and the second region BB, and extend along a second direction (X direction). The multiple fine gates 200 are spaced apart along the first direction (Y direction), and the second direction (X direction) intersects with the first direction (Y direction). The insulating layer 900 is disposed on the side of the fine gates 200 facing away from the semiconductor substrate 100, and the insulating layer 900 includes an edge insulating strip 910 and a central insulating strip 920.

[0085] The edge insulating strip 910 is located in the first region AA and covers all the fine gates 200 located in the first region AA and the gaps between adjacent fine gates 200 to isolate the solder strip 600 from the semiconductor substrate 100; the middle insulating strip 920 is located in the second region BB and is disposed between a portion of the solder strip 600 and a portion of the fine gate 200; the dimension of the edge insulating strip 910 along the first direction (Y direction) is larger than the dimension of the middle insulating strip 920 along the first direction (Y direction).

[0086] It is understood that each solar cell in this example includes a semiconductor substrate 100, multiple fine grids 200, and an insulating layer 900. The following explanation uses one solar cell as an example. In a back-contact solar cell, the first side of the semiconductor substrate 100 is the back side of the solar cell, i.e., the backlight side, and the second side is the front side of the solar cell, i.e., the light-receiving side. Specifically, the first side of the semiconductor substrate 100 has a positive electrode doped region and a negative electrode doped region, which are arranged alternately along the first direction (Y direction). The material of the semiconductor substrate 100 can be monocrystalline silicon, polycrystalline silicon, etc., and is not specifically limited here.

[0087] To facilitate understanding of this solution, in this embodiment, the first surface of the semiconductor substrate 100 is divided into two first regions AA and one second region BB along the first direction (Y direction) (i.e., the arrangement direction of the battery string, and also the extension direction of the solder ribbon 600). The two first regions AA are located on opposite sides of the second region BB along the first direction (Y direction), meaning the two first regions AA correspond to the two edge regions of the first surface of the battery cell along the first direction (Y direction), and the second region BB corresponds to the central region of the first surface of the battery cell. It should be noted that the first regions AA and the second region BB are functional region divisions, not physical cuts or isolations; they are continuous and integral on the semiconductor substrate 100.

[0088] Multiple fine gates 200 are disposed in the first region AA and the second region BB, meaning that the multiple fine gates 200 cover the entire first surface of the semiconductor substrate 100. The fine gates 200 extend along a second direction (X direction), and the multiple fine gates 200 are spaced apart along a first direction (Y direction). The second direction (X direction) intersects the first direction (Y direction), and exemplarily, the second direction (X direction) is perpendicular to the first direction (Y direction). The fine gates 200 are used to collect photogenerated carriers generated in the semiconductor substrate 100 and to transport the carriers along the extension direction of the fine gates 200.

[0089] In one example, the fine gate 200 includes a first fine gate 210 and a second fine gate 220 with different polarities. The first fine gate 210 is electrically connected to, for example, a P-type doped region on the semiconductor substrate 100, and the second fine gate 220 is electrically connected to, for example, an N-type doped region. The two are arranged alternately and at intervals along a first direction (Y direction). Exemplarily, the material of the fine gate 200 can be silver paste, silver-aluminum paste, or other conductive paste, and its width can be from 0.02 mm to 0.05 mm. The spacing between adjacent fine gates 200 can be from 0.3 mm to 0.8 mm, but there is no specific limitation.

[0090] In this example, the insulating layer 900 is disposed on the side of the fine gate 200 facing away from the semiconductor substrate 100, that is, covering the top of the fine gate 200. The insulating layer 900 includes an edge insulating strip 910 and a middle insulating strip 920, which are located in the first region AA and the second region BB, respectively.

[0091] Specifically, the edge insulating strip 910 covering all the fine gates 200 located in the first region AA means that the edge insulating strip 910 completely covers every fine gate 200 arranged along the first direction (Y direction) within the first region AA, regardless of whether the fine gate 200 is the first fine gate 210 or the second fine gate 220. Covering the gap between adjacent fine gates 200 means that the edge insulating strip 910 is a continuous integral layer structure within the first region AA, and its material fills the recessed area between adjacent fine gates 200, so that the surface of the edge insulating strip 910 facing the solder ribbon 600 is a continuous plane. This arrangement can isolate the solder ribbon 600 (especially the end of the solder ribbon 600 near the edge of the cell) from the semiconductor substrate 100. That is, no matter where the solder ribbon 600 extends in the first region AA, there is a full coverage isolation between the solder ribbon 600 and the semiconductor substrate 100, and the solder ribbon 600 will not directly contact any fine gate 200 or the surface of the semiconductor substrate 100 in the first region AA.

[0092] Furthermore, the orthographic projection of the edge insulating strip 910 onto the semiconductor substrate 100 completely covers the orthographic projection of the first region AA onto the semiconductor substrate 100. That is, the edge insulating strip 910 extends from the boundary between the first region AA and the second region BB along the first direction (Y direction) to the very edge of the semiconductor substrate 100, achieving seamless and complete coverage of the first region AA. Therefore, there are no fine gates 200 or gaps within the first region AA that are not covered by the insulating layer 900, and the solder ribbon 600 will not contact any conductive structure within the first region AA at any location near the edge of the semiconductor substrate 100.

[0093] Of course, there is a certain gap between the end of the edge insulating strip 910 extending along the first direction (Y direction) and the edge of the semiconductor substrate 100 along the first direction (Y direction). This gap can be 0.2mm to 0.8mm, for example, 0.3mm, 0.5mm, etc. This gap helps to prevent the adhesive from being directly printed onto the edge of the battery cell during screen printing of the insulating adhesive, which would cause the adhesive to overflow onto the outside of the battery cell, affecting the appearance or causing an edge short circuit. At the same time, it also provides a buffer space for the slight flow of the insulating adhesive during the lamination process, preventing the adhesive from overflowing.

[0094] In the second zone BB, the solder ribbon 600 needs to be electrically connected to the same polarity fine grid 200. Therefore, no insulating layer 900 is provided between the solder ribbon 600 and the same polarity fine grid 200, or a window is opened on the central insulating strip 920 to expose the same polarity fine grid 200. The central insulating strip 920 is only provided between the opposite polarity solder ribbon 600 and the opposite polarity fine grid 200. That is, for each solder ribbon 600, the central insulating strip 920 covers those fine grids 200 located below the solder ribbon 600 and with opposite polarity to the solder ribbon 600, to prevent the solder ribbon 600 from contacting the opposite polarity fine grid 200 and causing a short circuit. For example, the width of the central insulating strip 920 along the first direction (Y direction) is usually only slightly larger than the width of a single fine grid 200, just enough to cover the corresponding single opposite polarity fine grid 200.

[0095] Therefore, the extension width of the edge insulating strip 910 in the first direction (Y direction) is greater than the extension width of the middle insulating strip 920 in the first direction (Y direction), and can even be many times the width of the middle insulating strip 920.

[0096] In one example, the solder ribbon 600 extends along a first direction (Y direction) and passes through a first region AA and a second region BB. In the second region BB, the solder ribbon 600 is electrically connected to the same polarity fine gate 200 via solder paste, conductive adhesive, etc., while being isolated from the opposite polarity fine gate 200 via a central insulating strip 920. In the first region AA, the solder ribbon 600 is no longer electrically connected to any fine gate 200 and is completely isolated from the semiconductor substrate 100 and all fine gates 200 thereon via an edge insulating strip 910. The collection of current in the fine gates 200 in the first region AA can be understood with reference to the connection structure 300 in the following embodiment, and will not be repeated here.

[0097] Specifically, the solder ribbon 600 has opposing ends along a first direction (Y direction), which can be located within a first region AA or a second region BB. Regardless of where the ends of the solder ribbon 600 are located, within the first region AA, the edge insulating strip 910 is located between the solder ribbon 600 and the semiconductor substrate 100, forming an isolation.

[0098] It should be noted that in the scenario where solder ribbons 600 are connected in series with adjacent solar cells, one end of a solder ribbon 600 is soldered to the second region BB of a solar cell, and the other end extends above the first region AA of the adjacent solar cell (without being electrically connected to the fine grid 200 within the first region AA), and then continues to extend to the second region BB of the adjacent solar cell for soldering. Therefore, in the area where adjacent solar cells overlap, the edge insulating strip 910 can effectively isolate the solder ribbon 600 from the semiconductor substrate 100 and the fine grid 200 of the underlying solar cell, preventing short circuits between different solar cells.

[0099] In summary, the back-contact battery string provided in this application embodiment forms a continuous cover layer by setting an edge insulating strip 910 in the first region AA of the battery cell, and making the edge insulating strip 910 cover all the fine grids 200 located in the first region AA and the gaps between adjacent fine grids 200. During the lamination process, when the solder paste or solder on the surface of the solder ribbon 600 melts and flows due to heat, it will be blocked by the edge insulating strip 910 in the first region AA of the battery cell (corresponding to the edge area), thereby blocking the path of solder penetration, reducing or avoiding the risk of short circuit or leakage, and improving the reliability of the back-contact battery string in the manufacturing process.

[0100] Below, we will combine the appendix Figure 1 - Appendix Figure 14 The specific structure of the back contact battery string provided in the embodiments of this application will be described in detail.

[0101] In some embodiments, such as Figure 2 As shown, the semiconductor substrate 100 has a chamfered edge 110 at the corner. Specifically, the chamfered edge 110 is located at the intersection of one side of the semiconductor substrate 100 along the first direction (Y direction) and one side along the second direction (X direction). It is the chamfered edge 110 formed by cutting off the right angle of the rectangular silicon wafer. The chamfered edge 110 can reduce the risk of corner breakage of the solar cell during handling and module manufacturing, and also helps to improve the consistency of the effective light-receiving area of ​​the module.

[0102] Considering that the end of the aforementioned edge insulating strip 910 extending along the second direction (X direction) is close to the beveled edge 110 at the corner of the solar cell, if this end edge is designed as a beveled boundary parallel to the bevel, stress concentration will occur on the screen during screen printing of the insulating adhesive at the tip or bend of the bevel, increasing the risk of screen breakage, reducing screen life and production yield. Simultaneously, if the end edge is too close to or parallel to the beveled edge 110, there will be insufficient buffer space for the insulating adhesive to overflow during the lamination process when heated and flowing. The adhesive will easily overflow along the beveled edge 110 to the outside of the solar cell, not only causing poor appearance but also potentially leading to edge short circuits or insulation failure.

[0103] Based on the problems mentioned above, in some embodiments, such as Figure 3 As shown, the edge insulating strip 910 extends along the second direction (X direction), and the end of the edge insulating strip 910 has a projected outline on the first surface including at least one first boundary segment 911 and at least one second boundary segment 912. The first boundary segment 911 and the second boundary segment 912 are alternately connected, and the extension directions of the first boundary segment 911 and the second boundary segment 912 intersect. At least partially adjacent first boundary segments 911 and second boundary segments 912 form a receiving space with the inclined side 110.

[0104] It is understood that the orthographic projection profile of the end of the edge insulating strip 910 on the first surface includes at least one first boundary segment 911 and at least one second boundary segment 912. The first boundary segment 911 and the second boundary segment 912 are alternately connected to form the boundary profile line of the end. The extension directions of the first boundary segment 911 and the second boundary segment 912 intersect. For example, the first boundary segment 911 extends along a first direction (Y direction), and the second boundary segment 912 extends along a second direction (X direction), and the two are perpendicular to each other. This boundary profile formed by the alternating connection of orthogonal line segments is stepped or serrated on the first surface.

[0105] Furthermore, at least partially adjacent first boundary segments 911 and second boundary segments 912 form a receiving space between them and the hypotenuse 110. The adjacent first boundary segments 911 and second boundary segments 912 refer to an interior angle in the stepped profile, specifically the area enclosed by a first boundary segment 911 and a second boundary segment 912 connected to its end. This interior angle area does not fit against the hypotenuse 110 but rather forms a spatial region of a certain area, i.e., a receiving space. This receiving space is located on the surface of the semiconductor substrate 100, between the end profile boundary of the edge insulating strip 910 and the physical boundary of the hypotenuse 110 of the semiconductor substrate 100, and is the exposed area of ​​the semiconductor substrate 100 not covered by the edge insulating strip 910.

[0106] The inclusion space in this example is advantageous because, during the lamination process, the insulating adhesive will flow or soften to a certain extent after being heated. The inclusion space provides a buffer area for the slight flow of the insulating adhesive, allowing the adhesive to flow towards and fill the inclusion space without overflowing beyond the bevel 110 onto the outside of the semiconductor substrate 100. This effectively avoids the risk of poor component appearance and edge short circuits caused by adhesive overflow, improving component reliability and production yield. Simultaneously, since the end boundary of the edge insulating strip 910 is composed of orthogonal first boundary segment 911 and second boundary segment 912, and does not include a long oblique boundary parallel to the bevel 110, the stress distribution of the screen at this location is more uniform during screen printing, avoiding stress concentration caused by the oblique boundary, thereby reducing the risk of screen breakage.

[0107] It should be noted that the extension directions of the first boundary segment 911 and the second boundary segment 912 do not necessarily have to be strictly the first direction (Y direction) and the second direction (X direction). As long as their extension directions are not parallel to the hypotenuse 110 and they intersect each other, the aforementioned explosion-proof plate and overflow buffer can be achieved. For example, the first boundary segment 911 can form a certain acute angle with the first direction (Y direction), and the second boundary segment 912 can form a certain acute angle with the second direction (X direction), as long as the combination of the two avoids being parallel to the hypotenuse 110 in the whole.

[0108] In some embodiments, such as Figure 3As shown, one end of the edge insulating strip 910 has a plurality of first boundary segments 911 and a plurality of second boundary segments 912; the edge insulating strip 910 includes a plurality of sub-insulating strips corresponding to the plurality of first boundary segments 911, and along the direction from the second region BB to the first region AA, the size of the plurality of sub-insulating strips decreases sequentially along the second direction (X direction); the plurality of sub-insulating strips are arranged sequentially along the first direction (Y direction) and are in contact with each other.

[0109] Understandably, the edge insulating strip 910 has a stepped structure at its end near the bevel 110 of the semiconductor substrate 100. Specifically, one end of the edge insulating strip 910 has multiple first boundary segments 911 and multiple second boundary segments 912, which are alternately connected to form a stepped boundary profile at that end. Furthermore, the edge insulating strip 910 includes multiple sub-insulating strips corresponding to the multiple first boundary segments 911.

[0110] It should be noted that the first boundary segment 911 refers to the boundary line segment extending along the first direction (Y direction) in the stepped profile, and the second boundary segment 912 refers to the boundary line segment extending along the second direction (X direction). Each first boundary segment 911 corresponds to the end face boundary of a sub-insulating strip along the first direction (Y direction). Multiple sub-insulating strips are arranged sequentially along the first direction (Y direction) and are in contact with each other to form an integral edge insulating strip 910. In this example, two adjacent sub-insulating strips are connected to each other without gaps, to ensure the continuity of the edge insulating strip 910 within the first area AA, so that it can completely cover all the fine grids 200 and the gaps between adjacent fine grids 200 within this area.

[0111] Furthermore, along the direction from the second region BB to the first region AA (i.e., from the central region of the solar cell to the edge region, which is consistent with the first direction (Y direction), the dimensions of the multiple sub-insulating strips decrease sequentially along the second direction (X direction). In other words, the sub-insulating strips closer to the edge of the semiconductor substrate 100 have shorter extension lengths along the second direction (X direction); the sub-insulating strips closer to the second region BB have longer extension lengths along the second direction (X direction). The orthographic projections of the multiple sub-insulating strips on the first surface are arranged in a gradually shortening stepped pattern, forming a stepped structure that gradually shrinks along the first direction (Y direction).

[0112] Because the end of the edge insulating strip 910 is close to the inclined side 110 of the semiconductor substrate 100, and the inclined side 110 extends at an angle, the progressively decreasing dimensions of the multiple sub-insulating strips along the second direction (X direction) match the end profile of the edge insulating strip 910 with the extension of the inclined side 110. Specifically, a receiving space is formed between the end of each sub-insulating strip and the inclined side 110, and these receiving spaces are also arranged sequentially along the first direction (Y direction) because the dimensions of each sub-insulating strip decrease sequentially along the second direction (X direction). Each receiving space is enclosed by the first boundary segment 911, the second boundary segment 912, and a section of the inclined side 110 of the corresponding sub-insulating strip.

[0113] In one example, the number of sub-insulating strips is 3 to 8. The dimensions of each sub-insulating strip along the first direction (Y direction) can be the same or different. The dimensions of each sub-insulating strip along the second direction (X direction) can increase progressively by 0.1 mm to 0.5 mm, so that the step distance of the steps is moderate, which can form an effective accommodating space without causing insufficient coverage of the edge area of ​​the first zone AA by the edge insulating strip 910 due to excessive step size.

[0114] In another example, multiple sub-insulating strips can be printed integrally in the same screen printing process. The screen opening pattern is designed with corresponding stepped shapes, and after printing, the multiple sub-insulating strips contact each other and form a whole, thereby simplifying the process steps and ensuring the reliability of the connection between the multiple sub-insulating strips.

[0115] In some embodiments, such as Figure 2 , Figure 5 and Figure 11 As shown, the plurality of fine grids 200 include a first fine grid 210 and a second fine grid 220, the first fine grid 210 and the second fine grid 220 are arranged alternately and at intervals along a first direction (Y direction) and have different polarities; the solder strip 600 includes a first solder strip 610 and a second solder strip 620, the first solder strip 610 and the first fine grid 210 have the same polarity, and the second solder strip 620 and the second fine grid 220 have the same polarity; there are a plurality of central insulating strips 920, a central insulating strip 920 is provided between the first solder strip 610 and the second fine grid 220, and a central insulating strip 920 is provided between the second solder strip 620 and the first fine grid 210.

[0116] It is understood that one of the first fine gate 210 and the second fine gate 220 is a positive fine gate 200 and the other is a negative fine gate 200. The first fine gate 210 is electrically connected to, for example, a P-type doped region on the first surface of the semiconductor substrate 100, and the second fine gate 220 is electrically connected to, for example, an N-type doped region. The first fine gate 210 and the second fine gate 220 are parallel to each other on the first surface of the semiconductor substrate 100, both extending along the second direction (X direction), and are arranged alternately at a fixed spacing in the first direction (Y direction).

[0117] Correspondingly, the first solder strip 610 and the second solder strip 620 are arranged alternately along the first direction (Y direction) to collect the current collected by the fine grid 200 of the corresponding polarity and transmit the current to the adjacent cell or busbar. In the cell string, one first solder strip 610 and one second solder strip 620 form a group, which respectively connect the different polarity electrodes of two adjacent cells to realize the series connection of the cells.

[0118] Specifically, for the first solder strip 610, the region it passes through contains both a first fine gate 210 with the same polarity as the first solder strip 610 and a second fine gate 220 with the opposite polarity. The first solder strip 610 needs to be electrically connected to the first fine gate 210 while maintaining insulation from the second fine gate 220. Therefore, a central insulating strip 920 is provided between the first solder strip 610 and the second fine gate 220, covering the second fine gate 220 and isolating the first solder strip 610 from the second fine gate 220. Similarly, for the second solder strip 620, a central insulating strip 920 is also provided between the second solder strip 620 and the first fine gate 210 in the region it passes through, covering the first fine gate 210 and isolating the second solder strip 620 from the first fine gate 210.

[0119] It should be noted that, directly below the first solder ribbon 610 and above the first fine gate 210, there is no central insulating strip 920, or a window is opened in the central insulating strip 920 to expose the first fine gate 210, allowing the first solder ribbon 610 to be directly electrically connected to the first fine gate 210 via, for example, solder paste or conductive adhesive. Similarly, directly below the second solder ribbon 620 and above the second fine gate 220, there is no central insulating strip 920, allowing the second solder ribbon 620 to be directly electrically connected to the second fine gate 220.

[0120] In one example, for each non-polar fine grid 200 below each solder ribbon 600, a corresponding central insulating strip 920 is provided. Therefore, the number of central insulating strips 920 corresponds to the number of non-polar fine grids 200 covered below the solder ribbon 600, and each central insulating strip 920 is arranged in an array with intervals along the first direction (Y direction) and the second direction (X direction).

[0121] In some embodiments, such as Figure 2 and Figure 3As shown, multiple central insulating strips 920 are arranged at intervals along the first direction (Y direction) and the second direction (X direction); along the first direction (Y direction), the distance between two adjacent central insulating strips 920 is less than the distance between two adjacent fine grids 200 of the same polarity; along the second direction (X direction), the distance between two adjacent central insulating strips 920 is greater than the distance between adjacent first solder strips 610 and second solder strips 620.

[0122] It is understandable that, since the first fine grid 210 and the second fine grid 220 are arranged alternately along the first direction (Y direction), there must be a fine grid 200 of opposite polarity between two adjacent fine grids 200 of the same polarity. For the first solder strip 610, a central insulating strip 920 needs to be set below it at the second fine grid 220 covered by the central insulating strip 920, and there is also a first fine grid 210 between two adjacent second fine grids 220. Therefore, there is only a fine grid 200 of the same polarity between two adjacent central insulating strips 920, and the width of the central insulating strip 920 along the first direction (Y direction) is much larger than the line width of the fine grid 200, thereby effectively ensuring the insulation isolation between the solder strip 600 and the fine grids 200 of different polarities. At the same time, the setting of the wider central insulating strip 920 can also prevent the molten solder of the solder strip 600 from flowing to the position of the fine grid 200 of opposite polarity, causing short circuits and other problems.

[0123] Since the spacing of the central insulating strips 920 along the second direction (X direction) depends on the extension direction of the fine grid 200, and the fine grid 200 is usually continuous, multiple central insulating strips 920 below the same solder strip 600 can be considered to be continuously or closely arranged along the second direction (X direction). Between the central insulating strips 920 below different solder strips 600, since the solder strips 600 have a certain spacing along the second direction (X direction), the central insulating strips 920 below different solder strips 600 also have a certain spacing along the second direction (X direction). This spacing is greater than the center distance between adjacent solder strips 600, ensuring that the insulation structures below different solder strips 600 are independent and do not interfere with each other.

[0124] In one example, the dimension of each central insulating strip 920 along the second direction (X direction) is larger than the dimension of the solder strip 600 along the second direction (X direction). Specifically, the central insulating strip 920 extends beyond the sides of the solder strip 600 at both ends of the width of the solder strip 600. This arrangement ensures that even when there is a certain positional deviation in the placement of the solder strip 600, the central insulating strip 920 can still completely cover the anisopolar fine grid 200 below the solder strip 600, ensuring that the solder strip 600 does not come into contact with the surface of the anisopolar fine grid 200 that is not protected by the insulating layer 900, thereby improving insulation reliability.

[0125] In one example, the distances from both ends of each central insulating strip 920 to the corresponding solder strip 600 along the second direction (X direction) are equal. Specifically, based on the fact that the dimension of the central insulating strip 920 along the second direction (X direction) is larger than the width of the solder strip 600, the central insulating strip 920 is symmetrically arranged with the solder strip 600 as the center in the second direction (X direction), so that the solder strip 600 has an insulating protection section extending beyond the edge of the solder strip 600 on both sides in the width direction. This arrangement is beneficial to the layout design of the central insulating strip 920, simplifying the design of the stencil pattern and the alignment operation. On the other hand, even if there is a certain degree of alignment misalignment when the solder strip 600 is placed, the side of the solder strip 600 is still within the coverage of the central insulating adhesive and will not come into contact with the exposed surface of the opposite polarity grid 200, thereby improving the yield of the component.

[0126] In some embodiments, such as Figure 1 As shown, the first solder strip 610 or the second solder strip 620 overlaps with a first region AA and a second region BB on the first surface and is located outside the other first region AA.

[0127] Specifically, in the back-contact battery string, a solder ribbon 600 is used to connect two adjacent battery cells in series. The solder ribbon 600 extends along the first direction (Y direction). Taking a first solder ribbon 610 as an example, one end of the first solder ribbon 610 is soldered into the second region BB of a battery cell and electrically connected to the first fine grid 210 of the corresponding polarity on the battery cell. Then, the first solder ribbon 610 continues to extend along the first direction (Y direction), passing through a first region AA of the battery cell. In the first region AA, the first solder ribbon 610 is isolated from all the fine grids 200 on the first surface of the battery cell by an edge insulating strip 910. Next, the first solder ribbon 610 continues to extend along the first direction (Y direction) to the first surface of the adjacent battery cell, first passing through a first region AA of the adjacent battery cell, and then entering the second region BB of the adjacent battery cell, where it is electrically connected to the first fine grid 210 of the corresponding polarity on the adjacent battery cell.

[0128] Therefore, for a single solder ribbon 600, its orthographic projection onto the first surface of the current solar cell overlaps with one first region AA and one second region BB of the solar cell, but does not overlap with the other first region AA. In other words, a solder ribbon 600, on the first surface of the current solar cell, extends along the first direction (Y direction) from near the boundary between the second region BB and one first region AA, across the second region BB, and ends near the boundary between the other first region AA and the second region BB. The solder ribbon 600 only covers one first region AA and the second region BB, but does not cover the other first region AA. The insulation of the other first region AA is achieved by another solder ribbon 600 connected in series with an adjacent solar cell on the other side of the solar cell.

[0129] This arrangement minimizes the coverage area of ​​each solder ribbon 600 on a single solar cell. The solder ribbon 600 only extends to the first region AA on the side that needs to be connected in series with the adjacent solar cell, rather than penetrating both first regions AA of the entire solar cell. Furthermore, it helps save on solder ribbon 600 material and reduces the stress impact of the solder ribbon 600 on the edge areas of the solar cell.

[0130] In some embodiments, such as Figures 10 to 13 As shown, the battery cell also includes a connection structure 300, which is disposed on the first surface and near the edge of the semiconductor substrate 100 along the first direction (Y direction). The connection structure 300 includes a conductive member 330 and a positioning gate line 340. The positioning gate line 340 extends along the first direction (Y direction) and is at least partially located in the first region AA. The conductive member 330 is located on the side of the positioning gate line 340 away from the first region AA and is electrically connected to at least one fine gate 200. The positioning gate line 340 is electrically connected to at least a portion of the fine gate 200 of the same polarity located between the conductive member 330 and the edge of the semiconductor substrate 100, and is electrically connected to the conductive member 330 at least through a portion of the fine gate 200.

[0131] Understandably, in this example, the connection structure 300 is positioned near the edge of the first surface along the first direction (Y direction) for electrical connection with the solder ribbon 600, and to collect and transmit the current gathered by the fine gate 200 in this edge region to the solder ribbon 600. Furthermore, since the first region AA consists of two edge regions of the first surface of the semiconductor substrate 100 along the first direction (Y direction), and a portion of the positioning gate line 340 is located within the first region AA, the conductive component 330 is located on the side of the positioning gate line 340 away from the first region AA; that is, the conductive component 330 is closer to the central region of the cell than the positioning gate line 340. In other words, along the first direction (Y direction) from the edge of the cell towards the center, the sequence is: edge of the semiconductor substrate 100, positioning gate line 340, and conductive component 330.

[0132] Specifically, the conductive component 330 is used to electrically connect with the solder ribbon 600. It may be coated with a conductive body 800 such as solder paste or conductive adhesive. The electrical connection with the solder ribbon 600 is achieved by hot pressing. The conductive component 330 draws the current collected by the fine grid 200 connected to it to the solder ribbon 600.

[0133] Furthermore, since a certain safe distance is maintained between the conductive component 330 and the edge of the semiconductor substrate 100 along the first direction (Y direction), multiple fine gates 200 of the same polarity exist in the edge region between the conductive component 330 and the edge of the semiconductor substrate 100. Positioning gate lines 340 extend along the first direction (Y direction) and sequentially connect to these fine gates 200 of the same polarity in the edge region, converging the collected current. Then, the positioning gate lines 340 transmit the converged current to the conductive component 330 through one or more commonly connected fine gates 200, and finally from the conductive component 330 to the solder ribbon 600. Thus, the positioning gate lines 340 solve the problem that the current in the fine gates 200 in the edge region cannot be effectively collected when the conductive component 330 maintains a safe distance from the edge of the semiconductor substrate 100.

[0134] In some embodiments, the positioning gate line 340 and the conductive member 330 are spaced apart along a second direction (X direction). In other words, the positioning gate line 340 is laterally offset relative to the conductive member 330 in the second direction (X direction), and the two are not on the same straight line extending along a first direction (Y direction). This lateral offset design causes the positioning gate line 340 to be located at one side edge of the solder strip 600, or at a predetermined distance from one side edge of the solder strip 600, rather than completely coinciding with the solder strip 600.

[0135] In one example, such as Figure 13 As shown, the positioning grid line 340 and the conductive component 330 are also provided with a current-guiding grid line 350 to ensure their current-carrying capacity.

[0136] Furthermore, the positioning grid line 340 can also serve as a positioning marker for the solder ribbon 600 during installation. Since the positioning grid line 340 extends along the first direction (Y-direction), consistent with the extension direction of the solder ribbon 600, when the solder ribbon 600 is placed in position, the edge of the solder ribbon 600 can be aligned with the positioning grid line 340, or the edge of the solder ribbon 600 and the positioning grid line 340 can have a certain preset distance along the second direction (X-direction). Operators or automated equipment can determine the placement position of the solder ribbon 600 by identifying the position of the positioning grid line 340, thereby achieving precise alignment of the solder ribbon 600.

[0137] It should be noted that no solder paste or conductive adhesive is applied to the positioning grid line 340. Since the positioning grid line 340 is located between the conductive component 330 and the edge of the semiconductor substrate 100, if solder paste were applied to the positioning grid line 340, it might be squeezed out to the edge of the cell during the cell assembly lamination process, causing short circuits or poor appearance between adjacent cells. Although the positioning grid line 340 is not coated with solder paste, it can still be electrically connected to the conductive component 330 through the fine grid 200, transferring the current collected by the fine grid 200 in the edge region to the conductive component 330, and then electrically connected to the solder ribbon 600 through the conductor 800 on the conductive component 330.

[0138] In one example, the connection structure 300 can be integrally printed, meaning that the conductive component 330 and the positioning grid line 340 are formed in the same printing process to simplify the manufacturing process. The material of the connection structure 300 may include at least one of silver, copper, and aluminum; the printing process of the connection structure 300 may be screen printing or coating.

[0139] In some embodiments, such as Figure 2 As shown, the conductive component 330 and the semiconductor substrate 100 have multiple fine gates 200 of the same polarity along the edge of the first direction (Y direction); the positioning gate line 340 is electrically connected to all the fine gates 200 of the same polarity located between the conductive component 330 and the edge of the semiconductor substrate 100; multiple connection structures 300 are arranged at intervals along the second direction (X direction) on the first surface, and each connection structure 300 is connected to a solder strip 600; and two connection structures 300 are arranged at intervals along the first direction (Y direction) on the first surface, and multiple fine gates 200 are provided between the two connection structures 300; the central insulating strip 920 is broken at the conductive component 330.

[0140] Understandably, the conductive component 330 is not located at the very edge of the semiconductor substrate 100, but rather maintains a certain distance from the edge of the semiconductor substrate 100 along the first direction (Y direction). Between the conductive component 330 and the edge of the semiconductor substrate 100, multiple fine gates 200 of the same polarity are arranged. Positioning gate lines 340 extend along the first direction (Y direction) and sequentially connect to all the fine gates 200 of the same polarity within these edge regions, thereby maximizing the collection of current in the edge regions and preventing the loss of current from any single fine gate 200 due to lack of collection.

[0141] In addition, multiple connection structures 300 are spaced apart along the second direction (X direction), that is, along the extension direction of the fine gate 200, multiple connection structures 300 are distributed on the first surface of the semiconductor substrate 100. Each connection structure 300 is used to electrically connect to a solder strip 600, so that multiple solder strips 600 can be arranged side by side along the second direction (X direction).

[0142] Simultaneously, two connection structures 300 are arranged at intervals along the first direction (Y direction) on the first surface, and multiple fine gates 200 are provided between the two connection structures 300. That is, two connection structures 300 are provided below the same solder ribbon 600, and these two connection structures 300 are arranged at intervals along the first direction (Y direction) and are respectively located near the two edges of the semiconductor substrate 100 in the first direction (Y direction) to ensure that the solder ribbon 600 has a reliable current collection point at both ends of the cell. Between the two connection structures 300, multiple fine gates 200 are provided, and the multiple fine gates 200 are located in the second region BB, which can be coated with conductive adhesive or solder paste, etc., to directly connect to the solder ribbon 600 electrically.

[0143] Furthermore, the conductive component 330 can connect multiple fine gates 200 of the same polarity, and the multiple fine gates 200, as well as the reinforcing fine gates 200 between the fine gates 200, also need to be coated with the conductor 800 for connection with the solder ribbon 600. If the central insulating strip 920 covers the conductive component 330 (e.g., the reinforcing fine gate 200), it will hinder the electrical connection between the solder ribbon 600 and the conductive component 330. Therefore, the central insulating strip 920 is disconnected at the location of the conductive component 330 (especially at the reinforcing fine gate 200), that is, it does not cover the conductive component 330, so that the upper surface of the conductive component 330 is exposed for coating with the conductor 800 and soldering to the solder ribbon 600.

[0144] In one example, along the first direction (Y direction), the distance between the conductive component 330 and the edge of the adjacent semiconductor substrate 100 is 3 mm to 7 mm, preferably 4 mm to 6 mm. This distance ensures a sufficient safety margin between the conductive component 330 and the edge of the semiconductor substrate 100, preventing microcracks from appearing at the edge during soldering of the solder ribbon 600. The number of fine gates 200 located between the conductive component 330 and the edge of the semiconductor substrate 100 can be 2 to 12. The specific number can be designed comprehensively based on the distance between the conductive component 330 and the edge of the semiconductor substrate 100, the spacing between adjacent fine gates 200, and the distance between the outermost fine gate 200 and the edge of the semiconductor substrate 100; no specific limitation is imposed here.

[0145] In some embodiments, such as Figure 9 As shown, the fine grid 200 includes a plurality of sub-fine grids arranged at intervals along the second direction (X direction), with a discontinuity between adjacent sub-fine grids, and a docking portion 332 in the discontinuity, the docking portion 332 connecting adjacent sub-fine grids; the conductive component 330 also includes docking portions 332, which are arranged at intervals along the first direction (Y direction); the positioning grid line 340 is electrically connected to the plurality of docking portions 332 arranged along the first direction (Y direction); the back contact battery also includes a conductor 800, which is disposed on the conductive component 330 and on all docking portions 332 of the same polarity between two conductive components 330 arranged along the first direction (Y direction), and the conductor 800 is electrically connected to the solder strip 600.

[0146] It is understandable that, due to the relatively long length of the fine grid 200 along the second direction (X direction), printing a continuous fine grid 200 can easily lead to problems such as low printing accuracy and grid breakage. In this embodiment, the fine grid 200 is divided into multiple sub-fine grids 200 along the second direction (X direction), and adjacent sub-fine grids 200 are connected by a mating part 332. This allows the fine grid 200 to be printed in segments, improving printing accuracy and production yield. In one example, the dimension of the sub-fine grid 200 along the second direction (X direction) is less than or equal to 20 mm. The dimension of the discontinuous area along the second direction (X direction) is 0.1 mm to 0.3 mm.

[0147] Furthermore, the conductive component 330 can be formed by combining multiple mating portions 332, or the conductive component 330 and the mating portions 332 can be structurally overlapped. Since multiple fine grids 200 are arranged at intervals along the first direction (Y direction), each fine grid 200 can have an interruption region and a mating portion 332 near the same position in the second direction (X direction). The multiple mating portions 332 arranged along the first direction (Y direction) correspond to the segmented connection points of multiple fine grids 200 at the same position in the second direction (X direction).

[0148] In one example, such as Figure 11 As shown, the positioning gate line 340 extends along the first direction (Y direction) and is electrically connected in sequence to a plurality of docking portions 332 arranged along the first direction (Y direction). In the first region AA near the edge of the semiconductor substrate 100, the fine gate 200 is segmented into a plurality of sub-fine gates 200 and connected by docking portions 332. The positioning gate line 340 connects these docking portions 332, thereby collecting the current gathered at the segmentation points of each fine gate 200 of the same polarity in the first region AA and transmitting it along the first direction (Y direction).

[0149] In another example, the conductor 800 can be solder paste, conductive adhesive, or other conductive connection material. The conductor 800 can be positioned on the conductive component 330, and on all the same-polarity mating portions 332 between two conductive components 330 arranged along the first direction (Y direction). The two conductive components 330 are respectively located near the two edges of the semiconductor substrate 100 along the first direction (Y direction), and multiple mating portions 332 are arranged between the conductive components 330 along the first direction (Y direction). Of course, all the multiple mating portions 332 belong to the same-polarity fine gate 200, and the conductor 800 is coated on these mating portions 332 and the conductive component 330, forming continuous or discontinuous conductor strips 800 extending along the first direction (Y direction). When the solder ribbon 600 is placed along the first direction (Y direction), the solder ribbon 600 contacts these conductors 800, and electrical connection is achieved through thermocompression welding.

[0150] It should be noted that the positioning grid line 340 is not coated with the conductor 800. The positioning grid line 340 is only used to collect the current of the edge fine grid 200 and transmit it to the conductive component 330 through the fine grid 200. It is not directly welded to the solder strip 600.

[0151] In one example, the mating portion 332 includes a middle portion and two connecting portions. The two connecting portions are respectively connected to the two ends of the middle portion along the second direction (X direction). One connecting portion is electrically connected to one of the two adjacent sub-grids 200, and the other connecting portion is electrically connected to the other of the two adjacent sub-grids 200. The dimension of the connecting portion along the second direction (X direction) is larger than the dimension of the middle portion along the second direction (X direction). That is, the mating portion 332 has a symmetrical shape that is wide at both ends and narrow in the middle, similar to a bow tie or collar tie structure. The wider ends are used for overlapping connection with adjacent sub-grids 200 to improve the reliability of the overlap; the narrower width of the middle portion is used to reduce material usage and lower costs.

[0152] In one example, the mating part 332 can use a non-burn-through paste, which will not burn through the passivation layer during printing, thus avoiding metallization damage to the doped layer.

[0153] In another example, the conductive component 330 in the connection structure 300 may include a reinforcing grid line 331 extending along a first direction (Y direction) and sequentially electrically connecting at least two adjacent mating portions 332 of the same polarity. The reinforcing grid line 331 connects multiple mating portions 332 in series to form a welding area corresponding to the solder strip 600, increasing the contact area with the solder strip 600 and improving welding reliability.

[0154] In some embodiments, such as Figure 2 , Figure 3 , Figure 11 and Figure 14 The back contact battery also includes a first edge gate line 410 and a second edge gate line 420, both disposed on the first surface and extending along the first direction (Y direction). The first edge gate line 410 and the second edge gate line 420 are respectively close to the two sides of the first surface along the second direction (X direction). The first edge gate line 410 is used to connect the ends of a plurality of first fine gates 210 arranged along the first direction (Y direction), and the second edge gate line 420 is used to connect the ends of a plurality of second fine gates 220 arranged along the first direction (Y direction). The insulating layer 900 also includes a first insulating strip 930, which covers the side of the first edge gate line 410 and the second edge gate line 420 away from the semiconductor substrate 100. The end of the first insulating strip 930 along the first direction (Y direction) is connected to the edge insulating strip 910.

[0155] It is understandable that if the first edge grid line 410 is close to one side of the first surface along the second direction (X direction), then the second edge grid line 420 is close to the other side of the first surface along the second direction (X direction).

[0156] Since the first fine gate 210 and the second fine gate 220 are arranged alternately and at intervals along the first direction (Y direction) and each extends along the second direction (X direction), the first fine gate 210 and the second fine gate 220 terminate near the two sides of the semiconductor substrate 100 along the second direction (X direction). The first edge gate line 410 extends along the first direction (Y direction) and is electrically connected to the ends of each first fine gate 210 near the side of the semiconductor substrate 100 in sequence, thus collecting the current in the end regions of these first fine gates 210. Similarly, the second edge gate line 420 extends along the first direction (Y direction) and is electrically connected to the ends of each second fine gate 220 near the other side of the semiconductor substrate 100 in sequence, thus collecting the current in the end regions of these second fine gates 220. Through the first edge gate line 410 and the second edge gate line 420, the current in the edge regions of both sides of the solar cell along the second direction (X direction) can be effectively collected, avoiding the loss of photocurrent at the ends of the edge fine gates 200 due to the lack of a current-collecting path.

[0157] Simultaneously, the first insulating strip 930 isolates the first edge grid line 410 and the second edge grid line 420 from the solder ribbon 600 that may pass over or near them. Since the solder ribbon 600 extends along a first direction (Y direction), a short circuit may occur if the polarity of the solder ribbon 600 is opposite to that of the edge grid line when it passes over the first edge grid line 410 or the second edge grid line 420. The first insulating strip 930 covers the edge grid lines, providing insulation between the solder ribbon 600 and the edge grid lines of opposite polarity.

[0158] Of course, since the edge insulating strip 910 is located in the first region AA, when the first insulating strip 930 extends along the first direction (Y direction) to the first region AA, its end connects with the edge insulating strip 910 to form a continuous insulating frame extending along the edge of the cell. Specifically, the edge insulating strip 910 extends along the first direction (Y direction) to cover the first region AA, and the first insulating strip 930 extends along the second direction (X direction) to cover the edge grid lines on the side of the cell. The two meet and connect in the corner area of ​​the cell, together forming an L-shaped or U-shaped insulating structure around the edge of the cell.

[0159] In one example, the first insulating strip 930 and the edge insulating strip 910 can be integrally formed in the same screen printing process to ensure the continuity and sealing of the connection between the two.

[0160] In some embodiments, such as Figure 11 and Figure 14As shown, the connection structure 300 includes a first connection structure 310 and a second connection structure 320. The first connection structure 310 is electrically connected to the first fine gate 210, and the second connection structure 320 is electrically connected to the second fine gate 220. The first connection structure 310 and the second connection structure 320 are arranged alternately along the second direction (X direction). The connection structure 300 also includes a third connection structure 360 ​​and a fourth connection structure 370. The third connection structure 360 ​​and the fourth connection structure 370 are respectively disposed on both sides of the semiconductor substrate 100 along the second direction. The first edge gate line 410 is electrically connected to the third connection structure 360 ​​at least through the first fine gate 210. The second edge gate line 420 is electrically connected to the fourth connection structure 370 at least through the second fine gate 220.

[0161] Specifically, since the first fine gate 210 and the second fine gate 220 are arranged alternately along the first direction (Y direction), the first connecting structure 310 and the second connecting structure 320 of corresponding polarities are also arranged alternately along the first direction (Y direction). At the same time, since the first fine gate 210 and the second fine gate 220 are continuous in the second direction (X direction), and multiple connecting structures 300 are arranged at intervals along the second direction (X direction), the first connecting structure 310 and the second connecting structure 320 are also arranged alternately in the second direction (X direction).

[0162] For ease of understanding, the connection structure 300 in this example also includes a third connection structure 360 ​​and a fourth connection structure 370. The third connection structure 360 ​​is disposed near one side of the semiconductor substrate 100 along the second direction (X direction), and the fourth connection structure 370 is disposed near the other side of the semiconductor substrate 100 along the second direction (X direction). The third connection structure 360 ​​and the fourth connection structure 370 serve as edge connection structures 300, located at two edge positions of the first surface along the second direction (X direction).

[0163] Specifically, the third connection structure 360 ​​is electrically connected to the first fine gate 210. Therefore, the current collected at the end of the first fine gate 210 by the first edge gate line 410 can be transmitted through the first fine gate 210 to the third connection structure 360, and then transmitted to the solder ribbon 600 by the conductive component 330 of the third connection structure 360. Similarly, the second edge gate line 420 extends along the first direction (Y direction) and connects the ends of each second fine gate 220. The fourth connection structure 370 is electrically connected to the second fine gate 220. Therefore, the current collected at the end of the second fine gate 220 by the second edge gate line 420 can be transmitted through the second fine gate 220 to the fourth connection structure 370, and then transmitted to the solder ribbon 600 by the conductive component 330 of the fourth connection structure 370.

[0164] Since the third connection structure 360 ​​and the fourth connection structure 370 are located near the two sides of the semiconductor substrate 100 along the second direction (X direction), respectively, and correspond to the first edge gate line 410 and the second edge gate line 420, the current collected by the two edge gate lines can be transmitted to the corresponding connection structure 300 nearby, resulting in a short current transmission path and low loss.

[0165] In one example, the spacing between the first edge gate line 410 and the third connecting structure 360 ​​along the second direction (X direction) is 3mm to 8mm, such as 3mm, 4mm, 5mm, 6mm, 7mm, 8mm, etc. The spacing between the second edge gate line 420 and the fourth connecting structure 370 along the second direction (X direction) is also 3mm to 8mm.

[0166] In some embodiments, the positioning grid line 340 in the third connection structure 360 ​​connects two adjacent first fine grids 210; the positioning grid line 340 in the fourth connection structure 370 connects two adjacent second fine grids 220; the back contact battery also includes a plurality of first short grid lines 520 and a plurality of second short grid lines 510, both the first short grid lines 520 and the second short grid lines 510 extending along a second direction (X direction); the second fine grids 220 are disconnected at the third connection structure 360, and the first short grid lines 520 are used to connect the disconnected second fine grids 220. The first fine gate 210 is disconnected at the fourth connection structure 370, and the second short gate line 510 is used to connect the disconnected first fine gate 210 to transmit current to the connection structure 300 connected to the first fine gate 210. The insulating layer 900 also includes a second insulating strip 940, which covers the side of the first short gate line 520 and the second short gate line 510 away from the semiconductor substrate 100, and is connected to two adjacent middle insulating strips 920.

[0167] Specifically, the third connection structure 360 ​​is disposed near one side of the semiconductor substrate 100 along the second direction (X direction), and its positioning gate line 340 extends along the first direction (Y direction) to connect two adjacent first fine gates 210 (of the same polarity) for collecting the current of the first fine gate 210 in the edge region. The fourth connection structure 370 is disposed near the other side of the semiconductor substrate 100 along the second direction (X direction), and its positioning gate line 340 extends along the first direction (Y direction) to connect two adjacent second fine gates 220 (of the same polarity) for collecting the current of the second fine gate 220 in the edge region.

[0168] Furthermore, since the conductive component 330 and the positioning gate line 340 in the third connection structure 360 ​​are both electrically connected to the first fine gate 210 (of the same polarity), if the second fine gate 220 (of opposite polarity) directly passes through the third connection structure 360, it will form an electrical connection with the third connection structure 360, resulting in a short circuit. Therefore, the second fine gate 220 needs to be disconnected at the third connection structure 360. The ends of the two disconnected segments of the second fine gate 220 are located on both sides of the third connection structure 360 ​​along the first direction (Y direction). The first short gate line 520 extends along the second direction (X direction), bridging the two disconnected segments of the second fine gate 220, so that the current of the second fine gate 220 can bypass the third connection structure 360 ​​and continue to be transmitted along the second fine gate 220, eventually reaching the second connection structure 320 (or the fourth connection structure 370) electrically connected to the second fine gate 220.

[0169] Similarly, since the conductive component 330 and the positioning gate line 340 in the fourth connection structure 370 are both electrically connected to the second fine gate 220 (of the same polarity), the first fine gate 210 needs to be disconnected at the fourth connection structure 370 to avoid a short circuit. The second short gate line 510 extends along the second direction (X direction), bridging the two disconnected segments of the first fine gate 210, so that the current of the first fine gate 210 can bypass the fourth connection structure 370 and continue to be transmitted along the first fine gate 210, eventually reaching the first connection structure 310 (or the third connection structure 360) which is electrically connected to the first fine gate 210.

[0170] In one example, such as Figure 2 and Figure 3 As shown, the second insulating strip 940 covers the side of the first short gate line 520 and the second short gate line 510 facing away from the semiconductor substrate 100, and is connected to the two adjacent middle insulating strips 920. Both the first short gate line 520 and the second short gate line 510 are conductive structures. When the solder ribbon 600 passes over them, a short circuit may occur if the polarity of the solder ribbon 600 is opposite to that of the short gate line. The second insulating strip 940 covers the short gate lines, providing insulation between the solder ribbon 600 and the opposite polarity short gate lines. Simultaneously, the second insulating strip 940 is connected to the two adjacent middle insulating strips 920, forming a continuous insulating network. The middle insulating strips 920 cover the fine gate 200, and the second insulating strip 940 covers the short gate lines; their connection ensures uninterrupted insulation protection along both the extension path of the fine gate 200 and the bridging path of the short gate lines.

[0171] Similarly, the second short grid line 510 extends along the second direction (X direction) at the fourth connection structure 370, bridging the two ends of the disconnected first fine grid 210, and the second insulating strip 940 covering it is connected to the corresponding middle insulating strip 920.

[0172] In some embodiments, the ratio of the dimension of the edge insulating strip 910 along the first direction (Y direction) to the dimension of the middle insulating strip 920 along the first direction (Y direction) is 1:10. Exemplarily, this ratio is 1:3, 1:5, 1:6, 1:8, etc., and is not limited herein, so that the edge insulating strip 910 has sufficient width to form an effective blocking surface to prevent leakage of molten solder at the edge during the lamination process.

[0173] In one example, the edge insulating strip 910 is 0.1mm-0.3mm away from the edge of the first surface along the first direction (Y direction). Specifically, by leaving a gap between the edge insulating strip 910 and the edge of the second surface, it is possible to prevent the adhesive from being directly printed onto the edge of the silicon wafer during screen printing, which could cause the adhesive to overflow onto the outside of the silicon wafer, affecting the appearance of the component or causing an edge short circuit. At the same time, this gap also provides a buffer space for the slight flow of the insulating adhesive during the lamination process. Of course, this distance cannot be too large, otherwise it will reduce the coverage area of ​​the edge insulating strip 910 on the first area AA, reducing the insulation protection effect.

[0174] In one example, the number of fine gates 200 located in the first region AA is 2-10. The specific number can be determined by a combination of factors such as the safety distance between the conductive component 330 and the edge of the semiconductor substrate 100, and the spacing between adjacent fine gates 200, and is not limited here.

[0175] In one example, the edge insulating strip 910 has a dimension of 1mm-2mm along the first direction (Y direction). The width of the edge insulating strip 910 can be designed according to the number of fine grids 200 in the first zone AA, so as to cover all the fine grids 200 located in the first zone AA.

[0176] In one example, the central insulating strip 920 has a dimension of 0.2mm-0.5mm along the first direction (Y direction).

[0177] In one example, the insulating layer 900 is integrally printed. Specifically, all the insulating structures, including the edge insulating strip 910, the central insulating strip 920, the first insulating strip 930, and the second insulating strip 940, are formed in the same screen printing process. Integral printing simplifies the manufacturing process, reduces process steps, and improves production efficiency. At the same time, integral printing ensures the continuity of the connections between the insulating strips, avoiding gaps or poor overlap at the connections caused by step-by-step printing.

[0178] In one example, the material of insulating layer 900 includes insulating adhesive, insulating ink, or insulating film.

[0179] In some embodiments, the back contact battery string further includes a fixing member 700, which is disposed between the conductive member 330 and the edge of the semiconductor substrate 100 and is located in the second region BB, for fixing the solder ribbon 600 to the semiconductor substrate 100.

[0180] Specifically, the second region BB is the central region of the first surface of the semiconductor substrate 100, located between the two first regions AA. The fixing member 700 is disposed in the region between the conductive member 330 and the edge of the semiconductor substrate 100, and is located within the second region BB. In other words, along the first direction (Y direction) from the edge of the cell towards the center, the sequence is: edge of semiconductor substrate 100, first region AA, fixing member 700, and conductive member 330; the fixing member 700 is located between the first region AA and the conductive member 330.

[0181] Since the solder ribbon 600 extends along the first direction (Y direction), one end of it is soldered to the conductive component 330 via a conductor 800 (such as solder paste), and the other end extends to the adjacent solar cell. Near the end of the solder ribbon 600, a retainer 700 secures the solder ribbon 600 to the first surface of the semiconductor substrate 100. Of course, the retainer 700 is applied before or after the solder ribbon 600 is soldered to the conductive component 330, serving as a pre-fixing or reinforcing fixation to ensure the positional stability of the solder ribbon 600 during the component manufacturing process.

[0182] In one example, such as Figures 4 to 6 As shown, the fastener 700 includes a fixing adhesive, such as UV adhesive (ultraviolet curing adhesive). The UV adhesive can cure quickly under ultraviolet light irradiation, which can fix the solder ribbon 600 in a predetermined position in a short time, facilitating the subsequent hot-press welding process.

[0183] In one example, the distance between the fastener 700 and the edge of the semiconductor substrate 100 along the first direction (Y direction) is greater than or equal to 1.1 mm. This distance ensures that there is sufficient safety clearance between the fastener 700 and the edge of the semiconductor substrate 100 to prevent the adhesive from overflowing to the outside of the silicon wafer edge during the curing process.

[0184] It should be noted that the orthographic projections of the fixing member 700 and the edge insulating strip 910 on the semiconductor substrate 100 do not overlap. The edge insulating strip 910 is located in the first region AA, and the fixing member 700 is located in the second region BB near the first region AA. The two are arranged sequentially from the outside to the inside along the first direction (Y direction). The edge insulating strip 910 provides insulation protection for the area outside the end of the solder ribbon 600, and the fixing member 700 fixes the end of the solder ribbon 600 to the semiconductor substrate 100. The edge insulating strip 910 isolates the solder from penetrating the end of the solder ribbon 600, together providing dual protection of mechanical fixation and electrical insulation for the end area of ​​the solder ribbon 600.

[0185] Based on the same concept, this application also provides a battery assembly, including multiple back contact battery strings as described in the above embodiments, with the multiple back contact battery strings arranged in an array.

[0186] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0187] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A back-contact battery string, characterized in that, The battery includes multiple solar cells and solder strips, wherein the solar cells are arranged along a first direction, and the solder strips connect two adjacent solar cells in series; the solar cells include: A semiconductor substrate has a first surface and a second surface opposite to each other. The first surface includes two first regions and a second region, the two first regions being located on opposite sides of the second region along the first direction. Multiple fine grids are disposed in the first region and the second region and extend along the second direction. The multiple fine grids are arranged at intervals along the first direction, and the second direction intersects the first direction. An insulating layer is disposed on the side of the fine gate opposite to the semiconductor substrate, the insulating layer including an edge insulating strip and a central insulating strip; The edge insulating strip is located in the first region and covers all the fine gates and the gaps between adjacent fine gates in the first region to isolate the solder strip from the semiconductor substrate; the middle insulating strip is located in the second region and is disposed between a portion of the solder strip and a portion of the fine gates. The dimension of the edge insulating strip along the first direction is greater than the dimension of the middle insulating strip along the first direction.

2. The back contact battery string according to claim 1, characterized in that, The semiconductor substrate has a chamfered edge at the corner; the edge insulating strip extends along the second direction, and the orthographic projection of the end of the edge insulating strip on the first surface includes at least one first boundary segment and at least one second boundary segment, the first boundary segment and the second boundary segment are alternately connected, and the extension directions of the first boundary segment and the second boundary segment intersect, and at least partially adjacent first boundary segments and second boundary segments form an accommodating space with the chamfer.

3. The back contact battery string according to claim 2, characterized in that, The first boundary segment extends along the first direction, and the second boundary segment extends along the second direction.

4. The back contact battery string according to claim 3, characterized in that, One end of the edge insulating strip has a plurality of first boundary segments and a plurality of second boundary segments; the edge insulating strip includes a plurality of sub-insulating strips corresponding to the plurality of first boundary segments, and the size of the plurality of sub-insulating strips decreases sequentially along the second direction from the second region to the first region; The plurality of sub-insulating strips are arranged sequentially along the first direction and are in contact with each other.

5. The back contact battery string according to any one of claims 1-4, characterized in that, The plurality of fine gates include a first fine gate and a second fine gate, the first fine gate and the second fine gate being arranged alternately and at intervals along the first direction, and having different polarities; The solder strip includes a first solder strip and a second solder strip, wherein the first solder strip has the same polarity as the first fine gate, and the second solder strip has the same polarity as the second fine gate; The number of central insulating strips is multiple, with the central insulating strip provided between the first solder strip and the second fine grid, and between the second solder strip and the first fine grid.

6. The back contact battery string according to claim 5, characterized in that, The plurality of central insulating strips are arranged at intervals along the first direction and the second direction; along the first direction, the distance between two adjacent central insulating strips is less than the distance between two adjacent fine grids of the same polarity; Along the second direction, the distance between two adjacent central insulating strips is greater than the distance between the adjacent first solder strip and the second solder strip; And / or, the dimension of each of the central insulating strips along the second direction is greater than the dimension of the solder strip along the second direction; And / or, the distances from both ends of each of the central insulating strips along the second direction to the corresponding solder strips are equal.

7. The back contact battery string according to claim 5, characterized in that, The orthographic projection of the first or second solder strip onto the first surface overlaps with one of the first and second regions and is located outside the other of the first regions.

8. The back contact battery string according to claim 5, characterized in that, The battery cell further includes a connection structure, which is disposed on the first surface and near the edge of the semiconductor substrate along the first direction; The connection structure includes a conductive component and a positioning gate line, the positioning gate line extending along the first direction and at least partially located in the first region; the conductive component is located on the side of the positioning gate line away from the first region and is electrically connected to at least one of the fine gates; the fine gate, at least partially of the same polarity, located between the conductive component and the edge of the semiconductor substrate, is electrically connected to the positioning gate line, and the positioning gate line is electrically connected to the conductive component at least through a portion of the fine gate.

9. The back contact battery string according to claim 8, characterized in that, The conductive component and the semiconductor substrate have a plurality of fine gates of the same polarity along the edge of the first direction; the positioning gate line is electrically connected to all the fine gates of the same polarity located between the conductive component and the edge of the semiconductor substrate; The first surface has a plurality of connecting structures arranged at intervals along the second direction, and each connecting structure is connected to a corresponding solder strip; the first surface has two connecting structures arranged at intervals along the first direction, and a plurality of fine grids are provided between the two connecting structures; The central insulating strip is broken at the conductive component.

10. The back contact battery string according to claim 9, characterized in that, The fine grid includes a plurality of sub-fine grids arranged at intervals along the second direction, and there is a discontinuity between adjacent sub-fine grids. The discontinuity is provided with a docking part, and the docking part connects the adjacent sub-fine grids. The conductive component further includes the docking portion, which is arranged at intervals along the first direction; The positioning grid wires are electrically connected to a plurality of the docking portions arranged along the first direction; The back contact battery also includes a conductor disposed on the conductive component and on all mating portions of the same polarity between two conductive components arranged along the first direction, and the conductor is electrically connected to the welding strip.

11. The back contact battery string according to claim 8, characterized in that, The back contact battery further includes a first edge grid line and a second edge grid line. The first edge grid line and the second edge grid line are both disposed on the first surface and extend along the first direction. The first edge grid line and the second edge grid line are respectively close to the two sides of the first surface along the second direction. The first edge grid line is used to connect the ends of a plurality of first fine grids arranged along the first direction, and the second edge grid line is used to connect the ends of a plurality of second fine grids arranged along the first direction. The insulating layer further includes a first insulating strip, which covers the side of the first edge gate line and the second edge gate line away from the semiconductor substrate, and the end of the first insulating strip along the first direction is connected to the edge insulating strip.

12. The back contact battery string according to claim 11, characterized in that, The connection structure includes a first connection structure and a second connection structure, wherein the first connection structure is electrically connected to the first fine gate, and the second connection structure is electrically connected to the second fine gate; the first connection structure and the second connection structure are alternately arranged along the second direction. The connection structure further includes a third connection structure and a fourth connection structure, which are respectively disposed on both sides of the semiconductor substrate along the second direction; the first edge gate line is electrically connected to the third connection structure at least through the first fine gate; and the second edge gate line is electrically connected to the fourth connection structure at least through the second fine gate.

13. The back contact battery string according to claim 12, characterized in that, The positioning grid line in the third connection structure connects two adjacent first fine grids; the positioning grid line in the fourth connection structure connects two adjacent second fine grids. The back contact battery also includes a plurality of first short grid lines and a plurality of second short grid lines, wherein the first short grid lines and the second short grid lines extend along the second direction; The second fine gate is disconnected at the third connection structure, and the first short gate line is used to connect the disconnected second fine gate; The first fine gate is disconnected at the fourth connection structure, and the second short gate line is used to connect the disconnected first fine gate; The insulating layer further includes a second insulating strip, which covers the side of the first short gate line and the second short gate line away from the semiconductor substrate, and is connected to two adjacent middle insulating strips.

14. The back contact battery string according to any one of claims 1-4, characterized in that, The ratio of the dimension of the edge insulating strip along the first direction to the dimension of the middle insulating strip along the first direction is 1:10; And / or, the distance between the edge insulating strip and the edge of the first surface along the first direction is 0.1mm-0.3mm; And / or, the number of fine grids located in the first region is 2-10; And / or, the dimension of the edge insulating strip along the first direction is 1mm-2mm; And / or, the dimension of the central insulating strip along the first direction is 0.2mm-0.5mm; And / or, the insulating layer is integrally printed; And / or, the material of the insulating layer includes insulating adhesive, insulating ink, or insulating film.

15. The back contact battery string according to any one of claims 8-13, characterized in that, The back contact battery string also includes a fixing member disposed between the conductive component and the edge of the semiconductor substrate, and located in the second region, for fixing the solder ribbon to the semiconductor substrate.

16. A battery assembly, characterized in that, It includes a plurality of back contact battery strings as described in any one of claims 1-15, wherein the plurality of back contact battery strings are arranged in an array.

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