A data processing method and related apparatus

Abstract

The application provides a data processing method and related devices. In the method, a first processor of a vehicle can determine the position of service data in a first priority queue based on a service type, that is, prioritize service data of different service types, and then send first message data according to the priority relationship. In this way, message loss can be reduced, and the low-latency requirement of data transmission can be met. Further, the corresponding service data can be obtained based on the first address of the service data in the first memory queue, so that zero-copy of message data can be implemented, thereby reducing resource overhead.

Description

A data processing method and related apparatus Technical Field

[0001] This application relates to the field of communications, and more particularly to a data processing method and related apparatus. Background Technology

[0002] On current automotive computing platforms, the system-on-chip (SOC) and the microcontroller unit (MCU) need to undertake different data processing tasks. For example, when initiating intelligent driving, the SOC needs to acquire a large amount of sensor data and output real-time control signals to the MCU. Correspondingly, the MCU needs to transmit sensor data such as LiDAR data and vehicle operation logs to the SOC.

[0003] The SOC and MCU can encapsulate data into Ethernet packets based on the Ethernet protocol and transmit them over Ethernet. For example, during data reception, the network card processes the different received packet data and copies it to the upper-layer application for use; during data transmission, the upper-layer application can encapsulate different service data into packets according to the Ethernet protocol and finally send the packet data out through the network card.

[0004] However, during data transmission, different types of messages may consume the same resources, meaning that no differentiated processing is applied to different types of messages, leading to message loss and latency issues. How to meet the low-latency requirements during data transmission is a pressing problem that needs to be solved. Summary of the Invention

[0005] This application provides a data processing method and related apparatus in order to reduce transmission latency and lower system resource overhead.

[0006] Firstly, a data processing method is provided, which can be applied to a first processing device. This device may be, for example, a first processor of a vehicle (such as an MCU or SOC), a component configured in the first processor (such as a chip, chip system, processor, etc.), or a logic module or software capable of implementing all or part of the functions of the first processor, etc. This application does not limit the scope of the application.

[0007] For example, the method includes: a first processing device determining first message data associated with service data, and sending the first message data to a second processor of the vehicle, wherein the memory address of a first memory queue occupied by each service data is denoted as a first address, the position of the first address in a first priority queue is determined by the service type of the service data, and the service data can be read from a second memory queue mapped from the first memory queue based on the first address.

[0008] Based on the above scheme, the first processing device determines the position of the service data in the first priority queue based on the service type, that is, it prioritizes the service data of different service types and then sends the first message data according to the priority relationship, thereby reducing message loss and meeting the low latency requirements of data transmission. Furthermore, based on the first address of the service data in the first memory queue, the corresponding service data can be obtained from the second memory queue, thus achieving zero copy of message data and reducing transmission overhead.

[0009] In conjunction with the first aspect, in some possible implementations of the first aspect, the order of the first addresses stored in the first priority queue is associated with a second priority queue, the second priority queue comprising at least two queues having different priorities, and the second priority queue including the first addresses.

[0010] The first address stored in each of the different queues included in the second priority queue can be written to the first priority queue based on their respective priorities. Among the multiple first addresses written to the first priority queue, the first address stored in the higher-priority queue within the second priority queue appears before the first address stored in the lower-priority queue. In this way, based on the priorities of the different queues included in the second priority queue, the first addresses of different types of business data can be written to the first priority queue according to the priority relationship of the different queues, which can improve the stability and reliability of high-priority business data transmission.

[0011] In conjunction with the first aspect, in some possible implementations of the first aspect, the method further includes: determining the queue in the at least two queues corresponding to the business type of the business data; and writing the first address of the business data into the corresponding queue in the second priority queue.

[0012] Different service types can correspond to different priorities, and different service types can also correspond to different queues in the second priority queue. For example, a higher priority service type can correspond to a higher priority queue. The first processing device can determine which queue in the second priority queue to write the first address of the service data into based on the service type of the service data. In this way, based on the correspondence between different service types and at least two queues included in the second priority queue, the first addresses of different types of service data can be written into the corresponding queues respectively, which can improve the stability and reliability of high-priority service data transmission.

[0013] In conjunction with the first aspect, in some possible implementations of the first aspect, the second priority queue includes a first queue and a second queue, the priority of the first queue is higher than the priority of the second queue, and the priority of the first address in the first queue in the first priority queue is higher than the priority of the first address in the second queue in the first priority queue.

[0014] The first address of each queue in the second priority queue is written to the first priority queue. One possibility is that the higher the priority of the queue included in the second priority queue, the higher the priority of the first address stored in that queue in the first priority queue, and vice versa. In this way, based on the priorities of the different queues included in the second priority queue, different types of business data can be written to the first priority queue according to the priority relationship of the different queues, which can improve the stability and reliability of high-priority business data transmission.

[0015] In conjunction with the first aspect, in some possible implementations of the first aspect, the second priority queue includes a first queue and a second queue, with the first queue having a higher priority than the second queue. When all addresses in the first queue are free, or when the number of free addresses in the first queue is greater than or equal to a preset value, the service type of the service data changes from the corresponding second queue to the corresponding first queue in the second priority queue.

[0016] When no high-priority service data needs to be transmitted, the mapping between the service types of other types of service data and different queues in the second priority queue can be adjusted. For example, the service type of service data that originally corresponded to the second queue can be updated to correspond to the first queue. In this way, the priorities of different queues can be dynamically adjusted, thereby improving the utilization efficiency of high-priority queues (such as the first queue).

[0017] In conjunction with the first aspect, in some possible implementations of the first aspect, the second priority queue includes a first queue and a second queue, the first queue has a higher priority than the second queue, and when the first queue has no free address, the free address of the second queue is updated to the first queue.

[0018] When a large amount of high-priority business data needs to be transmitted continuously, the original first queue corresponding to the high-priority business type has no available storage space to store the first addresses corresponding to other high-priority business data. In this case, the free addresses in the low-priority queue can be virtually used as high-priority queues to store the first addresses corresponding to other high-priority business data. Here, the free address of a queue can be understood as a portion of the queue's addresses (or storage space) that are not stored or written to the first address; these free addresses can be called the queue's free addresses.

[0019] In this way, the priorities of different queues can be dynamically adjusted, thereby improving the efficiency of using different queues.

[0020] In conjunction with the first aspect, in some possible implementations of the first aspect, the priority of the first service data is higher than the priority of the second service data. When the number of delayed transmissions of the second service data is less than or equal to the first threshold, the first address in the second priority queue is before the second address in the first priority queue. The first address corresponds to the first service data, and the second address corresponds to the second service data.

[0021] One possible implementation is to set a delay count for each first address already written to the first priority queue. Whenever a first address of higher-priority business data is inserted into the first priority queue, the count of the existing lower-priority first addresses in the queue is delayed by one. When the delay count reaches a certain threshold, the first addresses of lower-priority business data can be processed first. In this way, it can prevent low-priority business data from being unable to be processed in a timely manner when a large number of high-priority business data are processed concurrently.

[0022] In conjunction with the first aspect, in some possible implementations of the first aspect, the first memory queue is mapped to the second memory queue via a circular buffer.

[0023] There is an address mapping relationship between the first memory queue and the second memory queue, meaning that the first memory queue and the second memory queue can share the same physical storage space. The first processing device can read the business data corresponding to the first memory queue mapped by the second memory queue based on the first address. In this way, zero-copy data transmission can be achieved, reducing transmission overhead.

[0024] In conjunction with the first aspect, in some possible implementations of the first aspect, the business data is obtained by reading from the first memory queue based on the first address using direct memory access (DMA) technology.

[0025] The first processing unit can read service data from the first memory queue mapped by the second memory queue using DMA technology based on the acquired first address. This can improve system performance.

[0026] In conjunction with the first aspect, in some possible implementations of the first aspect, the business type of the business data is determined based on an eXpress socket (XSK) message, which is determined based on the business data.

[0027] The application layer can encapsulate different business data into XSK messages. The first processing device can parse these XSK messages to obtain their message types and priorities. The message type of these messages corresponds to the business type of the business data. This helps the first processing device to obtain the business types of different business data and then process the different business data based on these business types.

[0028] In conjunction with the first aspect, in some possible implementations of the first aspect, the method further includes: receiving second message data sent by a third processor of the vehicle; obtaining service data based on the second message data; wherein the second message data corresponds to a third address in a third memory queue, the third address is stored in a third priority queue, and the position of the third address in the third priority queue is determined by the message type of the second message data, and the second message data is read from a fourth memory queue mapped from the third memory queue based on the third address.

[0029] The first processing device can encapsulate different business data into a first message data and send it out, and it can also receive different second message data and process the second message data to obtain the corresponding business data.

[0030] For details regarding the first processing device acquiring service data based on the received second message data, please refer to the second aspect and the detailed description in some possible implementations of the second aspect, which will not be repeated here.

[0031] Secondly, a data processing method is provided, which can be applied to a second processing device. This device may be, for example, a second processor of a vehicle (such as an MCU or SOC), a component configured in the second processor (such as a chip, chip system, processor, etc.), or a logic module or software capable of implementing all or part of the functions of the second processor, etc. This application does not limit the scope of the application.

[0032] For example, the method includes: a second processing device receiving third message data and obtaining service data based on the third message data; wherein the third message data corresponds to a fourth address in a fifth memory queue, the fourth address is stored in a fourth priority queue, and the position of the fourth address in the fourth priority queue is determined by the message type of the third message data, and the third message data is read from a sixth memory queue mapped from the fifth memory queue based on the fourth address.

[0033] Based on the above scheme, different message types can correspond to different priorities. The second processing device can determine the position of the third message data in the fourth priority queue based on the message type, that is, prioritize the third message data of different types, and then obtain the corresponding service data according to the priority relationship, thereby reducing message loss and meeting the low latency requirements of message data transmission. Furthermore, there is an address mapping relationship between the fifth and sixth memory queues. The second processing device can obtain the third message data from the sixth memory queue based on this address mapping relationship and the fourth address written in the fourth priority queue. In this way, zero-copy of message data can be achieved, thereby reducing resource overhead.

[0034] In conjunction with the second aspect, in some possible implementations of the second aspect, the order of the fourth addresses stored in the fourth priority queue is associated with the fifth priority queue, which includes at least two queues with different priorities, and the fifth priority queue includes the fourth addresses.

[0035] In conjunction with the second aspect, in some possible implementations of the second aspect, the method further includes: determining the queue in the at least two queues corresponding to the message type of the third message data; and writing the fourth address of the third message data into the corresponding queue in the fifth priority queue.

[0036] In conjunction with the second aspect, in some possible implementations of the second aspect, the fifth priority queue includes the third queue and the fourth queue, the priority of the third queue is higher than the priority of the fourth queue, and the priority of the fourth address in the third queue in the fourth priority queue is higher than the priority of the fourth address in the fourth priority queue.

[0037] In conjunction with the second aspect, in some possible implementations of the second aspect, the fifth priority queue includes a third queue and a fourth queue, with the third queue having a higher priority than the fourth queue. The method further includes: when all addresses in the third queue are free, or when the number of free addresses in the third queue is greater than or equal to a preset value, updating the mapping relationship between the message type and at least two queues in the fifth priority queue based on first feedback information, wherein the first feedback information is used to indicate that the message type in the fifth priority queue changes from the corresponding fourth queue to the corresponding third queue.

[0038] The second processing device can update the message type that originally corresponded to the low-priority queue to the high-priority queue based on the first feedback information. This helps the second processing device to dynamically adjust the priorities of different queues, thereby improving the utilization efficiency of the high-priority queue (e.g., the first queue).

[0039] In conjunction with the second aspect, in some possible implementations of the second aspect, the fifth priority queue includes a third queue and a fourth queue, wherein the priority of the third queue is higher than that of the fourth queue. The method further includes: when the third queue has no free address, updating the free address of the fourth queue to the third queue based on second feedback information, wherein the second feedback information is used to indicate the free address of the fourth queue in the fifth priority queue.

[0040] Based on the second feedback information, the second processing device can virtually convert the queue originally used to store low-priority message data at the first address into a high-priority queue and use it to store the first address of high-priority message data. This helps the second processing device dynamically adjust the priorities of different queues, thereby improving the utilization efficiency of different queues within the second priority queue.

[0041] In conjunction with the second aspect, in some possible implementations of the second aspect, the priority of the third message data is higher than the priority of the fourth message data. When the number of delayed transmissions of the fourth message data is less than or equal to the second threshold, the third address in the fifth priority queue is before the fifth address in the fourth priority queue. The fourth address corresponds to the third message data, and the fifth address corresponds to the fourth message data.

[0042] In conjunction with the second aspect, in some possible implementations of the second aspect, the fifth memory queue is mapped to the sixth memory queue via a circular buffer.

[0043] In conjunction with the second aspect, in some possible implementations of the second aspect, the third message data is read from the fifth memory queue based on the fourth address using direct memory access (DMA) technology.

[0044] In conjunction with the second aspect, in some possible implementations of the second aspect, the method further includes: the message type of the third message data is determined based on the XSK message, and the XSK message is determined based on the third message data.

[0045] In conjunction with the second aspect, in some possible implementations of the second aspect, the method further includes: determining fifth message data associated with service data; sending the fifth message data to a second processing device of the vehicle; wherein the service data corresponds to a sixth address in a seventh memory queue, the sixth address is stored in a seventh priority queue, and the position of the sixth address in the seventh priority queue is determined by the service type of the service data, and the service data is read from an eighth memory queue mapped by the seventh memory queue based on the sixth address.

[0046] The relevant explanations regarding the second aspect are the same as or similar to those in the first aspect mentioned above. For details, please refer to the detailed content in the first aspect mentioned above, and they will not be repeated here.

[0047] Thirdly, a data processing method is provided, which can be applied to a first processing device. This device may be, for example, a first processor of a vehicle (such as an MCU or SOC), a component configured in the first processor (such as a chip, chip system, processor, etc.), or a logic module or software capable of implementing all or part of the functions of the first processor, etc. This application does not limit this application.

[0048] For example, the method includes: a first processing device writing a first address of service data in a first memory queue into a first priority queue through the user layer of an in-vehicle computing system, the position of the first address in the first priority queue being determined by the service type of the service data; reading the first address from the first priority queue through the kernel layer of the in-vehicle computing system, and reading service data from a second memory queue mapped from the first memory queue based on the first address; and sending first message data to a second processing device in the vehicle, the first message data being encapsulated from the service data.

[0049] Based on the above scheme, as a possible implementation of the first aspect mentioned above, taking the interaction between the user layer and the kernel layer in the vehicle computing system deployed by the first processing device as an example, message loss can be reduced, meeting the low latency requirements of data transmission. Furthermore, zero-copy transmission of business data from the user layer to the kernel layer can be achieved, reducing system context switching and thus reducing transmission overhead.

[0050] In conjunction with the third aspect, in some possible implementations of the third aspect, writing the first address of the service data in the first memory queue to the first priority queue through the user layer of the vehicle computing system includes: writing the first address to the second priority queue through the user layer, the second priority queue including at least two queues, the different queues in the at least two queues having different priorities; and writing the first address of the service data in the second priority queue to the first priority queue through the user layer according to the priorities of the at least two queues.

[0051] By having the user layer write different first addresses into different queues within the second priority queue, and then, based on the priorities of these queues, writing the first addresses from the second priority queue into the first priority queue, the stability and reliability of high-priority business data transmission can be improved.

[0052] In conjunction with the third aspect, in some possible implementations of the third aspect, writing the first address to the second priority queue through the user layer includes: determining the queue in the at least two queues corresponding to the business type of the business data through the user layer; and writing the first address of the business data to the corresponding queue in the second priority queue through the user layer.

[0053] In this way, based on the correspondence between different service types and at least two queues included in the second priority queue, the first address of different types of service data can be written into different queues in the second priority queue, which can improve the stability and reliability of high-priority service data transmission.

[0054] In conjunction with the third aspect, in some possible implementations of the third aspect, the second priority queue includes a first queue and a second queue, the priority of the first queue is higher than the priority of the second queue, and the priority of the first address in the first queue in the first priority queue is higher than the priority of the first address in the second queue in the first priority queue.

[0055] In this way, different types of business data can be processed based on the priorities of the different queues included in the second priority queue, thereby improving the stability and reliability of high-priority business data transmission.

[0056] In conjunction with the third aspect, in some possible implementations of the third aspect, the second priority queue includes a first queue and a second queue, with the first queue having a higher priority than the second queue. The method also includes: when all addresses in the first queue are free, or when the number of free addresses in the first queue is greater than or equal to a preset value, the user layer changes the business type of the business data from the corresponding second queue to the corresponding first queue in the second priority queue.

[0057] In this way, the priorities of different queues can be dynamically adjusted, thereby improving the utilization efficiency of high-priority queues (such as the first queue).

[0058] In conjunction with the third aspect, in some possible implementations of the third aspect, the second priority queue includes a first queue and a second queue, with the first queue having a higher priority than the second queue. The method also includes: when the first queue has no free addresses, updating the free addresses of the second queue to the first queue through the user layer.

[0059] In this way, the priorities of different queues can be dynamically adjusted, thereby improving the efficiency of using different queues.

[0060] In conjunction with the third aspect, in some possible implementations of the third aspect, the priority of the first service data is higher than that of the second service data, the first address corresponds to the first service data, and the second address corresponds to the second service data. According to the priorities of the at least two queues, the first address in the second priority queue is written into the first priority queue, including: determining the number of times the second service data will be delayed; when the number of times the second service data will be delayed is less than or equal to a first threshold, the first address in the second priority queue is placed before the second address in the first priority queue.

[0061] This avoids the situation where low-priority business data cannot be processed in a timely manner when a large amount of high-priority business data is processed concurrently.

[0062] In conjunction with the third aspect, in some possible implementations of the third aspect, the first memory queue is mapped to the second memory queue via a circular buffer.

[0063] In this way, zero-copy data transmission can be achieved, reducing transmission overhead.

[0064] In conjunction with the third aspect, in some possible implementations of the third aspect, reading business data from a second memory queue mapped from a first memory queue based on a first address includes: using DMA technology at the kernel layer to read business data from the first memory queue based on a first address.

[0065] The first processing unit can read service data from the first memory queue mapped by the second memory queue using DMA technology, based on the acquired first address, through the kernel layer. This improves system performance.

[0066] In conjunction with the third aspect, in some possible implementations of the third aspect, the method further includes: encapsulating business data into XSK messages through the user layer; and parsing the XSK messages through the user layer to obtain the business type of the business data.

[0067] The application layer can encapsulate business data of different business types into XSK messages. The user layer can then parse these XSK messages to obtain the message type, which is the business type of the corresponding business data.

[0068] In conjunction with the third aspect, in some possible implementations of the third aspect, the method further includes: receiving second message data sent by the vehicle's third processor; writing the third address of the second message data in the third memory queue into the third priority queue through the kernel layer, wherein the position of the third address in the third priority queue is determined by the service type of the second message data; reading the third address from the third priority queue through the user layer, and reading the second message data from the driver buffer mapped by the third memory queue.

[0069] The first processing device can encapsulate different business data into first message data and send it out through the vehicle-mounted computing system, and can also receive different second message data and process the second message data to obtain the corresponding business data.

[0070] For details regarding the third aspect, please refer to the first or second aspect, as well as the detailed descriptions of some possible implementations of the first or second aspect, which will not be repeated here.

[0071] Fourthly, a data processing method is provided, which can be applied to a second processing device. This device may be, for example, a second processor of a vehicle (such as an MCU or SOC), a component configured in the second processor (such as a chip, chip system, processor, etc.), or a logic module or software capable of implementing all or part of the functions of the second processor, etc. This application does not limit this application.

[0072] For example, the method includes: a second processing device receiving third message data; writing the fourth address of the third message data in a fourth memory queue into a fourth priority queue through the kernel layer of the vehicle computing system, wherein the position of the fourth address in the fourth priority queue is determined by the message type of the third message data; the second processing device reading the fourth address from the fourth priority queue through the user layer of the vehicle computing system, and reading the third message data from a fifth memory queue mapped by the fourth memory queue.

[0073] Based on the above scheme, as a possible implementation of the second aspect mentioned above, taking the interaction between the user layer and the kernel layer in the vehicle computing system deployed by the second processing device as an example, different message data can be processed based on message type, thereby reducing message loss and meeting the low latency requirements of data transmission. Furthermore, zero-copy transmission of third message data from the kernel layer to the user layer can also be achieved, reducing system context switching and thus reducing resource overhead.

[0074] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the kernel layer of the vehicle computing system writes the fourth address of the third message data in the fourth memory queue to the fourth priority queue, including: writing the fourth address to the fifth priority queue through the kernel layer, the fifth priority queue including at least two queues, the different queues in the at least two queues having different priorities; and writing the fourth address in the fifth priority queue to the fourth priority queue through the user layer according to the priorities of the at least two queues.

[0075] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the fourth address is written to the fifth priority queue through the user layer, including: determining the queue in the at least two queues corresponding to the packet type of the third packet data through the kernel layer; and writing the fourth address of the third packet data to the corresponding queue in the fifth priority queue through the kernel layer.

[0076] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the fifth priority queue includes a third queue and a fourth queue, wherein the priority of the third queue is higher than the priority of the fourth queue, and the priority of the fourth address in the third queue in the fourth priority queue is higher than the priority of the fourth address in the fourth priority queue.

[0077] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the fifth priority queue includes a third queue and a fourth queue, wherein the priority of the third queue is higher than that of the fourth queue. The method further includes: when all addresses in the third queue are free, or when the number of free addresses in the third queue is greater than or equal to a preset value, the second processing device sends first feedback information to the kernel layer through the user layer. The first feedback information is used to indicate that the message type in the fifth priority queue changes from the corresponding fourth queue to the corresponding third queue; and the kernel layer updates the mapping relationship between the message type and at least two queues in the fifth priority queue based on the received first feedback information.

[0078] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the fifth priority queue includes a third queue and a fourth queue, wherein the priority of the third queue is higher than that of the fourth queue. The method further includes: when there is no free address in the third queue, the second processing device sends second feedback information to the kernel layer through the user layer, the second feedback information being used to indicate the free address of the fourth queue in the fifth priority queue; the kernel layer updates the free address of the fourth queue to the third queue based on the received second feedback information.

[0079] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the priority of the third message data is higher than that of the fourth message data. The third message data corresponds to the fourth address, and the fourth message data corresponds to the fifth address. According to the priorities of the at least two queues, the fourth address in the fifth priority queue is written into the fourth priority queue, including: determining the number of times the fourth message data will be delayed through the user layer; and before the fourth address in the fifth priority queue is written into the fifth address in the fourth priority queue by the user layer when the number of times the fourth message data will be delayed is less than or equal to the second threshold.

[0080] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the fourth memory queue is mapped to the fifth memory queue via a circular buffer.

[0081] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, reading the third message data from the fifth memory queue mapped by the fourth memory queue includes: using DMA technology at the user layer to read the third message data from the fourth memory queue based on the fourth address.

[0082] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the method further includes: encapsulating business data into XSK messages through the user layer; and parsing the XSK messages through the user layer to obtain the message type of the third message data.

[0083] In conjunction with the fourth aspect, in some possible implementations of the fourth aspect, the method further includes: writing the sixth address of the service data in the sixth memory queue into the sixth priority queue through the user layer, wherein the position of the sixth address in the sixth priority queue is determined by the service type of the service data; reading the sixth address from the sixth priority queue through the kernel layer, and reading the service data from the fifth memory queue mapped by the sixth memory queue; and sending the sixth message data, which is encapsulated from the service data, to the fourth processor of the vehicle through the second processing device.

[0084] The relevant explanations regarding the fourth aspect are the same as or similar to those in the second or third aspects mentioned above. For details, please refer to the detailed content in the second or third aspects mentioned above. They will not be repeated here.

[0085] Fifthly, this application provides a data processing apparatus, including modules or units for implementing the methods of the first to fourth aspects and any possible implementations of the first to fourth aspects. It should be understood that each module or unit can implement its corresponding function by executing a computer program.

[0086] In a sixth aspect, this application provides a data processing apparatus, including a processor and a memory coupled to the processor, the memory being used to store a computer program, the processor executing the computer program to cause the apparatus to implement the data processing methods described in the first to fourth aspects and any possible implementations of the first to fourth aspects.

[0087] In a seventh aspect, this application provides a vehicle that can be used to support the implementation of the functions involved in the first to fourth aspects and any possible implementation of the first to fourth aspects, such as data processing based on the above methods.

[0088] For example, the vehicle includes the device described in the fifth or sixth aspect.

[0089] Eighthly, this application provides a computer-readable storage medium including a computer program that, when run on a computer, causes the computer to implement the methods of the first to fourth aspects and any possible implementation of the first to fourth aspects.

[0090] Ninthly, this application provides a computer program product comprising: a computer program (also referred to as code or instructions) that, when the computer program is run, causes a computer to perform the methods of the first to fourth aspects and any possible implementation thereof.

[0091] The fifth to ninth aspects of this application correspond to the technical solutions of the first to fourth aspects of this application. The beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, and will not be repeated here. Attached Figure Description

[0092] Figure 1 is a schematic diagram of the system architecture applicable to the embodiments of this application;

[0093] Figure 2 is a schematic flowchart of the data processing method provided in an embodiment of this application;

[0094] Figure 3 is another schematic flowchart of the data processing method provided in the embodiments of this application;

[0095] Figure 4 is a schematic diagram of user layer and kernel layer data transmission provided in an embodiment of this application;

[0096] Figure 5 is a schematic diagram of the data receiving process provided in an embodiment of this application;

[0097] Figure 6 is a schematic diagram of the data transmission process provided in an embodiment of this application;

[0098] Figure 7 is a schematic block diagram of a communication device provided in an embodiment of this application;

[0099] Figure 8 is another schematic block diagram of the communication device provided in the embodiments of this application. Detailed Implementation

[0100] To facilitate understanding of the embodiments of this application, the following points are explained first:

[0101] First, in the embodiments of this application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a; b; c; a and b; a and c; b and c; or a and b and c. Here, a, b, and c can be single or multiple.

[0102] Second, in the embodiments of this application, "when," "if," and "if" all refer to the device making corresponding processing under certain objective circumstances, and are not limited to a time, nor do they require the device to make a judgment action when it is implemented, nor do they mean that there are other limitations.

[0103] Third, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with essentially the same function and effect. For example, "first message data" and "second message data" are only used to distinguish different message data and do not limit their order or the number of signaling. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" do not necessarily imply that they are different.

[0104] The vehicle in this application embodiment can be an intelligent vehicle, such as an autonomous vehicle that implements all functions as automatic control, or an assisted driving vehicle that implements some functions as automatic control to provide driving assistance, or it can be an ordinary vehicle. For ease of description, it will be referred to as a vehicle in the following text.

[0105] The technical solution provided in this application will now be described with reference to the accompanying drawings.

[0106] Figure 1 is a schematic diagram of the system architecture applicable to the embodiments of this application. As shown in Figure 1, the MCU and SOC in the domain controller deployed in the vehicle can perform data transmission and management based on their respective deployed software middleware. The MCU's software middleware can refer to, for example, the user layer and kernel layer deployed by the MCU, and the SOC's software middleware can refer to, for example, the user layer and kernel layer deployed by the SOC. That is, after the data is processed by the MCU's software middleware, it is encapsulated into an Ethernet message and sent to the SOC. After receiving the message, the SOC processes the message through its deployed software middleware. Alternatively, the data is processed by the SOC's software middleware, encapsulated into an Ethernet message and sent to the MCU. After receiving the message, the MCU processes the message through its deployed software middleware.

[0107] Currently, SOCs and MCUs can encapsulate data into Ethernet packets based on the automotive SOME / IP protocol and transmit data via automotive Ethernet. During data reception, the network card first triggers a CPU interrupt and the network card driver. During data transmission, the application can encapsulate the service data according to the Ethernet protocol to obtain Ethernet packets, and copy the obtained packets to the system kernel layer. The kernel layer can divide the packets into multiple fragments and copy them to the network card driver's buffer. Finally, the network card can send the data out, triggering a CPU interrupt and releasing related resources.

[0108] Another approach is to implement communication and protocol construction between the MCU and SOC based on the SPI communication protocol. In this approach, communication between the MCU and SOC can be achieved, and SOCs can also generate and send data to each other using the SPI communication protocol, supporting full-duplex communication. Furthermore, custom communication protocols can be added within this approach, such as by adding additional fields. Timeout retransmission mechanisms and acknowledgment detection mechanisms can also be implemented to improve the stability and reliability of data transmission.

[0109] However, in application scenarios handling high-concurrency data transmission using the two aforementioned solutions, the network card will frequently trigger CPU interrupts, and the kernel layer will experience multiple context switches, resulting in significant resource overhead. Furthermore, neither solution differentiates the processing of different types of data packets; for example, different types of data packets may consume the same amount of resources. In this situation, a large number of lower-priority data packets may be processed before higher-priority data packets, impacting the transmission efficiency of high-priority packets and potentially leading to data loss or latency uncertainties. Therefore, it is difficult to meet the low-latency data transmission requirements of intelligent driving systems.

[0110] In view of this, this application provides a method in which different service data types can correspond to different priorities. A first processor can prioritize and process service data of different service types, and then write high-priority service data into a first priority queue for processing based on the priority relationship, thereby reducing packet loss and meeting the low latency requirements of data transmission. Furthermore, the corresponding service data can be obtained based on the first address of the service data in the first memory queue, thus achieving zero-copy of packet data and reducing transmission overhead.

[0111] The technical solutions in this application will now be described with reference to several accompanying drawings. The various embodiments shown below illustrate the data processing flow from the perspectives of a first processor and a second processor, respectively. The first processor and the second processor are distinguished and named according to their deployment in the vehicle, and do not imply that the first processor cannot be used for data reception, nor that the second processor cannot be used for data transmission. The first processor and the second processor can be the same device or different devices. For example, the first processor can be a System-on-a-Chip (SoC), and the second processor can be an MCU, or the first processor can also be a SoC; further, the first processor can be an MCU, and the second processor can be a SoC, or the second processor can also be an MCU, etc., and this application does not limit them in this regard.

[0112] It should be noted that the vehicle may include different processors, such as a first processor and a second processor. In the data processing method provided in this application embodiment, as one possible implementation, the method can be described using the interaction between the user layer and kernel layer of an in-vehicle computing system deployed in the first or second processor as an example. This in-vehicle computing system may also be, for example, an in-vehicle computing platform, etc., and this application does not impose any limitations on it. The in-vehicle computing system may include the aforementioned software middleware. For example, the aforementioned software middleware can be implemented as the user layer and kernel layer of the in-vehicle computing system; that is, the data processing method provided in this application can be implemented through the interaction between the software middleware of the first or second processor.

[0113] Figure 2 is a schematic flowchart of a data processing method provided in an embodiment of this application. Figure 2 uses a first processor as an example to describe the method provided in this application, but this should not be construed as limiting this application in any way. Furthermore, the first processor in Figure 2 can be replaced by components within the first processor, such as a chip, chip system, processor, etc., and can also be replaced by logic modules or software capable of implementing some or all of its functions. This application does not impose any limitations in this regard.

[0114] Referring to Figure 2, the data processing method 200 shown in Figure 2 may include steps 210 to 220. The various steps in method 200 are described in detail below.

[0115] In step 210, the first processor determines first message data, which is associated with service data.

[0116] The business data corresponds to the first address in the first memory queue.

[0117] Different business applications may generate the same or different business data. Based on different data sources, uses, or formats, the data generated by different business applications can be classified into different business data. For example, based on different data sources, business data may include radar data, ultrasonic sensor (USS) data, inertial navigation system (INS) data, lidar data, vehicle operation logs, heartbeat signals, etc., and this application does not limit this.

[0118] The first processor can process business data generated by different business applications. For example, it can encapsulate business data based on the Ethernet protocol to obtain the first message data, which is the Ethernet message.

[0119] One possible implementation is that, before encapsulating the business data into the first message data, the first processor can perform initialization preparation through the user layer and kernel layer of the in-vehicle computing system. For example, in the user layer, business applications can request a fixed-size memory queue from the memory management application based on different business needs or characteristics. This queue can be referred to as the first memory queue, which can be used to store business data corresponding to different business applications.

[0120] Different business data can be written to the first memory queue through the user layer. The effective address used to store business data in the first memory queue can be recorded as the first address. For example, the effective address used to store business data #1 in the first memory queue can be recorded as the first address, the effective address used to store business data #2 in the first memory queue can also be recorded as the first address, and so on. This application does not limit this.

[0121] Optionally, the first memory queue can be mapped to the second memory queue via a circular buffer. This circular buffer can be used to store the first address of the first memory queue, and it can also be referred to as a ring. The circular buffer can also be, for example, a queue or other memory manager that can be used to store the first address; this application does not limit this.

[0122] For example, taking the second memory queue as the network card's driver cache, the first processor can write the first address into a circular buffer through the user layer, and then write the first address into the driver cache based on the address mapping relationship between the first memory queue and the driver cache. For example, the user layer can construct an AF_XDP (address family eXpress data path) socket based on the eXpress Data Path (XDP) technology to establish a connection between the user layer and the network card driver cache, which is located in the kernel layer and is the direct storage location for data received by the network card.

[0123] This can be understood as mapping the first address in the first memory queue of the user layer to the second memory queue of the kernel layer, meaning that the user layer and the kernel layer share the same physical memory region. Address mapping avoids the copying of data from the kernel layer to the user layer or vice versa, as well as context switching within the kernel layer.

[0124] The first address can be stored in the first priority queue, and the position of the first address in the first priority queue is determined by the business type of the business data.

[0125] Different business data can correspond to the same business type or different business types. Business types can be customized, for example, based on the function of different business data, the source of the business data, etc. For example, different business data can be divided into different business types based on the type of sensor, or different business data can be divided into different business types based on different sensors of the same sensor type, etc. This application does not limit this.

[0126] For example, taking the functions of business data as an example, the business types corresponding to the aforementioned radar data, lidar data, and uss data can belong to the environmental perception and target detection type, the business type corresponding to ins data can belong to the navigation and positioning type, and the business types of vehicle operation logs and heartbeat signals can belong to the system operation status monitoring type.

[0127] It is understood that the business types corresponding to the different business data mentioned above are merely examples. For instance, different business data can be classified into other business types, and this application does not limit this.

[0128] Optionally, the business type of the business data can be determined based on the XSK message, which can be determined based on the business data.

[0129] For example, the application layer can encapsulate business data into message data, and the message type of the message data can be understood as the business type of the corresponding business data. In other words, the business type of the corresponding business data can be determined by the message type of the message data.

[0130] One possible implementation is that the first processor can encapsulate the business data into an XSK message through the business application layer; the first processor can then parse the XSK message through the user layer to obtain the business type of the business data.

[0131] For example, by parsing the XSK message header information, the header identifier can be obtained, and the message type and message priority can be obtained based on this identifier. This message type is also the business type of the business data.

[0132] The identifier in the message header is used to uniquely identify different types of messages. This identifier can be a number, a string, or a specific encoding format. For example, in network protocols, different message types may have different identifiers, such as the protocol number in an IP packet or the port number in a TCP segment. Using these identifiers and based on a lookup rule table, the first processor can quickly identify the message type and priority of different messages. Determining the message type by looking up the rule table is also determining the service type of the corresponding business data.

[0133] For example, a rule table can define the correspondence between different identifiers and message types. When the first processor encapsulates a service data into an XSK message, the user layer can query the rule table based on the identifier in the message header to determine the message type.

[0134] For example, the rule table can also define the correspondence between different identifiers and message priorities. In other words, identifiers can also be used to determine message priorities. In the rule table, different priorities can be assigned to different types of messages based on their identifiers. The first processor, through the user layer, can prioritize processing higher-priority messages, thereby reducing the transmission latency of business data.

[0135] It is understood that the rule table may be predefined by the protocol, or preconfigured, etc., and this application does not limit it in this regard.

[0136] Another example is to parse the XSK message to obtain its message type and priority.

[0137] For example, the XSK message can be modified by adding message fields to the original message format. For instance, the XSK message may include a 1-byte message type, a 4-byte message timestamp, and a 1-byte control information. The control information may further include a 1-bit response flag, a 3-bit forwarding type, and a 4-bit priority.

[0138] By parsing the XSK message, the message type and priority can be obtained. The message type of the message data is also the corresponding service type of the service data. It should be understood that the message format of this XSK message is merely an example and should not constitute any limitation on this application.

[0139] Different service data types can be assigned different priorities. For example, sensor data has high latency requirements, so this type of service data can be assigned a higher priority to ensure low-latency transmission. On the other hand, non-real-time applications or background data synchronization tasks have lower latency requirements and can be processed when network load is low, so this type of service data can be assigned a lower priority.

[0140] Optionally, data validation can also be performed on business data. For example, a whitelist security check can be performed on business data encapsulated in XSK messages to filter out invalid business data. This can improve the security of data transmission.

[0141] Furthermore, based on the service type of the acquired service data, the first address corresponding to different service data can be written into the first priority queue. One possible implementation of storing this first address in the first priority queue is that the first processor, based on the service type of the service data, or in other words, the message type of the corresponding message data, can write the first address of the service data in the first memory queue into the first priority queue through the user layer of the in-vehicle computing system. This first address is also the address information of the message data corresponding to the service data.

[0142] When the priority of the first business data is higher than that of the second business data, the first address corresponding to the first business data is before the first address corresponding to the second business data in the first priority queue. In other words, the business data with higher priority can be processed first in the first priority queue.

[0143] Optionally, the order of the first addresses stored in the first priority queue is associated with the second priority queue, which includes at least two queues with different priorities, and the second priority queue includes the first addresses.

[0144] For example, the first processor writes different first addresses into different queues in the second priority queue through the user layer; based on the priority of the different queues in the second priority queue, the first addresses stored in the different queues in the second priority queue are written into the first priority queue.

[0145] One possible implementation includes steps one and two:

[0146] Step 1: Write the first address into the second priority queue through the user layer. The second priority queue includes at least two queues, and the different queues in the at least two queues have different priorities.

[0147] Step 2: According to the priority of the at least two queues, write the first address in the second priority queue into the first priority queue.

[0148] The following sections will provide detailed explanations of steps one through two.

[0149] In step one, the first address is written to the second priority queue through the user layer. The second priority queue includes at least two queues, and the different queues in the at least two queues have different priorities.

[0150] For example, the second priority queue may include three queues: a high-priority queue, a medium-priority queue, and a low-priority queue. The priorities of these three queues, from highest to lowest, are: high-priority queue, medium-priority queue, and low-priority queue.

[0151] It is understood that the second priority queue may include more queues, with different priorities among them. Accordingly, different queues can be used to write service data corresponding to messages of different priorities to the first address in the first memory queue, and so on; this application does not limit this.

[0152] After the message type and priority are determined at the user layer, the service data corresponding to messages of different priorities can be written from the first address in the first memory queue to the second priority queue. In the second priority queue, the higher priority queue can be used to write the first address corresponding to higher priority message data, and the lower priority queue can be used to write the first address corresponding to lower priority message data.

[0153] One possible implementation of step one is as follows: the user layer can determine which of the at least two queues in the second priority queue the first address of each business data can be written to, and then the first address of the business data can be written to the corresponding queue.

[0154] For example, the first address is written to the second priority queue through the user layer, including steps one a and one b:

[0155] Step 1a: The first processor determines the corresponding queue in at least two queues for the service type of the service data through the user layer;

[0156] Step 1b: The first processor writes the first address of the business data into the corresponding queue in the second priority queue through the user layer.

[0157] The following details steps one a and one b.

[0158] In step 1a, the first processor can determine the message type and priority of a message based on the message identifier and rule table at the user layer. This determines the service type of the corresponding service data, and different service types determine the priority of the service data. Different priorities correspond to different queues in the second priority queue. Therefore, the user layer can further determine which queue in the second priority queue each piece of service data belongs to based on its priority.

[0159] For example, the user layer can encapsulate business data #1, business data #2, and business data #3 into three different XSK messages. The user layer then parses these three messages to obtain three identifiers corresponding to each message: identifier #1, identifier #2, and identifier #3. Based on each message's identifier, a rule table is consulted to determine the message types: the message corresponding to business data #1 belongs to type #1, the message corresponding to business data #2 belongs to type #2, and the message corresponding to business data #3 belongs to type #3. Based on the message types, the priority of the three business data messages corresponding to these three messages, from highest to lowest, is: business data #1, business data #2, and business data #3.

[0160] The second priority queue consists of three queues, and the priorities of the three queues from high to low are: queue #1, queue #2, and queue #3.

[0161] Thus, it can be determined that the business type of business data #1 corresponds to queue #1 in the second priority queue, and so on, the business type of business data #2 corresponds to queue #2 in the second priority queue, and the business type of business data #3 corresponds to queue #3 in the second priority queue.

[0162] It is understood that when the number of priority business data items exceeds the number of queues in the second priority queue, one or more relatively higher priority business data items can be mapped to the same queue in the second priority queue. In other words, each queue in the second priority queue can be written with the first address of business data of the same priority, or it can be written with the first address of business data of different priorities; this application does not limit this.

[0163] In step one b, the second priority queue includes at least two queues, each of which can write the first address of one or more service data. The first processor can, based on the service type of different service data determined in step one a, write the first address of service data of different priorities into the corresponding queue in the second priority queue.

[0164] For example, based on the example given in step one, business data #1 can be written to queue #1, business data #3 can be written to queue #2, and business data #3 can be written to queue #3.

[0165] In step two, according to the priorities of the at least two queues, the second processor can write the first address in the second priority queue into the first priority queue through the user layer.

[0166] It is understandable that writing the first address in the second priority queue to the first priority queue can be done periodically or non-periodically, etc., and this application does not limit this.

[0167] For example, the second priority queue includes a first queue and a second queue, where the first queue has a higher priority than the second queue. The first priority queue is a first-in-first-out (FIFO) data structure, meaning the first address written is processed first. That is, the first address written in a higher-priority queue (e.g., the first queue) within the second priority queue can be written to the first priority queue first, and then the first address written in a lower-priority queue (e.g., the second queue) within the second priority queue can be written to the first priority queue.

[0168] It should be noted that if some queue addresses (or storage spaces) in the first queue are not stored or written to the first address, then those queue addresses can be called the free addresses of the first queue. Correspondingly, if some queue addresses (or storage spaces) in the second queue are not stored or written to the first address, then those queue addresses can be called the free addresses of the second queue.

[0169] Writing the first address of a different queue in the second priority queue to the first priority queue has the following possible scenarios:

[0170] The first possibility is that the first address in the first queue has a higher priority in the first priority queue than the first address in the second queue.

[0171] For example, when there are still free addresses in the first and second queues of the second priority queue that have not been written to the first address, the scheduling manager can write the first address in the first queue and the second queue into the first priority queue in sequence according to the priority of the second priority queue.

[0172] In this scenario, among the multiple first addresses corresponding to the first and second queues respectively written in the first priority queue, the first address written in the first queue has a higher priority than the first address written in the second queue. Correspondingly, the priority of the business data corresponding to the first address in the first queue is also higher than the priority of the business data corresponding to the first address in the second queue. Furthermore, when processing the business data corresponding to the first address written in the first priority queue, the business data corresponding to the higher-priority first address can be processed first.

[0173] The second possibility is that when all addresses in the first queue are free, or when the number of free addresses in the first queue is greater than or equal to a preset value, the service type of the service data changes from the corresponding second queue to the corresponding first queue in the second priority queue.

[0174] For example, when no high-priority service data is written to the first queue, or when the number of free addresses in the first queue exceeds a preset value (i.e., the number of addresses already written to in the first queue is less than a preset value), the scheduler can sequentially increase the priority of service data corresponding to other queues in the second priority queue (e.g., the second queue itself). In this case, service data originally corresponding to the second queue can be assigned to the first queue. This improves the utilization efficiency of high-priority queues in the second priority queue.

[0175] As one possible implementation, the method further includes: when there is no free address in the first queue, the first processor updates the free address of the second queue to the first queue through the user layer.

[0176] It should be understood that the updated first queue includes the free addresses of the original first queue and the original second queue, and the updated second queue includes the queue addresses of the original second queue that have been written to the first address.

[0177] It should also be understood that the updates of the first and second queues described above are merely examples. For instance, the second priority queue may include more queues. The method of updating the free address between different queues is the same as the method of updating the free address of the second queue to the first queue. For details, please refer to the specific description in the second possible case above, which will not be repeated here.

[0178] Furthermore, the first processor can write the first address in the second priority queue into the first priority queue sequentially through the user layer, based on the priorities of the first queue and the second queue in the second priority queue.

[0179] It is understood that the preset value may be predefined by the protocol, or preconfigured, etc., and this application does not limit it.

[0180] The third possibility is that when there are no free addresses in the first queue, the free addresses in the second queue are updated to those in the first queue.

[0181] For example, when a large amount of high-priority service data needs to be transmitted continuously, and the original high-priority service data in the second priority queue has no free addresses in the first queue, or in other words, there are no free addresses in the original first queue available to write more first addresses, the scheduler can virtually convert the free addresses of other queues (e.g., the second queue) into high-priority queues (e.g., the first queue). These free addresses can also be called virtual queues. In this case, the updated first queue includes the free addresses in the original first queue and the original second queue.

[0182] As one possible implementation, the method further includes: when all addresses in the first queue are free, or when the number of free addresses in the first queue is greater than or equal to a preset value, the user layer changes the service type of the service data from the corresponding second queue to the corresponding first queue in the second priority queue.

[0183] Furthermore, the first processor can write the first address in the second priority queue into the first priority queue sequentially through the user layer, based on the priorities of the first queue and the second queue in the second priority queue.

[0184] Regarding the second and third possible scenarios mentioned above, once the first address corresponding to the business data is written from the second priority queue to the first priority queue, the virtual queue (i.e., the original free address in the second queue) can be released, restoring the original priority of the virtual queue. For example, after the first address is written to the first priority queue and sent, the free address that was previously virtualized as part of the first queue in the original second queue can be updated back to the second queue. At this time, the first queue includes the original first queue, and the second queue includes the original second queue.

[0185] The fourth possible scenario is that the priority of the first service data is higher than that of the second service data. When the number of delayed transmissions of the second service data is less than or equal to the first threshold, the first address in the second priority queue precedes the second address in the first priority queue. Here, the first address corresponds to the first service data, and the second address corresponds to the second service data.

[0186] It can be understood that the second address is another example of the first address, that is, the second address is the valid address of the second business data in the first memory queue.

[0187] One possible implementation of step two includes steps twoa and twob:

[0188] Step 2a: The first processor determines the number of delayed transmissions for the second address through the user layer;

[0189] Step 2b: Before the first processor writes the first address into the second address in the first priority queue when the number of delayed transmissions of the second address is less than or equal to the first threshold.

[0190] The following details steps twoa and twob.

[0191] In step 2a, for example, a delay count can be set for each second address that has been written into the first priority queue to determine the number of times the second address in the first priority queue is delayed. When a first address is inserted into the first priority queue, the existing second address in the first priority queue is delayed once, and so on, to count the number of times the second address is delayed.

[0192] In step 2b, when the number of times the second address is delayed is less than or equal to the first threshold, the first address with higher priority can be inserted before the second address through the user layer; when the number of times the second address is delayed is greater than the first threshold, the second address in the first priority queue is processed first.

[0193] For example, if the first threshold is N, it means that at most N first addresses can be inserted before the second address in the first priority queue. The (N+1)th first address can be determined based on the relationship between the number of delayed transmissions of the second address in the next round of statistics and the first threshold.

[0194] This prevents low-priority business data from being unable to be processed in application scenarios with a large amount of high-priority business data being processed concurrently.

[0195] It is understood that the first threshold used to determine whether to write the first address to the second address can be predefined by the protocol, preconfigured, etc., and this application does not limit it.

[0196] Furthermore, business data can be read from a second memory queue mapped from a first memory queue based on a first address.

[0197] Based on the first priority queue, the order in which different business data are processed can be determined. The first processor can read the first address from the first priority queue sequentially through the kernel layer according to the position or order of the first address in the first priority queue.

[0198] As mentioned above, the first memory queue used to store business data can be mapped to a second memory queue in the kernel layer through a circular buffer, meaning that the first and second memory queues share the same physical storage space. Therefore, the first processor can access the second memory queue through the kernel layer based on the first address read from the first priority queue and the address mapping relationship between the first and second memory queues, and read business data from the second memory queue, which is equivalent to reading the business data corresponding to the first address from the first memory queue.

[0199] As one possible implementation, the first processor can read the first address from the first priority queue through the kernel layer, and read business data from the second memory queue mapped from the first memory queue based on the first address.

[0200] For example, the first processor can use DMA technology at the kernel layer to read business data from the first memory queue based on the first address.

[0201] In step 220, the first processor sends the first message data to the vehicle's second processor.

[0202] For example, the first message data may be an Ethernet message obtained by encapsulating business data based on the Ethernet protocol and transmitting it based on the Ethernet protocol.

[0203] It is understood that the first processor can implement the data transmission process based on the user layer and the kernel layer. For example, as shown in the aforementioned method 200, the service data is sent from the first processor of the vehicle to the second processor of the vehicle; or it can also be implemented that after the service data is sent from the first processor to the second processor, the second processor further sends it to the actuator of the vehicle and further processes the service data, etc. This application does not limit this.

[0204] The first processor can also perform the data receiving process.

[0205] Optionally, the method further includes: receiving second message data sent by a third processor of the vehicle; obtaining service data based on the second message data; wherein the second message data corresponds to a third address in a third memory queue, the third address is stored in a third priority queue, and the position of the third address in the third priority queue is determined by the message type of the second message data, and the second message data is read from a fourth memory queue mapped from the third memory queue based on the third address.

[0206] The second message data can be, for example, an Ethernet message encapsulated based on the Ethernet protocol. The third processor and the second processor can be the same processor deployed in the vehicle computing system, that is, the third processor is the second processor, or they can be two different processors, etc., and this application does not limit them in this way.

[0207] It can be understood that this third address is another example of the aforementioned first address, and the third memory queue and the fourth memory queue are another example of the aforementioned first memory queue and second memory queue, respectively. For details regarding the third address, the third memory queue, and the fourth memory queue, please refer to the detailed explanations of the first address, the first memory queue, and the second memory queue mentioned above, which will not be repeated here.

[0208] For example, the first processor can receive message data based on the user layer and kernel layer of the in-vehicle computing system.

[0209] One possible implementation includes: the first processor receiving second message data sent by the vehicle's third processor;

[0210] The kernel layer writes the third address of the second message data in the third memory queue to the third priority queue. The position of the third address in the third priority queue is determined by the message type of the second message data.

[0211] The user layer reads the third address from the third priority queue and the second message data from the fourth memory queue mapped by the third memory queue.

[0212] The first processor receives the second message data sent from the third processor of the vehicle. For details, please refer to the detailed description of the second processor of the vehicle receiving the third message data sent from the first processor of the vehicle in method 300, which will not be repeated here.

[0213] Based on the above technical solution, the first processor determines the position of the service data in the first priority queue based on the service type. This means prioritizing service data of different service types and then sending the first message data according to the priority relationship, thereby reducing message loss and meeting the low latency requirements of data transmission. Furthermore, the corresponding service data can be retrieved based on the first address of the service data in the first memory queue, thus achieving zero-copy of message data and reducing transmission overhead.

[0214] Figure 3 is another schematic flowchart of the data processing method provided in an embodiment of this application. Figure 3 uses a second processor as an example to describe the method provided in this application, but this should not constitute any limitation on this application. In addition, the second processor in Figure 2 can also be replaced by components in the second processor, such as a chip, chip system, processor, etc., and can also be replaced by logic modules or software that can implement some or all of its functions. This application does not limit this.

[0215] Referring to Figure 3, the data processing method 300 shown in Figure 3 may include steps 310 to 320. The various steps in method 300 are described in detail below.

[0216] In step 310, the second processor receives the third message data.

[0217] Different third-party message data can be, for example, different service data encapsulated based on the Ethernet protocol; such third-party message data is called an Ethernet message.

[0218] Similar to or analogous to method 200, as one possible implementation, before receiving the third message data, the second processor can be initialized and prepared through the user layer and kernel layer of the in-vehicle computing system. For example, in the user layer, business applications can request a fixed-size memory queue from the memory management application based on different business needs or characteristics. This queue can be referred to as the fifth memory queue, which can be used to store business data corresponding to different business applications.

[0219] During data reception, for example, when the MCU receives third message data from the SOC, the network card in the MCU can trigger a CPU interrupt after receiving the third message data. Then, based on DMA technology, the third message data is written to a sixth memory queue to obtain XSK message data. This sixth memory queue can be, for example, the network card's driver buffer.

[0220] Optionally, the fifth memory queue can be mapped to the sixth memory queue via a circular buffer. That is, the fifth and sixth memory queues share the same physical memory region. For details regarding circular buffers and address mapping based on circular buffers, please refer to the detailed explanation of mapping the first memory queue to the second memory queue based on a circular buffer in method 200; it will not be repeated here. Because there is an address mapping between the kernel-level sixth memory queue and the user-level fifth memory queue, the second processor can directly access and process the third message data stored in the sixth memory queue through the user layer without performing additional data copying operations.

[0221] The valid address used to store the third message data in the sixth memory queue can be denoted as the fourth address. That is, the third message data can correspond to the fourth address in the fifth memory queue. This fourth address can be stored in the fourth priority queue, and the position of the fourth address in the fourth priority queue is determined by the message type of the third message data.

[0222] Optionally, the message type of the third message data can be determined based on the Fast Socket XSK message, which can be determined based on the third message data.

[0223] For example, the network card driver can call the XDP handler to parse the XSK packet and thus obtain the packet type of the packet data.

[0224] For example, by parsing the XSK message header information, the message type and priority of the message data can be determined based on the identifier in the message header.

[0225] Another example is to parse the XSK message to obtain the message type and priority of the message data.

[0226] For details regarding the two examples above, please refer to the detailed explanation of determining the message type and priority of a message based on parsed XSK messages in Method 200. Further details will not be repeated here.

[0227] Optionally, data verification can also be performed on XSK packets obtained based on third-party message data. For example, a whitelist security check can be performed on XSK packets to filter invalid message data. This can improve the security of data transmission.

[0228] Furthermore, based on the message type of different third message data, the fourth address corresponding to different third message data can be written into the fourth priority queue. One possible implementation of storing this fourth address in the fourth priority queue is to write the fourth address of the third message data in the fifth memory queue into the fourth priority queue through the kernel layer of the on-board computing system.

[0229] Optionally, the order of the fourth addresses stored in the fourth priority queue is associated with the fifth priority queue, which includes at least two queues with different priorities, and the fifth priority queue includes the fourth addresses.

[0230] It can be understood that the fourth priority queue is an example of the aforementioned first priority queue, and the fifth priority queue is an example of the aforementioned second priority queue. For details regarding the fourth and fifth priority queues, please refer to the detailed explanations of the first and second priority queues in Method 200 above; further details will not be repeated here.

[0231] For example, the second processor writes different fourth addresses into different queues in the fifth priority queue through the kernel layer; based on the priorities of the different queues in the fifth priority queue, the fourth addresses stored in the different queues in the fifth priority queue are written into the fourth priority queue. For example, the fifth priority queue includes a first queue and a second queue, with the first queue having a higher priority than the second queue. In this case, the fourth address in the first queue can be written into the fourth priority queue first, and then the fourth address in the second queue can be written into the fourth priority queue.

[0232] One possible implementation includes steps one and two:

[0233] Step 1: Write the fourth address into the fifth priority queue through the kernel layer. The fifth priority queue consists of at least two queues, and the different queues in the at least two queues have different priorities.

[0234] Step 2: The user layer writes the fourth address from the fifth priority queue into the fourth priority queue according to the priority of at least two queues.

[0235] The following sections will provide detailed explanations of steps one and two.

[0236] In step one, the second processor can write the fourth address into the fifth priority queue through the kernel layer. The fifth priority queue includes at least two queues, and the different queues in the at least two queues have different priorities.

[0237] One possible implementation of step one includes step one a and step one b:

[0238] Step 1a: The second processor determines the corresponding queue in at least two queues for the message type of the third message data through the kernel layer;

[0239] Step 1b: The second processor writes the fourth address of the third message data into the corresponding queue in the fifth priority queue through the kernel layer.

[0240] The following details steps one a and one b.

[0241] In step 1a, the second processor can obtain the message type and priority of the third message data by querying the rule table based on the identifier in the message header of the parsed XSK message through the kernel layer. Different priorities of the message data can correspond to different queues in the second priority queue. Therefore, the kernel layer can determine which queue in the fifth priority queue each message type or priority corresponds to, that is, determine the queue in the fifth priority queue corresponding to the fourth address of the third message data.

[0242] In step 1b, at least two queues in the fifth priority queue may include, for example, the third queue and the fourth queue, where the third queue has a higher priority than the fourth queue, and each queue may be written with one or more fourth addresses. The second processor may write the fourth address of the third message data into the corresponding queue in the fifth priority queue based on the message type of the third message data determined in step 1a.

[0243] For details regarding the free addresses of the third and fourth queues, please refer to the detailed explanation of the free addresses of the first and second queues in Method 200. Further details will not be repeated here.

[0244] In step two, according to the priorities of the at least two queues, the second processor can write the fourth address in the fifth priority queue into the fourth priority queue through the user layer.

[0245] It is understandable that writing the fourth address in the fifth priority queue to the fourth priority queue can be done periodically or non-periodically, etc., and this application does not limit this.

[0246] Writing the fourth address from the fifth priority queue to the fourth priority queue has the following possible scenarios:

[0247] The first possibility is that the fourth address in the third queue has a higher priority in the fourth priority queue than the fourth address in the fourth priority queue.

[0248] For example, when both the third and fourth queues in the fifth priority queue have free addresses, the scheduling manager can write the fourth address stored in each queue into the fourth priority queue in sequence according to the priority of different queues.

[0249] The second possible scenario is that when all addresses in the third queue are free, or when the number of free addresses in the third queue is greater than or equal to a preset value, the method further includes: the second processor updating the mapping relationship between the message type and at least two queues in the fifth priority queue based on the first feedback information, wherein the first feedback information is used to indicate that the message type in the fifth priority queue changes from the corresponding fourth queue to the corresponding third queue.

[0250] For example, an idle address in the third queue can be used as the first feedback information, which is then sent to the kernel layer by the user-level scheduler. The kernel layer can then use this first feedback information to sequentially increase the priority of other packet types, and correspondingly update the queues for different packet types.

[0251] One possible implementation includes: the second processor sending first feedback information to the kernel layer through the user layer, the first feedback information being used to indicate that the message type in the fifth priority queue changes from the corresponding fourth queue to the corresponding third queue;

[0252] The second processor updates the mapping relationship between the message type and at least two queues in the fifth priority queue based on the received first feedback information through the kernel layer.

[0253] For example, if the original third message data's message type #1 corresponds to the fourth queue, then the fourth address of the third message data can be written into the fourth queue accordingly. After receiving the first feedback information in the XDP handler at the kernel level, the fourth queue corresponding to message type #1 can be updated to the third queue corresponding to message type #1 based on the first feedback information. Thus, the second processor can write the fourth address of the third message data into the third queue, thereby improving the utilization efficiency of higher-priority queues (such as the third queue).

[0254] In a third possible scenario, when there is no free address in the third queue, the method further includes: the second processor updating the free address of the fourth queue to the third queue based on the second feedback information, which is used to indicate the free address of the fourth queue in the fifth priority queue.

[0255] For example, the free addresses in the fourth queue can be used as second feedback information, which is then sent to the kernel layer by the user-level scheduler. Based on this second feedback information, the kernel layer can virtually convert the free addresses in the fourth queue into a third queue; this fourth queue can also be called a virtual queue. The kernel layer can then sequentially increase the priority of other packet types, or update the rule table, thereby updating the mapping relationship between different packet types and at least one queue in the fifth priority queue. In this case, the updated third queue includes the free addresses from both the original third and fourth queues.

[0256] One possible implementation includes: the second processor sending a second feedback message to the kernel layer through the user layer, the second feedback message being used to indicate the free address of the fourth queue in the fifth priority queue;

[0257] Based on the received second feedback information, the kernel layer updates the free address of the fourth queue to the third queue.

[0258] Furthermore, the second processor can, based on the priorities of the third and fourth queues in the fifth priority queue, sequentially write the fourth address from the fifth priority queue into the fourth priority queue through the user layer.

[0259] Regarding the second and third possible scenarios mentioned above, once the fourth address corresponding to the third message data is written from the fifth priority queue to the fourth priority queue, the virtual queue (i.e., the original free address of the fourth queue) can be released, restoring the original priority of the virtual queue. For example, after writing the fourth address to the fourth priority queue and sending it, the free address that was originally used as the third queue in the fourth queue can be updated back to the fourth queue. At this time, the third queue includes the original third queue, and the fourth queue includes the original fourth queue.

[0260] The fourth possible scenario is that the priority of the third message data is higher than that of the fourth message data. When the number of delayed transmissions of the fourth message data is less than or equal to the second threshold, the third address in the fifth priority queue is before the fifth address in the fourth priority queue. The fourth address corresponds to the third message data, and the fifth address corresponds to the fourth message data.

[0261] It can be understood that this fifth address is another example of the fourth address, that is, this fifth address is the valid address of the fourth message data in the fourth memory queue.

[0262] One possible implementation method includes: the second processor determining the number of times the second service data will be delayed through the user layer;

[0263] Before the second processor writes the first address into the second address in the first priority queue when the number of delayed transmissions of the second service data is less than or equal to the second threshold, the second processor writes the first address into the second address in the first priority queue through the user layer.

[0264] The second threshold and the first threshold in method 200 can be the same value or different values. The second threshold can be predefined by the protocol or preconfigured, etc. This application does not limit it in this regard.

[0265] The explanations regarding the four possible scenarios mentioned above are the same as or similar to the explanations regarding the four possible scenarios in step two of method 200. For details, please refer to the detailed content of step two in method 200, which will not be repeated here.

[0266] For example, when the network card receives new data, it can store the data in the kernel-level driver's receive data buffer based on DMA. Since there is an address mapping between this buffer and the user-level memory queue address, the user level can directly access and process the data stored in the buffer without performing additional data copying operations.

[0267] Furthermore, the second processor reads the third address from the fourth priority queue through the user layer, and reads the third message data from the fifth memory queue mapped by the fourth memory queue.

[0268] Similar to or similar to the method 200 in which the first processor reads the first address from the first priority queue through the kernel layer, the second processor can read the fourth address from the fourth priority queue sequentially through the user layer based on the position or order of the different fourth addresses in the fourth priority queue.

[0269] As mentioned above, there is an address mapping between the fourth and fifth memory queues used to store the third message data; that is, the fourth and fifth memory queues share the same physical storage space. Therefore, the second processor can access the fifth memory queue through the user layer based on the fourth address read from the fourth priority queue, and read the third message data from the fifth memory queue, which is equivalent to reading the third message data corresponding to the fourth address from the fourth memory queue.

[0270] As one possible implementation, the second processor can read the fourth address from the fourth priority queue through the user layer, and read the third message data from the fifth memory queue mapped by the fourth memory queue based on the fourth address.

[0271] In step 320, the second processor obtains service data based on the third message data.

[0272] The second processor parses the third message data read from the fourth memory queue to obtain the corresponding service data. Then, it sends the different service data to different service applications.

[0273] This second processor can also handle the data transmission process.

[0274] Optionally, the method further includes: a second processor can determine fifth message data, which is associated with service data; the second processor can send the fifth message data to a fourth processor of the vehicle; wherein the service data corresponds to a sixth address in a seventh memory queue, the sixth address is stored in a seventh priority queue, and the position of the sixth address in the seventh priority queue is determined by the service type of the service data, and the service data is read from an eighth memory queue mapped from the seventh memory queue based on the sixth address.

[0275] The fourth processor and the first processor can be the same processor deployed in the vehicle computing system, that is, the fourth processor is the first processor, or they can be two different processors, etc. This application does not limit them.

[0276] It can be understood that the sixth address is another example of the aforementioned first address, and the seventh and eighth memory queues are another example of the aforementioned first and second memory queues, respectively. For details regarding the sixth address, the seventh memory queue, and the eighth memory queue, please refer to the detailed explanations of the first address, the first memory queue, and the second memory queue mentioned above, which will not be repeated here.

[0277] One possible implementation includes: the second processor writes the fourth address of the service data in the fourth memory queue to the sixth priority queue through the user layer, the position of the fourth address in the sixth priority queue being determined by the service type of the service data; the second processor reads the fourth address from the sixth priority queue through the kernel layer and reads the service data from the driver cache mapped by the fourth memory queue; the second processor sends fifth message data to the first processor of the vehicle, the fifth message data being encapsulated from the service data.

[0278] The content regarding the second processor sending the fifth message data through the user layer and kernel layer is the same as or similar to the specific description in method 200 regarding the first processor sending the first message data through the user layer and kernel layer. For details, please refer to the detailed description of method 200, which will not be repeated here.

[0279] Based on the above technical solution, different message types can correspond to different priorities. The second processor can determine the position of the third message data in the fourth priority queue based on the message type, that is, prioritize the third message data of different message types, and then obtain the corresponding service data according to the priority relationship, thereby reducing message loss and meeting the low latency requirements of message data transmission. Furthermore, there is an address mapping relationship between the fifth and sixth memory queues. The second processor can obtain the third message data from the sixth memory queue based on this address mapping relationship and the fourth address written in the fourth priority queue. In this way, zero-copy of message data can be achieved, thereby reducing resource overhead.

[0280] Figure 4 is a schematic diagram of user layer and kernel layer data transmission provided in an embodiment of this application. It can be seen that the user layer and kernel layer can be the user layer and kernel layer of an in-vehicle computing system deployed by a first processor, or the user layer and kernel layer of an in-vehicle computing system deployed by a second processor, or they can be deployed by other processors or executors, etc., and this application does not limit them in this regard. For ease of understanding and explanation, the following description uses a first processor as an example and should not constitute any limitation on this application.

[0281] During data transmission, the first processor can obtain business data from the business application through the user layer, and then write the business data into the memory queue (such as the aforementioned first memory queue) through the user layer. The effective address in the memory queue used to store the business data (such as the aforementioned first address) is transmitted to the multi-level memory sharing manager. Then, the multi-level memory sharing manager of the user layer encapsulates the business data into a message and sends it to the network card, thus realizing the data transmission process.

[0282] During data reception, the first processor receives packet data (such as the aforementioned third packet data) from the network card through the kernel layer. The kernel layer parses the packet data to obtain packet information, and then, based on this information, performs operations such as querying the rule table and packet verification to transmit the packet's address information (such as the aforementioned third address) to the user-layer multi-level memory shared manager. Furthermore, during the transmission of address information for packet data of different priorities, the user-layer multi-level memory shared manager can send feedback information to the kernel layer for different possible scenarios. The kernel layer can then adjust or update the rule table based on the received feedback information. Further, the user-layer multi-level memory shared manager reads packet data from the memory queue (such as the aforementioned third memory queue), parses the packet data to obtain service data, and transmits different service data to different service applications, thus completing the data reception process.

[0283] The user-level multi-level memory sharing manager can implement the functions of the ring buffer and scheduler in method 200 or method 300, and is responsible for memory sharing management and scheduling.

[0284] Figure 5 is a schematic diagram of the data processing flow provided in an embodiment of this application. The method shown in Figure 5 is based on method 200 provided in Figure 2, and illustrates a processing logic of a data processing method using the interaction between the user layer and the kernel layer of an in-vehicle computing platform deployed with a first processor as an example. The same steps and terms used in the data processing method described below as in method 200 can be referred to the relevant descriptions above, and will not be repeated here. The various steps shown in Figure 5 are described in detail below.

[0285] In step ①, the business data corresponding to different business applications is sent to the memory management application. For example, the business data corresponding to business application #1, business application #2, and business application #3 can be sent to the memory management application respectively.

[0286] In step ②, the memory management application writes different business data into the first memory queue.

[0287] In step ③, the first address used to store business data in the first memory queue is written into the circular buffer through the user layer.

[0288] In step ④, business data corresponding to different business applications is read from the first memory queue based on the first address.

[0289] In step ⑤, the business data corresponding to different business applications are encapsulated to obtain XSK messages.

[0290] In step ⑥, the message type, priority, and corresponding queue in the second priority queue are determined based on the XSK message identifier and rule table. Optionally, the message can also be verified.

[0291] In step ⑦, the second priority queue is transferred to the scheduling manager.

[0292] In step ⑧, the user-level scheduling manager writes the first address in the second priority queue into the first priority queue according to the priority of each queue in the second priority queue.

[0293] For details regarding writing the first address to the second priority queue and writing the first address in the second priority queue to the first priority queue, please refer to the detailed explanation in method 200, which will not be repeated here.

[0294] In step 9, the first memory queue can be mapped to the driver cache via a circular buffer address. This driver cache is also an example of the aforementioned second memory queue.

[0295] In step ⑩, the first address is read from the first priority queue through the kernel layer, and business data is read from the driver cache mapped by the first memory queue based on the first address.

[0296] In the steps In this process, the first message data is sent through the kernel layer based on DMA technology. This first message data is encapsulated from the service data.

[0297] The first processor can also release the first address used to store business data in the first memory queue through the user layer and write the first address into the circular buffer, which can realize memory reuse.

[0298] Steps ① to ② above For details regarding the relevant content, please refer to the detailed explanation in Method 200, which will not be repeated here.

[0299] Based on the above technical solution, as a possible implementation of the aforementioned method 200, taking the interaction between the user layer and the kernel layer in the vehicle computing system deployed with the first processor as an example, message loss can be reduced, meeting the low latency requirements of data transmission. Furthermore, zero-copy transmission of business data from the user layer to the kernel layer can be achieved, reducing system context switching and thus reducing transmission overhead.

[0300] Figure 6 is a schematic diagram of the data processing flow provided in an embodiment of this application. The method shown in Figure 6 is based on method 300 provided in Figure 3, and illustrates a processing logic of a data processing method using the interaction between the user layer and the kernel layer of an in-vehicle computing system deployed with a second processor as an example. The same steps and terms used in the data processing method described below as in method 300 can be referred to the relevant descriptions above, and will not be repeated here. The various steps shown in Figure 6 are described in detail below.

[0301] In step ①, the business data corresponding to different business applications is sent to the memory management application. For example, the business data corresponding to business application #1, business application #2, and business application #3 can be sent to the memory management application respectively.

[0302] In step ②, the memory management application requests a fourth memory queue of fixed size from the memory management application based on business characteristics or business needs.

[0303] In step ③, the fourth address used to store the third message data in the fourth memory queue is written into the circular buffer through the user layer.

[0304] In step ④, the fourth memory queue can be mapped to the fifth memory queue through the ring buffer address.

[0305] In step ⑤, the third packet data is received from the network card through the kernel layer based on DMA technology, the third packet data is written into the fifth memory queue, and the third packet data is processed to obtain the XSK packet.

[0306] In step ⑥, the fifth memory queue parses the XSK message by calling XDP to obtain the message identifier. Based on the identifier and the rule table, it determines the message type, priority, and the corresponding queue in the fifth priority queue. Optionally, the message can also be verified.

[0307] In step ⑦, the kernel layer writes the third message data from the fourth address in the fourth memory queue to the fifth priority queue.

[0308] In step ⑧, the fifth priority queue is transferred to the scheduling manager.

[0309] In step 9, the user-level scheduling manager writes the fourth address from the fifth priority queue into the fourth priority queue according to the priority of each queue in the fifth priority queue.

[0310] For details regarding writing the fourth address to the fifth priority queue and writing the fourth address from the fifth priority queue to the fourth priority queue, please refer to the detailed explanation in method 300, which will not be repeated here.

[0311] In step ⑩, the scheduler may send either a first feedback message or a second feedback message to the kernel layer based on the second and third possible scenarios described in method 300. For details regarding the first and second feedback messages, please refer to the detailed explanation in method 300; further elaboration will not be repeated here.

[0312] In the steps In the process, the user layer reads the fourth address from the fourth priority queue and reads the third message data from the fifth memory queue mapped by the fourth memory queue.

[0313] In the steps In this process, the third message information is parsed to obtain business data, and different business data are sent to the corresponding business applications.

[0314] In the steps In this process, memory reuse can be achieved by releasing the fourth address used to store the third message data in the fourth memory queue from the user layer and writing the fourth address into the circular buffer.

[0315] Steps ① to ② above For details regarding the relevant content, please refer to the detailed explanation in Method 300; it will not be repeated here.

[0316] Based on the above technical solution, as a possible implementation of the aforementioned method 300, taking the interaction between the user layer and the kernel layer in the vehicle computing system deployed with the second processor as an example, different message data can be processed based on message type, thereby reducing message loss. Furthermore, zero-copy transmission of third message data from the kernel layer to the user layer can also be achieved, reducing system context switching and thus reducing resource overhead.

[0317] The data processing method provided in this application embodiment may be a software middleware for an in-vehicle computing system deployed in a vehicle. Whether to adopt the data processing method provided in this application embodiment can be determined by obtaining the software's manual, corresponding functional interfaces, configuration table information, etc.

[0318] For example, product information for an in-vehicle computing system can be used to view the performance optimization strategy description during high-speed message transmission between the first processor and the second processor (e.g., MCU and SOC), and to determine whether the optimization strategy adopts the kernel bypass technology and memory scheduling management scheme provided in the embodiments of this application.

[0319] Another example is to analyze the call stack of the software middleware of the in-vehicle computing system to see if the call stack uses the same or similar data verification and data distribution logic as the embodiments of this application. Furthermore, one can examine the rule tables for relevant message types in the terminal's message data to see if they have the same or similar rule definitions and updates as the rule tables in the data processing method provided in the embodiments of this application.

[0320] Another example is that the data access pattern can be analyzed to determine whether it is the same as or similar to the data access pattern in the data processing method provided in the embodiments of this application. Alternatively, performance testing or simulation testing during data transmission can be used to determine whether the characteristics exhibited by the data processing method provided in the embodiments of this application are the same as or similar to those of the data access pattern.

[0321] The above-mentioned possible methods are merely examples. For instance, other methods and approaches can be used to determine whether to adopt the data processing method provided in this application, etc. This application does not limit these methods.

[0322] The method provided by the embodiments of this application has been described in detail above with reference to the accompanying drawings. The apparatus provided by the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0323] Figures 7 and 8 are schematic block diagrams of possible devices provided in embodiments of this application. These devices can be used to implement the functions of the first processor or the second processor in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments. In the embodiments of this application, the device can be the first processor or the second processor in the method embodiments shown in Figures 2, 3, 5 or 6, or it can be a component configured in the first processor or the second processor (such as a chip, chip system, processor, etc.), or it can be a logic module or software capable of implementing some or all of the functions of the first processor or the second processor.

[0324] The device provided in this application is shown in FIG7. The device 700 includes a transceiver unit 710 and a processing unit 720.

[0325] One possible design is that device 700 can be a data processing device used to implement the functions of the first processor in the method embodiments shown in FIG2 or FIG5. For example, device 700 may correspond to the first processor in FIG2 or FIG5.

[0326] For example, the processing unit 720 is used to determine first message data, which is associated with service data; the transceiver unit 710 sends the first message data to the second processor of the vehicle; wherein the service data corresponds to a first address in a first memory queue, the first address is stored in a first priority queue, and the position of the first address in the first priority queue is determined by the service type of the service data, and the service data is read from a second memory queue mapped by the first memory queue based on the first address.

[0327] Optionally, the order of the first addresses stored in the first priority queue is associated with a second priority queue, which includes at least two queues with different priorities, and the second priority queue includes the first address.

[0328] Optionally, the processing unit 720 is further configured to determine the queue in the at least two queues corresponding to the service type of the service data; the processing unit 720 is further configured to write the first address of the service data into the queue corresponding to the second priority queue.

[0329] Optionally, the second priority queue includes a first queue and a second queue, wherein the priority of the first queue is higher than the priority of the second queue, and the priority of the first address in the first queue in the first priority queue is higher than the priority of the first address in the second queue in the first priority queue.

[0330] Optionally, the second priority queue includes a first queue and a second queue, wherein the priority of the first queue is higher than that of the second queue. When all addresses in the first queue are free, or when the number of free addresses in the first queue is greater than or equal to a preset value, the service type of the service data changes from the corresponding second queue to the corresponding first queue in the second priority queue.

[0331] Optionally, the second priority queue includes a first queue and a second queue, wherein the priority of the first queue is higher than that of the second queue, and when there is no free address in the first queue, the free address of the second queue is updated to the first queue.

[0332] Optionally, the priority of the first service data is higher than that of the second service data. When the number of delayed transmissions of the second service data is less than or equal to the first threshold, the first address in the second priority queue is before the second address in the first priority queue. The first address corresponds to the first service data, and the second address corresponds to the second service data.

[0333] Optionally, the first memory queue is mapped to the second memory queue via a circular buffer.

[0334] Optionally, the service data is read from the first memory queue based on the first address using DMA technology.

[0335] Optionally, the service type of the service data is determined based on the XSK message, which is determined based on the service data.

[0336] Optionally, the transceiver unit 710 is further configured to receive second message data sent by the third processor of the vehicle; the processing unit 720 is further configured to obtain service data based on the second message data; wherein the second message data corresponds to a third address in a third memory queue, the third address is stored in a third priority queue, and the position of the third address in the third priority queue is determined by the message type of the second message data, and the second message data is read from a fourth memory queue mapped by the third memory queue based on the third address.

[0337] One possible design is that device 700 can be a data processing device used to implement the functions of the second processor in the method embodiments shown in FIG3 or FIG6. For example, device 700 may correspond to the second processor in FIG3 or FIG6.

[0338] For example, the transceiver unit 710 is used to receive third message data; the processing unit 720 is used to obtain service data based on the third message data; wherein, the third message data corresponds to a fourth address in a fifth memory queue, the fourth address is stored in a fourth priority queue, and the position of the fourth address in the fourth priority queue is determined by the message type of the third message data, and the third message data is read from a sixth memory queue mapped by the fifth memory queue based on the fourth address.

[0339] Optionally, the order of the fourth addresses stored in the fourth priority queue is associated with the fifth priority queue, which includes at least two queues with different priorities, and the fifth priority queue includes the fourth address.

[0340] Optionally, the processing unit 720 is further configured to determine the queue corresponding to the message type of the third message data in the at least two queues; the processing unit 720 is further configured to write the fourth address of the third message data into the queue corresponding to the fifth priority queue.

[0341] Optionally, the fifth priority queue includes a third queue and a fourth queue, wherein the priority of the third queue is higher than the priority of the fourth queue, and the priority of the fourth address in the third queue in the fourth priority queue is higher than the priority of the fourth address in the fourth priority queue.

[0342] Optionally, the fifth priority queue includes a third queue and a fourth queue, with the third queue having a higher priority than the fourth queue. When all addresses in the third queue are free, or when the number of free addresses in the third queue is greater than or equal to a preset value, the processing unit 720 is further configured to update the mapping relationship between the message type and at least two queues in the fifth priority queue based on the first feedback information. The first feedback information is used to indicate that the message type in the fifth priority queue changes from the corresponding fourth queue to the corresponding third queue.

[0343] Optionally, the fifth priority queue includes a third queue and a fourth queue, with the third queue having a higher priority than the fourth queue. When the third queue has no free address, the processing unit 720 is further configured to update the free address of the fourth queue to the third queue based on second feedback information, whereby the second feedback information is used to indicate the free address of the fourth queue in the fifth priority queue.

[0344] Optionally, the priority of the third message data is higher than that of the fourth message data. When the number of delayed transmissions of the fourth message data is less than or equal to the second threshold, the third address in the fifth priority queue is before the fifth address in the fourth priority queue. The fourth address corresponds to the third message data, and the fifth address corresponds to the fourth message data.

[0345] Optionally, the fifth memory queue is mapped to the sixth memory queue via a circular buffer.

[0346] Optionally, the third message data is read from the fifth memory queue using DMA technology based on the fourth address.

[0347] Optionally, the message type of the third message data is determined based on the XSK message, and the XSK message is determined based on the third message data.

[0348] Optionally, the processing unit 720 is further configured to determine fifth message data, which is associated with service data; the transceiver unit 710 is further configured to send the fifth message data to the second processor of the vehicle; wherein the service data corresponds to a sixth address in a seventh memory queue, the sixth address is stored in a seventh priority queue, and the position of the sixth address in the seventh priority queue is determined by the service type of the service data, and the service data is read from an eighth memory queue mapped by the seventh memory queue based on the sixth address.

[0349] In one possible design, when device 700 is a first processor or a communication module within a first processor, or when device 700 is a second processor or a communication module within a second processor, the function of processing unit 720 can be implemented by one or more processors. Specifically, the processor may include a modem chip, or a system-on-a-chip (SoC) chip or a SIP chip containing a modem core. The function of transceiver unit 710 can be implemented by transceiver circuitry.

[0350] In one possible design, when the device 700 is a circuit or chip responsible for communication functions in a first or second processor, such as a modem chip or a system-on-a-chip (SoC) or SIP chip containing a modem core, the function of the processing unit 720 can be implemented by a circuit system in the aforementioned chip that includes one or more processors or processor cores. The function of the transceiver unit 710 can be implemented by interface circuitry or data transceiver circuitry on the aforementioned chip.

[0351] It should also be understood that the transceiver unit in device 700 may include a transmitting unit but not a receiving unit. Alternatively, the transceiver unit 710 may include a receiving unit but not a transmitting unit. Specifically, it depends on whether the above-described scheme performed by device 700 includes both transmitting and receiving actions. The receiving unit can be used to perform the receiving action in the above-described scheme, and the transmitting unit can be used to perform the transmitting action in the above-described scheme.

[0352] It is understood that the division of units in the above-described device is merely a logical functional division. Each function can correspond to a functional unit, or two or more functions can be integrated into one functional unit. In actual implementation, all or some units can be integrated into a single physical entity, or they can be distributed across different physical entities. Furthermore, the aforementioned functional units can be implemented in hardware, software, or a combination of both. Whether a function is executed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0353] Figure 8 is another schematic block diagram of the device provided in an embodiment of this application. As shown in Figure 8, the device 800 includes one or more processors 810. The processor 810 may be a general-purpose processor or a special-purpose processor, etc. For example, it may be a baseband processor or a central processing unit. The baseband processor may be used to process communication protocols and communication data, and the central processing unit may be used to control the device (e.g., a vehicle or a chip), execute software programs, and process data from the software programs.

[0354] Optionally, in one design, processor 810 may include a program (also referred to as code or instructions) that can be run on processor 810, causing device 800 to perform the methods executed by the first or second processor in the above method embodiments. In yet another possible design, device 800 includes circuitry (not shown in FIG8) for implementing the functions of the first or second processor in the above method embodiments.

[0355] For example, processor 810 can be used to execute computer programs or instructions in memory to implement the steps performed by the first or second processor in the method embodiments shown in FIG2, FIG3, FIG5 or FIG6.

[0356] Optionally, the device 800 may include one or more memories 820 storing programs (sometimes referred to as code or instructions) that can be run on the processor 810, causing the device 800 to perform the methods executed by the first or second processor in the above embodiments.

[0357] Optionally, the processor 810 and / or memory 820 may also store data. The processor and memory may be configured separately or integrated together.

[0358] Optionally, the device 800 may also include a communication interface 830. The processor 810, sometimes referred to as a processing unit, controls the device (e.g., a first processor or a second processor). The communication interface 830, sometimes referred to as a transceiver unit, transceiver, transceiver circuit, or transceiver, is used to implement the transceiver functions of the device; for example, the communication interface 830 can be used to receive third message data.

[0359] Optionally, the device 800 also includes a communication interface 830. The processor 810 and the communication interface 830 are coupled to each other. It is understood that the communication interface 830 can be a transceiver or an input / output interface.

[0360] When device 800 is used to implement the method shown in Figures 2, 3, 5, or 6, processor 810 can be used to execute the functions of processing unit 720, and communication interface 830 can be used to execute the functions of transceiver unit 710. Whether communication interface 830 is used for sending or receiving depends on whether the scheme executed by device 800 is used to perform a sending or receiving action.

[0361] When the aforementioned device 800 is a chip applied to the first processor, the chip implements the functions of the first processor in the above method embodiments. The chip of the first processor receives signals from other modules (such as radio frequency modules or antennas) in the first processor, and these signals may be sent to the first processor by the second processor; or, the chip of the first processor sends signals to other modules (such as radio frequency modules or antennas) in the first processor, and these signals may be sent to the second processor by the first processor.

[0362] When the aforementioned device 800 is a chip applied to the second processor, the chip implements the functions of the second processor in the above method embodiments. The chip of the second processor receives signals from other modules in the second processor, which may be signals sent to the second processor by the first processor; or, the chip of the second processor sends signals to other modules in the second processor, which may be signals sent to the first processor by the second processor.

[0363] It is understood that when the device 800 is a first processor or a second processor, the communication interface 830 can be a transceiver, specifically including a transmitter and a receiver, with the transmitter used to send signals and the receiver used to receive signals. When the device 800 is a chip applied to the first processor or the second processor, the communication interface 830 can be an input / output circuit, wherein the input circuit can be used for receiving and the output interface can be used for sending.

[0364] Optionally, the device 800 also includes a power supply circuit for supplying power to the device 800.

[0365] It should be noted that the above method embodiments can be applied to a processor, or implemented by a processor. A processor may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by integrated logic circuits in the processor's hardware or by software instructions.

[0366] The aforementioned processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or any combination thereof. A general-purpose processor can be a microprocessor or any conventional processor.

[0367] The steps of the method disclosed in the embodiments of this application can be directly manifested as being executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can reside in mature storage media in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0368] The memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0369] This application also provides a chip system including at least one processor for supporting the implementation of the functions of the first or second processor involved in any of the above method embodiments, such as receiving, sending or processing information involved in the above methods.

[0370] In one possible design, the chip system also includes a memory for storing computer programs and data, which may be located within or outside the processor.

[0371] The chip system can consist of chips or include chips and other discrete components.

[0372] This application also provides a computer program product, which includes a computer program, wherein when the computer program is run, the method executed by the first processor in the embodiment shown in FIG2, FIG3, FIG5 or FIG6 is executed, or the method executed by the second processor is executed.

[0373] This application also provides a computer-readable storage medium storing a computer program. When the computer program is run, the method executed by the first processor in the embodiment shown in FIG. 2, FIG. 3, FIG. 5 or FIG. 6 is executed, or the method executed by the second processor is executed.

[0374] This application also provides a communication system, which includes the aforementioned first processor and second processor.

[0375] The methods provided in the above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. When implemented in software, they can be implemented, in whole or in part, in the form of a computer program product. The computer program product may include one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic disk), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state disk (SSD)).

[0376] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0377] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0378] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0379] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0380] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0381] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, or a part thereof, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory, random access memory, magnetic disks, or optical disks.

Claims

1. A data processing method, characterized by, The method applied to a first processor in a vehicle comprises: determining first message data, the first message data being associated with service data; sending the first message data to a second processor of the vehicle; wherein the service data corresponds to a first address in a first memory queue, the first address is stored in a first priority queue, and the position of the first address in the first priority queue is determined by the service type of the service data, and the service data is read from a second memory queue mapped from the first memory queue based on the first address.

2. The method of claim 1, wherein, The arrangement order of the first address stored in the first priority queue is associated with a second priority queue, the second priority queue includes at least two queues, the priority of different queues in the at least two queues is different, and the first address is included in the second priority queue.

3. The method of claim 2, wherein, The method further comprises: determining the corresponding queue of the service type of the service data in the at least two queues; writing the first address of the service data into the corresponding queue of the second priority queue.

4. The method of claim 2 or 3, wherein, The second priority queue includes a first queue and a second queue, the priority of the first queue is higher than that of the second queue, and the priority of the first address in the first queue in the first priority queue is higher than that of the first address in the second queue in the first priority queue.

5. The method of any one of claims 2 to 4, wherein, The second priority queue includes a first queue and a second queue, the priority of the first queue is higher than that of the second queue, When all addresses in the first queue are free, or the number of free addresses in the first queue is greater than or equal to a preset value, the service type of the service data changes from the corresponding second queue to the corresponding first queue in the second priority queue.

6. The method of any one of claims 2 to 5, wherein, The second priority queue includes a first queue and a second queue, the priority of the first queue is higher than that of the second queue, When there is no free address in the first queue, the free address of the second queue is updated to the first queue.

7. The method of any one of claims 2 to 5, wherein, The priority of the first service data is higher than that of the second service data, When the number of delayed sending times of the second service data is less than or equal to a threshold value, the first address in the second priority queue is before the second address in the first priority queue, the first address corresponds to the first service data, and the second address corresponds to the second service data.

8. The method of any one of claims 1 to 7, wherein, The first memory queue is mapped to the second memory queue through a ring buffer.

9. The method of any one of claims 1 to 8, wherein, The service data is read from the first memory queue based on the first address by using direct memory access (DMA) technology.

10. The method of any one of claims 1 to 9, wherein, The service type of the service data is determined based on a quick socket (XSK) message, and the XSK message is determined based on the service data.

11. The method of any one of claims 1 to 10, wherein, The method further comprises: receiving second message data sent by a third processor of the vehicle; based on the second message data, obtaining service data; The second message data corresponds to a third address in a third memory queue. The third address is stored in a third priority queue, and the position of the third address in the third priority queue is determined by the message type of the second message data. The second message data is read from a fourth memory queue mapped from the third memory queue based on the third address.

12. A data processing method, characterized by, A second processor used in a vehicle, the second processor being deployed with an on-board computing system, the method comprising: Receive third message data; Based on the third message data, obtain the service data; The third message data corresponds to the fourth address in the fifth memory queue. The fourth address is stored in the fourth priority queue, and the position of the fourth address in the fourth priority queue is determined by the message type of the third message data. The third message data is read from the sixth memory queue mapped from the fifth memory queue based on the fourth address.

13. The method of claim 12, wherein, The order of the fourth address stored in the fourth priority queue is associated with the fifth priority queue, which includes at least two queues with different priorities, and the fifth priority queue includes the fourth address.

14. The method of claim 13, wherein, The method further includes: The message type of the third message data is determined to be the corresponding queue in the at least two queues; Write the fourth address of the third message data into the corresponding queue in the fifth priority queue.

15. The method of claim 13 or 14, wherein, The fifth priority queue includes a third queue and a fourth queue. The priority of the third queue is higher than the priority of the fourth queue. The priority of the fourth address in the third queue is higher than the priority of the fourth address in the fourth priority queue.

16. The method of any one of claims 13 to 15, wherein, The fifth priority queue includes a third queue and a fourth queue, wherein the third queue has a higher priority than the fourth queue, and the method further includes: When all addresses in the third queue are free, or when the number of free addresses in the third queue is greater than or equal to a preset value, Based on the second feedback information, the mapping relationship between the message type and at least two queues in the fifth priority queue is updated. The second feedback information is used to indicate that the message type in the fifth priority queue changes from the corresponding fourth queue to the corresponding third queue.

17. The method of any one of claims 13 to 16, wherein, The fifth priority queue includes a third queue and a fourth queue, wherein the third queue has a higher priority than the fourth queue, and the method further includes: When there is no free address in the third queue, the free address of the fourth queue is updated to the third queue based on the first feedback information, whereby the first feedback information is used to indicate the free address of the fourth queue in the fifth priority queue.

18. The method of any one of claims 13 to 17, wherein, The priority of the third message data is higher than that of the fourth message data. When the number of delayed transmissions of the fourth message data is less than or equal to a threshold, the third address in the fifth priority queue is before the fifth address in the fourth priority queue. The fourth address corresponds to the third message data, and the fifth address corresponds to the fourth message data.

19. The method of any one of claims 12 to 18, wherein, The fifth memory queue is mapped to the sixth memory queue through a circular buffer.

20. The method of any one of claims 12 to 19, wherein, The third message data is read from the fifth memory queue using direct memory access (DMA) technology based on the fourth address.

21. The method of any one of claims 12 to 20, wherein, The message type of the third message data is determined based on the Fast Socket XSK message, and the XSK message is determined based on the third message data.

22. The method of any one of claims 12 to 21, wherein, The method further includes: Determine the fifth message data, which is associated with the service data; The fifth message data is sent to the second processor of the vehicle; The service data corresponds to the sixth address in the seventh memory queue. The sixth address is stored in the seventh priority queue, and the position of the sixth address in the seventh priority queue is determined by the service type of the service data. The service data is read from the eighth memory queue mapped by the seventh memory queue based on the sixth address.

23. A data processing apparatus, characterized by It includes a processor and a communication interface, the processor being configured to execute a computer program to cause the method as described in any one of claims 1 to 11 to be performed, or to cause the method as described in any one of claims 12 to 22 to be performed.

24. A vehicle characterized by comprising: Used to implement the method as described in any one of claims 1 to 11, or used to implement the method as described in any one of claims 12 to 22.

25. A computer-readable storage medium having stored thereon a computer program, characterized in that When the computer program is executed by a processor, the method of any one of claims 1 to 11 is executed, or the method of any one of claims 12 to 22 is executed.

26. A computer program product, characterised in that, It includes a computer program, which, when run, executes the method of any one of claims 1 to 11, or executes the method of any one of claims 12 to 22.

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