Method and apparatus for sensing current in back-to-back configuration

Abstract

An apparatus for sensing current in a back-to-back MOSFET configuration is provided. The apparatus can include a first MOSFET having a gate terminal, a drain terminal, and a source terminal; a second MOSFET having a source terminal, a gate terminal, and a drain terminal, the source terminal coupled to the source terminal of the first MOSFET; a gate driver circuit including at least one gate drive output terminal for outputting a gate drive signal to the gate terminal of the first MOSFET and the gate terminal of the second MOSFET; and a shunt resistor coupled between the source terminal of the first MOSFET and the source terminal of the second MOSFET. The gate driver circuit can include a return terminal coupled to the source terminal of the first MOSFET, and a return current from the gate terminal of the second MOSFET flows through the shunt resistor to the return terminal of the gate driver circuit.

Description

Cross-references to related applications

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 538,370, filed September 14, 2023, and U.S. Non-Provisional Patent Application No. 18 / 884,377, filed September 13, 2024, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0002] This disclosure relates in general to sensing current in a bidirectional circuit-breaking device, and more specifically to sensing current in a back-to-back configuration. Summary of the Invention

[0003] According to one aspect of various examples, an apparatus is provided for sensing current in a common-source MOSFET configuration using a shunt resistor (such as, for example, an electronic fuse) coupled between the source terminals of two MOSFET devices. The apparatus may include: a first MOSFET having a gate terminal, a drain terminal, and a source terminal; a second MOSFET having a source terminal, a gate terminal, and a drain terminal, the source terminal being coupled to the source terminal of the first MOSFET; a gate driver circuit including at least one gate drive output terminal for outputting a gate drive signal to the gate terminals of the first MOSFET and the second MOSFET; and a shunt resistor coupled between the source terminals of the first MOSFET and the second MOSFET. The gate driver circuit may include a return terminal coupled to the source terminal of the first MOSFET, and gate return current from the gate terminal of the second MOSFET may flow through the shunt resistor to the return terminal of the gate driver circuit.

[0004] The gate driver circuit may include an input terminal for receiving a control signal, and the gate driver circuit may output a gate drive signal based on the control signal. The drain terminal of a first MOSFET may be coupled to a voltage source, and the drain terminal of a second MOSFET may be coupled to a load. The voltage source may be an AC voltage source. The device may include an operational amplifier coupled to a shunt resistor to detect the voltage drop across the shunt resistor, thereby detecting the current through the shunt resistor. At least one gate drive output terminal may include a first output terminal and a second output terminal, and the first output terminal may be coupled to the second output terminal via a corresponding gate driver output resistor to output a gate drive signal to the gate terminals of the first gate MOSFET and the second MOSFET. The device may include a first gate resistor coupled between the gate terminal of the first MOSFET and at least one gate drive output terminal, and a second gate resistor coupled between the gate terminal of the second MOSFET and at least one gate drive output terminal. The resistance of the first gate resistor may be greater than the resistance of the second gate resistor. The device may include a first gate capacitor having a first terminal coupled to a common voltage and a second terminal coupled between the gate terminal of the first MOSFET and the first gate resistor.

[0005] According to one aspect of various examples, a method is provided for sensing current in a common-source MOSFET configuration using a shunt resistor coupled between the source terminals of two MOSFET devices. The method may include: generating a gate drive signal by a gate driver circuit to drive the gate terminals of a first MOSFET and a second MOSFET; forming a gate drive signal return path from the source terminal of the second MOSFET through the shunt resistor coupled between the source terminals of the second MOSFET and the first MOSFET to a return terminal of the gate driver circuit; and sensing the current through the shunt resistor.

[0006] The method may include receiving a control signal such that a gate drive signal is generated based on the control signal. The method may include providing an input voltage to the drain terminal of a first MOSFET and providing an output current to a load coupled to the second drain terminal of a second MOSFET. The input voltage may be an AC voltage, and the gate drive signal may turn on the second MOSFET based on the polarity of the AC voltage. Sensing the current through a shunt resistor may include using an operational amplifier coupled to the shunt resistor to detect the voltage drop across the shunt resistor and outputting a signal corresponding to the current through the shunt resistor. The method may include turning on the second MOSFET before turning on the first MOSFET.

[0007] According to one aspect of various examples, an apparatus is provided for sensing current in a common-source MOSFET configuration using a shunt resistor coupled between the source terminals of two MOSFET devices. The apparatus may include: a first MOSFET having a gate terminal, a drain terminal, and a source terminal; a second MOSFET having a source terminal, a gate terminal, and a drain terminal, the source terminal being coupled to the source terminal of the first MOSFET; a gate driver circuit including an input terminal and at least one gate drive output terminal, the input terminal for receiving a control signal, the at least one gate drive output terminal for outputting a gate drive signal to the gate terminals of the first MOSFET and the second MOSFET based on the control signal; a shunt resistor coupled between the source terminals of the first MOSFET and the second MOSFET; a first gate resistor coupled between the gate terminal of the first MOSFET and the at least one gate drive output terminal; and a second gate resistor coupled between the gate terminal of the second MOSFET and the at least one gate drive output terminal. The gate driver circuit may include a return terminal coupled to the source terminal of the first MOSFET, and a gate drive return current from the gate terminal of the second MOSFET flows through a shunt resistor to the return terminal of the gate driver circuit.

[0008] The drain terminal of the first MOSFET can be coupled to a voltage source, and the drain terminal of the second MOSFET can be coupled to a load. The voltage source can be an AC voltage source. The device may include an operational amplifier coupled to a shunt resistor to detect the voltage drop across the shunt resistor in order to detect the current through the shunt resistor. At least one gate drive output terminal may include a first output terminal and a second output terminal, and the first output terminal may be coupled to the second output terminal via a corresponding gate driver output resistor to output a gate drive signal to the gate terminals of the first gate MOSFET and the second MOSFET. Attached Figure Description

[0009] Figure 1 Circuit diagrams of devices for sensing current in a common-source MOSFET configuration, according to various examples, are shown.

[0010] Figure 2 Circuit diagrams of devices for sensing current in a common-source MOSFET configuration, according to various examples, are shown.

[0011] Figure 3 Circuit diagrams of devices for sensing current in a common-source MOSFET configuration, according to various examples, are shown.

[0012] Figure 4 Examples of AC power supply provided by various sources are shown. Figure 3 The circuit diagram of the control signal received by the gate driver circuit in the circuit. Detailed Implementation

[0013] Reference will now be made to the various examples shown in the accompanying drawings, in which the same reference numerals always denote the same elements. These examples may be presented in various forms, and are not limited to those described herein.

[0014] Current sensing in common-source MOSFET configurations is used in a variety of applications, such as solid-state circuit breakers, electronic fuses, and solid-state relays. In back-to-back MOSFET configurations, a shunt resistor with very low resistance can be used to sense the current through the MOSFET. However, coupling a shunt resistor (e.g., in a common-source configuration where the source of the first MOSFET is series-coupled to the source of the second MOSFET) between the drain terminal of one of the MOSFETs and the high-voltage source or load results in greater circuit complexity and cost, and may also require an isolation interface to isolate the MOSFET's control and drive circuitry from the high-voltage source and load, which can affect accuracy, response time, and / or bandwidth. Alternatively, placing a shunt resistor between the common-source terminals of the MOSFETs will be ineffective when the common source terminals of the MOSFETs are individually coupled to the return terminals of the gate drive circuitry, as the path to the return terminals of the gate drive circuitry short-circuits the shunt resistor, resulting in no current flowing through it. While the foregoing discussion refers to MOSFETs in a common-source configuration, it can also be applied to configurations using multiple MOSFETs connected in parallel, as well as other devices such as insulated-gate bipolar transistors (IGBTs). For example, each MOSFET in a common-source configuration may have one or more MOSFETs connected in parallel to share current. In this configuration, the corresponding source and drain terminals of the MOSFETs are connected, and the corresponding gate terminals may have corresponding gate resistors coupled to the gate driver circuitry. Therefore, there is a need for an apparatus and method for sensing current through a bidirectional circuit interrupting a device without increasing the cost or complexity of the circuitry or adversely affecting the bandwidth or response time.

[0015] Figure 1A circuit diagram of a block diagram for a device for sensing current in a back-to-back NMOSFET configuration, according to various examples, is shown. While the figures may be specifically described with respect to a back-to-back NMOSFET configuration, this is not intended to be limiting and can be similarly applied to a back-to-back PMOSFET or IGBT configuration. The device may include a first MOSFET Q1 having a drain terminal 111 coupled to the positive terminal of a DC voltage source 100, a gate terminal 112 coupled to a gate driver circuit 130, and a source terminal 113. The device may also include a second MOSFET Q2 having a source terminal 123 coupled to the source terminal 113 of the first MOSFET Q1, a gate terminal 122 coupled to the gate driver circuit 130, and a drain terminal 121 coupled to a load 140. The device may include a shunt resistor 145 coupled between the source terminal 113 of the first MOSFET Q1 and the source terminal 123 of the second MOSFET Q2. For clarity, corresponding body diodes for the first MOSFET Q1 and the second MOSFET Q2 are shown.

[0016] The gate driver circuit 130 may include a gate drive output terminal 131 to output a gate drive signal to the gate terminal 112 of the first MOSFET Q1 and the gate terminal 122 of the second MOSFET Q2. The gate drive output terminal 131 may include a first or high-side output terminal 131a and a second or low-side output terminal 131b, which can be coupled together by two gate driver output resistors 132a and 132b, respectively, to the first output terminal 131a and the second output terminal 131b. The first output terminal can be driven high in a first active state, and the second output terminal can be driven low in a second active state; the first and second active states do not overlap. The gate driver output resistors 132a and 132b can be coupled to the gate terminal 112 of the first MOSFET Q1 and the gate terminal 122 of the second MOSFET Q2, respectively, and can affect the on-time and off-time of the first MOSFET Q1 and the second MOSFET Q2, respectively. For example, the gate driver output resistor 132a can increase the on-time of the first MOSFET Q1 and the second MOSFET Q2. Gate driver output resistor 132b can increase the turn-off time of the first MOSFET Q1 and the second MOSFET Q2. According to various examples, one or both of the gate driver output resistors 132a and 132b can be omitted. For example, gate driver output resistor 132a can be included, and gate driver output resistor 132b can be omitted, such that the turn-on time of the first MOSFET Q1 and the second MOSFET Q2 is greater than the turn-off time. Gate driver circuit 130 can include a power supply input VCC 133 and a return terminal 134, which can be coupled to a common voltage or ground. Gate driver circuit 130 may also have an input terminal IN 135 to receive a control signal. The gate drive signal can be output based on the received control signal.

[0017] The source terminal 113 of the first MOSFET Q1 can be coupled to the return terminal 134 of the gate driver circuit 130, thereby creating a return path for the gate drive signal from the gate drive output terminal 131 to the gate terminal 112, to the source terminal 113, and back to the return terminal 134 of the gate driver circuit 130. The return path for the gate drive signal for the second MOSFET Q2 is from the gate drive output terminal 131 to the gate terminal 122, to the source terminal 123, through the shunt resistor 145, and back to the return terminal 134 of the gate driver circuit 130. By not directly coupling the source terminal 123 of the second MOSFET Q2 to the return terminal 134 of the gate driver circuit 130, the output current of the load 140 flows through the shunt resistor 145, which allows the output current of the load 140 to be detected as the voltage drop across the shunt resistor 145. For example, the differential operational amplifier 160 can be coupled to both sides of the shunt resistor 145 to amplify the voltage drop across the shunt resistor 145 and output a signal I corresponding to the current flowing through the shunt resistor 145. sense The output current of load 140 and the return current of the gate drive signal of the second MOSFET Q2 both flow through the shunt resistor 145. However, the return current of the gate drive signal of the second MOSFET Q2 is very small relative to the current of load 140, therefore the signal I corresponding to the current through the shunt resistor 145... sense It can be ignored in any measurement.

[0018] According to various examples, the device may further include a first gate resistor R1 coupled between the gate terminal 112 of the first MOSFET Q1 and the gate drive output terminal 131, and a second gate resistor R2 coupled between the gate terminal 122 of the second MOSFET Q2 and the gate drive output terminal 131. The first gate resistor R1 and the second gate resistor R2 may be coupled to the gate drive output terminal 131 to receive a gate drive signal. According to various examples, the first gate resistor R1 may have a higher resistance than the second gate resistor R2, which may allow the second MOSFET Q2 to be turned on before the first MOSFET Q1.

[0019] although Figure 1 The exemplary device shown illustrates a return path for the gate drive signal via a node coupled to the source terminal 113 of the first MOSFET Q1; however, according to various examples, the return path could be via a node coupled to the source terminal 123 of the second MOSFET Q2. For example, Figure 1As not shown, the source terminal 123 of the second MOSFET Q2 can be coupled to the return terminal 134 of the gate driver circuit 130, and the source terminal 113 of the first MOSFET Q1 is not directly coupled to the return terminal 134 of the gate driver circuit 130. In this example, the gate drive signal travels through the return path of the first MOSFET Q1 from the gate drive output terminal 131 to the gate terminal 112 of the first MOSFET Q1, to the source terminal 113 of the first MOSFET Q1, through the shunt resistor 145, and back to the return terminal 134 of the gate driver circuit 130. The return path for the gate drive signal of the second MOSFET Q2 is from the gate drive output terminal 131 to the gate terminal 122 of the second MOSFET Q2, to the source terminal 123 of the second MOSFET Q2, and back to the return terminal 134 of the gate driver circuit 130. In this example, the resistance of the second gate resistor R2 can be greater than the resistance of the first gate resistor R1, which allows the first MOSFET Q1 to turn on before the second MOSFET Q2. Although Figure 1 The examples shown include MOSFET devices in a common-source configuration, but various examples may include multiple MOSFETs connected in parallel, or alternative devices such as IGBTs. For example, the first MOSFET Q1 and the second MOSFET Q2 may each have one or more MOSFETs connected in parallel to share current. In this configuration, the respective source and drain terminals of the MOSFETs are connected, and the respective gate terminals may have respective gate resistors coupled to the gate driver circuitry 130.

[0020] Figure 2 A circuit diagram showing a block diagram of a device for sensing current in a back-to-back MOSFET configuration, according to various examples. Figure 2 The device shown is similar to Figure 1 The device shown is shown here, and some common components will not be described here to avoid redundancy. Figure 2The illustrated device may include a first gate capacitor C1 having a first terminal coupled to a common voltage or ground, which may or may not be the same node coupled to the return terminal 134 of the gate driver circuit 130, and a second terminal coupled between the gate terminal 112 of the first MOSFET Q1 and the first gate resistor R1. In this example, the first gate resistor R1 and the second gate resistor R2 may have the same or different resistances. The first gate capacitor C1 may increase the RC time constant of the first MOSFET Q1, which may cause the second MOSFET Q2 to turn on before the first MOSFET Q1. In various examples where the return path to the gate driver circuit 130 passes through a node coupled to the source terminal 123 of the second MOSFET Q2, the first gate capacitor C1 may be replaced by a second gate capacitor C2 coupled between the gate terminal 122 of the second MOSFET Q2 and the second gate resistor R2 to increase the RC time constant of the second MOSFET Q2, such that the first MOSFET Q1 turns on before the second MOSFET Q2.

[0021] Figure 3 A circuit diagram showing a block diagram of a device for sensing current in a back-to-back MOSFET configuration, according to various examples. Figure 3 The device shown is similar to Figure 1 and Figure 2 The device shown is shown here, and some common components will not be described here to avoid redundancy. Figure 3 The device shown is coupled to AC power supply 300, such as an AC voltage source, and Figure 1 and Figure 2 The DC voltage source 100 is the opposite. When the device is coupled to AC power supply 300, the control signal provided to the gate driver circuit 130 can turn on the gate driver circuit 130 when the AC power is positive. This can cause the gate driver circuit 130 to output a gate drive signal when the output of the AC power coupled to the first drain terminal 111 is positive relative to the output of the AC power coupled to the second drain terminal 121 through the load 140. According to various examples, when the output of the AC power coupled to the first drain terminal 111 is negative relative to the output of the AC power coupled to the second drain terminal 121 through the load 140, the gate driver circuit 130 may not output a gate drive signal to turn on the gate driver circuit.

[0022] Figure 4 Examples of AC power supply provided by various sources are shown. Figure 3A circuit diagram of the circuitry for receiving control signals from the gate driver circuit 130. Circuitry 400 for providing control signals to the gate driver circuit 130 may include a comparator 410 to receive an AC signal from an AC power supply 300 at its first input terminal (which may be a non-inverting input terminal). A second input terminal (which may be an inverting input terminal) of the comparator 410 may be coupled to ground. The comparator 410 may generate an output signal based on a comparison between the AC signal received from the AC power supply 300 at the non-inverting input terminal and ground. More specifically, when the AC signal is negative, the comparator 410 generates a first logic output, such as a logic low output, and when the AC signal is positive, the comparator 410 generates a second logic output, such as a logic high output. The output of the comparator 410 is output to the S-input of an SR latch 420. The SR latch 420 passes the output of the comparator 410 from the S-input to the Q-output of the SR latch 420. For example, when the output of comparator 410 changes from logic low to logic high, SR latch 420 outputs a logic high signal at its Q-output. Figure 4 As shown, the reset input of the SR latch 420 is used to reset the Q-output of the SR latch 420 to a logic low level. The SR latch 420 also includes an inverted Q-output, which outputs the inverted signal of the Q-output. Figure 4 In the example shown, an inverting Q-output is not used. According to various examples, a reset signal (e.g., a high-level active pulse) can be provided to the reset input by the controller (not shown) before the request signal (discussed below) is switched from a logic low to a logic high state, causing the Q-output of SR latch 420 to go low. The Q-output of SR latch 420 will switch to a logic high state when the AC signal has positive polarity after the reset signal supplied to the reset input ends, as explained further below.

[0023] The Q-output of SR latch 420 is coupled to the first input terminal of AND gate 430. AND gate 430 includes a second input terminal for receiving a request signal and generates a logic high output when the output of the Q-output of SR latch 420 and the request signal are both logic high. Depending on the implementation, the request signal may be provided by several sources. For example, the request signal may be provided by a controller that commands gate driver circuit 130 to turn on the first MOSFET Q1 and the second MOSFET Q2. The controller may be implemented in, but is not limited to, a microcontroller unit, a field-programmable gate array, or discrete hardware circuitry. The controller may also control the state of the reset input of SR latch 420. In examples using a DC voltage source, such as... Figure 1 and Figure 2 In this context, the request signal can be a control signal provided to the input terminal 135 of the gate driver circuit.

[0024] exist Figure 4 In the example, the output of AND gate 430 is the input to... Figure 3 The control signal is input to the gate driver circuit 130. As described above, the gate driver circuit 130 outputs a gate drive signal based on the control signal to turn on the first MOSFET Q1 and the second MOSFET Q2. Figure 4 Circuit 400 generates a control signal based on the polarity of the AC power supply. This means that gate driver circuit 130 outputs a gate drive signal based on the polarity of the signal output from AC power supply 300 to turn on the first MOSFET Q1 and the second MOSFET Q2. For example, the control signal is active (i.e., high) when the request signal is high and the AC power supply polarity is positive, and inactive (i.e., low) when the request signal is inactive (i.e., low) or the AC power supply polarity is not positive (e.g., negative). In one example, as a startup condition, it is important that Q2 is turned on first, followed by the first Q1, and this will occur when the polarity is positive to avoid large current flowing through any body diode of MOSFET Q1 or MOSFET Q2. Therefore, the controller can clear SR latch 420 immediately before the request signal is turned on to ensure that the control signal to gate driver circuit 130 is turned on when the signal from AC power supply 300 subsequently becomes positive. sense When an overload is detected, the controller can invalidate the request signal, thereby disabling (disconnecting) MOSFET Q1 and MOSFET Q2.

[0025] Various examples have been disclosed herein in conjunction with the foregoing description and accompanying drawings. It should be understood that describing and illustrating each combination and sub-combination of these examples literally would be an undue repetition. Therefore, all examples can be combined in any manner and / or combination, and this specification (including the accompanying drawings) should be construed as constituting a complete written description of all combinations and sub-combinations of the examples described herein, as well as the manner and process of their preparation and use, and should support the claims for any such combinations or sub-combinations.

[0026] Those skilled in the art will understand that the examples described herein are not limited to those specifically shown and described above. Furthermore, unless the contrary is mentioned above, it should be noted that all figures are not drawn to scale. Various modifications and variations are possible in accordance with the above teachings.

Claims

1. An apparatus for sensing current in a back-to-back MOSFET configuration, the apparatus comprising: A first MOSFET, the first MOSFET having a gate terminal, a drain terminal and a source terminal; The second MOSFET has a source terminal, a second gate terminal, and a second drain terminal, the source terminal being coupled to the source terminal of the first MOSFET; A gate driver circuit, the gate driver circuit including at least one gate drive output terminal, for outputting a gate drive signal to the gate terminal of the first MOSFET and the gate terminal of the second MOSFET; as well as A shunt resistor is coupled between the source terminal of the first MOSFET and the source terminal of the second MOSFET; The gate driver circuit includes a return terminal coupled to the source terminal of the first MOSFET; and The return current from the gate terminal of the second MOSFET flows through the shunt resistor to the return terminal of the gate driver circuit.

2. The apparatus of claim 1, wherein the gate driver circuit includes an input terminal for receiving a control signal; and The gate driver circuit therein outputs the gate drive signal based on the control signal.

3. The apparatus of claim 1, wherein the drain terminal of the first MOSFET is coupled to a voltage source, and the drain terminal of the second MOSFET is coupled to a load.

4. The apparatus according to claim 3, wherein the voltage source is an AC voltage source.

5. The apparatus of claim 1, wherein the apparatus includes an operational amplifier coupled to the shunt resistor to detect a voltage drop across the shunt resistor in order to detect a current through the shunt resistor.

6. The apparatus of claim 1, wherein the at least one gate drive output terminal comprises a first output terminal and a second output terminal; and The first output terminal is coupled to the second output terminal via at least one corresponding gate driver output resistor to output the gate drive signal to the gate terminal of the first MOSFET and the gate terminal of the second MOSFET.

7. The apparatus according to claim 1, wherein the apparatus comprises: A first gate resistor is coupled between the gate terminal of the first MOSFET and the at least one gate drive output terminal; and A second gate resistor is coupled between the gate terminal of the second MOSFET and the at least one gate drive output terminal.

8. The apparatus of claim 6, wherein the resistance of the first gate resistor is greater than the resistance of the second gate resistor.

9. The apparatus of claim 6, the apparatus comprising a first gate capacitor having a first terminal coupled to a common voltage and a second terminal coupled between the gate terminal of the first MOSFET and the first gate resistor.

10. A method for sensing current in a back-to-back MOSFET configuration, the method comprising: A gate drive signal is generated by the gate driver circuit to drive the gate terminal of the first MOSFET and the gate terminal of the second MOSFET. A gate drive signal return path is formed from the source terminal of the second MOSFET through a shunt resistor coupled between the source terminal of the second MOSFET and the source terminal of the first MOSFET to the return terminal of the gate driver circuit; as well as The current passing through the shunt resistor is sensed.

11. The method of claim 10, comprising: Receive control signals; The gate drive signal is generated based on the control signal.

12. The method according to claim 10, wherein the method comprises: An input voltage is supplied to the drain terminal of the first MOSFET; as well as It provides output current to the load coupled to the drain terminal of the second MOSFET.

13. The method of claim 12, wherein the input voltage is an AC voltage, and The gate drive signal turns on the second MOSFET based on the polarity of the AC voltage.

14. The method of claim 10, wherein sensing the current through the shunt resistor comprises: An operational amplifier coupled to the shunt resistor is used to detect the voltage drop across the shunt resistor and output a signal corresponding to the current flowing through the shunt resistor.

15. An apparatus for sensing current in a back-to-back MOSFET configuration, the apparatus comprising: A first MOSFET, the first MOSFET having a gate terminal, a drain terminal and a source terminal; A second MOSFET has a source terminal, a gate terminal, and a drain terminal, the source terminal being coupled to the source terminal of the first MOSFET; A gate driver circuit, the gate driver circuit including an input terminal and at least one gate drive output terminal, the input terminal being used to receive a control signal, and the at least one gate drive output terminal being used to output a gate drive signal to the gate terminal of the first MOSFET and the gate terminal of the second MOSFET based on the control signal; A shunt resistor is coupled between the source terminal of the first MOSFET and the source terminal of the second MOSFET; A first gate resistor is coupled between the gate terminal of the first MOSFET and the at least one gate drive output terminal; and A second gate resistor is coupled between the gate terminal of the second MOSFET and the at least one gate drive output terminal; The gate driver circuit includes a return terminal coupled to the source terminal of the first MOSFET; and The gate drive return current from the gate terminal of the second MOSFET flows through the shunt resistor to the return terminal of the gate driver circuit.

16. The apparatus of claim 15, wherein the drain terminal of the first MOSFET is coupled to a voltage source, and the drain terminal of the second MOSFET is coupled to a load.

17. The apparatus of claim 16, wherein the voltage source is an AC voltage source.

18. The apparatus of claim 15, the apparatus comprising an operational amplifier coupled to the shunt resistor to detect a voltage drop across the shunt resistor in order to detect a current through the shunt resistor.

19. The apparatus of claim 15, wherein the at least one gate drive output terminal comprises a first output terminal and a second output terminal; and The first output terminal is coupled to the second output terminal through a corresponding gate driver output resistor to output the gate drive signal to the gate terminal of the first MOSFET and the gate terminal of the second MOSFET.

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