Three-coordinate measurement error compensation method for automobile parts

Abstract

The present application belongs to the field of three-coordinate measurement technology, and particularly relates to a three-coordinate measurement error compensation method for automobile parts, which comprises the following steps: acquiring a three-coordinate original measurement data sequence of automobile parts carrying a time stamp and a measurement point identifier, identifying a reference measurement point to acquire a preset reference coordinate and calculating a reference measurement residual sequence; adjusting an interpolation smoothing intensity factor according to a time interval and fluctuation energy, and resampling into a high-frequency residual data sequence with uniform time; processing coordinate axis residual components by using a feedforward pipeline integral stage, and completing intermediate accumulation and pipeline carry correction through a preceding accumulation unit and a lag correction unit; sending the integral output sequence into a multi-phase comb stage differential extraction, feeding back a truncation error by using a quantization noise shaping loop, and reconstructing a three-axis error signal sequence; and obtaining a compensated coordinate value in combination with the original measurement data sequence. The present application improves the three-axis error reconstruction precision and reduces systematic displacement deviation in the continuous measurement process of automobile parts.

Description

Technical Field

[0001] This invention relates to the field of coordinate measuring technology. More specifically, this invention relates to a method for compensating for errors in coordinate measuring of automotive parts. Background Technology

[0002] Coordinate measuring machines (CMMs), as high-precision spatial dimension and geometric tolerance inspection equipment, are commonly used in quality inspection and reverse engineering of key components such as automotive engine blocks, precision gears, and curved surface covers. During industrial field measurements, factors such as fluctuating ambient temperature, thermal deformation of the CMM's mechanical structure, friction and wear of the moving guide rails, and low-frequency external vibrations all contribute to the measurement system, causing slowly varying systematic drift errors to be superimposed on the 3D coordinate data acquired by the probe. Especially during continuous scanning or multi-point triggered measurements, the original measurement data often exhibits a non-uniform distribution on the time axis due to the sampling mechanism of the CMM's CNC system and the probe's trigger response characteristics; the timestamp intervals between adjacent measurement points are not fixed. If a fixed-parameter resampling method is directly used for homogenization, interpolation distortion, local overshoot, or residual signal distortion can easily occur in areas with large local data fluctuations or abrupt changes in sampling intervals, affecting the accuracy of subsequent drift error identification and compensation.

[0003] Existing technologies for front-end processing of non-uniform measurement data typically employ fixed smoothing parameters or fixed interpolation models. These models struggle to adaptively adjust based on the time span of adjacent data points, short-term fluctuation energy, and changes in measurement residuals, leading to unstable quality of the high-frequency residual sequence after resampling. In terms of hardware logic and underlying algorithm implementation, traditional CIC filters often use large-bit-width accumulators with serial carry in their integration stages. When dealing with high-frequency, large-scale coordinate measuring machine (CMM) measurement data, the carry propagation delay caused by the long-bit-width accumulation creates a significant pipeline timing bottleneck, limiting the system's stable operating frequency and reducing data throughput. Furthermore, CIC filters generate significant bit-width increases during multi-stage integration operations. Existing solutions often truncate the output at the comb stage or directly at the output, easily introducing truncation quantization noise. Without an error feedback shaping mechanism, low-frequency drift error signals may be affected by quantization noise, resulting in decreased accuracy of the reconstructed three-axis error signals. These problems combine to make it difficult for existing solutions to balance data processing throughput efficiency and coordinate measuring machine error compensation accuracy under non-constant temperature, high-frequency continuous measurement conditions, failing to fully meet the application requirements for high-precision measurement compensation of critical automotive components. Summary of the Invention

[0004] To address the technical problems of non-uniform sampling resampling distortion, large carry delay of large bit-width integral accumulation, high noise of direct truncation quantization, and insufficient reconstruction accuracy of low-frequency drift error in existing technologies, this invention provides a method for compensating for errors in coordinate measuring machines of automotive parts.

[0005] This invention provides a method for compensating for coordinate measuring machine (CMM) errors in automotive parts, comprising: S1: acquiring a sequence of original CMM measurement data for automotive parts carrying timestamps and measurement point identifiers; identifying reference measurement data corresponding to preset reference measurement points from the original measurement data sequence; acquiring corresponding preset reference coordinates based on the measurement point identifiers and calculating the reference measurement residual sequence; resampling the reference measurement residual sequence into a time-uniform high-frequency residual data sequence by positively adjusting the interpolation smoothing intensity factor according to the timestamp interval between adjacent residual points and the short-term fluctuation energy; S2: independently processing the three coordinate axis residual components of the high-frequency residual data sequence, and using a feedforward pipeline integration stage to process the coordinate axes. The residual components are accumulated. The integrator stage is divided into M advance accumulation units and M lag correction units. The advance accumulation units calculate the intermediate accumulation results without the carry from the previous stage. The lag correction units perform pipelined carry propagation correction on the intermediate accumulation results to obtain the integral output sequence. S3: The integral output sequence is sent to the N-stage multiphase comb stage for differential decimation. A quantization noise shaping loop is set between the register and the differential arithmetic unit. The truncation error of the previous step is fed back and superimposed on the current input. The decimation result is upsampled by the interpolation stage and combined with gain compensation to reconstruct the triaxial error signal sequence. Based on the triaxial error signal sequence and the original measurement data sequence, the compensated coordinate values ​​are obtained.

[0006] By adopting the above technical solutions, this invention solves the interpolation distortion problem caused by non-uniform sampling of measurement data on the time axis through adaptive smoothing adjustment based on short-term fluctuation energy, combined with a pipelined integration architecture consisting of advance accumulation and hysteresis correction, and multiphase comb processing with quantization noise shaping loop. It breaks through the timing bottleneck caused by carry propagation delay in traditional large-bit-width accumulators and suppresses the interference of filter truncation quantization noise on low-frequency drift signals. Under complex non-constant temperature conditions, it achieves deep decoupling and synergistic improvement of high-frequency data processing throughput efficiency and triaxial error reconstruction accuracy, significantly reducing systematic displacement deviations during continuous measurement of automotive parts.

[0007] Preferably, acquiring the original three-coordinate measurement data sequence of automotive parts carrying timestamps and measurement point identifiers includes: triggering a photoelectric position encoding and decoding chip using a trigger jump pulse signal generated by the measuring machine, reading the grating displacement of the orthogonal mechanical running coordinate trajectory and converting it into absolute distance discrete positioning parameters; extracting the edge time of the trigger pulse as a time reference, adding timestamp features to the absolute distance discrete positioning parameters, and generating measurement point identifiers according to the measurement program; combining orthogonal coordinates with records at the same time to construct a combined positioning point dataset, writing the measurement point identifiers into the combined positioning point dataset and using them as index keys to call preset reference coordinates when the measurement point identifiers correspond to preset reference measurement points, and arranging and storing the combined positioning point datasets in the input queue storage area to form the original measurement data sequence.

[0008] Preferably, the benchmark measurement residual sequence is resampled into a time-uniform high-frequency residual data sequence by positively adjusting the interpolation smoothing intensity factor based on the timestamp interval of adjacent residual points and the short-term fluctuation energy. This includes: calculating the timestamp interval of adjacent benchmark measurement residual vectors to obtain a normalized time interval; extracting the short-term fluctuation energy within a local window using the Teager-Kaiser energy operator to obtain normalized short-term fluctuation energy; weighting and summing the basic smoothing intensity coefficient, the normalized time interval, and the normalized short-term fluctuation energy and limiting the amplitude to obtain the interpolation smoothing intensity factor; constructing a univariate spline interpolation function with the timestamp of the benchmark measurement residual sequence as the independent variable and the coordinate axis residual components as the dependent variable; determining the smoothing parameters for spline fitting based on the interpolation smoothing intensity factor; generating a uniform time grid according to a preset resampling period; and calculating the triaxial residual interpolation results on the uniform time grid to obtain the high-frequency residual data sequence.

[0009] By employing the above technical solution, this invention utilizes the Teager-Kaiser energy operator to capture transient fluctuations in the residual signal and dynamically determines the smoothing parameters by combining them with a normalized time interval, thereby achieving adaptive resampling of the reference residual signal. This effectively prevents interpolation overshoot or pseudo-high-frequency oscillations in sparse data regions, while preserving the true local gradual variation characteristics of the residual signal in dense data regions, significantly improving the characterization quality of high-frequency residual data sequences.

[0010] Preferably, the integrator stage is divided into M advance accumulation units and M hysteresis correction units, including: acquiring single-axis coordinate residual component data transmitted via a parallel data bus; dividing the single-axis coordinate residual component data into M independent data segments with the same bit width by bit slicing according to the bit width; and inputting the M independent data segments into an isolated array structure composed of M advance accumulation units to perform parallel independent accumulation processing.

[0011] By employing the above technical solution, this invention uses bit segmentation technology to split large-bit-width coordinate residual data into independent data segments and perform parallel accumulation, thus cutting off the long-path lateral carry connections that limit the operating frequency in conventional large-bit-width adders. This reduces the logic gate latency of the critical path and greatly improves the upper limit of the clock frequency and the real-time response speed of the system when processing high-frequency, large-scale automotive part measurement data.

[0012] Preferably, the calculation of the intermediate accumulation result without the carry from the previous stage in the advance accumulation unit includes: based on the look-ahead expansion algorithm, performing addition operations on each independent data segment and the previous accumulation value stored in the corresponding accumulator register; detecting the highest bit carry overflow data generated by the addition operation as a carry flag, extracting and storing it in the carry register, storing the intermediate accumulation result in the data delay register, so that the intermediate accumulation result and the carry flag are kept in pipeline synchronization; removing the highest bit carry overflow data, retaining the remaining truncated part as the intermediate accumulation result without carry and outputting it to the next stage.

[0013] Preferably, the hysteresis correction unit performs pipelined carry propagation correction on the intermediate accumulation result, including: synchronously receiving the carry flag transmitted to the carry register by the advance accumulation unit that processes adjacent low-order data segments in the same data beat; synchronously reading the intermediate accumulation result of adjacent high-order data segments, aligning the carry flag with the lowest weight bit of the intermediate accumulation result of the high-order data segment; performing a carry addition operation after alignment, processing the resulting secondary carry chain overflow to obtain the accumulation value of the current data segment; concatenating the accumulation values ​​of M data segments to obtain the full-width accumulation value, and storing it in the pipeline output register.

[0014] Preferably, the process of processing the generated secondary carry chain overflow to obtain the accumulated value of the current data segment includes: configuring a Manchester carry chain structure in the hysteresis correction unit; when the application of the carry flag triggers a secondary carry chain overflow, using the Manchester carry chain structure to conduct and eliminate the secondary carry overflow signal in the local adder network, and outputting the corrected accumulated value of the data segment.

[0015] Preferably, the truncation error from the previous cycle is fed back and superimposed onto the current input, including: when truncating the calculation result, extracting the truncated low-order data segment as the truncation quantization error; storing the truncation quantization error in the feedback delay register for single-cycle delay retention; and when the next pipeline cycle is executed, calling the delayed truncation quantization error from the feedback delay register, aligning it with the original bit weight dimension at the time of truncation, and superimposing it onto the current cycle input data as a compensation amount.

[0016] By employing the above technical solution, this invention achieves high-pass filtering and shaping of quantization noise by superimposing the truncation error feedback onto the current input to construct a noise shaping circuit. This effectively transfers the truncation noise energy, originally concentrated in the low-frequency band, to the high-frequency region, eliminating the spectral pollution of the three-axis low-frequency drift error signal by quantization noise and improving the signal-to-noise ratio and resolution of the reconstructed error signal.

[0017] Preferably, the compensated coordinate values ​​are obtained based on the triaxial error signal sequence and the original measurement data sequence, including: reading the original measurement data sequence with timestamps retained from the data cache queue; matching and aligning the original measurement data sequence with the triaxial error signal sequence in the time dimension according to the timestamp label; and performing a three-dimensional vector subtraction operation on the original three-coordinate data vector and the corresponding triaxial error signal vector at the matched and aligned time nodes to output the compensated three-coordinate measurement dataset.

[0018] Preferably, the original measurement data sequence and the triaxial error signal sequence are matched and aligned in the time dimension according to the timestamp label, including: using a binary search algorithm, using the timestamp of the original measurement data sequence as the search key, to find two adjacent consecutive time nodes in the time grid of the triaxial error signal sequence; and performing interpolation operation according to the time distance weight to obtain the error component data mapped to the original measurement time node.

[0019] By adopting the above technical solution, this invention employs a binary search combined with a time-distance weighted interpolation mechanism to achieve accurate mapping of uniform time grid error signals to discrete measurement time nodes. This eliminates the compensation time lag caused by sampling rate mismatch, ensuring that each set of original measurement data receives strictly synchronized error correction, and further converges the compensated coordinate residuals.

[0020] The technical solution of the present invention has the following beneficial technical effects:

[0021] This invention acquires the original three-coordinate measurement data sequence of automotive parts carrying timestamps and measurement point identifiers, identifies the benchmark measurement data corresponding to preset benchmark measurement points, calculates the benchmark measurement residual sequence, and then resamples the benchmark measurement residual sequence into a time-uniform high-frequency residual data sequence. In this process, the invention utilizes the timestamp interval between adjacent benchmark residual points and short-term fluctuation energy to positively enhance the interpolation smoothing intensity factor, thereby effectively reducing the impact of non-uniform sampling and local transient disturbances on the quality of residual signal reconstruction. For the three coordinate axis residual components of the high-frequency residual data sequence, the invention adopts an independent processing method, using a feedforward pipeline integral stage based on a lead-out expansion algorithm for accumulation operations. A hardware architecture that separates lead accumulation and hysteresis correction shortens the carry propagation delay of the critical path, thus significantly improving the throughput of high-frequency large-scale data processing. During the differential decimation process at the multiphase comb stage, the invention constructs a quantization noise shaping loop to delay and feed back the truncation error generated in the previous step and superimpose it onto the current input data, thereby suppressing the interference of quantization noise on the low-frequency drift error reconstruction process. Finally, by performing upsampling, gain compensation, and timestamp-based interpolation mapping, this invention can reconstruct an accurate triaxial error signal sequence, match and align it with the original measurement data sequence in the time dimension, and then perform a three-dimensional vector subtraction operation. This significantly reduces the impact of low-frequency drift error on the three-coordinate measurement results of automotive parts, ultimately improving the accuracy of measurement compensation and the operational reliability of the system. Attached Figure Description

[0022] Figure 1 This is a flowchart of the method for compensating for errors in the coordinate measuring machine of automotive parts in this invention; Figure 2 This is a diagram illustrating the burst bandwidth assessment of memory. Figure 3 This is a schematic diagram illustrating thermal drift error tracking over time. Figure 4 This is a diagram comparing performance and accuracy. Detailed Implementation

[0023] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0024] This invention discloses a method for compensating for errors in coordinate measuring machines (CMMs) of automotive parts. (Refer to...) Figure 1 This includes steps S1-S3: S1, acquire the original data and resample it into a high-frequency residual sequence.

[0025] The system acquires the original three-coordinate measurement data sequence of automotive parts carrying timestamps and measurement point identifiers. It identifies the benchmark measurement data corresponding to the preset benchmark measurement points from the original measurement data sequence, obtains the corresponding preset benchmark coordinates based on the measurement point identifiers, and calculates the benchmark measurement residual sequence. Based on the timestamp interval between adjacent residual points and the short-term fluctuation energy, the interpolation smoothing intensity factor is positively adjusted, and the benchmark measurement residual sequence is resampled into a time-uniform high-frequency residual data sequence.

[0026] In the specific execution process, the system first reads the set of three-dimensional spatial coordinate points output by the coordinate measuring machine's main control board, which includes nanosecond-level system timestamps, measurement point identifiers, and X-axis, Y-axis, and Z-axis coordinate values, thus forming the original measurement data sequence. Subsequently, the underlying system parses the timestamps, measurement point identifiers, and X-axis, Y-axis, and Z-axis coordinate values ​​of each frame of data in the original measurement data sequence, and matches the measurement point identifiers with a pre-established table of reference measurement point numbers. When the matching result indicates that the current measurement point belongs to a preset reference measurement point, the system automatically extracts the corresponding measured three-dimensional coordinates as the reference measurement data. Next, based on the measurement point identifier, the system retrieves the corresponding preset reference coordinates from the measurement program, standard part calibration table, or reference coordinate database, and subtracts the measured three-dimensional coordinates from the preset reference coordinates axis by axis to obtain a reference measurement residual vector containing X-axis, Y-axis, and Z-axis residuals. These residuals are then arranged in chronological order according to their timestamps to form a reference measurement residual sequence.

[0027] To achieve adaptive smooth adjustment and overcome distortion issues caused by non-uniform sampling, the system calculates the timestamp interval between adjacent reference measurement residual vectors and divides this interval by the maximum timestamp interval in the reference measurement residual sequence to obtain the normalized time interval. Simultaneously, the system calculates the Euclidean residual change between adjacent reference measurement residual vectors and uses the Teager-Kaiser energy operator to extract short-term fluctuation energy within a local window. This short-term fluctuation energy is then divided by the sum of the maximum short-term fluctuation energy and a preset small constant to obtain the normalized short-term fluctuation energy. This preset small constant is used to prevent division-to-zero anomalies in extreme conditions where the sensor is completely stationary or the signal-to-noise ratio is extremely low, causing local residual fluctuation energy to approach zero. Its value is set to three times the variance of the background noise calculated from at least 1000 residual sample points collected when the measuring machine is stationary, with a typical range of values. to This ensures that the normalized short-term fluctuation energy naturally approaches zero under this extreme condition, indicating that the current measurement environment is extremely stable and requires no additional smoothing enhancement. Based on this, the system accurately calculates the interpolation smoothing intensity factor using a weighted summation and amplitude limiting method, based on the basic smoothing intensity coefficient, normalized time interval, normalized short-term fluctuation energy, and corresponding empirical weight coefficients. Specifically, the positive adjustment mechanism is as follows: when the timestamp interval between adjacent reference measurement residual points increases or the short-term fluctuation energy rises, the system automatically increases the interpolation smoothing intensity factor of the corresponding local interval to enhance the smoothing constraint of that local interval and prevent overshooting of the interpolated waveform; conversely, when the timestamp interval is small and the short-term fluctuation energy is low, the system correspondingly decreases the interpolation smoothing intensity factor of the corresponding local interval to fully preserve the original local gradual variation characteristics of the residual signal. Without the aforementioned adaptive smoothing adjustment, under extreme conditions such as abrupt changes in the spacing between measurement points or severe local vibrations, the fixed-parameter interpolation method will be unable to distinguish between sparse and dense data regions. This will result in severe interpolation overshoot or pseudo-high-frequency oscillations in sparse data regions, which will then introduce false residual fluctuations into the subsequent integral filtering link, causing an uncontrollable shift in the final low-frequency drift error estimate.

[0028] After deriving the interpolation smoothing intensity factor, the system constructs a univariate spline interpolation function using the timestamps of the benchmark measurement residual sequence as independent variables and the residual components of the X, Y, and Z axes as dependent variables, respectively. The system then dynamically determines the smoothing parameters or local weights for spline fitting based on the interpolation smoothing intensity factor. Finally, a uniform time grid is generated based on a fixed high-frequency resampling period that meets the preset sampling accuracy requirements. The interpolation results of the three-axis residuals are then calculated on this uniform time grid, ultimately yielding a time-uniform high-frequency residual data sequence.

[0029] In one possible embodiment, the specific process of obtaining the original three-coordinate measurement data sequence of automotive parts carrying timestamps and measurement point identifiers includes: triggering a photoelectric position encoding and decoding chip using a trigger jump pulse signal generated by the measuring machine; reading the grating displacement of the orthogonal mechanical running coordinate trajectory and converting it into absolute distance discrete positioning parameters; extracting the edge time of the trigger pulse as a time reference; adding timestamp features to the absolute distance discrete positioning parameters; and generating measurement point identifiers according to the measurement program; combining orthogonal coordinates with records at the same time to construct a combined positioning point dataset; writing the measurement point identifiers into the combined positioning point dataset and using them as index keys to call preset reference coordinates when the measurement point identifiers correspond to preset reference measurement points; and arranging and storing the combined positioning point datasets in the input queue storage area to form the original measurement data sequence.

[0030] More specifically, the measuring machine probe can employ a piezoelectric sensor or a mechanical microswitch, generating a 5VTTL fixed trigger pulse signal with a rise time of less than 10ns upon contact with the part surface. This pulse signal is directly connected to the external hardware interrupt pin of an FPGA-based or dedicated ASIC-based photoelectric position encoder / decoder chip. The chip responds to the interrupt and quickly latches the real-time count values ​​of the grating rulers on the three orthogonal axes (X, Y, and Z axes) within a single clock cycle. Through a built-in subdivision algorithm and preset calibration coefficients, such as setting the subdivision resolution to 0.1 micrometers per pulse, the displacement pulse count is accurately converted into discrete positioning parameters of absolute distance. Simultaneously, the system timer driven by a 1GHz high-frequency crystal oscillator automatically latches the current 64-bit global timestamp register value as the time base for this trigger when the pulse rises, strictly controlling the synchronization accuracy within ±5ns. This timestamp value and the measurement point identifier are appended to the header of the three-axis positioning parameter message, thus forming a complete data frame structure. After forming the data frame structure, the system matches the measurement point identifier with the pre-stored reference measurement point number table. If the match is successful, it reads the preset reference coordinates corresponding to the measurement point identifier from the measurement program, standard part calibration table or reference coordinate database, and establishes a close correspondence mapping relationship between the timestamp, measurement point identifier, measured three-dimensional coordinates and the corresponding preset reference coordinates.

[0031] In the subsequent data integration and storage stage, the underlying processing system performs word-aligned combination of the extracted 32-bit fixed-point or floating-point coordinate data of the X, Y, and Z axes, along with a 64-bit timestamp and a preset-width measurement point identifier field, to form a combined positioning point dataset of at least 160 bits. To ensure that no data frame loss or out-of-order phenomena occur during continuous 3D scanning measurements, based on the ratio of the maximum data block size of a single burst transmission to the bit width of a single combined positioning point dataset, this at least 160-bit combined positioning point dataset is sequentially pushed into a dual-port first-in-first-out input queue storage area with a depth set to 4096 or 8192. This depth value is set to an integer multiple of the minimum number of data frames required for burst transmission, thereby forming a continuous data sequence. The read / write pointers of this queue storage area are managed by independent hardware logic. When the amount of data written reaches 50% of the set depth of the queue storage area, i.e., reaching the half-full threshold of 2048 or 4096, the controller will automatically move the data sequence to the DDR4 memory cache in block transfer mode through the direct memory access channel. At this time, the burst transfer bandwidth can reach up to 2GB / s, thereby greatly improving the timing determinism of the original coordinate data, measurement point markers, and timestamps during the acquisition and queuing process at the hardware level. The burst transfer bandwidth of the memory is evaluated as follows: Figure 2 As shown.

[0032] In another possible embodiment, the specific process of resampling the benchmark measurement residual sequence into a time-uniform high-frequency residual data sequence by positively adjusting the interpolation smoothing intensity factor based on the timestamp interval of adjacent residual points and short-term fluctuation energy includes: calculating the timestamp interval between adjacent benchmark measurement residual vectors to obtain a normalized time interval; extracting short-term fluctuation energy within a local window using the Teager-Kaiser energy operator to obtain normalized short-term fluctuation energy; performing a weighted summation and amplitude limiting based on the basic smoothing intensity coefficient, normalized time interval, and normalized short-term fluctuation energy to obtain the interpolation smoothing intensity factor; constructing a univariate spline interpolation function with the timestamp of the benchmark measurement residual sequence as the independent variable and the coordinate axis residual components as the dependent variable; determining the smoothing parameters for spline fitting based on the interpolation smoothing intensity factor; generating a uniform time grid according to a preset resampling period; and calculating the triaxial residual interpolation results on the uniform time grid to obtain the high-frequency residual data sequence.

[0033] To ensure the algorithm has a sufficiently open underlying foundation, the basic smoothing strength coefficient is set as the reciprocal of the static noise variance calibrated at the measuring machine's factory. The empirical weighting coefficients are set as complementary proportions: 40% to 60% for the normalized time interval and 40% to 60% for the normalized short-term fluctuation energy. This balances the respective contributions of time span and data fluctuation to the smoothing effect. The core mechanism of the Teager-Kaiser energy operator lies in its ability to simultaneously provide extremely fast transient responses to changes in signal amplitude and frequency. By performing nonlinear combination calculations on three consecutive residual sample points within a local window, it accurately captures abrupt changes in residual signals caused by low-frequency external vibrations or sudden mechanical friction under non-constant temperature workshop conditions. When the spacing between measurement points is too large, leading to an increase in the normalized time interval, or when severe local dynamic disturbances cause an increase in the normalized short-term fluctuation energy, the weighted summation value tends to increase. In this case, a limiting logic is used to lock it within a maximum smoothing safety threshold set at three times the basic smoothing strength coefficient, thereby positively enhancing the calculated interpolation smoothing strength factor.

[0034] This enhancement directly increases the smoothing penalty constraint in the univariate spline interpolation function, forcing the fitted curve to be smoother in areas of high volatility or sparse data, effectively suppressing local overshoot, residual distortion, or pseudo-high-frequency noise. In dense and stable regions, the smoothing penalty constraint decreases, allowing the spline function to approximate the measured residual trajectory with high accuracy. Finally, the uniform time grid of the resampling period is generated by a system hardware timer at a fixed frequency, ensuring that the output high-frequency residual data sequence has absolutely equal intervals on the time axis, providing a standard and stable data source for subsequent processing stages.

[0035] S2 executes pipelined integration and accumulation to obtain the integral output sequence.

[0036] The residual components of the three coordinate axes of the high-frequency residual data sequence are processed independently. The coordinate axis residual components are accumulated using a feedforward pipelined integrator. The integrator is divided into M advance accumulation units and M lag correction units. The advance accumulation units calculate the intermediate accumulation results without the carry from the previous stage. The lag correction units perform pipelined carry propagation correction on the intermediate accumulation results to obtain the integral output sequence.

[0037] In the actual execution process, since coordinate measuring machine measurement involves three mutually orthogonal spatial dimensions—X-axis, Y-axis, and Z-axis—the system first allocates three independent system-level processor threads, each taking over the corresponding one-dimensional residual data stream in the high-frequency residual data sequence. Within each thread, the system initializes a two's complement register with a bit width of W as the basic storage unit for the accumulator. To achieve high-speed accumulation of large-scale residual data and eliminate long-bit-width carry propagation delay, the system adopts a feedforward pipelined integration architecture at the hardware timing level. For the input high-frequency residual data sequence, the integration stage does not use a traditional large-bit-width adder for overall serial accumulation at the hardware level, but instead splits it into a two-stage pipeline of a look-ahead accumulation network and a hysteresis correction network. Among them, multiple look-ahead accumulation units form an isolated array structure, each taking over different bit-weighted segments of data after bit slicing of a single frame of residual data. Without receiving low-bit carry signals from the previous stage, they independently and concurrently calculate the intermediate accumulation results of each data segment. Subsequently, a parallel prefix network composed of multiple hysteresis correction units performs global timing coordination and carry correction on these intermediate accumulation results. By completing cross-segment carry propagation and elimination within the same pipeline step, the correction and merging of multiple local results into the global full-width accumulation value is achieved. All the above addition operations uniformly adopt the modulus under W-bit two's complement. The truncated surround adder logic is designed to utilize the inherent overflow truncation characteristics of digital circuits to maintain the constant integral gain of the digital filter, thereby naturally generating the poles of the infinite impulse response within the finite word length register range. At the same time, it effectively avoids the numerical overflow expansion problem caused by the infinite growth of the accumulated value. Together with the subsequent comb stage, it forms a bounded equivalent filter output sequence.

[0038] Within the parallel prefix summation framework of the aforementioned algorithm layer, to further overcome the bottleneck limitation of carry propagation delay in long-bit-width accumulators on system clock frequency, this embodiment splits the accumulator of the integration stage into a two-stage pipeline architecture of look-ahead accumulation and hysteresis correction at the hardware implementation level. In one possible embodiment, the specific implementation of the aforementioned integration stage divided into M look-ahead accumulation units and M hysteresis correction units includes: acquiring single-axis coordinate residual component data transmitted via a parallel data bus; dividing the single-axis coordinate residual component data into M independent data segments of the same bit width by bit slicing according to bit width; and inputting the M independent data segments into an isolated array structure composed of M look-ahead accumulation units to perform parallel independent accumulation processing.

[0039] More specifically, at the receiving end, the system synchronously acquires single-axis coordinate residual component data via a parallel data bus such as AXI4 with a bus width of W, at a system clock frequency of 200MHz. Within the hardware logic of the FPGA or application-specific integrated circuit, the system employs hard-wired bit slicing technology to divide the total input bit width W into M equal-length data segments. Taking a typical configuration with an input bit width of 64 bits and M set to 4 as an example, the system splits the 64-bit input bus data into four independent data segments, each with a bit width of 16 bits. The core advantage of this bit-width segmentation method is that it eliminates the need for additional clock cycles or logic gate operations, achieving zero-latency data decomposition entirely at the underlying routing remapping level, thus ensuring strict alignment and synchronization of each data segment on the time axis.

[0040] Next, the system routes the M independent data segments to an isolated look-ahead accumulator array composed of underlying logic gates. This array contains M completely independent adder logic macrocells, with no lateral carry connections or data dependencies between cells, thus eliminating the critical path delay that limits system operating frequency in conventional large-width adders. Each look-ahead accumulator unit consists of a local look-ahead adder and a register loop, independently performing the accumulation operation on its respective data segment using its independent local routing resources. The addition calculations for different data segments are initiated in parallel without interference by the same rising clock edge, thereby achieving non-blocking segmented processing of the three-coordinate residual data in a high-frequency operating environment.

[0041] In one possible embodiment, the specific process of the aforementioned look-ahead accumulator unit calculating the intermediate accumulation result without the carry from the previous stage includes: based on the look-ahead expansion algorithm, performing addition operations on each independent data segment and the previous accumulation value stored in the corresponding accumulator register; detecting the highest bit carry overflow data generated by the addition operation as a carry flag, extracting and storing it in the carry register, storing the intermediate accumulation result in the data delay register, so that the intermediate accumulation result and the carry flag are kept in pipeline synchronization; removing the highest bit carry overflow data, retaining the remaining truncated part as the intermediate accumulation result without carry and outputting it to the next stage.

[0042] More specifically, within the execution window of a single pipeline cycle, each parallel-deployed look-ahead accumulator unit, based on a hardware-level look-ahead expansion algorithm, calls a local adder optimized for fixed-point arithmetic to add the independent data segments input in the current clock cycle to the accumulated value of the previous clock cycle held in the feedback loop of the unit's local register. Because this step cuts off carry signals from adjacent lower-order processing modules, the computational delay path is compressed to the logic gate toggling time of only the local adder within that unit, significantly increasing the upper limit of the single-stage pipeline's operating frequency. To reliably detect local arithmetic overflow, the system configures the adder's output bit width to be the data segment bit width plus 1, enabling the adder to synchronously compute an intermediate result vector containing both the local bit sum and potential carry characteristic signals within a single clock cycle.

[0043] Based on this, the system utilizes the inherent bit-by-bit splitting function in the hardware circuit structure to extract the carry overflow data located at the highest weight bit from the intermediate result vector. Subsequently, the system latches this carry flag into a dedicated 1-bit D flip-flop on the falling edge of the current cycle for precise timing maintenance. Simultaneously, the intermediate accumulation results corresponding to each independent data segment are synchronously written to the corresponding data delay register. This ensures that the low-bit carry flag and the high-bit intermediate accumulation result corresponding to the same input data cycle maintain strict synchronization in subsequent pipeline cycles, so that it can be accurately transmitted to the hysteresis correction unit responsible for processing adjacent higher-bit data segments in the next pipeline clock cycle. Finally, the system truncates and removes the highest-weight bit at the hardware pin output, retaining only the lower data segment as the intermediate accumulation result within the current cycle that does not contain a carry from the previous stage.

[0044] In one possible embodiment, the specific process of the aforementioned hysteresis correction unit performing pipelined carry propagation correction on the intermediate accumulation result includes: synchronously receiving the carry flag transmitted to the carry register by the advance accumulation unit processing adjacent low-order data segments in the same data beat; synchronously reading the intermediate accumulation result of adjacent high-order data segments and aligning the carry flag with the lowest weight bit of the intermediate accumulation result of the high-order data segment; performing a carry addition operation after alignment, processing the resulting secondary carry chain overflow to obtain the accumulation value of the current data segment; concatenating the accumulation values ​​of M data segments to obtain the full-width accumulation value and storing it in the pipeline output register.

[0045] More specifically, the system deploys the hysteresis correction unit at the second stage of the overall pipeline architecture. It synchronously receives a 1-bit carry flag signal from the delayed output of the carry register, generated by the adjacent low-order pre-accumulator module within the same input data beat. Simultaneously, it reads the intermediate accumulation result of the adjacent high-order data segment belonging to the same input data beat as the carry flag, which is held in the data delay register. Within the current clock cycle, the hardware logic controller uses this 1-bit carry flag as a carry input pin, mapping it to the correction adder network of the corresponding high-order data segment within the same input data beat. At the logic circuit level, this operation is equivalent to applying a fine-tuning correction operation of adding 1 or 0 to the lowest weight bit of the ready intermediate accumulation result, thereby completing cross-segment carry correction in the bit weight dimension and avoiding the risk of carry mismatch between different sampling data beats.

[0046] During the carry correction process described above, when the intermediate accumulated result is at the critical saturation state, applying a carry flag will trigger a secondary carry chain overflow, requiring a dedicated carry chain structure for handling. If a dedicated high-speed carry chain is not used to quickly eliminate this secondary overflow, in continuous high-frequency accumulation scenarios, the secondary overflow will propagate step by step within the cascaded adder network and form a cumulative delay, ultimately resulting in the inability to complete carry correction within a single cycle. This causes the pipeline output register to latch an incorrect accumulated value, leading to a step-like change in the low-frequency drift trend of the entire integrator output, severely compromising the error reconstruction accuracy of the subsequent comb filter.

[0047] In one possible embodiment, the specific process of obtaining the accumulated value of the current data segment from the secondary carry chain overflow generated by the above processing includes configuring a Manchester carry chain structure in the hysteresis correction unit; when the application of the carry flag triggers the secondary carry chain overflow, the secondary carry overflow signal is transmitted and eliminated in the local adder network using the Manchester carry chain structure, and the corrected accumulated value of the data segment is output.

[0048] More specifically, during carry correction by incrementing by 1, if the current intermediate accumulated result is in a critical saturation state (i.e., all data bits are high), applying the carry flag will inevitably trigger a secondary carry-chain overflow. The Manchester carry chain structure configured inside the corrected adder is a high-speed carry chain structure specifically designed for the rapid propagation of carry signals within the adder. Its core mechanism lies in using series-connected transmission gate pairs to form a low-impedance discharge path, allowing the carry signal to propagate from the lowest weight bit to higher bits in an extremely short transit time. This rapidly eliminates secondary overflow propagation within the local adder network and outputs the corrected accumulated value. This mechanism effectively shortens the local carry propagation delay and improves the maximum speed of addition operations.

[0049] After all M hysteresis correction units complete their local carry propagation corrections in parallel within the same clock cycle, the system sequentially concatenates the corrected data segments according to the original bit weight order from high to low, reconstructing them into a full-width accumulated value. Subsequently, the system pushes the reconstructed data into the matching pipeline output register group on the rising edge of the clock, and synchronously writes the corrected accumulated value of each data segment back to the corresponding accumulator register or status register, making it the integral accumulation state for subsequent pipeline cycles, and then further passing it to the subsequent multiphase comb stage for differential operation.

[0050] S3, perform differential extraction and error compensation to obtain the measurement coordinates.

[0051] The integral output sequence is fed into an N-stage multiphase comb stage for differential decimation. A quantization noise shaping circuit is set between the register and the differential arithmetic unit. The truncation error of the previous step is fed back and superimposed onto the current input. The decimation result is upsampled by the interpolation stage and combined with gain compensation to reconstruct the triaxial error signal sequence. Based on the triaxial error signal sequence and the original measurement data sequence, the compensated coordinate values ​​are obtained.

[0052] In the specific execution process, the system first utilizes polyphase network decomposition technology to downsample and segment the integral output sequence of the previous stage according to a preset decimation factor R, simultaneously discarding redundant data generated during the downsampling process. This provides sufficient computational time margin for subsequent filtering at the reduced data rate. Based on this, the system calls the discrete-time differential delay function to generate an N-stage cascaded comb filter structure. The core operation of each stage of the comb filter is to subtract the historical sample value delayed by D clock cycles from the current sample value. Because this differential operation introduces equally spaced zeros distributed on the unit circle in the Z-plane, these zeros can form a precise cancellation relationship with the poles generated by the integrator stage. This transforms the system's amplitude response to low-frequency drift errors from an integral accumulation form to a bounded bandpass form that retains only the gradually changing trend of the error.

[0053] To reduce the data bit width while avoiding quantization noise contamination of low-frequency signals caused by direct truncation, the system calls a right-shift bitwise operation truncation function after each comb-like differential subtraction operation to remove the low-weight bits of the result, thus reducing the system data word length. The value of the low-weight bits discarded in the current step is then stored temporarily as the truncation error in a feedback delay register or a D flip-flop. Next, the system uses an error feedback modulator to add the truncation error stored in the previous step as feedback compensation to the current step's input data. This achieves high-pass filtering and shaping of digital quantization noise, effectively transferring the truncation quantization noise energy, originally concentrated in the DC and low-frequency bands, to the higher-frequency bands that are less of a concern in subsequent system processing. Without introducing the aforementioned truncation error feedback shaping mechanism, during the N-stage comb cascade decimation process, the quantization noise generated by each truncation stage will accumulate and superimpose in the DC to low-frequency band, forming a pseudo-drift component in the same frequency band as the real low-frequency drift error. Under the direct truncation scheme, this pseudo-drift component cannot be separated from the real thermal drift error, resulting in a non-negligible quantization bias superimposed on the reconstructed triaxial error signal sequence, ultimately degrading the coordinate compensation accuracy to the micrometer level.

[0054] During the upsampling and compensation phase, the system invokes a zero-fill upsampling algorithm to proportionally increase the sampling frequency of the decimation result by a factor of R to restore it to the original sampling rate. The upsampled data is then fed into a low-pass finite impulse response anti-mirror filter tuned by the RemezExchange algorithm for interpolation and smoothing filtering to remove the high-frequency mirror components generated during the upsampling process. After filtering, the system multiplies the filtered result by a global static compensation coefficient, which is the negative Nth power of the product of the decimation factor and the delay period, thereby restoring the signal amplitude to the original amplitude scale, ultimately yielding a triaxial error signal sequence.

[0055] During the time alignment stage between the error signal and the original data, the system employs a binary search algorithm. Using the nanosecond-level timestamps carried by each measurement point in the original measurement data sequence as the search key, it quickly finds the two adjacent time nodes closest to the search key within the time grid of the reconstructed triaxial error signal sequence. Linear interpolation or spline interpolation is then performed based on the time distance weight to obtain the error component data accurately mapped to each original measurement time node. Finally, the system subtracts the aligned triaxial error component matrix from the original three-dimensional coordinate matrix, outputting the compensated coordinate values ​​for the automotive parts after reducing the impact of low-frequency thermal deformation and geometric drift errors.

[0056] In the overall process of comb filtering and error compensation described above, the quantization noise shaping circuit has a crucial impact on the reconstruction accuracy of low-frequency drift errors. In one possible embodiment, the specific process of feeding back and superimposing the previous step's truncation error onto the current input includes: when truncating the calculation result, extracting the truncated low-order data segment as the truncation quantization error; storing the truncation quantization error in a feedback delay register for single-step delay retention; and when the next pipeline step is executed, calling the delayed truncation quantization error from the feedback delay register, aligning it according to the original bit weight dimension at the time of truncation, and superimposing it onto the current step's input data as compensation.

[0057] More specifically, during the truncation process of the differential decimator outputting high-width data to adapt to the standard bus of the subsequent register, the hardware logic employs a strategy of retaining the remaining lowest weight bit sequence to accurately characterize the amount of numerical loss during the truncation process. When the system truncates the calculation result to the standard data output bit width, the lower-order bits are no longer simply discarded according to the conventional strategy, but are extracted and set as the truncation quantization error variable for the current clock cycle. Subsequently, the error data is fed into a parallel feedback delay register array operator unit within the same clock cycle through a local bypass channel, and is buffered and delayed with a time step of a single system clock cycle.

[0058] As the data pipeline advances to the next clock cycle and processes new differential input sample data, the logic control unit retrieves the truncation quantization error, which has already completed one clock cycle delay, from the feedback delay register. Before performing the main addition and subtraction operations for the current frame, a dedicated error-compensated multiply-accumulate unit performs strict hardware bit alignment between the lowest weight bits of the error compensation amount and the lowest weight bits of the current input data stream at the input of the hardware addition tree. Then, the system adds this error as an additional initial accumulation term to the current computation link, thus forming a standard first-order error feedback network topology. This mechanism generates a noise transfer function with high-pass characteristics in the frequency domain. It can push and shape some of the low-frequency truncation quantization noise energy in the DC to 0.1 times Nyquist frequency range to the high-frequency region that the measurement system pays less attention to, thereby improving the accuracy of the reconstructed triaxial low-frequency drift error sequence relative to direct truncation processing.

[0059] After completing the high-precision reconstruction of the triaxial error signal sequence, the error signal can be used to compensate the original measurement data. In one possible embodiment, the specific process of obtaining the compensated coordinate values ​​based on the triaxial error signal sequence and the original measurement data sequence includes: reading the original measurement data sequence with timestamps retained from the data buffer queue; matching and aligning the original measurement data sequence with the triaxial error signal sequence in the time dimension according to the timestamp label; and performing a three-dimensional vector subtraction operation on the original three-coordinate data vector and the corresponding triaxial error signal vector at the matched and aligned time nodes to output the compensated three-coordinate measurement dataset.

[0060] More specifically, the industrial control host, via internal high-speed buses such as PCIe, cyclically retrieves the original coordinate measuring machine (CMM) dataset, which retains global timestamps, from the data cache queue in the main memory's circular cache using a continuous memory block read mode. Subsequently, the system invokes a binary search algorithm based on timestamp keys to precisely match and align the unprocessed discrete data sequence with the three-axis low-frequency error signal sequence output from the pipelined filtering and compensation reconstruction link within logarithmic time complexity. The tolerance threshold for time alignment is strictly set by the system software within a single sampling period, ensuring a high degree of consistency between the coordinate system reference states on both sides of the subtraction operation under non-stationary measurement conditions.

[0061] After verifying the successful matching of each pair of timing data nodes, the system invokes the CPU's built-in Single Instruction Multiple Data Stream Vector instruction set or the GPU's parallel computing kernel to synchronously push the original measured coordinate points and the matched three-axis low-frequency drift error components into the floating-point vector arithmetic unit, and concurrently executes double-precision three-dimensional spatial vector subtraction operations. The core purpose of this vector subtraction process is to compensate for systematic drift errors exhibiting low-frequency, slowly varying characteristics caused by factors such as changes in workshop temperature gradients, thermal expansion of mechanical structures, or stress relief. After completing the calculation, the system repackages the newly generated compensated coordinates, outputs a three-coordinate measurement dataset with significantly reduced error impact, and pushes it to the host computer's geometric analysis software via a standard protocol for subsequent form and position tolerance evaluation and reverse engineering reconstruction.

[0062] In the above compensation process, the precise matching and alignment of the original measurement data sequence and the triaxial error signal sequence in the time dimension is a crucial step in ensuring compensation accuracy. In one possible embodiment, the specific process of matching and aligning the original measurement data sequence and the triaxial error signal sequence in the time dimension based on timestamp labels includes: using a binary search algorithm, using the timestamp of the original measurement data sequence as the search key, to find two adjacent consecutive time nodes in the time grid of the triaxial error signal sequence; and performing interpolation operations based on time distance weights to obtain the error component data mapped to the original measurement time nodes.

[0063] More specifically, the system uses the nanosecond-level global timestamps carried by each measuring point in the original measurement data sequence as the search key. It performs a binary search within the uniform time grid after upsampling and recovery of the triaxial error signal sequence to quickly locate the two adjacent time nodes closest to the search key's time value. Let the time value corresponding to the search key be... The time value of the previous node located is And the time value of the next node ,satisfy Based on this, the system uses time distance weights... and and The system calculates the relative time span between points and performs linear interpolation on the error component data at the two consecutive time points to obtain an error estimate that precisely corresponds to the original measurement time. When the error signal exhibits strong nonlinear characteristics in the time dimension, the system can also switch to spline interpolation to construct local interpolation curves between multiple consecutive time points to obtain a more accurate mapping value. Through this time-distance weighted interpolation mechanism, the system accurately maps the triaxial error signal sequence on a uniform time grid to the timestamp position of each original measurement data point, obtaining error component data that corresponds one-to-one with the original measurement data in the time dimension. This provides a time-strictly aligned error correction amount for subsequent vector subtraction compensation.

[0064] To verify the actual effectiveness of the above technical solutions, performance data is presented below through comparative experiments. The experiments used an industrial-grade coordinate measuring machine to perform continuous three-dimensional scanning measurements on high-precision standard gauge blocks. The system clock frequency was set to 200MHz, and the ambient temperature was set to a non-constant temperature workshop condition with a 5℃ temperature gradient to simulate the slow drift caused by heating of mechanical structures in a real production environment. The control group used a traditional large-width global adder and a filtering scheme with direct truncation output; Experimental group one used a pipelined processing scheme based on bit-width segmentation, advance accumulation, and hysteresis correction, but without introducing truncation error feedback; Experimental group two used a complete scheme including truncation error feedback, error reconstruction, and timestamp alignment compensation. All three groups of experiments continuously collected 20,000 discrete positioning parameters and conducted comparative analysis under the same evaluation conditions.

[0065] Experimental results show that, due to the physical limitations of the global carry long path, the highest stable operating frequency of the control group is approximately 110MHz, and the maximum low-frequency drift error in the measurement data reaches 5.2μm. Experimental group one, by cutting the lateral carry connection and introducing a hysteresis correction mechanism, can operate stably at 200MHz, but due to the introduction of low-frequency quantization noise from direct truncation, the maximum three-dimensional position error is approximately 2.8μm. Experimental group two, while maintaining a 200MHz processing throughput, performs single-shot delay feedback and superimposed compensation on the truncated low-order segments, reducing the low-frequency drift error in the reconstructed coordinate measuring machine data to approximately 0.6μm. The thermal drift error tracking over time is as follows: Figure 3 As shown, the performance and accuracy comparison is as follows: Figure 4 As shown.

[0066] In summary, the advanced unfolding and isolated array structure effectively shortens the critical carry path in the large bit-width accumulation process, improving the high-frequency data processing throughput. The truncation quantization error feedback network can transfer low-frequency quantization noise energy to the high-frequency region, thus significantly reducing the impact of quantization noise on drift error reconstruction. Combined with timestamp-based three-dimensional error compensation calculation, this scheme can effectively reduce the impact of low-frequency thermal drift on coordinate measuring machine (CMM) results under non-constant temperature measurement conditions, significantly improving coordinate compensation accuracy compared to traditional direct truncation processing schemes.

[0067] Figure 2 This diagram illustrates the evaluation of burst transfer bandwidth in memory. The bars of varying heights visually demonstrate the evolution of bandwidth as storage depth increases. The image shows a significant increase in bar height as the queue depth increases from 1024 to 4096. When the queue depth reaches 4096 and above, the bandwidth performance stabilizes and remains at the peak level. This demonstrates that increasing the queue buffer depth effectively optimizes the block transfer efficiency of the direct memory access channel. Observing the data performance under high-depth settings reveals that its bandwidth performance is sufficient to support data transfer demands up to 2GB per second. This corresponds to the technical approach described in the specific implementation method of avoiding data frame loss and ensuring timing determinism at high sampling frequencies by setting a deep queue.

[0068] Figure 3This is a schematic diagram illustrating thermal drift error tracking over time. The figure uses three different line types to illustrate the performance differences between different technical solutions. The dotted line represents the performance of the control group using the traditional solution. The dashed line represents the performance of experimental group one. The solid line represents the performance of experimental group two using the complete solution of this invention. The image shows that both the dotted and dashed lines exhibit a clear monotonically increasing trend as the sampling sequence progresses, leading to a sharp increase in positional error at the end of the sequence. Observing the trajectory of the solid line, its fluctuations remain at a low level and do not drift significantly over time. This demonstrates that the quantization noise shaping loop successfully suppresses low-frequency interference caused by truncation. The solid line maintains a physical characteristic below 0.6 micrometers throughout the entire sampling period, corresponding to the technical advantage described in the specific implementation method of achieving sub-micrometer error control through error feedback compensation and time dimension matching.

[0069] Figure 4 This diagram illustrates the performance and accuracy comparison. The fill bars on the left side of each interval represent the maximum stable operating frequency and correspond to the left vertical axis scale. The fill bars on the right side of each interval represent the maximum position error and correspond to the right vertical axis scale. The image shows that the left fill bars in Experimental Group 1 and Experimental Group 2 have the same height, but are significantly higher than those in the control group. This demonstrates that the isolated array structure and segmented accumulation mechanism successfully eliminate the delay caused by the long-path carry chain and increase the system's main frequency. Observing the right fill bars in Experimental Group 2 reveals that their height is only a very small proportion of the right fill bars in the control group and Experimental Group 1. This distribution characteristic, where the operating frequency remains high while the error amplitude is significantly reduced, demonstrates the synergistic effect of pipelined segmented accumulation and the truncation error feedback mechanism. This corresponds to the technical effect described in the specific implementation method, which ensures a high-throughput environment while maintaining measurement compensation accuracy and ultimately solving timing bottlenecks.

[0070] It should be noted that those skilled in the art can make various modifications and improvements without departing from the inventive concept, and these all fall within the scope of protection of this invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for compensating for errors in coordinate measuring machine (CMM) measurements of automotive parts, characterized in that, include: S1: Obtain the original measurement data sequence of the three coordinate measuring machine of the automotive part with timestamp and measurement point identification, identify the benchmark measurement data corresponding to the preset benchmark measurement point from the original measurement data sequence, obtain the corresponding preset benchmark coordinates based on the measurement point identification and calculate the benchmark measurement residual sequence; Based on the timestamp interval of adjacent residual points and the short-term fluctuation energy, the interpolation smoothing intensity factor is positively adjusted to resample the benchmark measurement residual sequence into a time-uniform high-frequency residual data sequence. This includes: calculating the timestamp interval of adjacent benchmark measurement residual vectors to obtain the normalized time interval; extracting the short-term fluctuation energy within a local window using the Teager-Kaiser energy operator to obtain the normalized short-term fluctuation energy; weighting and summing the basic smoothing intensity coefficient, the normalized time interval, and the normalized short-term fluctuation energy, and limiting the amplitude to obtain the interpolation smoothing intensity factor; constructing a univariate spline interpolation function with the timestamp of the benchmark measurement residual sequence as the independent variable and the coordinate axis residual components as the dependent variable; determining the smoothing parameters for spline fitting based on the interpolation smoothing intensity factor; generating a uniform time grid according to a preset resampling period; and calculating the triaxial residual interpolation results on the uniform time grid to obtain the high-frequency residual data sequence. S2: Process the three coordinate axis residual components of the high-frequency residual data sequence independently, and accumulate the coordinate axis residual components using a feedforward pipeline integration stage; The integrator stage is divided into M advance accumulation units and M hysteresis correction units, including: acquiring single-axis coordinate residual component data transmitted via a parallel data bus; dividing the single-axis coordinate residual component data into M independent data segments with the same bit width by bit slicing according to bit width; and inputting the M independent data segments into an isolated array structure composed of M advance accumulation units to perform parallel independent accumulation processing. The advance accumulation unit calculates the intermediate accumulation result without the carry from the previous stage, and the hysteresis correction unit performs pipelined carry propagation correction on the intermediate accumulation result to obtain the integral output sequence. S3: The integral output sequence is fed into the N-stage multiphase comb stage for differential extraction, and a quantization noise shaping circuit is set between the register and the differential arithmetic unit; The truncation error from the previous cycle is fed back and superimposed onto the current input, including: when truncating the calculation result, extracting the truncated low-order data segment as the truncation quantization error; storing the truncation quantization error in the feedback delay register for single-cycle delay retention; and when the next pipeline cycle is executed, calling the delayed truncation quantization error from the feedback delay register, aligning it with the original bit weight dimension at the time of truncation, and superimposing it onto the current cycle input data as a compensation amount. The extraction results are upsampled through interpolation and combined with gain compensation to reconstruct the triaxial error signal sequence; based on the triaxial error signal sequence and the original measurement data sequence, the compensated coordinate values ​​are obtained.

2. The method for compensating for errors in coordinate measuring machines of automotive parts according to claim 1, characterized in that, The process of acquiring the original three-coordinate measurement data sequence of automotive parts carrying timestamps and measurement point identifiers includes: triggering a photoelectric position encoding and decoding chip using a trigger jump pulse signal generated by the measuring machine, reading the grating displacement of the orthogonal mechanical running coordinate trajectory and converting it into absolute distance discrete positioning parameters; extracting the edge time of the trigger pulse as a time reference, adding timestamp features to the absolute distance discrete positioning parameters, and generating measurement point identifiers according to the measurement program; combining orthogonal coordinates with records at the same time to construct a combined positioning point dataset, writing the measurement point identifiers into the combined positioning point dataset, and using the measurement point identifiers as index keys to call the preset reference coordinates when they correspond to preset reference measurement points; and arranging and storing the combined positioning point datasets in the input queue storage area to form the original measurement data sequence.

3. The method for compensating for errors in coordinate measuring machines of automotive parts according to claim 1, characterized in that, The look-ahead accumulator unit calculates the intermediate accumulation result without the carry from the previous stage, including: based on the look-ahead expansion algorithm, adding each independent data segment to the previous accumulation value stored in the corresponding accumulator register; detecting the highest bit carry overflow data generated by the addition operation as a carry flag, extracting and storing it in the carry register, storing the intermediate accumulation result in the data delay register, so that the intermediate accumulation result and the carry flag are kept in pipeline synchronization; removing the highest bit carry overflow data, and retaining the remaining truncated part as the intermediate accumulation result without carry and outputting it to the next stage.

4. The method for compensating for errors in coordinate measuring machines of automotive parts according to claim 3, characterized in that, The hysteresis correction unit performs pipelined carry propagation correction on the intermediate accumulation result, including: synchronously receiving the carry flag transmitted to the carry register by the advance accumulation unit that processes adjacent low-order data segments in the same data beat; synchronously reading the intermediate accumulation result of adjacent high-order data segments and aligning the carry flag with the lowest weight bit of the intermediate accumulation result of the high-order data segment; performing a carry addition operation after alignment, processing the resulting secondary carry chain overflow to obtain the accumulation value of the current data segment; and concatenating the accumulation values ​​of M data segments to obtain the full-width accumulation value and storing it in the pipeline output register.

5. The method for compensating for coordinate measuring machine errors of automotive parts according to claim 4, characterized in that, The process of processing the secondary carry chain overflow to obtain the accumulated value of the current data segment includes: configuring a Manchester carry chain structure in the hysteresis correction unit; when the application of the carry flag triggers a secondary carry chain overflow, the Manchester carry chain structure is used to conduct and eliminate the secondary carry overflow signal in the local adder network, and the corrected accumulated value of the data segment is output.

6. The method for compensating for errors in coordinate measuring machines of automotive parts according to claim 1, characterized in that, Based on the triaxial error signal sequence and the original measurement data sequence, the compensated coordinate values ​​are obtained, including: reading the original measurement data sequence with timestamps retained from the data cache queue; matching and aligning the original measurement data sequence with the triaxial error signal sequence in the time dimension according to the timestamp label; and performing a three-dimensional vector subtraction operation on the original coordinate data vector and the corresponding triaxial error signal vector at the matched and aligned time nodes to output the compensated coordinate measurement dataset.

7. The method for compensating for coordinate measuring machine errors of automotive parts according to claim 6, characterized in that, Based on the timestamp labels, the original measurement data sequence and the triaxial error signal sequence are matched and aligned in the time dimension, including: using a binary search algorithm, using the timestamp of the original measurement data sequence as the search key, to find two adjacent consecutive time nodes in the time grid of the triaxial error signal sequence; and performing interpolation operations based on the time distance weight to obtain the error component data mapped to the original measurement time nodes.

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