A method and device for checking synchronization of a high-voltage line merging unit

Abstract

The application discloses a high-voltage line merging unit synchronism verification method and device, relates to the technical field of merging unit verification, and comprises the following steps: collecting a plurality of bus voltage signals in a preset period, converting the bus voltage signals into voltage initial discrete sequences, and constructing a two-dimensional data matrix and setting an effective model order according to the voltage initial discrete sequences; performing singular value decomposition on the two-dimensional data matrix, and reconstructing the two-dimensional data matrix into a reduced-order data matrix according to the effective model order; extracting fundamental voltage secondary amplitude and fundamental voltage initial phase of the reduced-order data matrix based on a Prony algorithm, and taking the fundamental voltage secondary amplitude and the fundamental voltage initial phase as voltage channel verification reference values; receiving voltage sampling values of a line merging unit to be measured, and comparing the voltage sampling values with the voltage channel verification reference values to obtain voltage synchronism verification values of the line merging unit to be measured. By adaptively setting the effective model order, the two-dimensional data matrix is reconstructed into a pure reduced-order data matrix, high-frequency noise and harmonic interference are stripped before the reference values are extracted by the Prony algorithm, and the synchronism verification precision is improved.

Description

Technical Field

[0001] This application relates to the field of merging unit verification technology, and in particular to a method and apparatus for verifying the synchronization of high-voltage line merging units. Background Technology

[0002] The electrical quantity acquisition process in smart substations primarily employs a "conventional instrument transformer + merging unit" approach. The merging unit is a crucial input source for electrical quantity signals to intelligent protection and control devices. The accuracy and synchronization of the data acquired and transmitted by the merging unit directly determine the reliable operation of relay protection devices, thus affecting the safe operation of the power grid. Traditional merging unit synchronization verification typically uses an offline method, requiring the simultaneous deactivation of the bus voltage merging unit, interval current merging unit, and related protection devices before the test. This not only necessitates complex on-site safety measures but also impacts the safe and stable operation of the system.

[0003] Currently, the industry has proposed an online synchronous testing scheme for merging units based on measured voltage follower output. This scheme collects the bus voltage in real time as a standard voltage source without interrupting the power supply to the bus merging unit, and uses the Proni algorithm to extract the amplitude and phase of the voltage signal as a verification benchmark. At the same time, it generates a current analog quantity with the same frequency and phase through voltage follower modulation and outputs it to the merging unit of the line under test, thereby completing the verification of ratio difference and angle difference.

[0004] However, in actual high-voltage power grid operation environments, bus voltage signals are often inevitably mixed with various high-frequency noises and high-order harmonics (such as 3rd, 5th, and 8th harmonic components). The Proni algorithm is extremely sensitive to high-frequency noise and high-order harmonic interference. If the phase angle of the fundamental voltage is directly extracted using the Proni algorithm according to the existing scheme, the phase angle difference will increase significantly (even producing a serious phase shift of more than -13' to -14'). This deviation in the extraction of the phase reference will directly lead to the phase inaccuracy of the subsequent current follower output, making it difficult for the calibration device to meet the strict accuracy requirements under harsh power grid conditions. Summary of the Invention

[0005] To address the technical problem that the Proni algorithm's extraction of verification benchmark values ​​is subject to severe phase shifts due to the unavoidable presence of various high-frequency noises and high-order harmonics in the bus voltage signal, making it difficult for synchronous verification devices to meet high-precision verification requirements, this invention provides a method and device for verifying the synchronization of high-voltage line merging units.

[0006] To achieve the above objectives, this invention proposes a synchronization verification method for a high-voltage line merging unit. The input terminal of the high-voltage line merging unit is connected to a bus voltage transformer, and the output terminal is connected to secondary equipment. The high-voltage line merging unit is used to synchronously acquire bus voltage signals, convert them into digital signals, and transmit them to the secondary equipment. The method includes: Multiple bus voltage signals are acquired within a preset period, the multiple bus voltage signals are converted into an initial discrete voltage sequence, and a two-dimensional data matrix is ​​constructed based on the initial discrete voltage sequence. Frequency domain analysis is performed on the initial discrete voltage sequence to obtain the amplitude-frequency characteristic spectrum, and the effective model order is determined based on the amplitude-frequency characteristic spectrum; Singular value decomposition is performed on the two-dimensional data matrix. Based on the effective model order, the principal singular values ​​of the two-dimensional data matrix after singular value decomposition are retained, and the two-dimensional data matrix is ​​reconstructed into a reduced-order data matrix. Based on the reduced-order data matrix, the second amplitude and initial phase of the fundamental voltage are extracted from the reduced-order data matrix using the Proni algorithm, and the second amplitude and initial phase of the fundamental voltage are used as the voltage channel verification reference values. The voltage sample value of the line merging unit under test is received, and the voltage sample value is compared with the voltage channel verification reference value to obtain the voltage synchronization verification value of the line merging unit under test.

[0007] By adopting the above technical solution, the multiple discrete bus voltage signals collected are first constructed into a two-dimensional data matrix. Then, frequency domain analysis is performed on the multiple discrete bus voltage signals to adaptively set the effective model order. Next, singular value decomposition is performed on the two-dimensional data matrix, and high-frequency noise and high-order harmonic interference in the two-dimensional data matrix are filtered out according to the effective model order. The two-dimensional data matrix is ​​reconstructed into a pure reduced-order data matrix. Thus, before the Proni algorithm extracts the verification reference value, high-frequency noise and high-order harmonic interference are completely removed from the linear algebra level. This avoids the inaccuracy of phase reference extraction caused by the superposition of high-frequency noise and high-order harmonic interference when directly using the Proni algorithm to extract the verification reference value, making the synchronization test of the merging unit of the line under test more accurate.

[0008] The method for verifying the synchronization of high-voltage line merging units as described above further includes: The acquired bus voltage signal is amplified by voltage follower to obtain the line current signal; Based on the line current signal, the fundamental current amplitude and fundamental current phase of the line current signal are extracted using the full-cycle discrete Fourier algorithm, and the fundamental current amplitude and fundamental current phase of the line current signal are used as the current channel verification benchmark values. The system receives the current sampling value of the line merging unit under test and compares the current sampling value with the current channel verification reference value to obtain the current synchronization verification value of the line merging unit under test.

[0009] The synchronization verification method for high-voltage line merging units described above includes performing frequency domain analysis on the initial discrete voltage sequence to obtain the amplitude-frequency characteristic spectrum, and setting the effective model order based on the amplitude-frequency characteristic spectrum, comprising: The initial discrete voltage sequence is subjected to a fast Fourier transform to obtain the amplitude-frequency response spectrum; Based on the amplitude-frequency characteristic spectrum, the number of spectral peaks in the amplitude-frequency characteristic spectrum that are greater than a preset amplitude threshold is counted, and the counted number is taken as the number of dominant frequency components. The effective model order is set according to the number of dominant frequency components, as follows: ; Where P is the effective model order and K is the number of dominant frequency components.

[0010] The above-described method for synchronicity verification of high-voltage line merging units includes performing singular value decomposition on a two-dimensional data matrix, retaining the principal singular values ​​after singular value decomposition of the two-dimensional data matrix according to the effective model order, and reconstructing the two-dimensional data matrix into a reduced-order data matrix, comprising: Singular value decomposition is performed on the two-dimensional data matrix to obtain a singular value diagonal matrix, specifically: ; Where H is a two-dimensional data matrix constructed from the initial discrete voltage sequence, and U is an m×m orthogonal matrix. It is the transpose of an n×n dimensional orthogonal matrix. This is a diagonal matrix of singular values ​​arranged in descending order; Based on the effective model order, retain the singular values ​​in the singular value diagonal matrix that correspond to the effective model order in the dimension, and set the singular values ​​of the remaining dimensions to zero to obtain the reduced-order singular value diagonal matrix. Based on the reduced-order singular value diagonal matrix, a reduced-order data matrix is ​​constructed as follows: ; in, For a reduced-order data matrix, It is a reduced-order singular value diagonal matrix.

[0011] The synchronization verification method for high-voltage line merging units as described above, wherein the extraction of the fundamental voltage second amplitude and initial phase of the fundamental voltage from the reduced-order data matrix based on the Proni algorithm includes: Based on the reduced-order data matrix, establish a system of linear autoregressive equations; The linear autoregressive equation system is rooted by the least squares method to obtain the number of poles corresponding to the effective model order; Based on the poles, the second magnitude of the fundamental voltage and the initial phase of the fundamental wave are calculated using the following formula: ; in, This is the second amplitude of the fundamental voltage. The initial phase of the fundamental voltage. denoted as the complex amplitude of the characteristic pole of the fundamental wave.

[0012] The method for verifying the synchronization of a high-voltage line merging unit as described above compares the voltage sampled value with the voltage channel verification reference value to obtain the voltage synchronization verification value of the merging unit under test, including: Based on the voltage sample values, the fundamental amplitude and fundamental phase measurements of the voltage sample values ​​are extracted using the full-cycle discrete Fourier algorithm. The fundamental amplitude and fundamental phase measurements of the voltage samples are compared with the voltage channel verification reference values ​​to determine the voltage ratio difference test value and voltage angle difference test value of the merging unit of the line under test.

[0013] The synchronization verification method for high-voltage line merging units as described above, wherein the extraction of the fundamental current amplitude and fundamental current phase of the line current signal based on the full-cycle discrete Fourier algorithm, according to the line current signal, includes: Based on the full-cycle discrete Fourier algorithm, the real part and imaginary part of the fundamental current phasor of the line current signal are calculated. The fundamental current amplitude and phase of the line current signal are calculated based on the real and imaginary parts of the fundamental current phasor.

[0014] The synchronization verification method for high-voltage line merging units as described above, wherein calculating the fundamental current amplitude and phase of the line current signal based on the real and imaginary parts of the fundamental current phasor, includes: The fundamental current amplitude of the line current signal is calculated as follows: ; in, The amplitude of the fundamental current. This represents the real part of the fundamental current phasor. This represents the imaginary part of the fundamental current phasor. The fundamental current phase of the line current signal is specifically calculated as follows: ; in, The phase of the fundamental current. This represents the real part of the fundamental current phasor. This represents the imaginary part of the fundamental current phasor.

[0015] The method for verifying the synchronization of a high-voltage line merging unit as described above compares the sampled current value with the current channel verification reference value to obtain the current synchronization verification value of the merging unit under test, including: Based on the current sampling values, the fundamental amplitude measurement value and fundamental phase measurement value of the current sampling values ​​are extracted using the full-cycle discrete Fourier algorithm; The fundamental amplitude and fundamental phase measurements of the current sampling values ​​are compared with the current channel verification reference values ​​to determine the current ratio difference test value and current angle difference test value of the merging unit of the line under test.

[0016] Furthermore, to achieve the above objectives, the present invention also provides a high-voltage line merging unit synchronization verification device, characterized in that the high-voltage line merging unit synchronization verification device includes: a memory, a processor, and a high-voltage line merging unit synchronization verification program stored in the memory and executable on the processor, wherein the high-voltage line merging unit synchronization verification program is configured to implement the high-voltage line merging unit synchronization verification method as described above.

[0017] Compared with the prior art, the synchronization verification method and device for high-voltage line merging units proposed in this invention have the following advantages: 1. The synchronization verification method for high-voltage line merging units proposed in this invention first constructs a two-dimensional data matrix from multiple discrete bus voltage signals. Then, frequency domain analysis is performed on these discrete bus voltage signals to adaptively set the effective model order. Next, singular value decomposition is performed on the two-dimensional data matrix, and high-frequency noise and high-order harmonic interference are filtered out based on the effective model order. This reconstructs the two-dimensional data matrix into a clean, reduced-order data matrix. Thus, before the Proni algorithm extracts the verification benchmark value, high-frequency noise and high-order harmonic interference are completely removed at the linear algebra level. This avoids the inaccuracy in phase benchmark extraction caused by the superposition of high-frequency noise and high-order harmonic interference when directly using the Proni algorithm to extract the verification benchmark value, making the synchronization verification of the line merging unit under test more accurate. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a flowchart illustrating the synchronization verification method for high-voltage line merging units in this application. Figure 2 for Figure 1 A detailed flowchart of step S20 is shown below; Figure 3 for Figure 1 A detailed flowchart of step S30 is shown below; Figure 4 for Figure 1 A detailed flowchart of step S40 is shown below; Figure 5 for Figure 1 A detailed flowchart of step S50 is shown below; Figure 6 This is another flowchart illustrating the synchronization verification method for high-voltage line merging units in this application; Figure 7 for Figure 6 A detailed flowchart of step S70 is shown below; Figure 8 for Figure 6 A detailed flowchart of step S80 is shown below; Figure 9 This is a schematic diagram of the discrete sequence of input voltage; Figure 10 This is a schematic diagram of fundamental wave feature extraction and reconstruction based on the Proni algorithm; Figure 11 This is a schematic diagram of phase extraction angle difference comparison. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0022] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0023] Furthermore, the use of terms such as "first" and "second" in this invention is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0024] Currently, the industry has proposed an online synchronous testing scheme for merging units based on measured voltage follower output. This scheme collects the bus voltage in real time as a standard voltage source without interrupting the power supply to the bus merging unit, and uses the Proni algorithm to extract the amplitude and phase of the voltage signal as a verification benchmark. At the same time, it generates a current analog quantity with the same frequency and phase through voltage follower modulation and outputs it to the merging unit of the line under test, thereby completing the verification of ratio difference and angle difference.

[0025] However, in actual high-voltage power grid operation environments, bus voltage signals are often inevitably mixed with various high-frequency noises and high-order harmonics (such as 3rd, 5th, and 8th harmonic components). The Proni algorithm is extremely sensitive to high-frequency noise and high-order harmonic interference. If the phase angle of the fundamental voltage is directly extracted using the Proni algorithm according to the existing scheme, the phase angle difference will increase significantly (even producing a serious phase shift of more than -13' to -14'). This deviation in the extraction of the phase reference will directly lead to the phase inaccuracy of the subsequent current follower output, making it difficult for the calibration device to meet the strict accuracy requirements under harsh power grid conditions.

[0026] To address the aforementioned technical problems, this invention provides a solution: First, multiple bus voltage signals are acquired within a preset period, converted into initial discrete voltage sequences, and a two-dimensional data matrix is ​​constructed based on these sequences. Next, frequency domain analysis is performed on the initial discrete voltage sequences to obtain the amplitude-frequency characteristic spectrum, and an effective model order is set based on this spectrum. Then, singular value decomposition is performed on the two-dimensional data matrix, and the principal singular values ​​are retained based on the effective model order, reconstructing the two-dimensional data matrix into a reduced-order data matrix. Based on the reduced-order data matrix, the fundamental voltage quadratic amplitude and initial phase are extracted using the Proni algorithm, and these are used as voltage channel verification reference values. Finally, voltage sampling values ​​from the merging unit of the line under test are received, and these values ​​are compared with the voltage channel verification reference values ​​to obtain the voltage synchronization verification value of the merging unit.

[0027] The above scheme first constructs a two-dimensional data matrix from multiple discrete bus voltage signals. Frequency domain analysis is then performed on these signals to adaptively set the effective model order. Next, singular value decomposition is performed on the two-dimensional data matrix, and high-frequency noise and high-order harmonic interference are filtered out based on the effective model order. This reconstructs the two-dimensional data matrix into a clean, reduced-order data matrix. Thus, before the Proni algorithm extracts the verification reference value, high-frequency noise and high-order harmonic interference are completely removed at the linear algebra level. This avoids the inaccuracy in phase reference extraction caused by the superposition of high-frequency noise and high-order harmonic interference when directly using the Proni algorithm to extract the verification reference value, making the synchronization verification of the merging unit of the line under test more accurate.

[0028] Based on the above, please refer to Figure 1 As shown in the embodiment of this specification, a synchronization verification method for a high-voltage line merging unit is provided. The input terminal of the high-voltage line merging unit is connected to a bus voltage transformer, and the output terminal of the high-voltage line merging unit is connected to secondary equipment. The high-voltage line merging unit is used to synchronously acquire bus voltage signals, convert them into digital signals, and transmit them to the secondary equipment. The method includes steps S10-S50, wherein: S10: Collect multiple bus voltage signals within a preset period, convert the multiple bus voltage signals into an initial discrete voltage sequence, and construct a two-dimensional data matrix based on the initial discrete voltage sequence.

[0029] It should be noted that when acquiring bus voltage signals, the high-voltage bus voltage output from the secondary winding of the bus voltage transformer in the substation can be collected. After being stepped down by an internal voltage converter, the voltage is then sampled continuously and sequentially using a high-precision analog-to-digital converter to obtain N discrete bus voltage signals with N sampling points. These discrete bus voltage signals are then discretized into a one-dimensional discrete voltage sequence, which is the initial discrete voltage sequence, and can be specifically represented as follows: Then, according to the preset period, the initial discrete sequence of voltage is constructed into a two-dimensional data matrix.

[0030] It should also be noted that the preset period is a pre-selected window sequence length L, which is used to segment and group the initial discrete voltage sequence for reconstruction, thereby constructing a two-dimensional data matrix from the one-dimensional discrete voltage sequence. The expression of the constructed two-dimensional data matrix H is as follows: .

[0031] It is worth noting that if you want to construct a large enough two-dimensional data matrix H to improve the extraction accuracy of the subsequent verification benchmark value, you can set the window sequence length L to a larger value beforehand. If you want to improve the system's running speed, you can set the window sequence length L to a larger value so that the constructed two-dimensional data matrix H does not occupy too much of the system's data processing volume, thereby improving the running speed.

[0032] S20: Perform frequency domain analysis on the initial discrete voltage sequence to obtain the amplitude-frequency characteristic spectrum, and set the effective model order based on the amplitude-frequency characteristic spectrum.

[0033] It should be noted that the amplitude-frequency characteristic spectrum refers to the amplitude distribution curve at each discrete frequency point obtained after performing a fast Fourier transform on the initial discrete voltage sequence. Its horizontal axis is frequency, and its vertical axis is the amplitude of the corresponding frequency component. It is used to quantitatively characterize the amplitude and energy distribution characteristics of different frequency components in the bus voltage signal. The effective model order is the critical threshold for distinguishing between the effective power frequency fundamental wave signal and wireless interference noise. It is used to define the retained and discarded dimensions after the singular decomposition of the subsequent two-dimensional data matrix.

[0034] In actual high-voltage power grid operation environments, bus voltage signals are often inevitably mixed with various high-frequency noises and high-order harmonic interferences (such as 3rd, 5th, and 8th harmonic components), which causes great errors in the subsequent extraction of verification benchmarks, resulting in poor verification accuracy for merging unit synchronization tests.

[0035] This embodiment constructs a two-dimensional data matrix from the discrete bus voltage signals acquired in real time. Simultaneously, it performs frequency domain analysis on the discrete bus voltage signals to determine the effective model order. This allows for signal-to-noise separation of various high-frequency noises and high-order harmonic interferences mixed in with the bus voltage signals, preserving the true characteristics of the fundamental bus voltage signal to the greatest extent possible. This provides a clean data foundation for the subsequent extraction of verification reference parameters.

[0036] S30: Perform singular value decomposition on the two-dimensional data matrix, retain the principal singular values ​​after singular value decomposition of the two-dimensional data matrix according to the effective model order, and reconstruct the two-dimensional data matrix into a reduced-order data matrix.

[0037] It should be noted that the singular value decomposition is an orthogonal linear matrix decomposition algorithm that orthogonally diagonalizes any matrix. It can decompose the aforementioned two-dimensional data matrix into the product of three orthogonal matrices, specifically: Where H is the aforementioned two-dimensional data matrix, and U is an m×m dimensional orthogonal matrix whose column vectors are called left singular vectors, reflecting the characteristic distribution of the data column space in the power grid system. It is the transpose of an n×n dimensional orthogonal matrix, and its column vectors are called right singular vectors, reflecting the inherent orthogonality of the row space in a power grid system. It is an m×n dimensional non-negative diagonal matrix, whose diagonal elements are called singular values ​​and are arranged in descending order.

[0038] This embodiment utilizes singular value decomposition (SVD) to orthogonally decompose the constructed two-dimensional data matrix, obtaining a diagonal matrix of singular values ​​sorted from largest to smallest. In a power system, larger singular values ​​correspond to the effective signal components of the true fundamental wave and characteristic harmonics, while smaller singular values ​​correspond to the noise interference components of random high-frequency noise and higher-order harmonic interference. Based on the effective model order, singular values ​​in the diagonal matrix corresponding to the effective model order are retained, while the singular values ​​of the remaining dimensions are set to zero, resulting in a reduced-order diagonal matrix. This reconstructs a pure reduced-order data matrix. By filtering out high-frequency noise and higher-order harmonic interference in the initial bus voltage signal, errors in amplitude and phase calculations caused by the superposition of higher-order harmonics in the matrix are avoided in the conventional Proni algorithm, providing a pure data foundation for subsequent verification of reference parameters.

[0039] S40, Based on the reduced-order data matrix, extract the fundamental voltage second-order amplitude and the fundamental voltage initial phase of the reduced-order data matrix using the Proni algorithm, and use the fundamental voltage second-order amplitude and the fundamental voltage initial phase as the voltage channel verification reference value.

[0040] It should be noted that the Prony algorithm, also known as the Prony algorithm, is a time-domain parameter identification algorithm that uses a linear combination of complex exponential functions to fit data at equal intervals. It is used to extract key parameters such as amplitude, frequency, and phase of the effective signal from a reduced-order data matrix. The fundamental voltage secondary amplitude refers to the amplitude of the sinusoidal fundamental component with the power frequency in the bus voltage transformed to the secondary side by the voltage transformer, which is used to reflect the actual voltage level output by the voltage transformer. The fundamental voltage initial phase refers to the phase angle of the bus power frequency fundamental voltage signal at the start of the sampling data, which is used to reflect the instantaneous angular position of the fundamental voltage at a unified reference time.

[0041] Because the Proni algorithm is extremely sensitive to high-frequency noise and high-order harmonic interference, practical tests show that when the phase angle of the fundamental voltage is extracted directly using the Proni algorithm in the traditional way under the superimposed high-order harmonic interference of 20%, the phase angle difference will increase significantly (even producing a serious phase shift of more than -13' to -14'). This deviation in the extraction of the phase reference will directly lead to the phase inaccuracy of the subsequent current follower output, making it difficult for the calibration device to meet the strict accuracy requirements under harsh power grid conditions.

[0042] In this embodiment, when using the Proni algorithm to extract the second amplitude and initial phase of the fundamental voltage, the two-dimensional data matrix is ​​first reduced to a pure reduced-order data matrix. This avoids the inaccuracy of phase reference extraction caused by the superposition of high-frequency noise and high-order harmonic interference in the conventional Proni algorithm. As a result, the extracted voltage channel verification reference value is more consistent with the actual operating state of the high-voltage line merging unit, thereby realizing high-precision synchronization verification of the high-voltage line merging unit under harsh power grid conditions.

[0043] S50, receive the voltage sample value of the line merging unit under test, and compare the voltage sample value with the voltage channel verification reference value to obtain the voltage synchronization verification value of the line merging unit under test.

[0044] The voltage synchronization verification values ​​include voltage ratio difference verification values ​​and voltage angle difference verification values.

[0045] It should be noted that the voltage sampling value of the line under test merging unit refers to the sampling value SV message uploaded by the line under test merging unit. The sampling value SV message is a digital sampling value transmission message generated according to the EC61850 standard protocol, used to convert the analog voltage and current sampling data of the high-voltage line collected by the line under test merging unit into standardized digital messages. These standardized digital messages contain key data such as the sampling amplitude and phase of voltage and current at each sampling moment. The voltage ratio difference test value is the ratio of the relative deviation between the voltage sampling amplitude of the line under test merging unit and the secondary amplitude of the fundamental voltage, used to characterize the degree of synchronization deviation of the voltage sampling amplitude. When the difference test value approaches zero, it indicates that the voltage sampling amplitude of the merging unit under test has no offset or attenuation distortion. Conversely, it indicates that the voltage sampling amplitude of the merging unit under test is abnormal. The voltage angle difference test value is the phase difference between the voltage sampling phase of the merging unit under test and the initial phase of the fundamental voltage. It is used to characterize the degree of synchronization deviation of the sampling timing and is the core indicator for determining the synchronization of the sampling timing of the merging unit. When the angle difference test value is within the standard allowable range, it indicates that the sampling data of the merging unit under test is synchronized with the reference data of the system without offset. Conversely, it indicates that the merging unit under test has problems such as sampling delay, timing drift, and clock out-of-sync.

[0046] In this embodiment, the sampled value SV message uploaded by the high-voltage line merging unit under test is received in real time, and the sampled value SV message is decoded to obtain a discrete sampling sequence with N sampling points. The sampling sequence includes voltage sampling values ​​and current sampling values. Then, based on the full-cycle discrete Fourier algorithm, the fundamental phasor of the discrete sampling sequence with N sampling points is calculated to extract the fundamental amplitude measurement value and fundamental phase measurement value of the line merging unit under test. The fundamental amplitude measurement value and fundamental phase measurement value of the sampled value SV message are compared with the voltage channel verification reference value to calculate the voltage ratio difference test value and voltage angle difference test value of the line merging unit under test. The voltage sampling synchronization status of the line merging unit under test is determined by the voltage ratio difference test value and voltage angle difference test value. This enables voltage synchronization testing of the line merging unit without power outage in the power grid system, which greatly reduces the preparation work and debugging process of on-site safety measures and effectively reduces the workload of substation operation and maintenance personnel. Secondly, because the test benchmark value filters out high-frequency noise and high-order harmonic interference, the voltage synchronization test of the line merging unit is more accurate, enabling the relay protection device to operate more reliably and ensuring the safe operation of the power grid system.

[0047] In one feasible implementation, please refer to Figure 2 As shown, in step S20, the step of performing frequency domain analysis on the initial discrete voltage sequence to obtain the amplitude-frequency characteristic spectrum, and setting the effective model order based on the amplitude-frequency characteristic spectrum, further includes steps S21-S23, wherein: S21, Perform a fast Fourier transform on the initial discrete voltage sequence to obtain the amplitude-frequency characteristic spectrum; S22, Based on the amplitude-frequency characteristic spectrum, count the number of spectral peaks in the amplitude-frequency characteristic spectrum that are greater than a preset amplitude threshold, and use the counted number as the number of dominant frequency components; S23, set the effective model order based on the number of dominant frequency components.

[0048] It should be noted that the amplitude-frequency characteristic spectrum refers to the amplitude distribution curve obtained at each discrete frequency point after performing a fast Fourier transform on the initial discrete voltage sequence. The horizontal axis represents frequency, and the vertical axis represents the amplitude of the corresponding frequency component. It is used to quantitatively characterize the amplitude magnitude and energy distribution characteristics of different frequency components in the bus voltage signal. The preset amplitude threshold refers to the amplitude characteristics of the steady-state operating voltage of the high-voltage power grid. This preset amplitude threshold is used as the basis for distinguishing between effective signals and noise interference signals. This preset amplitude threshold can be set according to the percentage of the fundamental voltage amplitude of the bus voltage, or it can be set according to the noise level and measurement accuracy requirements of the actual operation of the power grid system.

[0049] When performing a Fast Fourier Transform on the initial discrete voltage sequence, the core Fourier transform formula is used: ; In the formula, (i.e., the sequence length of the initial discrete voltage sequence). Let j be the frequency domain complex sequence obtained after the transformation, where j is the imaginary unit. This is the initial discrete sequence of voltages.

[0050] After Fourier transform, the discrete time-domain bus voltage signal is converted into a frequency-domain signal. Then, based on the obtained frequency-domain complex sequence, the amplitude-frequency characteristic spectrum is calculated. The specific calculation formula is as follows: ; In the formula, Let be the real part of the complex sequence in the frequency domain. Let the imaginary part be the complex sequence in the frequency domain. This is the amplitude-frequency characteristic spectrum.

[0051] Based on a preset amplitude threshold, the number of spectral peaks with amplitudes greater than the preset amplitude threshold in the obtained amplitude-frequency characteristic spectrum is counted, and this count is taken as the number of dominant frequency components. Based on the number of dominant frequency components, the effective model order is set, specifically as follows: ; Where P is the effective model order and K is the number of dominant frequency components.

[0052] In this embodiment, frequency domain analysis is performed on the discrete bus voltage signal to obtain the amplitude-frequency characteristic spectrum. Based on the number of spectral peaks in the amplitude-frequency characteristic spectrum with amplitudes greater than a preset amplitude threshold, the effective model order is adaptively set. This avoids the matrix singularity or fitting divergence problems caused by blindly setting the order based on manual experience, which is a problem in traditional methods. Secondly, by setting a reasonable effective model order, various high-frequency noises and high-order harmonic interferences mixed in with the bus voltage signal are separated into signal and noise, preserving the true characteristics of the fundamental bus voltage signal to the greatest extent, thereby providing a clean data foundation for the subsequent extraction of verification reference parameters.

[0053] In one feasible implementation, please refer to Figure 3 As shown, in step S30, the singular value decomposition of the two-dimensional data matrix is ​​performed, and the principal singular values ​​of the two-dimensional data matrix after singular value decomposition are retained according to the effective model order. The step of reconstructing the two-dimensional data matrix into a reduced-order data matrix also includes steps S31-S33, wherein: S31, Perform singular value decomposition on the two-dimensional data matrix to obtain a singular value diagonal matrix, specifically: ; Where H is a two-dimensional data matrix constructed from the initial discrete voltage sequence, and U is an m×m orthogonal matrix whose column vectors are called left singular vectors. Let be the transpose of an n×n dimensional orthogonal matrix, and its column vectors be called right singular vectors. A diagonal matrix of singular values ​​arranged in descending order, the elements on its diagonal are called singular values; S32, Based on the effective model order, retain the singular values ​​in the singular value diagonal matrix that correspond to the dimension of the effective model order, and set the singular values ​​of the remaining dimensions to zero to obtain a reduced-order singular value diagonal matrix; S33, construct a reduced-order data matrix based on the reduced-order singular value diagonal matrix, wherein the reduced-order data matrix is: ; in, For a reduced-order data matrix, It is a reduced-order singular value diagonal matrix.

[0054] In this embodiment, singular value decomposition is performed on the two-dimensional data matrix to obtain a diagonal matrix of singular values ​​sorted from largest to smallest. The magnitude of the singular values ​​directly maps the energy intensity of each frequency component and random noise in the initial bus voltage signal. Based on the effective model order, the diagonal matrix of singular values ​​is subjected to dimensional filtering and order reduction processing. The first-order large singular values ​​in the dimension corresponding to the effective model order are retained, while all remaining small singular values ​​exceeding the effective model order are forcibly set to zero. After the filtering and zeroing process, a denoised and purified reduced-order diagonal matrix of singular values ​​is obtained. This is then combined with the original orthogonal matrix U and The reduced-order data matrix is ​​reconstructed to remove non-dominant higher harmonics and background noise from the original singular value matrix. This avoids the errors in amplitude and phase calculations caused by the superposition of higher harmonics in the matrix in the conventional Proni algorithm, and provides a clean data foundation for subsequent verification of benchmark parameters.

[0055] In one feasible implementation, please refer to Figure 4 As shown, in step S40, the step of extracting the second magnitude of the fundamental voltage and the initial phase of the fundamental voltage from the reduced-order data matrix based on the Proni algorithm, further includes steps S41-S43, wherein: S41, Based on the reduced-order data matrix, establish a system of linear autoregressive equations; S42, the linear autoregressive equation system is rooted by the least squares method to obtain the number of poles corresponding to the effective model order; S43, based on the poles, calculate the second magnitude of the fundamental voltage and the initial phase of the fundamental voltage in the reduced-order data matrix.

[0056] It should be noted that the least squares method is a mathematical method that finds the best match for the observation dataset by minimizing the sum of squared residuals between the observed values ​​and the model predictions. In this embodiment, since the number of equations in the linear autoregressive system is greater than the number of unknown prediction coefficients, there is no set of coefficients that makes all equations strictly true. The least squares method is used to find a set of prediction coefficients that minimizes the sum of squared differences between the left and right sides of each equation, so that the predicted coefficients obtained by solving have the ability to suppress random noise interference.

[0057] In this embodiment, after obtaining the reduced-order data matrix, the voltage discrete sequence processed by the reduced-order data matrix is ​​used as the basis for the calculation. Establish a system of linear autoregressive equations, the specific form of which is: ; in, Given the predicted coefficients to be determined, after obtaining the predicted coefficients using the least squares method, a characteristic polynomial of order P (where P is the order of the effective model mentioned above) is constructed based on the obtained predicted coefficients, specifically as follows: ; Substituting the predicted coefficients into the P-order characteristic polynomial allows us to find the roots. The roots obtained are: These are the poles, each of which is a complex number. Substituting each pole back into the reduced-order discrete voltage sequence... You can then obtain: ; Based on the obtained poles and the known discrete voltage sequence, the complex amplitudes corresponding to each modal component are solved. From these, the fundamental characteristic poles with frequencies close to the power grid frequency (50Hz) are selected, and their corresponding fundamental second-order amplitudes and initial phases of the fundamental voltage are extracted. The specific calculation formula is as follows: ; in, This is the second amplitude of the fundamental voltage. The initial phase of the fundamental voltage. denoted as the complex amplitude of the characteristic pole of the fundamental wave.

[0058] In this embodiment, when using the Proni algorithm to extract the secondary amplitude and initial phase of the fundamental voltage, the two-dimensional data matrix is ​​first reduced to a pure reduced-order data matrix. This avoids the inaccuracy of phase reference extraction caused by the superposition of high-frequency noise and high-order harmonic interference in the conventional Proni algorithm. As a result, the extracted voltage channel verification reference value is more in line with the actual operating state of the high-voltage line merging unit, thereby realizing high-precision synchronization verification of the high-voltage line merging unit under harsh power grid conditions.

[0059] In one feasible implementation, please refer toFigure 5 As shown, in step S50, the step of comparing the voltage sampled value with the voltage channel verification reference value to obtain the voltage synchronization verification value of the line merging unit under test, further steps S51-S52 are included, wherein: S51, Based on the voltage sample value, extract the fundamental amplitude measurement value and fundamental phase measurement value of the voltage sample value using the full-cycle discrete Fourier algorithm.

[0060] It should be noted that after receiving the sampled value SV message uploaded by the high-voltage line merging unit under test, the sampled value SV message is first decoded to obtain multiple instantaneous voltage sampled values. A sequence length corresponding to the initial discrete voltage sequence length is selected to form a one-dimensional discrete sampling sequence of length L, specifically in the following form: Then, based on the full-cycle discrete Fourier algorithm, the fundamental phasor of the one-dimensional discrete sampling sequence is calculated; Specifically, the formula for calculating the real part of the fundamental phasor is as follows: ; in, For the real part of the fundamental phasor, It is a one-dimensional discrete sampling sequence, where L is the sequence length.

[0061] The formula for calculating the imaginary part of the fundamental phasor is: ; in, This represents the imaginary part of the fundamental phasor. It is a one-dimensional discrete sampling sequence, where L is the sequence length.

[0062] Based on the real and imaginary parts of the fundamental phasor, the fundamental amplitude and fundamental phase measurements of the voltage sample can be obtained, as calculated in detail below: The formula for calculating the fundamental amplitude of the voltage sample value is as follows: ; The formula for calculating the fundamental phase measurement value of the voltage sample is: .

[0063] S52, compare the fundamental amplitude measurement value and fundamental phase measurement value of the voltage sampling value with the voltage channel verification reference value to determine the voltage ratio difference test value and voltage angle difference test value of the merging unit of the line under test.

[0064] Specifically, the formula for calculating the voltage ratio test value is as follows: ; in, This is the test value for the difference. This is the measured value of the fundamental amplitude of the voltage sample. This represents the second amplitude of the fundamental voltage.

[0065] The formula for calculating the voltage angle difference test value is: ; in, This is the angle difference test value. This is the current fundamental frequency. The rated delay time for the channel of the voltage sampling value of the merging unit of the line under test. This is the fundamental phase measurement value of the voltage sample. This represents the initial phase of the fundamental voltage.

[0066] In this embodiment, the sampled value SV message uploaded by the high-voltage line merging unit under test is received in real time, and the sampled value SV message is decoded to obtain a one-dimensional discrete sampling sequence of length L. Then, based on the full-cycle discrete Fourier algorithm, the fundamental phasor is calculated on the one-dimensional discrete sampling sequence to extract the fundamental amplitude measurement value and fundamental phase measurement value of the line merging unit under test. The fundamental amplitude measurement value and fundamental phase measurement value of the sampled value SV message are compared with the voltage channel verification benchmark value to calculate the voltage channel ratio difference test value and angle difference test value. The voltage channel sampling synchronization status of the line merging unit under test is determined by the ratio difference test value and angle difference test value. This enables the synchronization test of the line merging unit to be performed without interrupting the power grid system, which greatly reduces the preparation work and debugging process of on-site safety measures and effectively reduces the workload of substation operation and maintenance personnel. Secondly, because the test benchmark value filters out high-frequency noise and high-order harmonic interference, the synchronization test of the line merging unit is more accurate, enabling the relay protection device to operate more reliably and ensuring the safe operation of the power grid system.

[0067] In one feasible implementation, please refer to Figure 6 As shown, the high-voltage line merging unit synchronization verification method further includes steps S60-S80, wherein: S60 performs voltage follower amplification on the acquired bus voltage signal to obtain the line current signal.

[0068] S70, Based on the line current signal, extract the fundamental current amplitude and fundamental current phase of the line current signal using the full-cycle discrete Fourier algorithm, and use the fundamental current amplitude and fundamental current phase of the line current signal as the current channel verification benchmark value.

[0069] S80, receive the current sampling value of the line merging unit under test, and compare the current sampling value with the current channel verification reference value to obtain the current synchronization verification value of the line merging unit under test.

[0070] In this embodiment, the collected bus voltage is input to a voltage follower amplifier circuit for amplification, generating a line current with the same frequency and phase as the bus voltage and adjustable amplitude. Then, based on the full-cycle discrete Fourier algorithm, the fundamental current phasor is calculated for the line current to extract the fundamental current amplitude and phase, which are used as the current channel verification reference value. The fundamental amplitude and phase measurements of the sampled SV message are compared with the current channel verification reference value to calculate the ratio difference test value and angle difference test value of the current channel. The current channel sampling synchronization status of the line merging unit under test is determined by the ratio difference test value and angle difference test value. This allows for synchronization verification of the line merging unit without power outages in the power grid system, significantly reducing the preparation work and debugging process of on-site safety measures and effectively reducing the workload of substation operation and maintenance personnel.

[0071] It should be noted that the voltage follower amplifier circuit includes a voltage follower and a power amplifier. The external pin of the voltage follower is connected to a gain adjustment resistor. Through the voltage follower and the power amplifier, the generated line current is made to have the same frequency and phase as the wooden box voltage. At the same time, the amplitude of the line current is dynamically adjusted by changing the resistance value of the gain adjustment resistor.

[0072] In one feasible implementation, please refer to Figure 7 As shown, in step S70, the step of calculating the fundamental current amplitude and phase of the line current signal based on the real and imaginary parts of the fundamental current phasor, further includes steps S71-S72, wherein: S71, based on the full-cycle discrete Fourier algorithm, calculates the real part and imaginary part of the fundamental current phasor of the line current signal.

[0073] Specifically, the formula for calculating the real part of the fundamental current phasor is as follows: ; in, This represents the real part of the fundamental current phasor. Let L be a one-dimensional discrete sequence of line currents, where L is the sequence length.

[0074] The formula for calculating the imaginary part of the fundamental current phasor is: ; in, This represents the imaginary part of the fundamental current phasor. Let L be a one-dimensional discrete sequence of line currents, where L is the sequence length.

[0075] S72, calculate the fundamental current amplitude and fundamental current phase of the line current signal based on the real part and imaginary part of the fundamental current phasor.

[0076] Specifically, the formula for calculating the amplitude of the fundamental current of the line current is as follows: ; The formula for calculating the phase of the fundamental current of the line current is: .

[0077] In one feasible implementation, please refer to Figure 8 As shown, in step S80, the step of comparing the current sampled value with the current channel verification reference value to obtain the current synchronization verification value of the line merging unit under test, further includes steps S81-S82, wherein: S81, Based on the current sampling value, extract the fundamental amplitude measurement value and fundamental phase measurement value of the current sampling value using the full-cycle discrete Fourier algorithm.

[0078] The calculation process and principle of step S81 are the same as those of step S51. For details, please refer to the specific implementation of step S51. This application will not repeat them here.

[0079] S82, compare the fundamental amplitude measurement value and fundamental phase measurement value of the current sampling value with the current channel verification reference value to determine the current ratio difference test value and current angle difference test value of the merging unit of the line under test.

[0080] Specifically, the formula for calculating the current ratio difference test value is as follows: ; in, This is the test value for the difference. The fundamental amplitude measurement value of the sampled SV message. This represents the second amplitude of the fundamental voltage.

[0081] The formula for calculating the current angle difference test value is: ; in, This is the angle difference test value. This is the current fundamental frequency. The rated delay time of the SV message channel of the sampled value of the merging unit of the line under test. The fundamental phase measurement value of the sampled SV message. This represents the initial phase of the fundamental voltage.

[0082] In this embodiment, the fundamental amplitude measurement value and fundamental phase measurement value of the sampled value SV message are compared with the current channel verification benchmark value to calculate the ratio difference test value and angle difference test value of the current channel. The current channel sampling synchronization status of the line merging unit under test is determined by the ratio difference test value and angle difference test value. This enables the synchronization test of the line merging unit to be performed without interrupting the power grid system, which greatly reduces the preparation work and debugging process of on-site safety measures and effectively reduces the workload of substation operation and maintenance personnel.

[0083] Please refer to Figures 9 to 11 As shown, to verify the anti-harmonic interference performance of the present invention, distorted bus voltage signals superimposed with 3rd, 5th, and 8th harmonics were injected into the device through a simulation platform. Comparative tests revealed that when encountering strong harmonic interference, the traditional Proni algorithm, due to matrix singularities, caused severe fluctuations in the extracted fundamental phase, with the average angle difference far exceeding the error limit allowed by the 0.2-level measurement voltage channel. However, by employing the frequency domain scanning adaptive order determination and singular value order reduction reconstruction technology described in this invention, singular values ​​are effectively truncated at the corresponding thresholds, resulting in an extremely smooth reconstructed reference waveform. The calculated phase error is strictly controlled within a very small range, fully meeting the accuracy requirements of the 0.2-level synchronization test for intelligent substations, and significantly improving the measurement robustness of the device under harsh operating conditions.

[0084] This specification also provides a high-voltage line merging unit synchronization verification device, which includes: a memory, a processor, and a high-voltage line merging unit synchronization verification program stored in the memory and executable on the processor. The high-voltage line merging unit synchronization verification program is configured to implement the high-voltage line merging unit synchronization verification method as described above.

[0085] It is worth noting that, since the high-voltage line merging unit synchronization verification device of the present invention is used to implement the above-mentioned high-voltage line merging unit synchronization verification method, the embodiments of the high-voltage line merging unit synchronization verification device of the present invention include all the technical solutions of all embodiments of the above-mentioned high-voltage line merging unit synchronization verification method, and the technical effects achieved are also completely the same, so they will not be repeated here.

[0086] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0087] Those skilled in the art should understand that the above description is one embodiment provided in conjunction with specific content, and does not imply that the specific implementation of the present invention is limited to these descriptions. Furthermore, due to differences in industry naming conventions, the invention is not limited to the above names or English names. Any methods or structures similar to or identical to those of the present invention, or any technical deductions or substitutions made based on the concept of the present invention, should be considered within the scope of protection of the present invention.

Claims

1. A method for verifying the synchronization of a high-voltage line merging unit, wherein the input terminal of the high-voltage line merging unit is connected to a bus voltage transformer, the output terminal of the high-voltage line merging unit is connected to secondary equipment, and the high-voltage line merging unit is used to synchronously acquire bus voltage signals, convert them into digital signals, and transmit them to the secondary equipment, characterized in that... The method includes: Multiple bus voltage signals are acquired within a preset period, the multiple bus voltage signals are converted into an initial discrete voltage sequence, and a two-dimensional data matrix is ​​constructed based on the initial discrete voltage sequence. Frequency domain analysis is performed on the initial discrete voltage sequence to obtain the amplitude-frequency characteristic spectrum, and the effective model order is determined based on the amplitude-frequency characteristic spectrum; Singular value decomposition is performed on the two-dimensional data matrix. Based on the effective model order, the principal singular values ​​of the two-dimensional data matrix after singular value decomposition are retained, and the two-dimensional data matrix is ​​reconstructed into a reduced-order data matrix. Based on the reduced-order data matrix, the second amplitude and initial phase of the fundamental voltage are extracted from the reduced-order data matrix using the Proni algorithm, and the second amplitude and initial phase of the fundamental voltage are used as the voltage channel verification reference values. The voltage sample value of the line merging unit under test is received, and the voltage sample value is compared with the voltage channel verification reference value to obtain the voltage synchronization verification value of the line merging unit under test.

2. The method for verifying the synchronization of high-voltage line merging units according to claim 1, characterized in that, The method further includes: The acquired bus voltage signal is amplified by voltage follower to obtain the line current signal; Based on the line current signal, the fundamental current amplitude and fundamental current phase of the line current signal are extracted using the full-cycle discrete Fourier algorithm, and the fundamental current amplitude and fundamental current phase of the line current signal are used as the current channel verification benchmark values. The system receives the current sampling value of the line merging unit under test and compares the current sampling value with the current channel verification reference value to obtain the current synchronization verification value of the line merging unit under test.

3. The method for verifying the synchronization of high-voltage line merging units according to claim 1, characterized in that, The step of performing frequency domain analysis on the initial discrete voltage sequence to obtain the amplitude-frequency characteristic spectrum, and setting the effective model order based on the amplitude-frequency characteristic spectrum, includes: The initial discrete voltage sequence is subjected to a fast Fourier transform to obtain the amplitude-frequency response spectrum; Based on the amplitude-frequency characteristic spectrum, the number of spectral peaks in the amplitude-frequency characteristic spectrum that are greater than a preset amplitude threshold is counted, and the counted number is taken as the number of dominant frequency components. The effective model order is set according to the number of dominant frequency components, as follows: ； Where P is the effective model order and K is the number of dominant frequency components.

4. The method for verifying the synchronization of high-voltage line merging units according to claim 1, characterized in that, The step of performing singular value decomposition on a two-dimensional data matrix, retaining the principal singular values ​​after singular value decomposition based on the effective model order, and reconstructing the two-dimensional data matrix into a reduced-order data matrix includes: Singular value decomposition is performed on the two-dimensional data matrix to obtain a singular value diagonal matrix, specifically: ； Where H is a two-dimensional data matrix constructed from the initial discrete voltage sequence, and U is an m×m orthogonal matrix. It is the transpose of an n×n dimensional orthogonal matrix. This is a diagonal matrix of singular values ​​arranged in descending order; Based on the effective model order, retain the singular values ​​in the singular value diagonal matrix that correspond to the effective model order in the dimension, and set the singular values ​​of the remaining dimensions to zero to obtain the reduced-order singular value diagonal matrix. Based on the reduced-order singular value diagonal matrix, a reduced-order data matrix is ​​constructed as follows: ； in, For a reduced-order data matrix, It is a reduced-order singular value diagonal matrix.

5. The method for verifying the synchronization of high-voltage line merging units according to claim 1, characterized in that, The step of extracting the second magnitude and initial phase of the fundamental voltage from the reduced-order data matrix using the Proni algorithm includes: Based on the reduced-order data matrix, establish a system of linear autoregressive equations; The linear autoregressive equation system is rooted by the least squares method to obtain the number of poles corresponding to the effective model order; Based on the poles, the second magnitude of the fundamental voltage and the initial phase of the fundamental voltage in the reduced-order data matrix are calculated using the following formula: ； in, This is the second amplitude of the fundamental voltage. The initial phase of the fundamental voltage. denoted as the complex amplitude of the characteristic pole of the fundamental wave.

6. The method for verifying the synchronization of high-voltage line merging units according to claim 1, characterized in that, The voltage sample value is compared with the voltage channel verification reference value to obtain the voltage synchronization verification value of the merging unit of the line under test, including: Based on the voltage sample values, the fundamental amplitude and fundamental phase measurements of the voltage sample values ​​are extracted using the full-cycle discrete Fourier algorithm. The fundamental amplitude and fundamental phase measurements of the voltage samples are compared with the voltage channel verification reference values ​​to determine the voltage ratio difference test value and voltage angle difference test value of the merging unit of the line under test.

7. The method for verifying the synchronization of high-voltage line merging units according to claim 2, characterized in that, The step of extracting the fundamental current amplitude and phase of the line current signal based on the full-cycle discrete Fourier transform algorithm includes: Based on the full-cycle discrete Fourier algorithm, the real part and imaginary part of the fundamental current phasor of the line current signal are calculated. The fundamental current amplitude and phase of the line current signal are calculated based on the real and imaginary parts of the fundamental current phasor.

8. The method for verifying the synchronization of high-voltage line merging units according to claim 7, characterized in that, The calculation of the fundamental current amplitude and phase of the line current signal based on the real and imaginary parts of the fundamental current phasor includes: The fundamental current amplitude of the line current signal is calculated as follows: ； in, The amplitude of the fundamental current. This represents the real part of the fundamental current phasor. This represents the imaginary part of the fundamental current phasor. The fundamental current phase of the line current signal is specifically calculated as follows: ； in, The phase of the fundamental current. This represents the real part of the fundamental current phasor. This represents the imaginary part of the fundamental current phasor.

9. The method for verifying the synchronization of high-voltage line merging units according to claim 2, characterized in that, The current sample value is compared with the current channel verification reference value to obtain the current synchronization verification value of the merging unit of the line under test, including: Based on the current sampling values, the fundamental amplitude measurement value and fundamental phase measurement value of the current sampling values ​​are extracted using the full-cycle discrete Fourier algorithm; The fundamental amplitude and fundamental phase measurements of the current sampling values ​​are compared with the current channel verification reference values ​​to determine the current ratio difference test value and current angle difference test value of the merging unit of the line under test.

10. A synchronization verification device for high-voltage line merging units, characterized in that, The high-voltage line merging unit synchronization verification device includes: a memory, a processor, and a high-voltage line merging unit synchronization verification program stored in the memory and executable on the processor. The high-voltage line merging unit synchronization verification program is configured to implement the high-voltage line merging unit synchronization verification method as described in any one of claims 1 to 9.

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