An insulation fault locating method for a smart grid DC system

Abstract

The application relates to the technical field of power system monitoring, in particular to an insulation fault positioning method for a smart grid DC system. The method comprises the following steps: acquiring bus-to-ground voltage, system-to-ground leakage current and branch-to-ground current; generating a bias signal carrying pseudo-random logic characteristics based on insulation state judgment logic and implementing controlled bias switching to obtain branch response sequences and effective leakage parameters; processing the effective leakage parameters and bus-to-ground voltage changes by using sliding correlation analysis and an asymmetric bridge model to generate fault branch, fault polarity and insulation impedance results; and correcting the insulation impedance results by multi-frequency band fitting and temperature compensation. The application can reduce positioning deviation caused by strong interference, multiple branch parallel connection and frequency-dependent impedance, and provides a smart DC insulation monitoring device fault positioning method with branch-level positioning capability.

Description

Technical Field

[0001] This invention relates to the field of power system monitoring technology, and in particular to a method for locating insulation faults in a smart grid DC system. Background Technology

[0002] In traditional DC power supply systems, such as DC control power supplies for power plants, communication power supply systems, and early DC power supply systems for data centers, insulation monitoring devices are typically installed between the positive and negative busbars and ground. The insulation status is determined by measuring the insulation resistance of the positive and negative busbars to ground or the voltage distribution to ground.

[0003] Common technical approaches include: periodically switching sampling resistors between the positive and negative busbars and ground, and calculating the overall insulation resistance to ground by utilizing the changes in voltage to ground under different switching states; or constructing an unbalanced bridge to identify insulation degradation phenomena by observing changes in the resistance of the bridge arms. These devices typically monitor the entire DC system, focusing on whether the overall insulation level is below the alarm threshold, and outputting the results to the protection and monitoring system through tiered alarms or single reports.

[0004] With the development of photovoltaic power generation systems, high-voltage DC power supply systems for data centers, and DC charging facilities for electric vehicles, the voltage level and number of branches of DC systems continue to increase. In typical scenarios, the bus voltage can reach hundreds of volts or even higher, and the number of branch circuits can reach ten or even dozens. Furthermore, the load types exhibit diverse characteristics such as inverters, power modules, and servers.

[0005] Engineering practice shows that relying solely on overall insulation resistance or busbar-to-ground voltage deviation makes it difficult to accurately locate specific faulty branches and fault polarities in multi-branch parallel systems, and also makes it difficult to distinguish the contributions of different branches in scenarios where the insulation of multiple branches decreases simultaneously.

[0006] Common improvement methods in the industry include adding more current sensors in combiner boxes or branches and using a combination of multi-point measurement and simple threshold judgment. However, these methods have a high false alarm rate in strong interference environments and often lack robustness for insulation networks with symmetrical insulation degradation and complex frequency characteristics.

[0007] From a deeper perspective of physical constraints and system architecture, the aforementioned traditional insulation monitoring methods generally suffer from several structural limitations. First, the excitation signals are often static or single-frequency signals. In the context of combined factors such as power frequency harmonics, switching noise from power electronic equipment, and communication interference, the excitation-related components of the measured current or voltage are easily submerged by background noise, leading to insufficient stability in judgments based on amplitude or single measurements. Second, overall insulation monitoring often uses simplified equivalent circuit modeling to ground, making it difficult to distinguish the differences in ground impedance between the positive and negative sides of each branch. This results in insufficient representation of symmetrical insulation degradation and asymmetrical grounding faults in the model, essentially only providing information on overall variation rather than detailed judgments of the positive and negative sides. Third, in multi-branch parallel structures, the capacitance, inductance, and leakage paths of each branch form a complex frequency-dependent ground impedance. Bridge calculations at single frequency points or under finite conditions often mix capacitive and inductive components into the DC equivalent resistance estimation, making the estimation results sensitive to different frequencies and temperature conditions, and difficult to use for cross-seasonal or cross-scenario insulation level comparisons. Finally, in scenarios where insulation degradation occurs simultaneously in multiple branches, even if multiple suspected branches can be identified, existing solutions generally lack a systematic step-by-step isolation and impact assessment mechanism. They often can only mark all suspected branches as faults together, and cannot reasonably distinguish between primary fault branches and secondary fault branches from the perspective of restoring the overall insulation level.

[0008] Against the backdrop of the aforementioned technologies, the industry generally needs a method that can stably extract leakage path information related to excitation in a DC system with multiple branches connected in parallel, using a controllable and weakly disturbed excitation signal under conditions of strong noise and complex frequency response. At the same time, it is necessary to construct an asymmetric model that can distinguish the impedance to ground of the positive and negative sides without relying on large-scale segmented disconnection operations, so as to make reliable judgments on fault type and fault polarity. Summary of the Invention

[0009] To achieve the above-mentioned objectives, this invention provides an insulation fault location method for a smart grid DC system, aiming to solve or at least alleviate the problems existing in current DC insulation monitoring, such as strong overall monitoring capability but weak branch location capability, difficulty in identifying symmetrical insulation degradation, difficulty in separating response signals under strong interference environments, and difficulty in graded processing under multiple fault scenarios.

[0010] To achieve the above objectives, the present invention provides the following technical solution: a method for locating insulation faults in a smart grid DC system, comprising:

[0011] Obtain the bus-to-ground voltage, total system-to-ground leakage current, and branch-to-ground current of the DC system, and determine whether the system-to-ground insulation is in a deteriorated state.

[0012] When it is determined that the system's insulation to ground has deteriorated, a bias signal carrying pseudo-random logic characteristics is generated and injected into the DC system's bus and grounding network.

[0013] During the bias signal injection, the ground current of each branch is synchronously sampled to obtain a response sequence, and the response sequence is correlated with the logical characteristics of the bias signal to extract the effective leakage parameters corresponding to each branch and identify suspected faulty branches.

[0014] The changes in bus voltage to ground before and after the bias signal injection, the equivalent parameters of the system to ground, and the effective leakage parameters of the suspected fault branch are substituted into the equivalent model of the asymmetric bridge for simultaneous solution to obtain the insulation impedance to ground of the positive and negative sides of the suspected fault branch, and the fault location result is output.

[0015] To further realize the present invention, the following technical solutions may be preferred:

[0016] Preferably, the determination of whether the system's insulation to ground is in a deteriorated state includes:

[0017] Based on the bus positive terminal to ground voltage, the bus negative terminal to ground voltage and the total ground leakage current of the system, the equivalent ground insulation parameters reflecting the overall ground insulation level are calculated.

[0018] When the equivalent insulation parameter to ground is lower than a preset safety threshold, it is determined that the system insulation to ground has deteriorated, and the generation and injection of the bias signal are triggered.

[0019] Preferably, generating a bias signal carrying pseudo-random logic characteristics and injecting the bias signal between the bus and the grounding network of the DC system includes:

[0020] The spectral characteristics of the background interference signal of the DC system are analyzed, and the symbol time parameters of the pseudo-random logic sequence are adjusted based on the analysis results so that the main frequency band of the bias signal avoids the background interference frequency band.

[0021] After the bias signal is current-limited, it is connected between the bus and the grounding network by controlling the alternating on and off states of the semiconductor switch.

[0022] Preferably, the step of synchronously sampling the ground current of each branch to obtain the response sequence includes:

[0023] Before the bias signal is injected, a uniform time reference is distributed to synchronize the local clocks of each branch current acquisition channel;

[0024] At the time of bias signal injection, a time marker is broadcast to identify the start of sampling, and each current acquisition channel starts acquisition based on this time marker.

[0025] After acquiring the data, the time axes of the response sequences corresponding to the multiple channels are uniformly aligned according to the time reference and the pre-calibrated channel delay parameters.

[0026] Preferably, the step of performing correlation calculations between the response sequence and the logical characteristics of the bias signal to extract the effective leakage parameters corresponding to each branch includes:

[0027] The logic sequence of the bias signal is normalized in amplitude and used as a reference sequence.

[0028] The response sequences corresponding to each branch are discretized and then superimposed on the time axis relative to the reference sequence.

[0029] Calculate the normalized correlation index between the baseline sequence and the response sequences of each branch at each time shift position and extract the peak value;

[0030] The effective leakage parameter of the branch is calculated by multiplying the peak value by the statistical standard deviation of the corresponding branch response sequence.

[0031] Preferably, the step of substituting the bus-to-ground voltage change before and after the bias signal injection, the system-to-ground equivalent parameters, and the effective leakage parameters of the suspected fault branch into the asymmetric bridge equivalent model for simultaneous solution to obtain the ground insulation impedance of the positive and negative sides of the suspected fault branch includes:

[0032] The bias signal is alternately injected between the positive and negative busbars to switch states, and at least two sets of bus-to-ground voltage changes and effective leakage parameters in a linearly independent state are obtained.

[0033] Based on Kirchhoff's circuit laws, a full-rank simultaneous equation system is constructed, which includes the insulation impedance to ground on the positive side and the insulation impedance to ground on the negative side of the suspected fault branch as two unknown variables.

[0034] The full-rank simultaneous equations are solved by numerical calculation to obtain unique estimates of the positive-side insulation impedance to ground and the negative-side insulation impedance to ground.

[0035] Preferably, after obtaining the ground insulation impedance of the positive and negative terminals, the output fault location result includes:

[0036] Calculate the difference between the positive electrode side insulation resistance to ground and the negative electrode side insulation resistance to ground;

[0037] When the difference is less than a preset judgment condition, it is determined that the corresponding branch has experienced a symmetrical decrease in insulation.

[0038] When the difference is greater than or equal to the preset judgment condition, it is determined that an asymmetrical grounding fault has occurred in the corresponding branch, and the pole with the smaller impedance is marked as the side where the fault polarity is located.

[0039] Preferably, after determining the ground insulation impedance of the positive and negative sides of the suspected faulty branch, a multi-band impedance fitting correction step is also included:

[0040] By repeatedly executing the test steps by changing the frequency band or symbol duration of the bias signal, multiple sets of complex equivalent impedance samples under different perturbation frequency bands are obtained.

[0041] Multiple sets of complex equivalent impedance samples under different disturbance frequency bands are input into a preset parallel RC impedance network model for fitting and separation. Frequency-related parasitic capacitance effects are removed, and the pure DC equivalent insulation impedance component is obtained after correction.

[0042] Preferably, the multi-band impedance fitting correction step is followed by a temperature compensation step:

[0043] Obtain the ambient temperature parameters of the current system operating environment;

[0044] By combining a pre-established correlation correction model between temperature and insulation impedance, the pure DC equivalent insulation impedance component is subjected to benchmark temperature compensation.

[0045] Preferably, when there are multiple suspected faulty branches, a multi-branch hierarchical localization step is also included:

[0046] Based on the calculated effective leakage parameters, each suspected fault branch is sorted.

[0047] The suspected faulty branches were temporarily isolated from the system bus in sequence, and the recovery rate of the overall equivalent ground insulation parameters of the system was reassessed.

[0048] The branch that causes the largest increase is identified as the primary fault branch, and the others are identified as secondary fault or minor fault branches.

[0049] The beneficial effects of this invention are:

[0050] This invention introduces a bias signal driven by a pseudo-random logic sequence to inject amplitude-controlled disturbances between the bus and the grounding network. Utilizing multi-channel synchronous sampling and a normalized sliding correlation algorithm, it separates effective leakage components consistent with the timing characteristics of the bias signal from the ground current response of each branch. This allows for the identification of excitation-related leakage paths even in the presence of power frequency harmonics, power electronic noise, and random environmental disturbances, thereby improving the stability and sensitivity of fault branch identification. Simultaneously, this invention incorporates the bus-to-ground voltage variation, the overall equivalent ground parameters of the system, and the effective leakage parameters of each branch into an asymmetric bridge equivalent model. Through numerical solution, it obtains the ground insulation impedance of the positive and negative sides of the target branch, enabling the differentiation between symmetrical insulation degradation and asymmetric grounding faults, and determining whether the fault is biased towards the positive or negative pole.

[0051] Building upon this foundation, the present invention further designs a multi-band impedance verification and parallel model fitting mechanism, as well as a temperature compensation mechanism. By repeatedly testing the same suspected faulty branch under multiple bias signal frequency bands, multi-band equivalent impedance samples are obtained and fitted using a parallel impedance model. This separates the frequency-related capacitive and inductive effects from the DC equivalent insulation parameters. Temperature compensation is then applied to the fitting results based on a pre-established temperature correction relationship, resulting in an insulation resistance estimate that is comparable across seasons and operating conditions. Simultaneously, the present invention combines the changes in effective leakage parameters and overall equivalent ground insulation parameters during the step-by-step isolation process to rank and classify the impact of multiple suspected faulty branches. This allows for the identification of primary faulty branches, secondary faulty branches, and minor faulty branches in scenarios where multiple branches experience simultaneous insulation degradation, supporting the gradual restoration of the overall system insulation level without shutdown or under limited isolation conditions. Attached Figure Description

[0052] Figure 1 This is a schematic diagram of the overall architecture of the intelligent DC insulation monitoring device in a DC system.

[0053] Figure 2 This is a circuit diagram of the bias injection unit of the present invention.

[0054] Figure 3 This is a flowchart of the pseudo-random bias signal generation and frequency band avoidance process of the present invention.

[0055] Figure 4 This is the timing diagram for multi-channel synchronous sampling of the present invention.

[0056] Figure 5 This is a schematic diagram illustrating the sliding correlation processing principle of the present invention.

[0057] Figure 6 This is the equivalent circuit model diagram of the asymmetric bridge of the present invention.

[0058] Figure 7This is a flowchart of the multi-band impedance testing and fitting process of the present invention.

[0059] Figure 8 This is a flowchart of the multi-fault branch step-by-step isolation and hierarchical decision-making process of the present invention. Detailed Implementation

[0060] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0061] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0062] like Figure 1 As shown, the monitoring system in this embodiment is arranged around the DC bus, each branch circuit, and the centralized monitoring device. The monitoring device mainly consists of a voltage acquisition unit, a ground current acquisition unit, a bias injection unit, a logic processing unit, a synchronization unit, a temperature detection unit, and a controllable switching unit.

[0063] On the bus side, voltage acquisition units are connected between the DC positive bus, the negative bus, and the system grounding point, respectively. A measurement link is formed with a high-resolution analog-to-digital converter via a voltage divider network to acquire the positive-to-ground voltage, the negative-to-ground voltage, and the voltage across the bus terminals. The voltage divider network selects the resistor values ​​and withstand voltage ratings based on the bus voltage level, ensuring the analog-to-digital converter input operates within a safe range while balancing measurement accuracy and long-term stability.

[0064] The ground current acquisition unit is arranged between each branch circuit and the grounding path. For example... Figure 1 As shown, each branch's ground path is equipped with a ring Hall current sensor or equivalent insulation amplifier to convert the branch's ground current into a voltage signal proportional to the current. The output of each sensor is connected to a multi-channel analog-to-digital converter or a distributed acquisition module to acquire the ground current waveform of each branch during operation. For the system's total ground leakage current, a separate current sensor can be installed in the busbar ground loop to establish the measurement basis for the overall equivalent ground parameters.

[0065] The bias injection unit is connected between the busbar and the grounding network to form a controlled ground disturbance loop. For example... Figure 2 As shown, the unit includes a current-limiting element and a semiconductor switch. The current-limiting element exists in the form of a fixed or adjustable resistor and is used to limit the current amplitude when the bias signal is injected. The semiconductor switch is selected from metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors with appropriate withstand voltage and conduction capability. Its control terminal is controlled by the drive signal output by the logic processing unit to realize the access and disconnection of the bias signal between the bus and the grounding network.

[0066] The logic processing unit employs a microcontroller or embedded processor with certain computing capabilities and can be configured with external memory. For example... Figure 1 As shown, the logic processing unit communicates with the voltage acquisition unit, ground current acquisition unit, bias injection unit, synchronization unit, temperature detection unit, and controllable switch unit via signal lines. The logic processing unit is responsible for data acquisition, spectrum analysis, pseudo-random logic sequence generation, multi-channel synchronous control, sliding correlation calculation, asymmetric bridge solution, multi-band impedance fitting, and temperature compensation, ultimately generating fault location results and alarm information.

[0067] The synchronization unit connects to the logic processing unit and the ground current acquisition unit, providing a unified time reference. The synchronization unit can employ a precise time protocol chip based on Ethernet transmission, or other synchronization circuits capable of establishing a unified time base among multiple sampling nodes. Through the synchronization unit, the starting time difference of multi-channel current acquisition can be controlled within a range much smaller than the sampling period, thus providing a reliable time baseline for sliding correlation calculations and multi-channel comparisons.

[0068] The temperature detection unit is positioned near the monitoring device and in locations susceptible to environmental influences to collect temperature information representative of the system's operating environment. This unit communicates with the logic processing unit via a serial bus. After performing multi-band impedance fitting, the logic processing unit uses the temperature data provided by the temperature detection unit to perform temperature compensation processing on the insulation impedance estimation results.

[0069] Controllable switching units are typically configured in series with each branch circuit and can be constructed from circuit breakers or disconnectors in conjunction with electric mechanisms. For example... Figure 1 As shown, each branch controllable switch unit is connected to the logic processing unit via control lines. In multi-fault scenarios, the logic processing unit controls these controllable switches in sequence to temporarily isolate suspected faulty branches from the bus, thereby supporting step-by-step isolation and identification of the main faulty branch.

[0070] DC system ground insulation status assessment and degradation judgment: Under the DC system operation state, the bus-to-ground voltage, system-to-ground leakage current and branch-to-ground current are obtained by the voltage acquisition unit and the ground current acquisition unit. Based on this, the overall ground insulation parameters and voltage imbalance index are calculated. When the equivalent ground insulation parameters are lower than the preset safety threshold, regardless of whether the voltage imbalance index is within the allowable range, the system is judged to have insulation degradation, and the subsequent bias signal generation and injection process is triggered.

[0071] In traditional DC system insulation monitoring, the common practice is to determine the presence of a ground fault by measuring the positive and negative pole resistance to ground, or by observing the bus voltage deviation. When the system operates in an ungrounded or high-resistance grounded manner, a decrease in insulation resistance to ground at either pole will manifest as a voltage deviation to ground in the bus voltage distribution, thus triggering an alarm. However, in smart grid DC scenarios with multiple parallel branches and complex load types, the insulation resistance to ground at both poles may decrease simultaneously. In this case, the voltages to ground at both poles may still remain approximately symmetrical, making it difficult to promptly identify the degree of insulation degradation or pinpoint which branch the fault is concentrated in by simply observing the voltage deviation to ground.

[0072] To avoid applying subsequent bias signal disturbances to a system with already good insulation, this embodiment calculates the overall equivalent insulation parameters to ground by combining the bus-to-ground voltage and the system-to-ground leakage current before injecting the bias signal. A voltage imbalance index is then constructed using the difference between the positive and negative bus-to-ground voltages. Only when the overall insulation level drops below a predetermined safety threshold and the positive and negative bus-to-ground voltages remain approximately symmetrical is the system considered to have entered a state of symmetrical insulation degradation, necessitating the initiation of a bias signal injection with pseudo-random characteristics and a fine-grained fault location process.

[0073] This embodiment uses the busbar positive-to-ground voltage, busbar negative-to-ground voltage, and system ground leakage current as inputs. Through combined calculations, it obtains the overall ground insulation parameters. Simultaneously, it extracts and normalizes the difference between the busbar positive-to-ground voltage and the negative-to-ground voltage into a voltage imbalance index. To reduce the impact of short-term disturbances and measurement noise, a time window is introduced during the calculation process. Results from multiple sampling periods are filtered and statistically processed, and a safety threshold range is set by the field engineer based on actual operating standards.

[0074] The overall insulation parameters to ground can be calculated using the following formula:

[0075]

[0076] in, This is the voltage between the positive terminal of the busbar and ground. This is the voltage between the negative terminal of the busbar and ground. This refers to the system's leakage current to ground. Voltage imbalance indicators can be derived from... It is constructed and internally normalized to make it independent of specific bus voltage levels.

[0077] like Figure 3 As shown, after the system is marked as having symmetrical insulation degradation, the logic processing unit first performs spectral analysis on the background signal to identify the interference frequency bands with concentrated energy. Then, it selects a combination from candidate pseudo-random logic sequences and symbol time configurations to ensure that the main frequency band of the bias signal avoids the interference frequency bands, and finally generates a signal for control. Figure 2 The driving sequence of the semiconductor switch is shown.

[0078] In traditional DC insulation monitoring, common excitation methods include single-frequency small-signal injection, step voltage changes, and periodic bias switching. These methods often concentrate on the power frequency or a fixed frequency point in the spectrum. When there are a large number of power supply devices, converters, and communication interferences in the field, the excitation signal is easily submerged by background noise or overlaps with the operating frequency band of the application equipment.

[0079] To improve the identifiability of fault location signals, this embodiment introduces a pseudo-random logic sequence as the time-domain template for the bias signal. The pseudo-random logic sequence has an approximately flat spectrum and good autocorrelation characteristics. By performing correlation operations with the response signal, components consistent with pseudo-random logic features can be highlighted in a noisy background. During the construction process, the logic processing unit analyzes the background spectrum results and adjusts the symbol time parameters to maintain a frequency domain spacing between the main frequency band of the bias signal and the interference frequency band.

[0080] like Figure 2 As shown, the bias injection unit consists of a current-limiting element and a semiconductor switch. The logic processing unit controls the switch to turn on and off according to a pseudo-random logic sequence, causing the current-limiting path to periodically connect and disconnect between the bus and ground, thereby introducing a controlled micro-disturbance into the ground network. The current-limiting element and bias duty cycle are configured according to load sensitivity and system insulation level during design to ensure that the current disturbance introduced by the bias signal is within an acceptable range.

[0081] like Figure 4 As shown, before the bias signal is connected to the bus, the logic processing unit distributes a unified time reference and sampling preparation instruction to each current acquisition unit through the synchronization channel. Each current acquisition unit adjusts its local clock based on the time reference. At the moment the bias signal is connected, the logic processing unit broadcasts a time stamp to identify the start of sampling. Each current acquisition unit starts sampling based on this time stamp and records its local time stamp. After receiving the response sequence of each channel, the logic processing unit aligns the multi-channel response sequence with the time reference and the pre-calibrated channel delay parameters.

[0082] When comparing the response currents of multiple branches, inconsistent data acquisition times for each branch will directly cause a time shift in the corresponding leakage current sequence. This shift will manifest as inconsistent peak positions or reduced peak amplitudes in subsequent calculations. Therefore, it is necessary to establish a unified time reference through a synchronization unit and calibrate the delay of each channel during system deployment. During runtime, the sampled data should be corrected on the time axis based on these parameters.

[0083] like Figure 5 As shown, the logic processing unit maps the pseudo-random logic sequence to a normalized reference sequence. Discretize the ground current response sequence of each branch into and relative to the timeline Perform sliding alignment for each time shift. Calculate normalized correlation indicators .

[0084] The normalized relevant indicators are expressed by the following formula:

[0085]

[0086] in, The mean of the baseline sequence, For the first Mean of the response sequence of each branch. The logic processing unit from... Extracting peak values ​​from curves and its location, combined with the standard deviation of the response sequence. Forming effective leakage parameters:

[0087]

[0088] This parameter is used to characterize the first The intensity of the leakage component in the branch that is consistent with the pseudo-random bias characteristics. For branches without significant faults, Approaching zero, therefore It is also relatively small.

[0089] like Figure 6 As shown, after obtaining the bus voltage change to ground, the system equivalent parameters to ground, and the effective leakage parameters of each suspected fault branch, the insulation impedance to ground of each suspected fault branch on the positive and negative sides is taken as the unknown quantity in the bridge equivalent network, and the equivalent results of the insulation impedance to ground of other branches are taken as the background parameters. A set of equations is constructed to characterize the relationship between the voltage of each node and the branch current, and the estimated values ​​of the insulation impedance to ground of each suspected fault branch on the positive and negative sides are obtained by numerical solution.

[0090] Specifically, based on Kirchhoff's circuit laws, independent incremental equations are constructed for different bias states, such as the equation for state 1: And state 2 equation: Substituting the extracted effective leakage parameters into the above full-rank equations, the positive impedance is obtained through matrix inversion. and negative impedance The only solution.

[0091] The unbalanced bridge method is a common approach in DC insulation monitoring. However, in cases with multiple branches in parallel, asymmetry between positive and negative poles, and frequency-dependent impedance, a single balanced bridge model cannot fully describe the relationships between the branches. This embodiment combines the effective leakage parameters extracted by sliding correlation with the bus-to-ground voltage change, enabling sufficient observables for solving the impedance on both the positive and negative sides of the target branch.

[0092] The logic processing unit constructs multiple equations based on the bridge topology, including equations expressing the relationship between the total bus voltage and the arm voltages, equations expressing the relationship between the current in each arm and the effective leakage parameter, and equations relating the overall equivalent insulation parameter to ground to the impedance of each arm. Since the observed quantities usually outnumber the unknown quantities, a set of optimal estimates can be obtained under over-constraint conditions using least squares or other numerical methods. To avoid obtaining solutions that do not conform to physical meaning, the logic processing unit imposes upper and lower bound constraints on the range of values ​​for the impedance to be determined.

[0093] After obtaining the insulation impedance to ground on both the positive and negative sides, the logic processing unit calculates the difference index between them. If the difference is small, it is determined to be a symmetrical insulation degradation; if the difference increases significantly, it is determined to be an asymmetrical grounding fault, and the fault polarity is determined based on which side has a smaller impedance.

[0094] like Figure 7 As shown, after obtaining the estimated values ​​of the insulation impedance to ground on the positive and negative sides of the suspected faulty branch, the bias signal injection, synchronous sampling, and related calculation steps are repeatedly executed by changing the frequency band or symbol duration of the pseudo-random bias signal. The equivalent impedance results obtained under different frequency bands are used as samples to input into the parallel system impedance model for fitting, and the preliminary estimated value is corrected based on the fitting results. After completing the multi-band impedance fitting, the ambient temperature parameters are read, and the insulation impedance of each suspected faulty branch is temperature compensated according to the pre-established temperature and insulation impedance correction relationship.

[0095] In a real-world insulated circuit containing distributed capacitance and parasitic inductance, the impedance to ground varies with frequency and is not a simple constant. If a bridge model is constructed and the insulation impedance is obtained only in a single frequency band, the result may include frequency-dependent effects in the estimation of the DC equivalent impedance. This embodiment obtains multiple impedance samples by repeatedly testing the same branch in multiple frequency bands and introduces a parallel impedance model for fitting to separate the effects of DC equivalent resistance, distributed capacitance, and parasitic inductance.

[0096] If the fitted parameters exceed the physically reasonable range or the residual is large, the logic processing unit marks the branch as a complex impedance mode and can automatically add test frequencies or prompt for manual verification. After fitting, the logic processing unit further performs temperature compensation on the DC equivalent resistance based on the ambient temperature and temperature correction table provided by the temperature detection unit, so that the final impedance estimate has comparative significance across seasons and operating conditions.

[0097] like Figure 8 As shown, when the effective leakage parameters and insulation impedance changes of multiple branches obtained based on sliding correlation analysis and asymmetric bridge exceed the preset decision threshold, the logic processing unit forms a set of suspected fault branches for these branches and sorts the suspected fault branches according to the magnitude of the effective leakage parameters and the degree of influence on the overall equivalent ground insulation parameters. In a system with a controllable switching unit, the corresponding branches are sequentially isolated from the busbar, and after each isolation, the changes in the overall equivalent ground insulation parameters and the effective leakage parameters of other suspected fault branches are re-evaluated to identify the main fault branches and secondary fault branches.

[0098] In a multi-branch parallel structure, the parallel result of the insulation resistance to ground of each branch determines the overall structure. The size. Therefore, if a branch is isolated, if the whole... A significant increase indicates that this branch contributes substantially to the overall insulation degradation; a smaller increase suggests a relatively limited contribution. The logic processing unit can then... Based on the increase ratio and changes in other branch effective leakage parameters, suspected faulty branches are classified into primary faults, secondary faults, and minor faults.

[0099] Effect verification

[0100] Example 1: Asymmetric fault in a single branch of a 220V photovoltaic combiner system

[0101] This embodiment is based on a photovoltaic 220V DC combiner system for testing. The system bus nominal voltage is 220V DC, configured with 8 combiner branches, each with a rated current of approximately 30A. The monitoring device is installed near the DC bus combiner box, and its overall structure is similar to... Figure 1 The system architectures shown are similar, differing only in voltage level and number of branches.

[0102] By connecting a simulated insulation degradation resistor network in parallel with the positive terminal of the third branch to ground, the equivalent impedance of the positive terminal to ground is reduced to approximately 30kΩ, while the impedance of the negative terminal to ground remains at approximately 80kΩ. Before the bias signal is injected, the total bus voltage is approximately 220V. According to Ohm's law of voltage division, the measured voltage to ground is approximately 60V for the positive terminal and approximately 160V for the negative terminal, exhibiting a random fluctuation of approximately 1 to 2V. The overall equivalent insulation parameter to ground corresponding to the statistical value of the system's leakage current to ground is approximately 21.8 kΩ.

[0103] Two independent test states were obtained by alternating the bias signal injection points: when the bias signal was connected between the positive bus and ground (state 1), the following statistics were obtained. Approximately 55V, Approximately 165V, measured when the bias signal is switched between the negative bus and ground (state 2). Approximately 73.3V, The voltage is approximately 146.7V, while the total bus voltage remains around 220V. After performing sliding correlation analysis on the response sequences of each branch, the voltage of the third branch is... The leakage rate was significantly higher than other branches, and the corresponding effective leakage parameter was also the largest. Subsequently, the test data under the above two sets of conditions were substituted into the asymmetric bridge model and solved simultaneously. The estimated value of the positive side insulation resistance to ground of the third branch was 29.5kΩ, and the estimated value of the negative side insulation resistance to ground was 81.5kΩ. This indicates that the fault is significantly biased towards the positive pole, which is in complete agreement with the simulated fault setting of 30kΩ for the positive pole and 80kΩ for the negative pole.

[0104] In this embodiment, the voltage measurement uncertainty is controlled within approximately 1%, and the ground current measurement uncertainty is controlled within 3%. According to error propagation analysis, the overall equivalent ground insulation parameter estimation error does not exceed 5%, which is insufficient to change the ranking of the third branch in the suspected fault set. This verifies that this implementation can stably identify faulty branches and fault polarity in a 220V photovoltaic combiner system even with measurement deviations and environmental noise.

[0105] Example 2: Multiple Fault Scenarios in a 380V Data Center DC System

[0106] This embodiment selects a data center DC power supply system as the example. The system bus nominal voltage is 380V, and it is configured with 24 branch power supply circuits. The system adopts a high-voltage DC power supply architecture, and the power supply targets are rack-level power distribution units and server loads. The corresponding engineering background is consistent with the existing high-voltage DC power supply practices in data centers.

[0107] To simulate multiple fault scenarios, varying degrees of insulation degradation were introduced into branches 7, 15, and 19. Branch 15 exhibited the lowest insulation impedance, followed by branch 19, while branch 7 showed only a slight insulation degradation. After simulating a fault connection, the overall equivalent insulation parameters to ground were statically measured. The voltage drops from approximately 70kΩ to 18kΩ, but the voltage between the positive and negative poles of the busbar and ground remains basically symmetrical in an average sense, satisfying the symmetrical insulation reduction trigger condition.

[0108] After the bias signal is input, the sliding correlation results show that the 15th branch... The highest fault index was found in the 19th branch, followed by the 7th branch, with the remaining branches showing significantly lower related indicators. After constructing a set of suspected faults based on the effective leakage parameters, the logic processing unit proceeded according to... Figure 8 The step-by-step isolation process shown isolates branches 15, 19, and 7 sequentially. After isolating branch 15, the measurement is repeated. The resistance increased from approximately 18.2 kΩ to approximately 44.6 kΩ; after isolating the 19th branch, It further increased to approximately 65.3 kΩ; finally, after isolating the 7th branch, It rises to approximately 70.1kΩ. Therefore, branch 15 is the primary fault branch, branch 19 is the secondary fault branch, and branch 7 is the branch with slight insulation degradation.

[0109] In this embodiment, the logic processing unit uses sliding window statistics and repeated measures to estimate. The magnitude of the change is considered significant only when the increase exceeds a certain number of standard deviations of the measurement error. In the 380V system, voltage measurement uncertainty is controlled within 1%, and ground current measurement uncertainty is controlled within 3%. Short-term estimated fluctuations are in the range of 5% to 10%. This is due to the isolation of branches 15 and 19. The increase is much greater than the fluctuation range, therefore its primary and secondary fault classification is stable.

[0110] In summary, in both typical scenarios of 220V photovoltaic combiner systems and 380V data center DC systems, this implementation method can complete branch-level fault location, fault polarity determination, and multi-fault branch classification even with measurement errors and environmental disturbances, verifying the engineering feasibility of the method.

[0111] The above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method for locating insulation faults in a smart grid DC system, characterized in that, include: Obtain the bus-to-ground voltage, total system-to-ground leakage current, and branch-to-ground current of the DC system, and determine whether the system-to-ground insulation is in a deteriorated state. When it is determined that the system's insulation to ground has deteriorated, a bias signal carrying pseudo-random logic characteristics is generated and injected into the DC system's bus and grounding network. During the bias signal injection, the ground current of each branch is synchronously sampled to obtain a response sequence, and the response sequence is correlated with the logical characteristics of the bias signal to extract the effective leakage parameters corresponding to each branch and identify suspected faulty branches. The changes in bus voltage to ground before and after the bias signal injection, the equivalent parameters of the system to ground, and the effective leakage parameters of the suspected fault branch are substituted into the equivalent model of the asymmetric bridge for simultaneous solution to obtain the insulation impedance to ground of the positive and negative sides of the suspected fault branch, and the fault location result is output.

2. The method according to claim 1, characterized in that, The determination of whether the system's insulation to ground is in a deteriorated state includes: Based on the bus positive terminal to ground voltage, the bus negative terminal to ground voltage and the total ground leakage current of the system, the equivalent ground insulation parameters reflecting the overall ground insulation level are calculated. When the equivalent insulation parameter to ground is lower than a preset safety threshold, it is determined that the system insulation to ground has deteriorated, and the generation and injection of the bias signal are triggered.

3. The method according to claim 1, characterized in that, The step of generating a bias signal carrying pseudo-random logic characteristics and injecting the bias signal between the bus and the grounding network of the DC system includes: The spectral characteristics of the background interference signal of the DC system are analyzed, and the symbol time parameters of the pseudo-random logic sequence are adjusted based on the analysis results so that the main frequency band of the bias signal avoids the background interference frequency band. After the bias signal is current-limited, it is connected between the bus and the grounding network by controlling the alternating on and off states of the semiconductor switch.

4. The method according to claim 1, characterized in that, The process of synchronously sampling the ground current of each branch to obtain the response sequence includes: Before the bias signal is injected, a uniform time reference is distributed to synchronize the local clocks of each branch current acquisition channel; At the time of bias signal injection, a time marker is broadcast to identify the start of sampling, and each current acquisition channel starts acquisition based on this time marker. After acquiring the data, the time axes of the response sequences corresponding to the multiple channels are uniformly aligned according to the time reference and the pre-calibrated channel delay parameters.

5. The method according to claim 1, characterized in that, The step of performing correlation calculations between the response sequence and the logical characteristics of the bias signal to extract the effective leakage parameters corresponding to each branch includes: The logic sequence of the bias signal is normalized in amplitude and used as a reference sequence. The response sequences corresponding to each branch are discretized and then superimposed on the time axis relative to the reference sequence. Calculate the normalized correlation index between the baseline sequence and the response sequences of each branch at each time shift position and extract the peak value; The effective leakage parameter of the branch is calculated by multiplying the peak value by the statistical standard deviation of the corresponding branch response sequence.

6. The method according to claim 1, characterized in that, The method of substituting the bus-to-ground voltage change before and after the bias signal injection, the system-to-ground equivalent parameters, and the effective leakage parameters of the suspected fault branch into the asymmetric bridge equivalent model for simultaneous solution, and obtaining the ground insulation impedance of the positive and negative sides of the suspected fault branch, includes: The bias signal is alternately injected between the positive and negative busbars to switch states, and at least two sets of bus-to-ground voltage changes and effective leakage parameters in a linearly independent state are obtained. Based on Kirchhoff's circuit laws, a full-rank simultaneous equation system is constructed, which includes the insulation impedance to ground on the positive side and the insulation impedance to ground on the negative side of the suspected fault branch as two unknown variables. The full-rank simultaneous equations are solved by numerical calculation to obtain unique estimates of the positive-side insulation impedance to ground and the negative-side insulation impedance to ground.

7. The method according to claim 6, characterized in that, After obtaining the ground insulation impedance of the positive and negative sides, the output fault location results include: Calculate the difference between the positive electrode side insulation resistance to ground and the negative electrode side insulation resistance to ground; When the difference is less than a preset judgment condition, it is determined that the corresponding branch has experienced a symmetrical decrease in insulation. When the difference is greater than or equal to the preset judgment condition, it is determined that an asymmetrical grounding fault has occurred in the corresponding branch, and the pole with the smaller impedance is marked as the side where the fault polarity is located.

8. The method according to claim 1, characterized in that, After determining the ground insulation impedance of the positive and negative sides of the suspected fault branch, a multi-band impedance fitting correction step is also included: By repeatedly executing the test steps by changing the frequency band or symbol duration of the bias signal, multiple sets of complex equivalent impedance samples under different perturbation frequency bands are obtained. Multiple sets of complex equivalent impedance samples under different disturbance frequency bands are input into a preset parallel RC impedance network model for fitting and separation. Frequency-related parasitic capacitance effects are removed, and the pure DC equivalent insulation impedance component is obtained after correction.

9. The method according to claim 8, characterized in that, The multi-band impedance fitting and correction step is followed by a temperature compensation step: Obtain the ambient temperature parameters of the current system operating environment; By combining a pre-established correlation correction model between temperature and insulation impedance, the pure DC equivalent insulation impedance component is subjected to benchmark temperature compensation.

10. The method according to claim 1, characterized in that, When multiple suspected faulty branches exist, a multi-branch hierarchical localization step is also included: Based on the calculated effective leakage parameters, each suspected fault branch is sorted. The suspected faulty branches were temporarily isolated from the system bus in sequence, and the recovery rate of the overall equivalent ground insulation parameters of the system was reassessed. The branch that causes the largest increase is identified as the primary fault branch, and the others are identified as secondary fault or minor fault branches.

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