A silicon carbide power device test screening circuit, screening method, and apparatus
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING SMART ENERGY RES INST
- Filing Date
- 2025-12-19
- Publication Date
- 2026-08-07
AI Technical Summary
[0006]目前的筛选方式缺乏统一的标准,难以暴露器件的深层缺陷,有待优化
[0040]本申请提供了一种碳化硅功率器件测试筛选电路包括:主回路模块、负载连接模块、栅极驱动测试模块以及主控检测模块;所述主回路模块与所述负载连接模块相连接,用于为测试提供能量;所述负载连接模块与至少两个被测器件相连接,用于切换测试回路以及连接状态;所述栅极驱动测试模块与所述被测器件的栅极相连接,用于在筛选测试中提供驱动脉冲,并在参数复测中提供可编程控制栅压;所述主控检测模块与所述栅极驱动测试模块以及所述负载连接模块均相连接,用于控制所述栅极驱动测试模块以及所述负载连接模块的协同工作,并采集检测信号。在实施中,通过模块化设计实现了重复动态筛选测试与栅极漏电流测试的一体化集成,能够在同一测试平台上完成对碳化硅MOSFET器件栅氧质量的快速、准确筛选。主回路模块提供稳定可调的能量供应,负载连接模块通过智能切换功能,灵活构成双脉冲测试回路或被测器件的漏极源极两端短接状态,实现被测器件的交替考核。栅极驱动测试模块集成了驱动脉冲输出与程控电压输出功能,可在动态测试与静态测试间无缝切换,为栅氧质量评估提供全面的电应力激励。主控检测模块负责整个测试流程的协调控制与信号采集,实现测试过程的自动化与判定标准的程序化执行。电路有助于克服传统组合式筛选方法周期长、效率低、多应力耦合模拟不充分的缺点,通过短时高倍电流应力下的重复动态测试,在近似实际工况的电压、电流、温度、dv/dt耦合应力作用下,快速激发并暴露碳化硅MOSFET栅氧层的深层潜在缺陷。同时,其内置的漏电流测试功能可实现对筛选前后栅氧质量的定量评估,形成完整的“测试-评估-判定”闭环。该方案不仅显著提高了筛选效率,降低了测试成本,还为碳化硅功率器件的可靠性评估提供了标准化、可复用的测试平台,对提升新能源汽车、智能电网等领域所用功率器件的整体可靠性具有重要工程价值。
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Abstract
Description
Technical Field
[0001] This application relates to the field of electronic device processing and testing technology, and in particular to a silicon carbide power device testing and screening circuit, screening method and equipment. Background Technology
[0002] Power semiconductor devices, also known as power electronic devices, are the core and foundation of modern power electronic systems. They are a class of semiconductor switching devices specifically designed for processing, converting, and controlling electrical energy. Through their on / off or continuously adjustable impedance states, they achieve precise control over current, voltage, frequency, and the form of electrical energy. Power semiconductor devices are of paramount engineering significance; they form a crucial bridge connecting low-voltage control and high-voltage loads, and are often referred to as the "CPU" of power electronic devices. From household appliances, industrial motor drives, electric drives and on-board chargers for new energy vehicles, to renewable energy generation, DC transmission, rail transportation, and even data center power supplies, almost all fields involving power conversion and control rely on power semiconductor devices. Their performance directly determines the efficiency, power density, reliability, and cost of the entire power electronic system.
[0003] However, during the manufacturing process of power semiconductor devices, internal defects are inevitably introduced due to various factors such as raw material purity, lattice defects, process variations, and photolithography alignment deviations. These defects may lead to performance degradation or even sudden failure of the devices under harsh operating conditions such as high voltage, high current, and high temperature over a long period of time. Screening and testing power semiconductor devices is a critical step in ensuring their reliable operation in power electronic systems and has significant engineering implications.
[0004] In related technologies, the conventional screening and testing methods for power devices currently mainly include three categories: First, static screening tests: by measuring parameters such as withstand voltage, on-state voltage drop, and leakage current, the basic electrical performance of the device is verified to meet the standards; second, dynamic screening tests: using double-pulse tests as a means, the dynamic parameters such as switching time, switching loss, and reverse recovery characteristics are evaluated to reflect the performance of the device under switching conditions; third, reliability screening tests: through stress tests such as high temperature reverse bias (HTRB), high temperature gate bias (HTGB), temperature cycling (TC), power cycling (PC), dynamic gate bias (DGB), and dynamic reverse bias (DRB), extreme environments in long-term use are simulated to accelerate the exposure of potential defects and screen out qualified devices that can withstand long-term stress.
[0005] However, current power device screening methods have the following technical problems:
[0006] Current screening methods lack unified standards and are difficult to expose deep defects in devices, so they need to be optimized. Summary of the Invention
[0007] Therefore, it is necessary to provide a silicon carbide power device testing and screening circuit, screening method, and equipment that can improve the screening efficiency and accuracy of power semiconductor devices.
[0008] This application provides a silicon carbide power device test and screening circuit, including: a main circuit module, a load connection module, a gate drive test module, and a main control detection module;
[0009] The main circuit module is connected to the load connection module and is used to provide energy for the test;
[0010] The load connection module is connected to at least two devices under test and is used to switch test loops and connection states.
[0011] The gate drive test module is connected to the gate of the device under test and is used to provide drive pulses in screening tests and programmable gate voltages in parameter retests.
[0012] The main control detection module is connected to the gate drive test module and the load connection module, and is used to control the coordinated operation of the gate drive test module and the load connection module, and to collect detection signals.
[0013] In one embodiment, the main circuit module includes a capacitor charging and discharging circuit;
[0014] The capacitor charging and discharging circuit includes a DC power supply, a charging resistor, a discharging resistor, and a supporting capacitor.
[0015] The capacitor charging and discharging circuit is used to provide a settable bus voltage for dynamic screening tests.
[0016] In one embodiment, the load connection module includes at least two load inductors and a switching unit;
[0017] The switching unit is used to connect any of the load inductors to the main circuit to form a double-pulse test circuit, or to short-circuit the drain and source of the device under test to form a leakage current test state.
[0018] In one embodiment, the gate drive test module includes at least two gate drive pulse sources and at least two dynamically controlled gate voltage sources:
[0019] The gate drive pulse source is used to input a settable drive pulse signal to the gate of the corresponding device under test.
[0020] The programmable gate voltage source is used to apply a settable positive or negative DC voltage to the gate of the corresponding device under test to achieve leakage current testing.
[0021] In one embodiment, the main control detection module includes a controller, a voltage sampling unit, and a current sampling unit;
[0022] The control bridge is used to control the timing of the drive pulses, the state of loop switching, and the output of the programmable control gate voltage;
[0023] The current sampling unit is connected in series in the gate circuit of the device under test (DUT) to collect the gate leakage current of the DUT.
[0024] Secondly, this application also provides a method for testing and screening silicon carbide power devices, the method being implemented based on a silicon carbide power device testing and screening circuit as described in any one of the first aspects, the method comprising:
[0025] Based on the results of the preliminary test, set the test parameters and number of times for dynamic screening, and connect at least two devices under test to the circuit and group them.
[0026] Adjust the circuit to enter the leakage current test state, apply a preset gate voltage to each of the two devices under test, and measure and record the initial gate leakage current of the devices under test.
[0027] The control circuit enters the dynamic test state, and sequentially uses one device as the device under test and the other device as the companion device, and applies a high-current stress repetitive double pulse test to alternately repeat the dynamic screening test.
[0028] After each dynamic screening test, the device re-enters the leakage current test state and re-measures the gate leakage current of the device under test. If the re-measured gate leakage current of any device under test is significantly degraded compared with the corresponding initial gate leakage current, the device under test is determined to be unqualified.
[0029] In one embodiment, the pre-test results include the number of dynamic screening tests, bus voltage, drive gate voltage, drive resistance, test current, and pulse duration;
[0030] The number of tests is determined experimentally so that the screening effect is insufficient when the number of tests is less than the number of tests, and the number of defective devices screened out no longer increases significantly when the number of tests is more than the number of tests.
[0031] In one embodiment, the pre-test results include:
[0032] The maximum turn-off current capability of the device under test was verified by a single-pulse turn-off test.
[0033] Based on the pre-acquired device data, determine the reference values for the bus voltage, the drive gate voltage, and the drive resistor;
[0034] The test current is determined under the constraints of the maximum shutdown current capability and the shutdown voltage overshoot not exceeding the rated voltage of the device under test;
[0035] Based on the test current and the load inductance value, the pulse width and time of the dual pulses are calculated.
[0036] In one embodiment, determining that a device under test is unqualified if the retested gate leakage current of any of the devices under test is significantly degraded compared to the corresponding initial gate leakage current includes:
[0037] The determination of whether the gate leakage current of the retest has significantly deteriorated is based on a preset degradation judgment multiple threshold.
[0038] Thirdly, this application also provides a screening device, including a silicon carbide power device test screening circuit according to any embodiment of the first aspect, wherein the circuit is implemented according to a silicon carbide power device test screening method according to any embodiment of the second aspect.
[0039] The aforementioned silicon carbide power device testing and screening circuit, screening method, and equipment, derived through the technical features of the embodiments, can achieve the following beneficial effects to address the technical problems raised in the background art:
[0040] This application provides a silicon carbide power device test and screening circuit, comprising: a main circuit module, a load connection module, a gate drive test module, and a main control detection module. The main circuit module is connected to the load connection module and provides energy for testing. The load connection module is connected to at least two devices under test (DUTs) and switches the test circuit and connection state. The gate drive test module is connected to the gate of the DUT and provides a drive pulse during screening tests and a programmable gate voltage during parameter retesting. The main control detection module is connected to both the gate drive test module and the load connection module and controls their coordinated operation, and acquires detection signals. In implementation, modular design achieves integrated repetitive dynamic screening tests and gate leakage current tests, enabling rapid and accurate screening of the gate oxide quality of silicon carbide MOSFET devices on the same test platform. The main circuit module provides a stable and adjustable energy supply, and the load connection module, through intelligent switching, flexibly forms a dual-pulse test circuit or a short-circuited state between the drain and source terminals of the DUT, enabling alternating testing of the DUTs. The gate drive test module integrates drive pulse output and programmable voltage output functions, enabling seamless switching between dynamic and static testing, and providing comprehensive electrical stress excitation for gate oxide quality assessment. The main control detection module is responsible for the coordinated control and signal acquisition of the entire test process, realizing the automation of the test process and the programmed execution of judgment criteria. This circuit helps overcome the shortcomings of traditional combined screening methods, such as long cycles, low efficiency, and insufficient simulation of multi-stress coupling. Through repeated dynamic testing under short-term high-current stress, it rapidly excites and exposes deep-seated potential defects in the gate oxide layer of silicon carbide MOSFETs under voltage, current, temperature, and dv / dt coupling stresses similar to actual operating conditions. Simultaneously, its built-in leakage current testing function enables quantitative evaluation of gate oxide quality before and after screening, forming a complete "test-evaluation-judgment" closed loop. This solution not only significantly improves screening efficiency and reduces testing costs, but also provides a standardized and reusable testing platform for the reliability assessment of silicon carbide power devices, possessing significant engineering value for improving the overall reliability of power devices used in new energy vehicles, smart grids, and other fields. Attached Figure Description
[0041] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0042] Figure 1 This is a schematic diagram of the architecture of a silicon carbide power device test and screening circuit in an embodiment of this application;
[0043] Figure 2 This is a schematic diagram of the connection of a silicon carbide power device test and screening circuit in an embodiment of this application;
[0044] Figure 3 This is a flowchart illustrating a silicon carbide power device testing and screening method according to an embodiment of this application.
[0045] Figure 4 This is a flowchart illustrating a silicon carbide power device testing and screening method in a specific embodiment.
[0046] Figure 5 This is a schematic diagram of the pre-test process in a specific embodiment.
[0047] Explanation of reference numerals in the attached diagram: 100, main circuit module; 200, load connection module; 300, gate drive test module; 400, main control detection module. Detailed Implementation
[0048] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0049] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0050] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0051] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0052] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.
[0053] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.
[0054] This application was made by the inventor based on his understanding and research into the following issues:
[0055] Semiconductor power devices are widely used in critical fields such as new energy vehicles, smart grids, and industrial control. Their failure can lead to system paralysis or even safety accidents. Potential defects caused by material impurities and process flaws during manufacturing (such as gate oxide defects and junction microcracks) often cause devices to fail suddenly in the early stages of service. Screening tests simulate stress conditions under actual operating conditions (such as electrical stress and thermal stress) to excite and eliminate devices with potential defects that are destined for early failure. This not only ensures the long-term stability of delivered devices and reduces the failure rate and maintenance costs of the entire system, but also provides data support for device design optimization and process improvement. Especially in fields with high reliability requirements such as automobiles and power grids, screening tests are the "first line of defense" for ensuring system safety.
[0056] For silicon carbide (SiC) power devices, the gate oxide quality of SiC MOSFETs is the most concerning issue, resulting from a combination of factors. The structure and oxidation mechanism of SiC material differ significantly from silicon. Oxidation generates gas and free carbon, easily leading to interface defects. SiC has a high interface state density, with an interface defect density 2-3 orders of magnitude higher than Si devices. Oxidation quality varies greatly across different crystal planes. Furthermore, surface defects such as steps, dislocations, and stacking faults formed during SiC crystal growth can cause uneven oxide layer thickness and decreased density during oxidation, creating weak areas in the gate oxide layer. The high-temperature oxidation process can easily induce elemental segregation, and stress generated during cooling due to thermal expansion differences can cause gate oxide cracks. In addition, the high-frequency, high-temperature, and high-voltage applications demand higher gate oxide reliability, further amplifying the impact of various defects and making gate oxide quality control even more difficult. Therefore, it is necessary to strengthen research on screening and testing the gate oxide quality of SiC MOSFET devices.
[0057] Currently, conventional screening and testing methods for power devices mainly include three categories: First, static screening tests: by measuring parameters such as withstand voltage, on-state voltage drop, and leakage current, the basic electrical performance of the device is verified to meet the standards; second, dynamic screening tests: using double-pulse tests as a means, the dynamic parameters such as switching time, switching loss, and reverse recovery characteristics are evaluated to reflect the performance of the device under switching conditions; third, reliability screening tests: through stress tests such as high temperature reverse bias (HTRB), high temperature gate bias (HTGB), temperature cycling (TC), power cycling (PC), dynamic gate bias (DGB), and dynamic reverse bias (DRB), extreme environments in long-term use are simulated to accelerate the exposure of potential defects and screen out qualified devices that can withstand long-term stress.
[0058] For device reliability screening tests, stress can be mainly divided into four aspects: voltage, current, temperature, and dv / dt. By increasing a certain stress condition within an appropriate range, defective devices can be screened out more quickly. For example, HTRB and HTGB include voltage and temperature stress, TC includes temperature stress and rapid changes, PC includes current and temperature stress, and DGB and DRB include voltage and dv / dt stress. Currently, the industry commonly uses a combination of the above-mentioned reliability tests for device factory screening tests, aiming to include all stress conditions and expose all defects in the device, such as a screening test combination of 6h HTGB + 6h HTRB + 3h PC.
[0059] However, there is currently a lack of unified standards for device screening tests, with significant differences in test combinations and durations among different manufacturers. To ensure screening quality, the entire testing cycle is often lengthy and inefficient. Furthermore, no single screening method can currently cover all stress conditions simultaneously, and combined screening methods are insufficient to fully expose potential problems in devices under these stress coupling effects. Screening for the gate oxide quality of SiC MOSFET devices precisely requires strengthening the assessment of the effects of such stress coupling; conventional testing methods may fail to thoroughly expose deep-seated defects.
[0060] To address the aforementioned issues, this application provides a silicon carbide power device testing and screening circuit, screening method, and equipment.
[0061] In one embodiment, it can be as follows Figure 1 and Figure 2 As shown, this application provides a silicon carbide power device test and screening circuit, including: a main circuit module, a load connection module, a gate drive test module, and a main control detection module.
[0062] The main circuit module is connected to the load connection module and is used to provide energy for the test.
[0063] The load connection module is connected to at least two devices under test and is used to switch test circuits and connection states.
[0064] The gate drive test module is connected to the gate of the device under test and is used to provide drive pulses in screening tests and programmable gate voltages in parameter retests.
[0065] The main control detection module is connected to the gate drive test module and the load connection module, and is used to control the coordinated operation of the gate drive test module and the load connection module, and to collect detection signals.
[0066] By implementing the above-described silicon carbide power device testing and screening circuit, the following beneficial effects can be achieved:
[0067] This application provides a silicon carbide power device test and screening circuit, comprising: a main circuit module, a load connection module, a gate drive test module, and a main control detection module. The main circuit module is connected to the load connection module and provides energy for testing. The load connection module is connected to at least two devices under test (DUTs) and switches the test circuit and connection state. The gate drive test module is connected to the gate of the DUT and provides a drive pulse during screening tests and a programmable gate voltage during parameter retesting. The main control detection module is connected to both the gate drive test module and the load connection module and controls their coordinated operation, and acquires detection signals. In implementation, modular design achieves integrated repetitive dynamic screening tests and gate leakage current tests, enabling rapid and accurate screening of the gate oxide quality of silicon carbide MOSFET devices on the same test platform. The main circuit module provides a stable and adjustable energy supply, and the load connection module, through intelligent switching, flexibly forms a dual-pulse test circuit or a short-circuited state between the drain and source terminals of the DUT, enabling alternating testing of the DUTs. The gate drive test module integrates drive pulse output and programmable voltage output functions, enabling seamless switching between dynamic and static testing, and providing comprehensive electrical stress excitation for gate oxide quality assessment. The main control detection module is responsible for the coordinated control and signal acquisition of the entire test process, realizing the automation of the test process and the programmed execution of judgment criteria. This circuit helps overcome the shortcomings of traditional combined screening methods, such as long cycles, low efficiency, and insufficient simulation of multi-stress coupling. Through repeated dynamic testing under short-term high-current stress, it rapidly excites and exposes deep-seated potential defects in the gate oxide layer of silicon carbide MOSFETs under voltage, current, temperature, and dv / dt coupling stresses similar to actual operating conditions. Simultaneously, its built-in leakage current testing function enables quantitative evaluation of gate oxide quality before and after screening, forming a complete "test-evaluation-judgment" closed loop. This solution not only significantly improves screening efficiency and reduces testing costs, but also provides a standardized and reusable testing platform for the reliability assessment of silicon carbide power devices, possessing significant engineering value for improving the overall reliability of power devices used in new energy vehicles, smart grids, and other fields.
[0068] In one embodiment, it can be as follows Figure 1 and Figure 2 As shown, the main circuit module includes a capacitor charging and discharging circuit;
[0069] The capacitor charging and discharging circuit includes a DC power supply, a charging resistor, a discharging resistor, and a supporting capacitor.
[0070] The capacitor charging and discharging circuit is used to provide a settable bus voltage for dynamic screening tests.
[0071] For example, the control switches S1 and S2 of the gate circuits of the devices under test (DUT1 and DUT2) are respectively connected to the drive pulse signal sources VGG1 and VGG2; depending on the different devices under test (lower DUT1 or upper DUT2), the control switch S3 needs to be connected to the inductors L1 or L2 to form a dual-pulse test circuit.
[0072] The main circuit of the dual-pulse test, namely the capacitor charging and discharging circuit, is composed of power supply VDD, charging resistor RC, discharging resistor RD and capacitor C. The charging and discharging circuit controls the high-voltage DC power supply VDD to charge the bus capacitor C, so as to provide the voltage and energy required for the dual-pulse test.
[0073] In this embodiment, the capacitor charging and discharging circuit provides a stable and settable bus voltage for dynamic screening tests, ensuring rapid energy supply and precise control during the double-pulse test. This provides reliable voltage support for repeated dynamic tests under high current stress and is the fundamental guarantee for achieving short-time high-stress screening.
[0074] In one embodiment, it can be as follows Figure 1 and Figure 2 As shown, the load connection module includes at least two load inductors and a switching unit;
[0075] The switching unit is used to connect any of the load inductors to the main circuit to form a double-pulse test circuit, or to short-circuit the drain and source of the device under test to form a leakage current test state.
[0076] For example, the load inductor provides an inductive load for the circuit under test to regulate the current when the device is turned on. The two devices DUT1 and DUT2 are each other's test and companion devices. The load inductors L1 and L2 can be switched by controlling switch S3, which can enable repeated dynamic screening tests to be performed on devices DUT1 and DUT2 respectively.
[0077] During the test, the switching of the gates of the two devices is controlled by drive pulse signal sources VGG1 and VGG2, respectively, which can provide drive voltage signals with a certain pulse width and amplitude to the gate and source of the two devices.
[0078] In this embodiment, the load connection module achieves flexible switching of test modes through the switching unit. It can form a dual-pulse test circuit to apply high stress, or switch to a short-circuit state to perform static leakage current testing. This realizes seamless integration and efficient execution of dynamic screening and static evaluation on the same platform.
[0079] In one embodiment, it can be as follows Figure 1 and Figure 2 As shown, the gate drive test module includes at least two gate drive pulse sources and at least two programmable gate voltage sources:
[0080] The gate drive pulse source is used to input a settable drive pulse signal to the gate of the corresponding device under test.
[0081] The programmable gate voltage source is used to apply a settable positive or negative DC voltage to the gate of the corresponding device under test to achieve leakage current testing.
[0082] In this embodiment, the gate drive test module integrates dynamic drive and static test functions. It applies switching stress through a drive pulse source to excite potential gate oxide defects and uses a programmable gate voltage source to provide accurate static bias voltage for quantitative assessment of leakage current, thus realizing closed-loop detection of gate oxide quality from stress excitation to parameter verification.
[0083] In one embodiment, it can be as follows Figure 1 and Figure 2 As shown, the main control detection module includes a controller, a voltage sampling unit, and a current sampling unit;
[0084] The control bridge is used to control the timing of the drive pulses, the state of loop switching, and the output of the programmable control gate voltage;
[0085] The current sampling unit is connected in series in the gate circuit of the device under test (DUT) to collect the gate leakage current of the DUT.
[0086] For example, the control switch S1 of the gate circuit of device DUT1 is connected to the programmable voltage source VG1 or VG2; the control switch S2 of the gate circuit of device DUT2 is connected to the programmable voltage source VG3 or VG4; depending on the device under test (lower DUT1 or upper DUT2), the control switch S3 needs to be shorted between the drain and source terminals of the device under test respectively.
[0087] The programmable voltage sources VG1 and VG2 (or VG3 and VG4) have opposite voltage directions, providing the ± voltage values required for leakage current testing at the gate and source of both devices. Ammeters A1 and A2, connected in series at the gate and source of the device under test, can monitor the gate leakage current to assess the gate oxide quality of the device before and after screening testing.
[0088] In this embodiment, the main control detection module serves as the core of the testing system. It coordinates the timing and status of the driving, switching, and detection processes through the controller to ensure the automation and accuracy of the testing steps. At the same time, the current sampling unit monitors the changes in the gate leakage current in real time, providing key data support for the gate oxide quality assessment, thus realizing closed-loop control and intelligent evaluation of the testing process.
[0089] Based on the same inventive concept, this application also provides a silicon carbide power device testing and screening method. This method is implemented based on a silicon carbide power device testing and screening circuit as described in any of the above embodiments, and can be used as described in... Figure 3 and Figure 4 As shown, the method includes:
[0090] Step 302: Based on the results of the preliminary test, set the test parameters and number of times for dynamic screening, and connect at least two devices under test to the circuit and group them.
[0091] For example, based on the characteristics of the test device, the conditions and number of repeated dynamic screening tests can be determined through preliminary experiments, and the gate voltage range for repeated screening tests can be determined (refer to the device datasheet VGSmax). For the same batch of devices, they are grouped in pairs (two devices are required for dual-pulse testing), and the devices in the first group (the device under test and the device under test) are connected to the test circuit to complete the pre-test preparation.
[0092] Step 304: Adjust the circuit to enter the leakage current test state, apply a preset gate voltage to each of the two devices under test, and measure and record the initial gate leakage current of the devices under test.
[0093] For example, the control switch S3 can be used to short-circuit the DS terminals of the device under test (DUT1), and the control switch S1 of the gate circuit of the DUT can be used to sequentially turn on the programmable voltage sources VG1 and VG2. By increasing VGG, the gate-source voltage measured on the voltmeter VGS1 can reach the specified gate-source voltage value VGSset1. Then, the corresponding gate leakage current value IGS1 can be read from the ammeter A1 and recorded.
[0094] Control switch S3 shorts the DS terminals of device under test (DUT2). Control switch S2 of the gate circuit of DUT2 sequentially turns on programmable voltage sources VG3 and VG4. VGG is increased until the gate-source voltage measured on voltmeter VGS2 reaches the specified gate-source voltage value VGSset2. Then, the corresponding gate leakage current value IGS2 is read from ammeter A2 and recorded.
[0095] Step 306: The control circuit enters the dynamic test state, and sequentially uses one device as the device under test and the other device as the companion device, and applies a high-current stress repetitive double pulse test to alternately repeat the dynamic screening test.
[0096] Step 308: After each dynamic screening test, re-enter the leakage current test state and re-measure the gate leakage current of the device under test. If the re-measured gate leakage current of any device under test is significantly degraded compared with the corresponding initial gate leakage current, the device under test is determined to be unqualified.
[0097] For example, a repeated dynamic screening test can be performed on DUT1:
[0098] DUT1 is the device under test, and DUT2 is the auxiliary device under test. The control switch S3 is turned on to form a dual-pulse test circuit with inductor L1. The control switches S1 and S2 of the gate circuits of devices DUT1 and DUT2 are turned on to drive pulse signal sources VGG1 and VGG2 respectively. A certain number of repeated dynamic screening tests are carried out according to the predetermined screening test conditions.
[0099] For example, the gate leakage current of two devices can be retested. If the gate leakage current (IGSS) of one device exceeds 5 times the initial value, the device with abnormal IGSS (i.e. the unqualified device) can be replaced with a new device and used as the device under test (DUT1) to carry out repeated dynamic screening tests. If the gate leakage current (IGSS) of both devices does not exceed 5 times the initial value, the subsequent steps can be carried out.
[0100] For example, repeated dynamic screening tests can be performed on DUT2:
[0101] DUT2 is the device under test, and DUT1 is the auxiliary device under test. The control switch S3 is turned on to form a dual-pulse test circuit with inductor L2. The control switches S1 and S2 of the gate circuits of devices DUT1 and DUT2 are turned on to drive pulse signal sources VGG1 and VGG2 respectively. A certain number of repeated dynamic screening tests are carried out according to the predetermined screening test conditions.
[0102] For example, the gate leakage current of the two devices can be retested: if the gate leakage current (IGSS) of one device exceeds 5 times the initial value, the device is considered to have poor gate oxide quality and fails the screening test; otherwise, the device is considered to have good gate oxide quality and passes the screening test.
[0103] It is worth noting that each device needs to be evaluated both as the device under test (DUT) and as a co-test device. This is because during the test, the DUT is subjected to short-term voltage / current stress by a MOSFET, while the co-test device is subjected to short-term voltage / current stress by a body diode. Therefore, a comprehensive screening test and evaluation of the devices is required.
[0104] By implementing the above-described testing and screening method for silicon carbide power devices, the following beneficial effects can be achieved:
[0105] In this embodiment, a closed-loop process of "initial leakage current measurement - high-stress repeated dynamic testing - retesting leakage current for judgment" efficiently and accurately screens the gate oxide quality of silicon carbide power devices. The core of this method lies in using short-duration, high-current-stress repeated dynamic testing to simulate the electrothermal coupling stress in actual operating conditions, rapidly stimulating deep-seated potential defects in the gate oxide. Then, by accurately retesting changes in the gate leakage current, the degree of gate oxide damage is quantitatively assessed, thereby reliably identifying devices at risk of early failure. This method not only significantly improves screening efficiency and shortens the testing cycle but also enhances the detection capability of gate oxide interface defects that are difficult to expose using traditional screening methods, providing an effective technical means to ensure the long-term reliability of power devices in high-voltage and high-frequency applications.
[0106] In one embodiment, it can be as follows Figure 5 As shown, the pre-test results include the number of dynamic screening tests, bus voltage, drive gate voltage, drive resistance, test current, and pulse time;
[0107] The number of tests is determined experimentally so that the screening effect is insufficient when the number of tests is less than the number of tests, and the number of defective devices screened out no longer increases significantly when the number of tests is more than the number of tests.
[0108] In this embodiment, by optimizing the determined number of dynamic screening tests, a balance between screening efficiency and detection rate is achieved: while ensuring that potential gate oxide defects can be effectively stimulated, unnecessary overtesting is avoided, thereby completing the reliable screening of batch devices in the shortest possible time, significantly improving overall testing efficiency and economic benefits.
[0109] In one embodiment, it can be as follows Figure 5 As shown, the preliminary test results include:
[0110] The maximum turn-off current capability of the device under test was verified by a single-pulse turn-off test.
[0111] Based on the pre-acquired device data, determine the reference values for the bus voltage, the drive gate voltage, and the drive resistor;
[0112] The test current is determined under the constraints of the maximum shutdown current capability and the shutdown voltage overshoot not exceeding the rated voltage of the device under test;
[0113] Based on the test current and the load inductance value, the pulse width and time of the dual pulses are calculated.
[0114] For example, to verify the maximum turn-off current capability of a device at room temperature, the maximum drain pulse current value ID(pulse) in the datasheet can be referenced, and then a single-pulse turn-off test can be performed. By continuously increasing the maximum current value during turn-off, the maximum turn-off capability of the device can be determined (the device can withstand multiple single-pulse turn-off tests without damage). When the maximum current through the device exceeds a certain value (ID(pulse)), the device performance is damaged, and the maximum turn-off current capability of the device is considered to be ID(pulse).
[0115] For example, some screening test conditions can be determined based on the device datasheet: conventional dynamic test conditions can be selected, VGS+ and VGS- are Vgsop in the datasheet, the drive resistors are Rgon and Rgoff in the datasheet, and the bus voltage VDD is generally 0.5 to 0.7 times the device's rated voltage (e.g., the dynamic test voltage of a 1200V device is usually 800V).
[0116] For example, the screening test currents (ID1 and ID2) can be determined based on the device's ID (pulse): For a batch of devices with acceptable gate oxide quality, when ID1 and ID2 < ID (pulse), the repeated dynamic screening tests conducted under this condition are within the device's turn-off current capability range, thus device screening can be performed. Furthermore, to screen out problematic devices in a shorter time, the current stress should be increased as much as possible within the device's capability range; however, considering that a larger current leads to device turn-off voltage overshoot, and the device turn-off voltage overshoot VDSmax will be larger (and cannot exceed the device's rated voltage), and that different test systems have different parasitic parameters (leading to different VDSmax), it was ultimately determined through experiments that ID1 and ID2 being 0.7 to 0.9 times the rated current is more appropriate. The above values are exemplary embodiments; in actual practice, the values are determined based on application requirements and test results, and will not be elaborated here.
[0117] For example, the pulse width times (t1, t2, and t3) can be determined by calculation: once the load inductance L value is determined, the pulse width times (t1 and t3) of the two pulse segments can be determined by t1 = ID1L / U and t3 = (ID2 - ID1)L / U, respectively. Considering that if the interval time is too short, the device may not be completely turned off, and the waveform may still oscillate, while if the interval is too long, the energy of the load inductor may be slowly released through parasitic resistance (causing a decrease in current value), so the interval time t2 should be controlled between 5μs and 10μs. The above values are exemplary embodiments, and the actual values are determined according to application requirements and test results, which will not be elaborated here.
[0118] For example, to determine the number of repeated dynamic screening tests N: after determining the test conditions using the aforementioned method, repeated dynamic screening tests are sequentially conducted on the same batch of devices (at least 10 devices required), with N=1, 5, 10, 20, 30~100 times. By re-measuring the gate leakage current values of the devices before and after the screening tests, it can be seen that there is a critical value for the number of screening tests. That is, when N < the critical value, devices with gate oxide problems cannot be effectively screened, while when N > the critical value, the number of problematic devices screened no longer increases, only increasing the test time. Finally, through experiments, it was determined that the number of repeated dynamic screening tests N is generally 10~20 times. The above values are exemplary embodiments. In actual situations, the value is determined according to application requirements and test results, and will not be elaborated here.
[0119] In this embodiment, by verifying the device's limit capabilities, referring to specification data, defining safety boundaries, and calculating timing parameters, it is ensured that the screening test can apply sufficient stress to excite defects while completely avoiding overstress damage to normal devices, thus laying a scientific foundation for the reliability and safety of subsequent batch screening.
[0120] In one embodiment, step 308 includes:
[0121] The determination of whether the gate leakage current of the retest has significantly deteriorated is based on a preset degradation judgment multiple threshold.
[0122] In this embodiment, the degree of degradation of gate oxide quality is objectively quantified by using a preset, uniform degradation factor threshold, avoiding errors from subjective judgment. This not only achieves standardization and repeatability of screening results, but also provides a clear and operable quantitative basis for reliability comparison of different batches and models of devices.
[0123] In one specific embodiment, the circuit and method described in this application are used to perform product screening tests on a 1200V SiC MOSFET device in a To-247-4 package. The specific steps are as follows:
[0124] According to the device datasheet, the typical dynamic test conditions for the device are VDD=800V, VGS+=18V, VGS-=-4V, Rgon=Rgoff=2.4Ω; maximum pulse current ID(pulse)=120A.
[0125] A single-pulse turn-off test was conducted to verify the maximum current turn-off capability of the devices. The test conditions were VDD=800V, ID=120A, VGS+=18V, VGS-=-4V, Rgon=Rgoff=2.4Ω, and the inductor L was selected as 100μH. Therefore, the pulse time t1=100μH*120A / 800V=15μs. At least 10 devices were selected, and each device underwent more than 5 single-pulse turn-off tests. Then, the static parameters of the devices were retested (including key parameters such as gate-source leakage current, drain-source leakage current, threshold voltage, and on-resistance). Finally, all 10 devices passed the maximum turn-off current capability verification, i.e., ID(pulse)=120A.
[0126] By selecting appropriate ID1 and ID2 to conduct double-pulse tests and continuously increasing the values of ID1 and ID2, it was found that when ID2=100A, the device turn-off voltage overshoot VDSmax remained stable between 1100V and 1150V (<1200V rated voltage). Finally, the repeated dynamic screening current conditions of ID1=80A and ID2=100A were determined. Furthermore, the test conditions of t1=100μH*80A / 800V=10μs, t2=100μH*20A / 800V=2.5μs, and t3=5μs can be calculated.
[0127] Under the established test conditions (VDD=800V, VGS+=18V, VGS-=-4V, Rgon=Rgoff=2.4Ω, ID1=80A, ID2=100A), repeated dynamic screening tests were conducted on 10 1200V 40mΩ silicon carbide devices from the same batch. Double-pulse tests were carried out sequentially for screening times N=1, 5, 10, 20, 50 and 100 times. After the tests, the gate leakage current of the devices was retested. The study found that when N≥10 times, the number of devices with gate oxide problems no longer changed. A total of 2 devices with gate oxide problems were screened out. Therefore, the final determination was that the number of repeated dynamic screening tests for this batch of 1200V 40mΩ silicon carbide devices should be N=10 times.
[0128] The 200 1200V 40mΩ silicon carbide devices in this batch were tested according to the established repeated dynamic screening test conditions and number of tests. Figure 2 The testing process involves placing devices in pairs within the test circuit, with each pair acting as the device under test and the other as a companion device, and performing at least 10 repeated dynamic screening tests. If the retested gate leakage current (IGSS) value of a device exceeds 5 times the initial value, the device is considered to have failed the screening test; otherwise, it is considered to have passed the test.
[0129] Through repeated dynamic screening experiments, 8 devices with gate oxide problems were successfully identified from 200 devices. The IGSS test curves before and after the screening experiment for these devices are shown below. Figure 5As shown in the figure, the test method can quickly expose devices with gate oxide defects. The gate leakage current increases rapidly and significantly to the μA level with the increase of the test voltage Vg (VGSset=-8V and +22V), which means that the device gate has failed.
[0130] Based on the same inventive concept, this application also provides a screening device, including a silicon carbide power device test screening circuit according to any of the above embodiments, wherein the circuit is implemented according to a silicon carbide power device test screening method according to any of the above embodiments.
[0131] It is understood that the above-mentioned silicon carbide power device testing and screening circuit, screening method and equipment can also take other forms, and are not limited to the forms mentioned in the above embodiments, as long as they can achieve the function of improving the screening efficiency and accuracy of power semiconductor devices.
[0132] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.
[0133] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0134] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A test and screening circuit for silicon carbide power devices, characterized in that, include: Main circuit module, load connection module, gate drive test module and main control detection module; The main circuit module is connected to the load connection module and is used to provide energy for the test; The load connection module is connected to at least two devices under test and is used to switch test loops and connection states. The gate drive test module is connected to the gate of the device under test and is used to provide drive pulses in screening tests and programmable gate voltages in parameter retests. The main control detection module is connected to the gate drive test module and the load connection module, and is used to control the coordinated operation of the gate drive test module and the load connection module, and to collect detection signals.
2. The silicon carbide power device test and screening circuit according to claim 1, characterized in that, The main circuit module includes a capacitor charging and discharging circuit; The capacitor charging and discharging circuit includes a DC power supply, a charging resistor, a discharging resistor, and a supporting capacitor. The capacitor charging and discharging circuit is used to provide a settable bus voltage for dynamic screening tests.
3. The silicon carbide power device test and screening circuit according to claim 1, characterized in that, The load connection module includes at least two load inductors and a switching unit; The switching unit is used to connect any of the load inductors to the main circuit to form a double-pulse test circuit, or to short-circuit the drain and source of the device under test to form a leakage current test state.
4. The silicon carbide power device test and screening circuit according to claim 1, characterized in that, The gate drive test module includes at least two gate drive pulse sources and at least two dynamically controlled gate voltage sources: The gate drive pulse source is used to input a settable drive pulse signal to the gate of the corresponding device under test. The programmable gate voltage source is used to apply a settable positive or negative DC voltage to the gate of the corresponding device under test to achieve leakage current testing.
5. The silicon carbide power device test and screening circuit according to claim 1, characterized in that, The main control detection module includes a controller, a voltage sampling unit, and a current sampling unit; The control bridge is used to control the timing of the drive pulses, the state of loop switching, and the output of the programmable control gate voltage; The current sampling unit is connected in series in the gate circuit of the device under test (DUT) to collect the gate leakage current of the DUT.
6. A method for testing and screening silicon carbide power devices, characterized in that, The method is implemented based on a silicon carbide power device test and screening circuit as described in any one of claims 1 to 5, and the method includes: Based on the results of the preliminary test, set the test parameters and number of times for dynamic screening, and connect at least two devices under test to the circuit and group them. Adjust the circuit to enter the leakage current test state, apply a preset gate voltage to each of the two devices under test, and measure and record the initial gate leakage current of the devices under test. The control circuit enters the dynamic test state, and sequentially uses one device as the device under test and the other device as the companion device, and applies a high-current stress repetitive double pulse test to alternately repeat the dynamic screening test. After each dynamic screening test, the device re-enters the leakage current test state and re-measures the gate leakage current of the device under test. If the re-measured gate leakage current of any device under test is significantly degraded compared with the corresponding initial gate leakage current, the device under test is determined to be unqualified.
7. The method for testing and screening silicon carbide power devices according to claim 6, characterized in that, The preliminary test results include the number of dynamic screening tests, bus voltage, drive gate voltage, drive resistance, test current, and pulse time; The number of tests is determined experimentally so that the screening effect is insufficient when the number of tests is less than the number of tests, and the number of defective devices screened out no longer increases significantly when the number of tests is more than the number of tests.
8. The method for testing and screening silicon carbide power devices according to claim 7, characterized in that, The results of the preliminary tests include: The maximum turn-off current capability of the device under test was verified by a single-pulse turn-off test. Based on the pre-acquired device data, determine the reference values for the bus voltage, the drive gate voltage, and the drive resistor; The test current is determined under the constraints of the maximum shutdown current capability and the shutdown voltage overshoot not exceeding the rated voltage of the device under test; Based on the test current and the load inductance value, the pulse width and time of the dual pulses are calculated.
9. The method for testing and screening silicon carbide power devices according to claim 6, characterized in that, If the retested gate leakage current of any of the devices under test is significantly degraded compared to the corresponding initial gate leakage current, then the device under test is deemed unqualified for screening, including: The determination of whether the gate leakage current of the retest has significantly deteriorated is based on a preset degradation judgment multiple threshold.
10. A screening device, characterized in that, The invention includes a silicon carbide power device test and screening circuit according to any one of claims 1 to 5, wherein the circuit is implemented in accordance with a silicon carbide power device test and screening method according to any one of claims 6 to 9.