Wafer testing method and wafer testing system

Abstract

The application discloses a wafer testing method and a wafer testing system, comprising: testing a reference wafer to obtain reference test data; if the reference test data is out of a preset qualified data range, adjusting a state of a testing probe and returning to retest the reference wafer until the reference test data falls into the preset qualified data range; testing a wafer to be tested to obtain test data to be tested; according to the reference test data and the test data to be tested, a difference value representing a deviation degree of the two is obtained; comparing the difference value with a first preset threshold and a second preset threshold; if the difference value is greater than or equal to the first preset threshold and less than the second preset threshold, determining that the wafer to be tested is abnormal, and retesting the wafer to be tested by an instrument independent of the testing probe; if the difference value is greater than or equal to the second preset threshold, determining that a testing environment is abnormal, and returning to execute the step of adjusting the state of the testing probe and returning to retest the reference wafer.

Description

Technical Field

[0001] This invention relates to the field of wafer testing technology, and in particular to a wafer testing method and a wafer testing system. Background Technology

[0002] Wafer testing is a critical step in the semiconductor manufacturing process. Its purpose is to inspect the electrical parameters, functional integrity, and reliability indicators of each chip on the wafer to screen out defective products and ensure that the performance of the chips leaving the factory meets the standards. In a typical wafer testing process, the test specifications are first defined based on user requirements, and corresponding probe cards are designed according to the test specifications. Then, test programs are configured based on the requirements of the probe cards. Subsequently, probe testing and hardware debugging are performed using standard wafers provided by the user to confirm the availability of the test environment and equipment. Finally, batch verification testing is carried out before mass production.

[0003] However, in actual mass production testing, potential defects in various early stages, especially changes in the testing environment and instability in probe contact, often lead to deviations in test results. When test results deviate abnormally, existing methods struggle to effectively distinguish whether the deviation is caused by drift in the testing environment or equipment state, or by performance degradation of the wafer itself. Unable to accurately identify the root cause, production lines typically have to repeat testing on all wafers with out-of-tolerance test data, sometimes even requiring rework. This approach results in numerous unnecessary repetitive tests, significantly reducing testing efficiency, increasing testing costs, and delaying production schedules.

[0004] Therefore, there is an urgent need for a wafer testing method that can accurately distinguish the root causes of testing anomalies, so as to take targeted measures according to different causes of anomalies, reduce unnecessary repeated testing, and thus improve the efficiency and consistency of wafer testing. Summary of the Invention

[0005] This invention proposes a wafer testing method, comprising: The reference wafer is tested to obtain reference test data; if the reference test data exceeds the preset qualified data range, the state of the test probe is adjusted and the reference wafer is retested until the reference test data falls into the preset qualified data range. The wafer to be tested is tested to obtain the test data; Based on the benchmark test data and the test data to be tested, a difference value characterizing the degree of deviation between the two is obtained; The difference value is compared with a first preset threshold and a second preset threshold, wherein the second preset threshold is greater than the first preset threshold. If the difference value is less than the first preset threshold, the wafer to be tested is determined to be qualified; If the difference value is greater than or equal to the first preset threshold and less than the second preset threshold, the wafer under test is determined to be abnormal, and the wafer under test is retested using an instrument independent of the test probe. If the difference value is greater than or equal to the second preset threshold, the test environment is determined to be abnormal, and the process returns to the state of adjusting the test probe and returning to the step of retesting the reference wafer.

[0006] Optionally, adjusting the state of the test probe includes at least one of the following operations: Clean the tip of the test probe; Adjust the contact resistance between the test probe and the wafer pad; The alignment accuracy between the test probe and the wafer pad is calibrated. Adjust the contact pressure of the test probe.

[0007] Optionally, adjusting the contact pressure of the test probe includes: Obtain the first pressure value at which the test probe first produces a complete and clear needle mark on the wafer pad; The working pressure of the test probe is set to a preset range that is greater than the first pressure value.

[0008] Optionally, the instrument independent of the test probe includes at least one of an oscilloscope and a multimeter.

[0009] Optionally, the first preset threshold and the second preset threshold are set according to different percentage deviation ranges based on the center value of the benchmark test data; wherein the percentage deviation range corresponding to the second preset threshold is greater than the percentage deviation range corresponding to the first preset threshold.

[0010] Optionally, the testing of the reference wafer includes: Electrical parameters were measured at multiple locations at the center and edge of the reference wafer.

[0011] Optionally, obtaining a difference value characterizing the degree of deviation between the benchmark test data and the test data to be tested includes: The benchmark test data and the test data to be tested are compared parameter by parameter, and the deviation of each parameter is calculated. The deviation is used as the difference value.

[0012] Optionally, obtaining a difference value characterizing the degree of deviation between the benchmark test data and the test data to be tested includes: The benchmark test data and the test data to be tested are compared parameter by parameter, and the coefficient of variation of each parameter is calculated. The coefficient of variation is used as the difference value.

[0013] This invention also proposes a wafer testing system, comprising: Test probes are used to perform electrical contact tests on wafers; An instrument, independent of the test probes, is used to retest the wafer; The control device is configured to execute the wafer testing method. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram illustrating the steps of an embodiment of the wafer testing method of the present invention.

[0016] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0019] In this invention, unless otherwise explicitly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0020] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0021] like Figure 1 As shown, this invention proposes a wafer testing method, comprising: The reference wafer is tested to obtain reference test data; if the reference test data exceeds the preset qualified data range, the state of the test probe is adjusted and the reference wafer is retested until the reference test data falls into the preset qualified data range. The wafer to be tested is tested to obtain the test data; Based on the benchmark test data and the test data to be tested, a difference value characterizing the degree of deviation between the two is obtained; The difference value is compared with a first preset threshold and a second preset threshold, wherein the second preset threshold is greater than the first preset threshold. If the difference value is less than the first preset threshold, the wafer to be tested is determined to be qualified; If the difference value is greater than or equal to the first preset threshold and less than the second preset threshold, the wafer under test is determined to be abnormal, and the wafer under test is retested using an instrument independent of the test probe. If the difference value is greater than or equal to the second preset threshold, the test environment is determined to be abnormal, and the process returns to the state of adjusting the test probe and returning to the step of retesting the reference wafer.

[0022] It is important to clarify that a reference wafer refers to a wafer that has undergone complete process verification, and whose performance parameters have been confirmed to be stable and meet the user's technical requirements. Reference wafers are typically provided by the user as standard samples, and their physical and electrical characteristics represent the ideal state that the batch of products should achieve under the correct manufacturing process. Under normal, undisturbed testing conditions, the data obtained from testing the reference wafer should accurately reflect its true performance, and all of this data should fall within the preset acceptable data range set by the user. The preset acceptable data range is a set of allowable fluctuation ranges for parameters specified by the user based on the technical specifications of the reference wafer. This range is set separately for each test parameter, and may include upper and lower limits for quiescent current, allowable deviations for threshold voltage, and tolerance ranges for timing parameters. It is crucial to understand that the preset acceptable data range describes the parameter characteristic boundaries of the reference wafer itself. Its direct role in this solution is not to determine whether the wafer under test is qualified, but rather to diagnose whether the test environment and test equipment are functioning normally. If the test data obtained by the reference wafer under the current test conditions exceeds this range, it indicates that the test system itself has a deviation and fails to accurately reflect the true performance of the wafer.

[0023] First, a reference wafer with verified process technology and known performance is selected and placed in the testing equipment. Test probes are used to perform comprehensive electrical parameter tests on the reference wafer according to a predetermined test plan, obtaining a set of reference test data. This data reflects the performance of the reference wafer measured under the current test conditions. This reference test data is then compared one by one with the preset acceptable data range provided by the user. If all parameters in the reference test data fall within the preset acceptable data range, it indicates that the current test environment and the state of the test probes are normal and can accurately reflect the true performance of the wafer, allowing it to proceed to the subsequent wafer testing stage. Conversely, if any one or more parameters in the reference test data exceed the preset acceptable data range, it indicates a problem with the current test conditions, and the test system has failed to correctly perceive the true performance characteristics of the wafer.

[0024] This invention employs a method of adjusting the test probe to alter the testing environment. The test probe is the interface component in the testing system that directly contacts the wafer surface pads and transmits electrical signals. Its physical condition directly determines the quality of the test signal and the reliability of the test data. When the test probe's condition deviates from its optimal operating conditions, even if the tested wafer's performance is perfectly normal, erroneous data deviating from the true value may still be measured. Adjusting the test probe's condition involves systematically investigating and correcting multiple factors that may affect contact quality. These factors include, but are not limited to: the cleanliness of the probe tip surface (i.e., the presence of particle adhesion, oxide accumulation, or other contaminants, which can introduce abnormal contact resistance); the contact resistance between the probe and the wafer pads (abnormal increases or fluctuations in this resistance will directly lead to test signal attenuation and instability); the relative positional accuracy of the probe tip and the center of the pad (excessive misalignment may result in insufficient contact area or incorrect contact position); and the vertical contact pressure exerted by the probe on the pads (too little pressure leads to insufficient contact and high contact resistance, while too much pressure may damage the pads or the internal structure of the wafer).

[0025] It is important to note that among the many steps involved in wafer testing, the test probe is the only interface component that directly and physically contacts the wafer. All electrical parameters of the wafer under test must pass through a complete signal chain—"wafer pad—probe tip—probe cantilever—transmission cable—measuring instrument"—before they can be acquired and recorded. Within this chain, the contact interface between the probe tip and the wafer pad is the most physically demanding and most susceptible to changes in microscopic conditions. Even micrometer-level alignment deviations, nanometer-level surface contamination layers, or millinewton-level pressure fluctuations can translate into significant changes in contact resistance or signal distortion at the contact interface, ultimately manifesting as an overall shift in test data or abnormal deviations in individual parameters.

[0026] In contrast, other components of the testing system (such as the internal circuitry of measuring instruments, signal transmission cables, and test program algorithms) typically possess high inherent stability and anti-interference capabilities under normal operating conditions. The probability of significant performance drift is far lower than the probability of problems occurring at the probe contact interface. Similarly, while factors such as temperature and humidity in the testing environment can affect test results, their changes are usually slow and global, and modern testing environments are generally equipped with corresponding environmental monitoring and compensation measures. Therefore, when a known fully qualified sample, such as a reference wafer, exhibits abnormal data during testing, from an engineering diagnostic perspective, first investigating and correcting the state of the probes that have direct physical contact with the wafer is the most efficient and direct fault location path.

[0027] Based on the above analysis, when the benchmark test data exceeds the preset acceptable range during the benchmark calibration phase, this solution prioritizes adjusting the state of the test probes as the primary and preferred correction measure, rather than first suspecting a problem with the benchmark wafer itself or blindly adjusting other components of the test system. This design allows the calibration process to converge to a normal state as quickly as possible, avoiding unnecessary bypass checks, thereby minimizing the calibration time while ensuring calibration accuracy.

[0028] After the benchmark test data exceeds the preset qualified data range (or the test environment is determined to be abnormal), the state of the test probe needs to be adjusted. The adjustment methods include, but are not limited to: checking and cleaning the probe tip to eliminate poor contact caused by contaminants, detecting and improving the contact resistance between the probe and the pad, calibrating the relative position accuracy between the probe and the pad with the help of an optical alignment system, and resetting the contact pressure.

[0029] Regarding the adjustment of the key parameter of contact pressure, this solution provides a quantitative setting method based on observable physical phenomena. During the test, the pressure applied by the probe to the wafer pad is gradually increased, while the morphology of the pin marks left on the pad surface is monitored in real time using a microscopic observation device. During this process, two characteristic states with clear engineering significance can be observed: initially, when the pressure is low, the probe leaves only very slight and incomplete marks on the pad surface, and the contact is not yet stable; as the pressure continues to increase, a critical point is reached, at which point complete and clearly defined pin marks first appear on the pad, indicating that a sufficient and uniform physical contact interface has been formed between the probe and the pad, and the contact resistance has dropped to a reliable low level. This solution defines the pressure value corresponding to this critical point as the first pressure value. After determining this first pressure value, the daily operating pressure of the test probe is set within a specific range slightly higher than this first pressure value. Setting the working pressure slightly above the critical value ensures sufficient and stable contact conditions, providing necessary engineering margins for mass production testing. At the same time, this range should not be too wide to prevent excessive pressure from causing structural damage to the pads or introducing excessive pin marks on the wafer surface. This method transforms contact pressure setting from a qualitative judgment relying on operator experience to a standardized operation based on observable physical phenomena and quantifiable pressure values, effectively improving the consistency and reproducibility of testing conditions.

[0030] It's easy to understand that after completing the above adjustments, it cannot be assumed that the test conditions have returned to normal. The test must be repeated on the reference wafer to obtain new benchmark test data, which is then compared to the preset acceptable data range. This closed-loop process of "test-compare-adjust-retest" needs to be repeated until the obtained benchmark test data falls completely within the preset acceptable data range. At this point, it can be confirmed that the test conditions have been accurately calibrated, and the obtained benchmark test data accurately reflects the performance characteristics of the reference wafer. This data will serve as a reliable benchmark for subsequent consistency assessments.

[0031] After the benchmark calibration phase is completed, the batch testing phase of the wafers under test begins. Under the condition of strictly maintaining the test probes in the optimal state established by the aforementioned calibration, the wafers under test on the production line are subjected to the exact same test items and procedures as the benchmark wafers, obtaining a set of test data. During this process, it should be ensured that the manufacturing process background, material specifications, and design version of the wafers under test are consistent with those of the benchmark wafers to eliminate irrelevant deviations introduced by generational or version differences within the wafers themselves. Subsequently, based on the benchmark test data used as the comparison benchmark and the currently obtained test data, a difference value characterizing the degree of deviation between the two is obtained. The specific calculation method for the difference value can be flexibly selected according to actual needs. For example, the deviation amplitude can be calculated parameter by parameter, and the statistical value of the deviation amplitude of each parameter can be used as the difference value; or the coefficient of variation can be calculated. It should be noted that the comparison mode used to obtain the difference value includes, but is not limited to, wafer-by-wafer comparison mode and batch statistical comparison mode, which will be described separately below.

[0032] In this embodiment, the step of 'obtaining the difference value based on the benchmark test data and the test data to be tested' can adopt at least one of the following two working modes: The first method is wafer-by-wafer comparison. In this mode, after each wafer is tested, its test data is directly compared with the benchmark test data, and the difference is calculated as described above. This mode is suitable for real-time assessment of the individual conformity of each wafer.

[0033] The second mode is batch statistical comparison. In this mode, instead of comparing each wafer in real-time, after testing a predetermined number of wafers (e.g., but not limited to 500), statistical values ​​(e.g., arithmetic mean, median, or moving average) of the test data for these wafers are calculated. These statistical values ​​are then compared to benchmark test data, and the difference is calculated. This mode is primarily used to monitor systematic drift during mass production. When the difference between the statistical value and the benchmark value exceeds a certain range (e.g., reaching or exceeding a second preset threshold), the system automatically alarms, prompting operators to check the test environment or equipment status, thus achieving real-time technical control of potential anomalies.

[0034] The two modes described above can be used individually or simultaneously. When both are enabled, the wafer-by-wafer comparison mode is responsible for real-time screening of individual abnormal wafers, while the batch statistical comparison mode is responsible for macroscopic monitoring of the production line's stability. The two complement each other, comprehensively improving wafer testing quality control capabilities at both the individual and overall levels. In one example of the present invention, the solution sets two deviation judgment thresholds of different sizes, wherein the value of the second preset threshold is significantly greater than that of the first preset threshold.

[0035] The two thresholds each serve different technical functions. The first preset threshold is a relatively strict deviation criterion used to define whether the consistency between the test data of the wafer under test and the reference test data is within an acceptable range of normal fluctuation. When the deviation value is less than this threshold, it indicates that the wafer under test and the reference wafer are highly consistent in performance characteristics, and the wafer under test can be judged to be qualified.

[0036] The second preset threshold is a deviation limit much larger than the first preset threshold, and its function is to distinguish the root cause of the deviation. In long-term mass production testing practice, the inventors discovered a statistically significant engineering pattern: test data deviations caused by changes in the testing environment (e.g., overall temperature drift, sudden introduction of electromagnetic interference) or changes in the state of the testing equipment (e.g., deterioration of probe contact state, gain shift of measurement channels) typically manifest as large-scale, systematic overall deviations, meaning that all measured parameters generally and synchronously deviate from normal values, and the deviation magnitude is often very significant. In contrast, performance degradation caused by process fluctuations or local micro-defects in the wafer under test usually manifests as smaller deviations in individual parameters, with a deviation magnitude much smaller than that caused by systemic problems. In other words, systemic abnormal testing conditions and individual wafer quality differences exhibit a clear difference in the magnitude of the test data deviations they cause. Based on this engineering discovery, this solution sets two preset thresholds with significantly different magnitudes, using the deviation magnitude itself as a criterion for distinguishing the root cause of the anomaly.

[0037] This invention compares the calculated difference value with a pre-set first and second preset thresholds. In practical applications, both thresholds can be specifically set based on the center value of the benchmark test data, according to different percentage deviation ranges. The percentage deviation range corresponding to the second preset threshold is significantly greater than the percentage deviation range corresponding to the first preset threshold.

[0038] There are three possible outcomes when comparing and judging.

[0039] In the first scenario, if the difference is less than a first preset threshold, it indicates that the test data of the wafer under test is highly consistent with the benchmark test data of the reference wafer, and the deviation between the two is within a normal and acceptable range of consistency fluctuations. Based on this, the wafer under test can be directly determined to be qualified and allowed to proceed to the next production process.

[0040] In the second scenario, if the difference is greater than or equal to the first preset threshold but has not yet reached the second preset threshold, meaning the deviation exceeds the allowable limit of normal fluctuations, its magnitude is still within the range of deviations that may be caused by wafer process fluctuations or local defects, and has not yet reached the large deviation typically exhibited by systemic drift in the testing environment or equipment. Based on the aforementioned engineering principles regarding the correspondence between deviation magnitude and root cause attributes, this deviation is determined to be caused by an abnormality in the performance of the wafer under test. In this case, the wafer is not directly judged as a final non-conforming product. Instead, an independent verification procedure is initiated, that is, using a set of instruments independent of the aforementioned test probe system on the physical measurement link, such as an oscilloscope or multimeter, to retest the wafer under test, in order to obtain a second independent set of test data about the wafer from a different measurement path, eliminating the influence of potential interference in the probe contact link, and forming an objective judgment on whether there is a real defect in the wafer.

[0041] In the third scenario, if the difference is greater than or equal to the second preset threshold, meaning the deviation has reached a considerably large magnitude, significantly exceeding the upper limit of the range that can be reasonably explained by the fluctuations of a single wafer, this large-scale systematic offset is more consistent with the typical characteristics of a deteriorating test environment or a substantial change in the state of the test equipment. Based on the aforementioned engineering principles, this deviation is determined to be caused by an abnormal test environment or a change in test conditions. In this case, continuing to use the test conditions, which have deviated from the normal state, to test subsequent wafers will lead to systematic misjudgments. Therefore, testing should not continue, and the process should immediately return to the benchmark calibration phase. That is, the benchmark wafer should be retrieved again for testing, and the state of the test probes should be readjusted and calibrated again based on the comparison results of its test data with the preset qualified data range, until the test conditions are restored to a state that has been verified as normal, before continuing to test the wafer under test.

[0042] It's important to clarify that instruments independent of the test probes refer to measurement devices that differ from probe-contact testing systems in their physical measurement links, signal acquisition methods, and data acquisition channels. Oscilloscopes and multimeters are typical examples of independent instruments. In this approach, when the deviation level indicates a potential performance anomaly in the wafer under test, the system doesn't simply retest the wafer using the same probe testing system. Instead, it employs an independent instrument for verification retesting. This is because if the potential factor causing the initial test data deviation stems from instability in the probe contact link or some undetected transient anomaly in the probe system, continuing with the same system for retesting is highly likely to reproduce the same or similar deviation, failing to obtain genuine verification information. Using an independent instrument to verify the same electrical parameters from a different measurement path effectively disconnects the probe contact link, making the retest results more objective and reliable. If the retest results of the independent instrument also confirm that the parameters do indeed exceed the allowable range, then an accurate judgment is made that there is a real defect in the wafer under test; conversely, if the retest results of the independent instrument show that the parameters are normal, then it indicates that the original out-of-tolerance data may indeed have originated from the instantaneous fluctuations in the probe test process, and further investigation of the test system is required.

[0043] In particular, when using the batch statistical comparison mode, if the calculated difference value is greater than or equal to the second preset threshold, it is also determined that there is a systematic anomaly in the test environment. The system will issue an alarm and automatically return to the benchmark calibration step without waiting for the single-chip test results.

[0044] As can be seen from the complete technical solution described above, this method creatively utilizes the distinguishable characteristics of deviation magnitude, using two preset thresholds of different magnitudes as judgment benchmarks. When anomalies in test data consistency are detected, it can automatically and accurately distinguish whether the root cause of the anomaly is system drift or an inherent defect in the wafer itself. For anomalies caused by system drift, the operator is guided to promptly correct the test conditions through a benchmark calibration process, avoiding unnecessary rework testing of a large number of qualified wafers incorrectly classified as performance-abnormal. For anomalies caused by the wafer itself, cross-validation is performed using independent instruments, effectively isolating potential interference from the probe contact stage and ensuring the objectivity and accuracy of the final judgment on the quality of individual wafers. Therefore, unnecessary repeated testing is minimized throughout the entire wafer testing process, significantly improving the first-pass yield and overall equipment utilization, thereby comprehensively improving the efficiency and consistency of wafer testing while ensuring accurate and reliable test results.

[0045] In one embodiment, adjusting the state of the test probe includes at least one of the following operations: Clean the tip of the test probe; Adjust the contact resistance between the test probe and the wafer pad; The alignment accuracy between the test probe and the wafer pad is calibrated. Adjust the contact pressure of the test probe.

[0046] It should be explained that adjusting the state of the test probe is not a single operation, but a systematic process of troubleshooting and correcting multiple aspects that may affect contact quality. Specifically, adjusting the state of the test probe may include at least one of the following operations.

[0047] First, the tip of the test probe needs to be cleaned. During wafer testing, the tip of the test probe repeatedly contacts the wafer pads. After long-term operation, trace residues from the wafer surface, metal debris, dust particles from the environment, or oxide layers formed by electrochemical reactions may gradually accumulate on the tip surface. These contaminants attached to the tip surface form an additional impedance layer, causing the contact resistance between the probe and the pads to increase abnormally and become unstable. The increase in contact resistance will directly lead to the attenuation of the measurement signal amplitude, while the instability of the contact resistance will manifest as random jumps or drifts in the test data. The purpose of cleaning the tip is to remove these deposits from the tip surface and restore direct, clean contact between the tip metal body and the pads. Cleaning methods may include chemical cleaning with special solvents, physical wiping with lint-free wiping materials, or non-contact cleaning methods such as lasers. After cleaning, the tip surface is usually inspected again with a high-powered microscope to confirm that the contaminants have been completely removed.

[0048] Secondly, adjust the contact resistance between the test probe and the wafer pad. Contact resistance is a core indicator of the electrical contact quality between the probe and the pad. Even with a clean probe tip surface, insufficient contact pressure, a small contact area, or an improper contact angle can still lead to contact resistance exceeding the acceptable range. In practice, the contact resistance can be indirectly determined by monitoring the critical value performance or data stability of the signal during the test. When an abnormality is detected, measures can be taken including: appropriately increasing the vertical contact pressure of the probe to increase the actual contact area between the probe tip and the pad, thereby reducing the contact resistance to a stable range; or performing a probe grinding operation, i.e., allowing the probe tip to perform small-amplitude horizontal friction on the pad surface to remove any microscopic passivation layer that may exist on the probe tip surface and reshape the contact surface, thereby improving the contact quality.

[0049] Third, calibrate the alignment accuracy between the test probe and the wafer pad. Alignment accuracy refers to the degree of positional deviation of the probe tip relative to the target center point of the wafer pad. Since the size of the pads on the wafer is usually only on the order of tens of micrometers, if the alignment deviation of the probe tip is too large, the tip may fall outside the pad or at the edge of the pad, resulting in insufficient effective contact area, increased contact resistance, and in severe cases, even damage to the pad or adjacent chip structure. Alignment accuracy calibration is usually accomplished using a high-precision optical alignment system. This system can simultaneously display magnified images of the probe tip and the pad. The operator judges the offset between the tip and the center of the pad by comparing the images and adjusts the relative position of the probe or stage in the horizontal plane accordingly until the deviation is controlled within the allowable range of micrometers or even submicrometers.

[0050] Fourth, adjust the contact pressure of the test probe. Contact pressure is a mechanical parameter that determines the contact state between the probe and the pad. If the pressure is too low, the probe tip will not be able to penetrate the trace oxide layer or contaminant film on the surface of the pad, resulting in high and unstable contact resistance; if the pressure is too high, it may cause irreversible plastic damage to the pad, or even, in extreme cases, pierce the dielectric layer beneath the pad, damaging the internal structure of the chip. The method for adjusting the contact pressure and the concept of the first pressure value on which it is based have been described in detail above and will not be repeated here. It should be noted that the above-mentioned operation of adjusting the probe contact pressure is usually performed directly on the probe station. The operator can monitor the pressure changes in real time through the pressure feedback device equipped on the probe station and make a comprehensive judgment and setting by observing the morphology of the needle marks under a microscope.

[0051] By performing at least one of the above adjustment operations, specific factors causing the deterioration of the test probe contact state can be eliminated, allowing the test conditions to gradually return to normal operating conditions. These operations are not strictly independent and often need to be used in combination during actual calibration. For example, after cleaning the probe tip, recalibrate the alignment; after adjusting the alignment, finely set the contact pressure, thus forming a complete probe state optimization closed loop. After the above adjustments are completed, return to the reference wafer for retesting to verify the adjustment effect until the reference test data falls within the preset acceptable data range. This process ensures that subsequent testing of the wafer under test is based on verified and reliable test conditions.

[0052] In one embodiment, adjusting the contact pressure of the test probe includes: Obtain the first pressure value at which the test probe first produces a complete and clear needle mark on the wafer pad; The working pressure of the test probe is set to a preset range that is greater than the first pressure value.

[0053] It is easy to understand that in wafer testing engineering practice, the contact pressure applied by the test probe to the wafer pad is the core mechanical parameter determining the contact quality. However, the precise setting of this parameter has long relied heavily on the operator's personal experience, lacking objective and operable quantitative criteria. This solution standardizes the pressure setting by associating the contact pressure setting with a physical feature point that can be clearly identified through microscopic observation.

[0054] Specifically, when adjusting the contact pressure of the test probe, the probe is first applied to the wafer pad surface with gradually increasing pressure. Simultaneously, the morphology of the pin marks on the pad surface caused by the probe tip indentation is continuously monitored using a high-magnification microscope. In the initial stage of pressure increase, the contact between the probe tip and the pad is insufficient, leaving only very slight, incomplete, or even discontinuous marks on the pad surface. At this time, the contact resistance is usually high and unstable, and the test data is prone to fluctuations. As the pressure continues to increase, the contact area between the probe tip and the pad gradually increases, and the morphology of the pin marks gradually becomes more complete and clear. When the pressure reaches a certain critical value, the pad will first show complete, clearly defined, and regularly contoured pin marks. This phenomenon indicates that a sufficient and uniform physical contact interface has been established between the probe tip and the pad material. At the physical level, this means that, on the one hand, the probe tip has effectively penetrated the trace oxide layer or adsorbed contaminant film that may exist on the surface of the pad, and directly formed a conductive path with the metal body of the pad; on the other hand, the actual contact area between the probe and the pad has reached the minimum threshold required for stable low contact resistance, and the contact resistance has entered a stable and low controllable range from the previously high and unstable nonlinear region.

[0055] This scheme defines the pressure value corresponding to the above critical point as the first pressure value. This first pressure value is essentially an engineering threshold characterizing the qualitative change in the contact state: when the probe pressure is less than this value, the contact is in an unstable or critical state, and the reliability of the test data is difficult to guarantee; when the probe pressure reaches or is slightly higher than this value, the contact enters a stable and reliable working range.

[0056] In one example, after determining the first pressure value, the working pressure is not directly set to be exactly equal to the first pressure value. Instead, the working pressure of the test probe is set within a preset range greater than the first pressure value. To accurately define the position and span of this preset range relative to the first pressure value, this solution introduces two quantified defining parameters, referred to as the first given value and the second given value, where the second given value is greater than the first given value. The specific first and second given values ​​are determined by the R&D personnel or the actual operators.

[0057] The first given value is used to define the lower limit of the difference between the minimum value of the preset interval and the first pressure value. Specifically, the difference between the minimum pressure value of the preset interval and the first pressure value is set to be greater than or equal to the first given value. This means that the preset interval does not start from the first pressure value itself, but from a pressure level that is at least as high as the first given value. The technical consideration for this setting is that during actual mass production testing, factors such as the surface condition of the wafer pads, minor wear of the probe tips, minor vibrations in the testing environment, and the pressure control tolerance of the equipment itself may cause the actual contact pressure applied to the pads to fluctuate instantaneously around the nominal set value. If the lower limit of the working pressure is directly adjacent to the critical boundary of the first pressure value, any of the above-mentioned minor disturbances may cause the actual contact pressure to drop instantly below the first pressure value, thereby causing the contact state to regress from the stable region to the unstable region, resulting in a step increase in contact resistance and abnormal jumps in test data. By setting a positive offset to the first given value, a safety buffer zone can be built between the first pressure value and the lower limit of the working pressure range. Even if there is a certain degree of negative pressure fluctuation in actual working conditions, the instantaneous pressure can still be maintained within a stable contact range higher than the first pressure value, ensuring that the contact quality always meets the test requirements.

[0058] The second given value defines the upper limit of the difference between the maximum value of the preset range and the first pressure value. Specifically, the difference between the maximum pressure value of the preset range and the first pressure value is set to be less than or equal to the second given value. This means that the allowable upward fluctuation range of the working pressure is not unlimited, but is constrained to be above the first pressure value but not exceeding the upper limit of the first pressure value plus the second given value. The technical consideration for this setting is that although increasing the contact pressure helps to further reduce contact resistance and enhance contact stability, excessive contact pressure will apply excessive mechanical stress to the wafer pads. After exceeding a certain limit, excessive pressure may cause irreversible plastic deformation, cracking, or interlayer delamination of the pad material, and in severe cases, it may even puncture the dielectric layer under the pad, causing permanent damage to the internal interconnect structure of the chip. By setting this upper limit constraint of the second given value, the allowable range of the working pressure is effectively limited to a mechanically safe range for the pads, achieving an engineering balance between contact reliability and wafer mechanical safety.

[0059] In summary, through the combined constraints of the first and second given values, the working pressure of the test probe is precisely limited to a preset range with a defined position and span relative to the first pressure value. The lower limit of this range is determined by the first pressure value plus the first given value, ensuring sufficient contact and disturbance resistance stability; the upper limit of this range is determined by the first pressure value plus the second given value, ensuring no structural damage to the wafer pads. In practical engineering applications, the specific values ​​of the first and second given values ​​can be determined through a limited number of process characterization experiments based on the material properties of the wafer pads, the geometry of the probe tip, and the actual conditions of the testing environment. Once determined, this setting can be standardized and reproduced across different testing equipment and different operators.

[0060] In one example, the instrument independent of the test probe includes at least one of an oscilloscope and a multimeter.

[0061] As is easily understood, an oscilloscope is a measuring instrument that acquires, displays, and analyzes electrical signals in a time-domain waveform manner. Its core advantage lies in its ability to capture the complete dynamic process of a signal changing over time. When it is necessary to retest and verify timing-related parameters (such as signal rise time, fall time, setup time, hold time, frequency, duty cycle, etc.), an oscilloscope can intuitively present the time-domain waveforms of these parameters, allowing testers to accurately determine whether the timing characteristics of the wafer under test are consistent with expectations. In addition, oscilloscopes typically have high sampling rates and bandwidths, enabling them to capture transient abnormal pulses or glitches that may exist during testing. These high-speed transient phenomena are often difficult to effectively identify in the steady-state parameter scanning mode of probe-based contact testing systems.

[0062] A multimeter is a general-purpose measuring instrument that can measure various basic electrical quantities such as voltage, current, and resistance and directly provide numerical readings. When it is necessary to retest and verify DC parameters (such as quiescent current, leakage current, threshold voltage, and on-resistance), a multimeter can directly obtain the static values ​​of these parameters with high accuracy, and the operation is simple and the results are intuitive. Compared with probe-based contact testing systems, the multimeter has a simpler measurement path and fewer potential interference sources in the signal path when measuring these basic DC parameters, thus providing more stable and reliable reference readings than complex testing systems in some cases.

[0063] In practice, oscilloscopes and multimeters can be used individually or in combination. For example, when the wafer under test exhibits abnormal static current parameters during probe testing, a multimeter can be used alone to retest and verify this parameter; when the wafer under test exhibits abnormal timing parameters, an oscilloscope can be used alone to observe its waveform characteristics; when the wafer under test involves deviations in both DC and timing parameters, both can be used in combination. The use of the phrase "at least one" means that in actual operation, testers can flexibly select the most suitable combination of instruments based on the specific parameter types involved in the deviation, without being limited to a single instrument configuration.

[0064] It is important to emphasize that the selection of these two types of instruments as retesting methods is not merely due to their versatility, but more importantly, because they constitute a completely independent signal acquisition channel in the physical measurement link of this solution's test architecture. The signal path of the probe test system is "wafer pad - probe tip - probe cantilever - signal cable - test board - measurement unit," while the signal path of an oscilloscope or multimeter is typically "wafer pin or test point - probe or probe - instrument internal front end - measurement unit." The two differ in signal acquisition points, connection methods, and internal signal conditioning links. It is precisely this fundamental difference in the measurement link that gives the retest results effective immunity to potential interference from the probe system.

[0065] In one example, the first preset threshold and the second preset threshold are set according to different percentage deviation magnitudes based on the center value of the benchmark test data; wherein the percentage deviation magnitude corresponding to the second preset threshold is greater than the percentage deviation magnitude corresponding to the first preset threshold.

[0066] It's important to explain that in wafer testing practice, different test parameters have varying dimensions, amplitude levels, and physical meanings. For example, the static operating current might be in the milliampere or microampere range, while the threshold voltage is typically in the volt range, and the operating frequency could be as high as the megahertz or gigahertz range. Setting absolute tolerance values ​​for each test parameter independently is not only cumbersome but also makes it difficult to establish a unified judgment logic framework. More importantly, the inherent fluctuation characteristics and process sensitivity of different parameters differ significantly. A deviation of a few percent for one parameter might be considered normal process fluctuation, while an equivalent percentage deviation for another parameter might indicate a serious defect. Therefore, using percentage deviation amplitude as the threshold measurement benchmark allows for a relativized and normalized way to uniformly measure the degree of deviation of each parameter, ensuring consistent interpretability of the judgment criteria when comparing across parameters.

[0067] In specific settings, the center value of each parameter in the benchmark test data is first used as the reference point for calculation. This center value represents the typical performance level of the benchmark wafer under normal test conditions and is the origin of the coordinates for all subsequent deviation calculations. For each test parameter, its center value is determined, and then a first preset threshold and a second preset threshold are set according to different percentage deviation amplitudes.

[0068] The first preset threshold corresponds to a relatively small percentage deviation. This percentage is chosen to cover the range of parameter dispersion that may occur in the wafer under test due to normal process variations. In semiconductor manufacturing, even under strictly controlled process conditions, there are naturally some degree of parameter differences between wafers and between chips in different locations on the same wafer. These differences are not defects, but rather normal dispersion within the process window. The percentage deviation corresponding to the first preset threshold is used to define the boundary of this normal dispersion. When the deviation between the test data and the benchmark test data of a wafer under test falls within this percentage range, it can be reasonably considered that the deviation is within the normal range allowed by process variations, thus determining that the wafer is qualified.

[0069] The second preset threshold corresponds to a percentage deviation significantly greater than the first preset threshold. This percentage is selected based on the inventors' engineering experience accumulated during long-term mass production testing: when the test environment or test equipment status undergoes substantial drift, the resulting test data deviation is typically on a much larger scale than the deviation caused by wafer process fluctuations or local defects. Therefore, the percentage deviation of the second preset threshold is set as a numerical boundary that clearly distinguishes between "wafer process fluctuations" and "system status drift," two different types of root cause deviations. The specific value can be determined by combining statistical process control data for a specific product process, the distribution of deviation magnitudes corresponding to environmental anomalies in historical test data, and other factors.

[0070] Through the above-described setting method, the numerical difference between the two thresholds—that is, the percentage deviation corresponding to the second preset threshold being greater than the percentage deviation corresponding to the first preset threshold—is not arbitrary at the technical level, but corresponds to the inherent magnitude characteristics of the deviations of the two types of anomaly root causes. The interval between the first and second preset thresholds constitutes a judgment band attributable to the performance anomalies of the wafer under test itself; while large deviations exceeding the second preset threshold are attributed to changes in the test environment or equipment status. This threshold setting method, based on percentage deviation magnitudes and clearly distinguishing their magnitudes, enables this solution to stably perform the anomaly root cause differentiation function in cross-parameter and cross-product batch testing scenarios with a unified and quantitative scale.

[0071] The testing of the reference wafer includes: Electrical parameters were measured at multiple locations at the center and edge of the reference wafer.

[0072] It's easy to understand that in semiconductor manufacturing, even a wafer that has passed process verification and whose overall performance is qualified will naturally exhibit certain differences in parameter distribution between chips in different areas of its surface. The causes of this difference are multifaceted. During wafer manufacturing, processes such as photolithography, etching, thin film deposition, doping, and thermal processing may be affected by different process conditions at different radial locations on the wafer. For example, in the thin film deposition process, the concentration gradient of reactive gases at the wafer edge may differ from that in the center; in the thermal processing process, the heating and cooling rates at the wafer edge may differ from those in the center; and in the chemical mechanical polishing process, the removal rate at the wafer edge may be inconsistent with that at the center. The combined effect of these process factors causes chips at different locations on the wafer surface to exhibit systematic spatial distribution characteristics in key electrical parameters such as threshold voltage, saturation current, and leakage current. For example, they may show gradient changes from the wafer center to the edge, or exhibit local fluctuations in certain specific areas.

[0073] If measurements are taken only at a single location or a few concentrated locations when testing a reference wafer, the obtained test data may only reflect the parameter characteristics of a local area of ​​the wafer and cannot represent the overall performance level of the entire wafer. Using this local data as a benchmark for subsequent consistency comparison of the wafer under test may lead to two adverse situations: First, if the sampling point happens to be in an extreme region of the parameter distribution, the benchmark data itself has deviated from the performance level of the wafer's center, and a large number of normal wafers may be misjudged as abnormal during subsequent comparisons; Second, if the benchmark data fails to reflect the parameter characteristics of the wafer's edge regions, normal edge effects may be misjudged as performance abnormalities when testing the edge chips of the wafer under test.

[0074] To overcome the aforementioned problems, this solution measures electrical parameters at multiple locations, including the center and edges of the test reference wafer. The center location typically represents the wafer's overall process level and serves as the core reference point for parameter distribution; the multiple edge locations are used to capture the spatial distribution characteristics of parameters in the radial and circumferential directions of the wafer. The number of edge sampling points can be flexibly determined based on wafer size, chip layout density, and user requirements for testing accuracy. Typically, it covers at least the edge regions in the top, bottom, left, and right directions, and the sampling density can be increased as needed to obtain more detailed spatial distribution information.

[0075] By analyzing measurement data from multiple locations at the center and edges, a set of benchmark test data that is spatially representative can be obtained. This data not only reflects the center performance level of the benchmark wafer but also covers the spatial distribution range and regional characteristics of its parameters, making the benchmark more statistically robust. Using the above multi-point sampling data as the benchmark for subsequent consistency comparison can effectively avoid benchmark deviations caused by a single sampling location, ensuring that the performance judgment of the wafer under test is based on a comprehensive and reliable reference. At the same time, this sampling method also helps to more sensitively detect differences in the contact state of test probes in different areas of the wafer during the benchmark calibration stage. If abnormal dispersion exceeding the normal spatial fluctuation range occurs among the multi-point test data, it indicates that there may be a problem with the contact consistency of the probes in different areas of the wafer, requiring further investigation.

[0076] In one embodiment, obtaining a difference value characterizing the degree of deviation between the benchmark test data and the test data to be tested includes: The benchmark test data and the test data to be tested are compared parameter by parameter, and the deviation of each parameter is calculated. The deviation is used as the difference value.

[0077] It's easy to understand that in wafer testing, a complete test procedure typically covers multiple test parameters across various dimensions. These parameters may include, but are not limited to: DC parameters such as quiescent current, leakage current, and threshold voltage; timing parameters such as frequency, rise time, fall time, setup time, and hold time; and pass / fail results for various functional test vectors. Both benchmark test data and test-under-test data contain measurement results for these same test items, thus naturally establishing a parameter-to-parameter correspondence between the two sets of data.

[0078] Parameter-by-parameter comparison involves comparing the measured value of each parameter in the test data with the corresponding benchmark value in the reference test data, and calculating the deviation between the two. The deviation can be expressed as an absolute deviation (the absolute value of the difference between the measured value and the benchmark value) or as a relative deviation (the absolute deviation divided by the benchmark value, expressed as a percentage). The choice of deviation method depends on the physical properties of the parameter and its sensitivity to deviation.

[0079] Taking a typical DC parameter test as an example, assuming the reference wafer's static operating current measured under certain test conditions is 100 microamps, while the wafer under test's static operating current measured under the same test conditions is 103 microamps, then the absolute deviation of this parameter is 3 microamps, and the relative deviation is 3%. After calculating the deviation amplitude of all test parameters involved in the comparison, a set of deviation amplitude values ​​can be obtained. This set of deviation amplitude values ​​constitutes the difference in the overall degree of deviation between the two sets of data.

[0080] The advantage of using deviation magnitude as a measure of difference lies in its intuitive calculation method and clear engineering significance. The deviation magnitude of each parameter directly reflects the degree of closeness or deviation between the wafer under test and the reference wafer in that specific parameter dimension. By setting thresholds that match the characteristics of each parameter, acceptable boundaries for differences can be set for different parameters, thereby achieving more refined quality judgment. At the same time, the parameter-level granularity of deviation magnitude also facilitates subsequent anomaly localization: when the difference value indicates that the wafer under test may have an anomaly, testers can trace back to the deviation data of each parameter item to quickly locate which one or more specific parameters have deviated significantly, thus providing valuable clues for process diagnosis and yield analysis.

[0081] In one embodiment, obtaining a difference value characterizing the degree of deviation between the benchmark test data and the test data to be tested includes: The benchmark test data and the test data to be tested are compared parameter by parameter, and the coefficient of variation of each parameter is calculated. The coefficient of variation is used as the difference value.

[0082] It is easy to understand that in the statistical analysis of semiconductor testing, the coefficient of variation (COP) is a dimensionless statistical indicator that measures the degree of dispersion of a set of data relative to its central value. Unlike the aforementioned method of directly calculating the deviation of each parameter, the calculation of the COP does not only focus on the absolute difference of a single parameter between the wafer under test and the reference wafer, but also examines the relative deviation of the measured values ​​of each parameter of the wafer under test from the corresponding reference values ​​in the reference test data as a whole statistical characteristic.

[0083] Specifically, the calculation process begins by using the values ​​of each parameter in the benchmark test data as the baseline or expected value for the corresponding parameter. Then, for each parameter in the test data, the relative deviation between its measured value and the corresponding benchmark value is calculated. Based on this, the coefficient of variation (COP) of these relative deviations for all parameters involved in the comparison is calculated. The COP is typically defined as the ratio of the standard deviation of the relative deviation to its mean, reflecting the overall consistency and fluctuation level of the deviations of each parameter.

[0084] Using the coefficient of variation (COP) as a measure of discrepancy has unique technical significance in identifying specific types of anomaly patterns. In some cases, the deviation amplitudes of individual parameters of a wafer under test may not show significant anomalies individually, but the deviations of these parameters exhibit a systematic trend of unidirectional or proportional shift. For example, although multiple parameters of a wafer under test, such as static current, threshold voltage, and operating frequency, are all within their respective allowable deviation ranges, the deviation directions of these parameters relative to the reference values ​​are highly consistent, and the deviation proportions are close. This phenomenon often indicates a systematic process deviation or a localized parameter drift, rather than independent random fluctuations of individual parameters. Using a direct comparison of parameter deviation amplitudes, because the perspective focuses on the individual performance of each parameter, may not easily capture this cross-parameter systematic coordinated shift characteristic. However, the COP, as a statistic reflecting the concentration and consistency of deviation distribution, is more sensitive to this overall cross-parameter shift pattern: when the relative deviations of the parameters are highly consistent, the COP is small; when the relative deviations of the parameters are uneven and in different directions, the COP is large.

[0085] By using the coefficient of variation as a measure of difference, this solution provides testers with a holistic quality evaluation tool that differs from the perspective of individual parameter deviation amplitude. In practical applications, the deviation amplitude, coefficient of variation, or a combination of both can be flexibly selected as the basis for calculating the difference value, depending on the specific characteristics of the product under test, the user's emphasis on quality judgment, and the statistical characteristics of historical test data. This allows for a comprehensive and accurate characterization of the degree of deviation between the wafer under test and the reference wafer across different dimensions.

[0086] This invention also proposes a wafer testing system, comprising: Test probes are used to perform electrical contact tests on wafers; An instrument, independent of the test probes, is used to retest the wafer; The control device is configured to execute the wafer testing method.

[0087] It should be explained that the test probe, as the front-end execution component in this system that directly physically contacts the wafer, is used to perform electrical contact tests on the wafer. Mechanically, the test probe typically includes a tip, a cantilever, and a base. The tip is the microstructure that actually contacts the wafer pads, and its geometry and surface condition directly affect the contact quality. Electrically, the test probe connects to the back-end measurement circuitry, extracting and transmitting the electrical signals from the wafer chip to the measurement channel. Functionally, the test probe performs two fundamental tasks: first, during the reference calibration phase, it performs contact-type electrical parameter measurements on the pads of the reference wafer to obtain reference test data; second, during the batch testing phase, it performs contact-type electrical parameter measurements on the pads of the wafer under test to obtain the test data. Furthermore, the operating state of the test probe is adjustable, including but not limited to tip cleaning, contact resistance optimization, alignment accuracy calibration, and contact pressure setting, to ensure the accuracy and consistency of test conditions.

[0088] The instrument, independent of the test probe, is an auxiliary measurement device in this system, separate from the probe-contact test link, used to retest the wafer under specific judgment conditions. This instrument is physically independent of the test probe system, possessing its own signal acquisition path and signal conditioning channel. The technical significance of this independence lies in the following: when the system determines that the wafer under test may have inherent performance abnormalities based on the magnitude of the difference, the initial test data is acquired through the test probe link. Although this link itself has been calibrated to a normal state during the benchmark calibration phase, the possibility of transient fluctuations or local contact anomalies cannot be completely ruled out during subsequent testing. If the retest is still performed through the same link, potential link anomalies may be reproduced, leading to the inability to obtain effective verification conclusions. The independent instrument acquires data from different signal acquisition points and through different measurement channels, effectively isolating interference that may be introduced by the test probe link, providing an objective and reliable second data source for verifying the true performance status of the wafer. In practical configurations, the instrument independent of the test probe can be an oscilloscope, multimeter, or other test instruments with independent measurement links, which can be flexibly configured according to actual testing needs.

[0089] The control device, the core of decision-making and control in this system, is configured to execute the wafer testing method described in any of the foregoing embodiments. The control device is typically implemented using a hardware platform with data processing and instruction execution capabilities, such as an industrial computer, embedded controller, programmable logic controller, or distributed control system. Functionally, the control device implements at least the following control logic: In the benchmark calibration phase, the control device receives benchmark test data acquired by the test probes, automatically compares it with a pre-stored preset acceptable data range, and if it determines that the range is exceeded, it outputs a prompt message to guide the operator to adjust the state of the test probes. After adjustment, it controls the benchmark test to be executed again, forming a closed-loop calibration process. In the batch testing phase, the control device controls the test probes to test the wafers to be tested sequentially and collect data. In the difference calculation phase, the control device executes a preset algorithm program to compare the benchmark test data with the test data to be tested, generating a difference value characterizing the degree of deviation. In the judgment phase, the control device compares the difference value with a first preset threshold and a second preset threshold, and, based on the range the comparison result falls into, performs a graded processing action: judging as acceptable, triggering an independent instrument for retesting, or prompting an abnormal test environment and guiding a return to the benchmark calibration process.

[0090] The coordinated operation of these three core components enables the system to execute the entire wafer testing methodology in an automated and standardized manner. Test probes, acting as front-end sensing and execution components, provide raw test data from the wafer and accept status adjustments; independent instruments, serving as verification measurement channels, offer independent retesting capabilities on specific decision branches; and the control unit, as the global decision-making center, connects the logical judgments and process scheduling of each stage. The collaboration of these three components achieves a complete closed loop, from test condition calibration, batch data acquisition, and differential quantitative analysis to anomaly root cause differentiation and tiered processing, improving testing efficiency while ensuring the accuracy and objectivity of test conclusions.

[0091] The above description is merely an optional embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A wafer testing method, characterized in that, include: The reference wafer is tested to obtain reference test data; If the benchmark test data exceeds the preset acceptable data range, the state of the test probe is adjusted and the test is repeated on the benchmark wafer until the benchmark test data falls within the preset acceptable data range. The wafer to be tested is tested to obtain the test data; Based on the benchmark test data and the test data to be tested, a difference value characterizing the degree of deviation between the two is obtained; The difference value is compared with a first preset threshold and a second preset threshold, wherein the second preset threshold is greater than the first preset threshold. If the difference value is less than the first preset threshold, the wafer to be tested is determined to be qualified; If the difference value is greater than or equal to the first preset threshold and less than the second preset threshold, the wafer under test is determined to be abnormal, and the wafer under test is retested using an instrument independent of the test probe. If the difference value is greater than or equal to the second preset threshold, the test environment is determined to be abnormal, and the process returns to the state of adjusting the test probe and returning to the step of retesting the reference wafer.

2. The wafer testing method as described in claim 1, characterized in that, Adjusting the state of the test probe includes at least one of the following operations: Clean the tip of the test probe; Adjust the contact resistance between the test probe and the wafer pad; The alignment accuracy between the test probe and the wafer pad is calibrated. Adjust the contact pressure of the test probe.

3. The wafer testing method as described in claim 2, characterized in that, Adjusting the contact pressure of the test probe includes: Obtain the first pressure value at which the test probe first produces a complete and clear needle mark on the wafer pad; The working pressure of the test probe is set to a preset range that is greater than the first pressure value.

4. The wafer testing method as described in claim 1, characterized in that, The instrument, independent of the test probe, includes at least one of an oscilloscope and a multimeter.

5. The wafer testing method as described in claim 1, characterized in that, The first preset threshold and the second preset threshold are set according to different percentage deviation ranges based on the center value of the benchmark test data; wherein, the percentage deviation range corresponding to the second preset threshold is greater than the percentage deviation range corresponding to the first preset threshold.

6. The wafer testing method as described in claim 1, characterized in that, The testing of the reference wafer includes: Electrical parameters were measured at multiple locations at the center and edge of the reference wafer.

7. The wafer testing method according to any one of claims 1 to 6, characterized in that, The step of obtaining a difference value characterizing the degree of deviation between the benchmark test data and the test data to be tested includes: The benchmark test data and the test data to be tested are compared parameter by parameter, and the deviation of each parameter is calculated. The deviation is used as the difference value.

8. The wafer testing method according to any one of claims 1 to 6, characterized in that, The step of obtaining a difference value characterizing the degree of deviation between the benchmark test data and the test data to be tested includes: The benchmark test data and the test data to be tested are compared parameter by parameter, and the coefficient of variation of each parameter is calculated. The coefficient of variation is used as the difference value.

9. A wafer testing system, characterized in that, include: Test probes are used to perform electrical contact tests on wafers; An instrument, independent of the test probes, is used to retest the wafer; The control device is configured to perform the wafer testing method according to any one of claims 1 to 7.

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