Display device, source driving chip and display driving chip

Abstract

The embodiment of the application discloses a display device, a source driving chip and a display driving chip, the display device comprises a display panel, a plurality of data lines, a liquid crystal prism panel arranged on the light exit side of the display panel, a plurality of electrode groups, and a plurality of driving electrodes in each electrode group; and a source driving circuit comprising a display output port and a prism output port, the display output port being electrically connected with the data lines, and the prism output port being electrically connected with the driving electrodes. The display device provided by the embodiment of the application multiplexes the control circuit of the display panel as the control circuit of the liquid crystal prism panel, thereby simplifying the structure of the display device, making the liquid crystal prism panel easily added to the display device, and reducing the volume of the display device.

Description

Technical Field

[0001] The present invention relates to display technology, and more particularly to a display device, a source driver chip, and a display driver chip. Background Technology

[0002] With the development of display technology, three-dimensional (3D) display technology is receiving increasing attention. 3D display technology utilizes the left and right eyes to receive images with a certain parallax, and then the brain fuses the image information to present a 3D visual display effect.

[0003] By setting a liquid crystal prism panel on the light-emitting side of a two-dimensional (2D) display panel, the liquid crystal prism panel can be controlled to switch between 2D and 3D displays. In related technologies, controlling the operation of the liquid crystal prism panel requires a separate control circuit, resulting in a large display device size and a complex overall structure, which is not conducive to widespread application. Summary of the Invention

[0004] This invention provides a display device, a source driver chip, and a display driver chip. The display device simplifies the structure by reusing the control circuit of the display panel as the control circuit of the liquid crystal prism panel, making it easier to incorporate the liquid crystal prism panel into the display device and reducing the size of the display device.

[0005] In a first aspect, embodiments of the present invention provide a display device, comprising: Display panel, including multiple data cables; A liquid crystal prism panel, disposed on the light-emitting side of the display panel, includes multiple electrode groups, each of which includes multiple driving electrodes; The source drive circuit includes a display output port and a prism output port, wherein the display output port is electrically connected to the data line and the prism output port is electrically connected to the drive electrode.

[0006] Secondly, embodiments of the present invention also provide a source driver chip, including a display output port and a prism output port, wherein the display output port is used to provide signals to a data line, and the prism output port is used to provide signals to a driving electrode.

[0007] Thirdly, embodiments of the present invention also provide a display driver chip, including a source driving circuit and a timing control circuit. The source driving circuit includes a display output port and a prism output port. The display output port is used to provide signals to data lines, and the prism output port is used to provide signals to driving electrodes. The timing control circuit is electrically connected to the source drive circuit and transmits pixel data signals to the source drive circuit.

[0008] The display device provided in this embodiment of the invention includes a display panel and a liquid crystal prism panel on the light-emitting side of the display panel. The display panel is used to display a two-dimensional display image and may include multiple sub-pixels and multiple data lines. Each data line provides data signals to multiple sub-pixels. The liquid crystal prism panel includes multiple liquid crystal prisms, each liquid crystal prism includes multiple electrode groups, and each electrode group includes multiple driving electrodes. When a corresponding voltage is applied to the driving electrodes, the liquid crystal is deflected to form a liquid crystal prism, thereby achieving a three-dimensional display effect. The display device also includes a source driving circuit, including a display output port and a prism output port. The display output port is electrically connected to the data lines and is used to provide data signals to the data lines. The prism output port is electrically connected to the driving electrodes and is used to provide driving signals to the driving electrodes. The display device provided in this embodiment of the invention includes a source driving circuit comprising a display output port and a prism output port. The prism output port provides a driving signal to the driving electrode of the liquid crystal prism panel. The control circuit of the display panel is reused as the control circuit of the liquid crystal prism panel. This enables the source driving circuit to drive both the display panel and the liquid crystal prism panel, simplifying the structure of the display device, reducing its size, lowering its cost, and making it easy to incorporate the liquid crystal prism panel into the display device. Attached Figure Description

[0009] Figure 1 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention; Figure 2 A schematic diagram of the circuit principle of a display device provided in an embodiment of the present invention; Figure 3 A cross-sectional structural diagram of a liquid crystal prism panel provided in an embodiment of the present invention; Figure 4 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention; Figure 5 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention; Figure 6 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention; Figure 7 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention; Figure 8 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention; Figure 9 This is a schematic diagram of the structure of a first multiplexing unit provided in an embodiment of the present invention; Figure 10 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention; Figure 11 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention; Figure 12 A timing signal diagram of a timing control circuit provided in an embodiment of the present invention; Figure 13 A timing signal diagram of a timing control circuit provided in an embodiment of the present invention; Figure 14 This is a schematic diagram of timing signals for a display device provided in an embodiment of the present invention; Figure 15 This is a schematic diagram of a source drive circuit provided in an embodiment of the present invention; Figure 16 A top view of a liquid crystal prism panel provided in an embodiment of the present invention; Figure 17 for Figure 16 Along the middle B area Figure 16 A schematic diagram of the cross-sectional structure extending along the direction of the driving electrode and passing through a certain driving electrode. Figure 18 A schematic diagram of the circuit principle of another display device provided in an embodiment of the present invention. Detailed Implementation

[0010] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0011] The terminology used in the embodiments of this invention is for the purpose of describing specific embodiments only and is not intended to limit the invention. It should be noted that directional terms such as "upper," "lower," "left," and "right" described in the embodiments of this invention are used to describe the angles shown in the accompanying drawings and should not be construed as limiting the embodiments of this invention. Furthermore, in the context, it should be understood that when referring to an element being formed "upper" or "lower" of another element, it can be formed not only directly "upper" or "lower" of the other element, but also indirectly "upper" or "lower" of the other element through an intermediate element. The terms "first," "second," etc., are used for descriptive purposes only and do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0012] The inventors discovered in their research that existing liquid crystal prism panels typically have independent controllers and analog-to-digital conversion circuits to apply corresponding voltage signals to multiple driving electrodes to control the liquid crystal prism panel. Because existing liquid crystal prism panels have many control circuits, they are difficult to integrate into display devices.

[0013] Figure 1 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Figure 2 This is a circuit diagram of a display device provided in an embodiment of the present invention, with reference to... Figure 1 and Figure 2 The display device provided in this embodiment of the invention includes a display panel 10, a liquid crystal prism panel 20, and a source driving circuit 30. The display panel 10 includes multiple data lines 11 for transmitting data signals. The liquid crystal prism panel 20 is disposed on the light-emitting side of the display panel 10 and is used to split the light beam emitted by the display panel 10 into a left-eye beam and a right-eye beam. The left-eye beam is projected onto the left eye, and the right-eye beam is projected onto the right eye, thereby enabling the display device to achieve a 3D display effect. The liquid crystal prism panel 20 includes multiple electrode groups 21, each including multiple driving electrodes 211. By applying a driving voltage to each driving electrode 211, the liquid crystal prism panel 20 has a beam-splitting function. The source driving circuit 30 includes a display output port 31 and a prism output port 32. The display output port 31 is electrically connected to the data lines 11 and provides data signals to the data lines 11. The prism output port 32 is electrically connected to the driving electrodes 211 and provides driving signals to the driving electrodes 211.

[0014] It is understandable that, such as Figure 1 As shown, in the display device provided in this embodiment of the invention, the display panel 10 and the liquid crystal prism panel 20 are stacked. Figure 2 The vertical or horizontal arrangement of the display panel 10 and liquid crystal prism panel 20 shown in subsequent embodiments is merely illustrative of the principles of the present invention and does not represent the actual structure of the display device. The display panel 10 is used to output a two-dimensional display image and may include multiple sub-pixels arranged in an array. Each data line 11 can be electrically connected to a column of multiple sub-pixels to provide data signals to the corresponding sub-pixels. The present invention does not limit the type of display panel 10. It can be a self-emissive display panel, such as an organic light-emitting diode (OLED) display panel, a miniature LED display panel, or a micro LED display panel, or a non-actively emitting display panel, such as a liquid crystal display panel or an e-ink display panel. The appropriate panel can be flexibly selected based on the specific implementation.

[0015] Figure 3 This is a cross-sectional structural diagram of a liquid crystal prism panel provided in an embodiment of the present invention, with reference to... Figure 3 The liquid crystal prism panel 20 includes a first substrate 201, a second substrate 202, and a liquid crystal layer 203. The liquid crystal layer 203 is located between the first substrate 201 and the second substrate 202. The liquid crystal layer 203 includes liquid crystal molecules. The liquid crystal prism panel 20 includes a plurality of prism units 210 ( Figure 3 (A prism unit is schematically shown in the diagram). Multiple prism units 210 are arranged along a first direction X. Each prism unit 210 includes multiple driving electrodes 211 (i.e., the multiple driving electrodes 211 in one prism unit 210 form an electrode group 21) and a common electrode 212. The multiple driving electrodes 211 are located between the first substrate 201 and the liquid crystal layer 203, wherein... Figure 3 The illustration of a prism unit 210 with 16 driving electrodes 211 is merely schematic; the actual number of driving electrodes 211 can be designed according to specific circumstances. Multiple driving electrodes 211 are spaced apart along a first direction X. Along the first direction X, adjacent driving electrodes 211 are spaced a certain distance apart. Multiple prism units 210 share the same common electrode 212, which is a full-surface electrode. During stereoscopic display, a voltage difference exists between the driving electrodes 211 and the common electrode 212. The longitudinal electric field formed by the driving electrodes 211 and the common electrode 212 can drive the liquid crystal molecules to rotate, thereby modulating the beam transmission direction of the prism unit 210. The display panel 10 itself has a source drive circuit 30 that provides data signals to the data lines 11 of the display panel 10. In this embodiment, it is not necessary to separately set up a controller and analog-to-digital conversion circuit for the liquid crystal prism panel 20. By setting a display output port 31 and a prism output port 32 in the source drive circuit 30, the display output port 31 is used to provide data signals to the data lines 11 of the display panel 10, and the prism output port 32 is used to provide drive signals to the drive electrodes 211 of the liquid crystal prism panel 20, so that the display panel 10 and the liquid crystal prism panel 20 can be driven together. That is, one drive electrode 211 can be equivalent to one data line 11 of the display panel 10. By multiplexing the source drive circuit 30 as the control circuit of the liquid crystal prism panel 20, the control of the liquid crystal prism panel 20 can be realized.

[0016] In one embodiment, the liquid crystal prism panel 20 may include 800 to 1000 prism units 210 (i.e., 800 to 1000 electrode groups 21), each electrode group 21 including 16 driving electrodes 211, the nth driving electrode 211 (n is an integer between 1 and 16) in each electrode group 21 is electrically connected, the liquid crystal prism panel 20 has at least 16 leads that are electrically connected to the 16 driving electrodes 211 in the electrode group 21 respectively, and the source driving circuit 30 is provided with multiple ports as prism output ports 32, the prism output ports 32 output driving signals of the driving electrodes 211.

[0017] The display device provided in this embodiment of the invention includes a source drive circuit 30 comprising a display output port 31 and a prism output port 32. The prism output port 32 provides a drive signal to the drive electrode 211 of the liquid crystal prism panel 20, thereby multiplexing the control circuit of the display panel 10 into the control circuit of the liquid crystal prism panel 20. This enables the source drive circuit 30 to drive both the display panel and the liquid crystal prism panel simultaneously, simplifying the structure of the display device, reducing its size, lowering costs, and making it easy to incorporate the liquid crystal prism panel into the display device.

[0018] Figure 4 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention, with reference to... Figure 4 Optionally, the display device also includes a boost circuit 40, the input of which is electrically connected to the prism output port 32, and the output of which is electrically connected to the drive electrode 211.

[0019] In this embodiment, the display area of ​​the display panel 10 and the corresponding area of ​​the liquid crystal prism panel 20 are not shown. The driving signal applied to the driving electrode 211 can be regarded as an additional data signal. In specific implementations, for example, when the display panel 10 is a liquid crystal display panel, the maximum voltage amplitude output by the source driving circuit 30 is usually on the order of 5V, while the maximum voltage amplitude required by the liquid crystal prism panel 20 is usually on the order of 10V to 25V. In this case, the signal directly output by the source driving circuit 30 is insufficient to provide the driving electrode 211 with a driving signal that meets the voltage requirements. Therefore, in this embodiment, a boost circuit 40 is provided between the source driving circuit 30 and the liquid crystal prism panel 20. The low voltage (e.g., 5V) signal output by the prism output port 32 is boosted to a high voltage signal (e.g., 15V) by the boost circuit 40, thereby driving the liquid crystal prism panel 20 to work. In actual driving, different driving electrodes 211 need to be applied with different driving voltages. Different prism output ports 32 can be set to output different voltages, which are then boosted by the boost circuit 40 to achieve different voltages applied to different driving electrodes 211. Among them, the external input signals of the boost circuit 40, such as control signals, are not included. Figure 4 As shown, the specific structure can be designed according to the actual situation.

[0020] It is understood that in some embodiments, the boost circuit 40 may not be provided. For example, when the display panel 10 is an e-ink display panel, the source drive circuit 30 of the e-ink display panel can directly provide a voltage of 15V, and the drive voltage of the drive electrode 211 can also be directly provided by the source drive circuit 30.

[0021] Continue to refer to Figure 4 Optionally, the display device further includes a first flexible circuit board 50; the display panel 10 includes a first substrate 100, and the data line 11 is located on one side of the first substrate 100. In one embodiment, the source driving circuit 30 may be located on the first substrate 100, and the source driving circuit 30 and the data line 11 are located on the same side of the first substrate 100. In another embodiment, the source driving circuit 30 may also be located on the first flexible circuit board 50. Figure 4 The example shown is that the source drive circuit 30 is located on the first substrate 100. The first flexible circuit board 50 is bonded to the first substrate 100, and the boost circuit 40 is located on the first flexible circuit board 50.

[0022] The first flexible circuit board 50 is a flexible circuit board connected to the display panel 10. A boost circuit 40 is provided on the first flexible circuit board 50, and the electrical connection between the prism output port 32 and the boost circuit 40 is achieved using traces on the first flexible circuit board 50. The electrical connection between the boost circuit 40 and the liquid crystal prism panel 20 is also achieved using traces on the first flexible circuit board 50. In a specific implementation, the display device also includes a second flexible circuit board 60, which is a flexible circuit board connected to the liquid crystal prism panel 20. The first flexible circuit board 50 and the second flexible circuit board 60 can be connected by corresponding plug-in interfaces. Thus, the electrical connection between the prism output port 32 and the driving electrode 211 is achieved through the traces on the first flexible circuit board 50 and the second flexible circuit board 60.

[0023] Figure 4 In one embodiment, the boost circuit 40 being disposed on the first flexible circuit board 50 is merely illustrative; in another embodiment, the boost circuit 40 may also be disposed on the second flexible circuit board 60. For example, Figure 5 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention, with reference to... Figure 5The display device includes a first flexible circuit board 50 and a second flexible circuit board 60; the liquid crystal prism panel 20 also includes a second substrate 200, a driving electrode 211 located on one side of the second substrate 200, the second flexible circuit board 60 bonded to the second substrate 200, a boost circuit 40 located on the second flexible circuit board 60, and a prism output port 32 electrically connected to the boost circuit 40 through traces on the first flexible circuit board 50 and the second flexible circuit board 60. The boost circuit 40 is also electrically connected to the driving electrode 211 through traces on the second flexible circuit board 60. The second substrate 200 is the same as the first substrate 201.

[0024] Optionally, the boost circuit 40 is also configured to reverse the polarity of the voltage signal output from at least a portion of the prism output ports 32, so that the driving voltages provided to all driving electrodes 211 in the same electrode group 21 have the same polarity.

[0025] For example, in a liquid crystal display panel, the source driving circuit 30 typically uses column inversion to reduce power consumption, with two data lines 11 transmitting voltages of different polarities. For instance, one data line 11 transmits a data signal with a positive voltage polarity, and the other data line 11 transmits a data signal with a negative voltage polarity. For the source driving circuit 30, adjacent display output ports 31 output voltage signals of different polarities. In the liquid crystal prism panel 20, the voltage polarity of each driving electrode 211 is the same, i.e., all are either positive or negative voltages. Therefore, in this embodiment of the invention, the boost circuit 40 inverts the polarity of the voltage signals output from at least a portion of the prism output ports 32. For example, it inverts the negative voltage output from a portion of the prism output ports 32 to a positive voltage, so that the driving voltages provided to all driving electrodes 211 in the same electrode group 21 are all positive, and the driving voltages provided to all driving electrodes 211 in the same electrode group 21 have the same polarity.

[0026] Optionally, the input terminals of the boost circuit 40 include a positive input terminal and a negative input terminal, and the output terminals of the boost circuit 40 include a positive output terminal and a negative output terminal. The prism output port 32 includes a first polarity port and a second polarity port, which output voltage signals of different polarities. The first polarity port is electrically connected to the positive input terminal of the boost circuit 40, and the voltage polarity of the positive output terminal is the same as that of the positive input terminal. The second polarity port is electrically connected to the negative input terminal of the boost circuit 40, and the voltage polarity of the negative output terminal is opposite to that of the negative input terminal. For example, the first polarity port of the prism output port 32 outputs a positive voltage signal, and the second polarity port of the prism output port 32 outputs a negative voltage signal. The first polarity port is electrically connected to the positive input terminal of the boost circuit 40. The voltage signal input to the positive input terminal of the boost circuit 40 does not change its polarity after being processed by the boost circuit 40, and the output terminal of the positive output terminal still outputs a positive voltage signal. The second polarity port is electrically connected to the negative input terminal of the boost circuit 40. The voltage signal input to the negative input terminal of the boost circuit 40 is processed by the boost circuit 40, changing the polarity of the voltage, and the negative output terminal outputs a positive polarity voltage signal. This ensures that the driving voltages in the liquid crystal prism panel 20 have the same polarity, thus enabling the normal driving of the liquid crystal prism panel 20.

[0027] In another embodiment, the boost circuit 40 may not have an inverting function, and the output signals of each prism output port 32 may have the same polarity. For example, each prism output port 32 may be selected as a first polarity port, or each prism output port 32 may be selected as a second polarity port. It should be noted that the polarity of the output signal of the first polarity port may change over time, and the polarity of the output signal of the second polarity port may also change over time. In the same frame of the display, the polarity of the output signal of the first polarity port is opposite to that of the output signal of the second polarity port. In the case of column inversion, the polarity of the output signals of odd or even number of output ports is the same. For example, the 1st, 3rd, 5th... output ports (the specific number is determined according to the number of driving electrodes 211 in the electrode group 21) may be selected as prism output ports 32, thereby realizing the normal driving of the liquid crystal prism panel 20.

[0028] For example, the boost circuit 40 also includes a boost voltage input terminal and a reference voltage input terminal. The boost voltage input terminal is used to input a boost voltage, the absolute value of which is greater than or equal to the absolute value of the voltage output by the prism output port 32. The reference voltage input terminal is used to input a reference voltage, which is a fixed voltage, such as 0V.

[0029] In other embodiments, for example, when the display panel 10 is an organic light-emitting diode display panel, since the source driving circuit 30 always provides a driving voltage of the same polarity, an inverter 70 is also required when driving the liquid crystal prism panel 20 to avoid polarization of the liquid crystal molecules in the liquid crystal prism panel 20. Figure 6 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention, with reference to... Figure 6 Optionally, the display device also includes an inverter 70, the input terminal of which is electrically connected to the prism output port 32, the output terminal of which is electrically connected to the input terminal of the boost circuit 40, and the control terminal of the inverter 70 receives a reversal control signal, which is used to control the output terminal of the inverter 70 to achieve voltage polarity reversal at a specific frequency.

[0030] The inversion control signal can be provided by the source drive circuit 30 to simplify the structure of the display device. In other embodiments, the inversion control signal can also be provided by other structures, and the specific implementation can be designed according to the actual situation. In this embodiment, the display panel 10 can be an organic light-emitting diode display panel. The display output port 31 and the prism output port 32 of the source drive circuit 30 can always output voltage signals of the same polarity (e.g., positive voltage signals). However, the liquid crystal prism panel 20 requires polarity reversal during driving. Therefore, this embodiment is provided with an inverter 70, which can realize voltage polarity reversal at a specific frequency according to the working state of the liquid crystal prism panel 20.

[0031] For example, in frames 1 to N, the inversion control signal is high voltage, controlling the output signal of inverter 70 to have the same polarity as the input signal, i.e., no voltage polarity inversion is performed, and the voltage polarity of the drive signal applied to drive electrode 211 is positive. In frames N+1 to 2N, the inversion control signal is low voltage, controlling the output signal of inverter 70 to have the opposite polarity to the input signal, i.e., voltage polarity inversion is performed, and the voltage polarity of the drive signal applied to drive electrode 211 is negative. The boost circuit 40 may only have amplification function and not voltage inversion function. Alternatively, the boost circuit 40 may have both amplification and voltage inversion functions, with each output terminal of inverter 70 connected to the positive input terminal of boost circuit 40, or each output terminal of inverter 70 connected to the negative input terminal of boost circuit 40.

[0032] For example, the inverter 70 is located on the first flexible circuit board 50. In other embodiments, the inverter 70 may also be located on the second flexible circuit board 60.

[0033] Figure 7 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention, with reference to... Figure 7Optionally, the display device further includes a first flexible circuit board 50 and a second flexible circuit board 60; the display panel 10 further includes a first substrate 100, with data lines 11 located on one side of the first substrate 100, and the first flexible circuit board 50 bonded to the first substrate 100, including a first trace 51; the liquid crystal prism panel 20 further includes a second substrate 200, with driving electrodes 211 located on one side of the second substrate 200, and the second flexible circuit board 60 bonded to the second substrate 200, including a second trace 61; the first trace 51 is electrically connected to the prism output port 32, the second trace 61 is electrically connected to the driving electrode 211, and the first trace 51 is electrically connected to the second trace 61. A first end of the first flexible circuit board 50 is connected to the display panel 10, a first end of the second flexible circuit board 60 is connected to the liquid crystal prism panel 20, and a second end of the first flexible circuit board 50 is connected to the second end of the second flexible circuit board 60. The first trace 51 is a signal line on the first flexible circuit board 50 that transmits the driving signal of the liquid crystal prism panel 20, and the second trace 61 is a signal line on the second flexible circuit board 60 that transmits the driving signal of the liquid crystal prism panel 20.

[0034] For example, refer to Figure 4 and Figure 5 A boost circuit 40 is provided on either the first flexible circuit board 50 or the second flexible circuit board 60. A first trace 51 connects the prism output port 32 to the input terminal of the boost circuit 40, and a second trace 61 connects the output terminal of the boost circuit 40 to the drive electrode 211. The first trace 51 and the second trace 61 are indirectly electrically connected through the boost circuit 40. (Reference) Figure 6 The display device also includes an inverter 70, which is disposed on the first flexible circuit board 50 or the second flexible circuit board 60. A first trace 51 connects the prism output port 32 to the input terminal of the inverter 70, and a second trace 61 connects the output terminal of the boost circuit 40 to the drive electrode 211. The first trace 51 and the second trace 61 are indirectly electrically connected through the inverter 70 and the boost circuit 40.

[0035] Figure 8 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention, with reference to... Figure 8 Optionally, the display device further includes a multiplexing circuit 80 and multiple first data source lines 33. The multiplexing circuit 80 includes multiple first multiplexing units 81. The input terminal of one first multiplexing unit 81 is electrically connected to one first data source line 33, and the first data source line 33 is electrically connected to the prism output port 32. The first multiplexing unit 81 has at least two output terminals, and the output terminal of one first multiplexing unit 81 is electrically connected to a first trace 51.

[0036] The output ports of the source drive circuit 30 are electrically connected to the data source lines one-to-one. In this embodiment, by setting a multiplexer circuit 80, the number of prism output ports 32 and the number of first data source lines 33 in the source output circuit 30 can be reduced. The first multiplexer unit 81 can be designed according to actual needs. The multiplexer unit can adopt a 1:2, 1:3, or 1:6 design, etc. A 1:2 multiplexer unit maps one input to two outputs. A 1:3 multiplexer unit maps one input to three outputs. A 1:6 multiplexer unit maps one input to six outputs. For example, Figure 9 This is a schematic diagram of the structure of a first multiplexing unit provided in an embodiment of the present invention, with reference to... Figure 9 Taking a 1:2 multiplexing unit as an example, the first multiplexing unit 81 includes a first switching transistor, which includes a first transistor M1 and a second transistor M2. The first transistor M1 and the second transistor M2 are turned on at different times under the control of the first control signal S1 and the second control signal S2, respectively. When the first transistor M1 is on and the second transistor M2 is off, the drive signal output from the prism output port 32 is transmitted to a first trace 51 via the first data source line 33 and the first transistor M1. When the first transistor M1 is off and the second transistor M2 is on, the drive signal output from the prism output port 32 is transmitted to another first trace 51 via the first data source line 33 and the second transistor M2. For example, the electrode group 21 of the liquid crystal prism panel 20 includes 16 driving electrodes. Without the multiplexing circuit 80, 16 prism output ports 32 and 16 first data source lines 33 are required to provide signals. When the multiplexing circuit 80 is configured, if the first multiplexing unit 81 is a 1:2 multiplexing unit, only 8 prism output ports 32 and 8 first data source lines 33 are needed to provide signals. If the first multiplexing unit 81 is a 1:3 multiplexing unit, only 6 (16 / 3, rounded up) prism output ports 32 and 6 first data source lines 33 are needed to provide signals. If the first multiplexing unit 81 is a 1:6 multiplexing unit, only 3 prism output ports 32 and 3 first data source lines 33 are needed to provide signals. This helps to reduce costs and structural complexity.

[0037] Continue to refer to Figure 8 Optionally, the display device also includes multiple second data source lines 34, and the multiplexing circuit 80 also includes multiple second multiplexing units 82. The input terminal of one second multiplexing unit 82 is electrically connected to one second data source line 34, and the second data source line 34 is electrically connected to the display output port 31. The second multiplexing unit 82 has at least two output terminals, and the output terminal of one second multiplexing unit 82 is electrically connected to one data line 11.

[0038] The second data source line 34 is electrically connected to the display output port 31 and is used to provide data signals to the data lines 11. For example, in one embodiment, the display panel includes 1920 columns of pixel units, each pixel unit including a red sub-pixel, a green sub-pixel, and a blue sub-pixel. Therefore, the display panel includes 1920 × 3 = 5760 data lines 11. Without the multiplexing circuit 80, the number of display output ports 31 and the number of second data source lines 34 would be 5760. With the multiplexing circuit 80, the number of display output ports 31 and the number of second data source lines 34 can be reduced. For example, when the second multiplexing unit 82 is a 1:3 multiplexing unit, the number of display output ports 31 and the number of second data source lines 34 is 1920. This simplifies the structure of the source drive circuit 30 and reduces the number of second data source lines 34, thereby reducing the complexity and cost of the display device.

[0039] In this embodiment, the display panel 10 and the liquid crystal prism panel 20 share the same multiplexing circuit 80, reusing the original circuit structure. Compared with the original display device structure, only the number of multiplexing units in the multiplexing circuit 30 is increased, without the need to increase the control signals of the multiplexing circuit 30, thereby reducing the complexity of the display device.

[0040] For example, the second multiplexing unit 82 has the same circuit structure as the first multiplexing unit 81. The second multiplexing unit 82 includes a second switching transistor, which includes a third transistor and a fourth transistor. The third transistor and the fourth transistor are turned on at different times under the control of the first control signal S1 and the second control signal S2, respectively. The working process of the third transistor and the fourth transistor is similar to that of the first transistor M1 and the second transistor M2, and will not be described again here.

[0041] Optionally, the first multiplexing unit 81 includes a first switching transistor, and the second multiplexing unit 82 includes a second switching transistor, wherein the channel width-to-length ratio of the first switching transistor is different from that of the second switching transistor.

[0042] The number of switching transistors in the first multiplexing unit 81 and the second multiplexing unit 82 can be the same or different. In specific implementations, the design can be tailored to the actual situation. Preferably, the number of switching transistors in the first multiplexing unit 81 is equal to the number of switching transistors in the second multiplexing unit 82, to avoid the need for additional control signals for the first multiplexing unit 81. When a first switching transistor is turned on, it charges the driving electrode 211 in the liquid crystal prism panel 20. When a second switching transistor is turned on, it charges the data line 11 in the display panel 10. Since the loads on the data line 11 and the driving electrode 211 are different, the channel width-to-length ratio of the first switching transistor is set to be different from that of the second switching transistor. The loads on the data line 11 and the driving electrode 211 include the load caused by overlapping capacitance and / or resistance.

[0043] For example, in one embodiment, the liquid crystal prism panel 20 includes 800 to 1000 prism units 210, and each prism unit 210 includes multiple driving electrodes 211. The overlapping capacitance of the driving electrodes 211 in the liquid crystal prism panel 20 is large, requiring a large aspect ratio of the switching transistor. The driving electrodes 211 are made of ITO material, and the resistance of the driving electrodes 211 is also large, resulting in a large load. In this case, the channel aspect ratio of the first switching transistor is greater than that of the second switching transistor to improve the driving capability of the first switching transistor.

[0044] In another embodiment, the number of data lines 11 overlapping with the scan lines is large, resulting in a relatively large overlap capacitance. In this case, the channel width-to-length ratio of the first switching transistor may also be smaller than that of the second switching transistor to improve the driving capability of the second switching transistor. The specific implementation can be designed according to the actual situation.

[0045] Optionally, the display device also includes a boost circuit 40. The input terminal of the boost circuit 40 is electrically connected to the first trace 51, and the output terminal of the boost circuit 40 is connected to the second trace 61. The channel width-to-length ratio of the first switching transistor is smaller than that of the second switching transistor. When the first switching transistor is turned on, the driving electrode 211 is not directly charged by the prism output port 32. The signal provided by the prism output port 32 of the source driving circuit 30 is equivalent to a small source signal. The source signal controls the boost circuit 40 to charge the driving electrode 211. The boost voltage provided to the boost circuit 40 determines the driving capability of the boost circuit 40. Therefore, there is no need to impose excessive requirements on the driving capability of the first switching transistor, and a first switching transistor with a smaller channel width-to-length ratio can be set. The first trace 51 is used to transmit the source signal provided by the prism output port 32 to the boost circuit 40. Since the boost circuit 40 has a strong charging capability, the first switching transistor only needs to transmit the source signal of the boost circuit 40. At this time, the power transmitted by the first switching transistor is small, and there is no need to design a large channel width-to-length ratio. Therefore, in this embodiment, the channel width-to-length ratio of the first switching transistor can be set to be smaller than that of the second switching transistor.

[0046] In another embodiment, since the number of driving signal channels required by the liquid crystal prism panel 20 is much smaller than the number of data signal channels required by the display panel 10, only a small number of prism output ports 32 (e.g., 16) need to be provided for the liquid crystal prism panel 20, even without the multiplexing circuit 80. Figure 10 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention, with reference to... Figure 10 Optionally, the display device also includes a third trace 53, one end of which is directly electrically connected to the prism output port 32, and the other end of which is directly electrically connected to the first trace 51.

[0047] It is understood that this embodiment is similar to... Figure 8 The embodiment differs in that the signal output from the prism output port 32 does not pass through the multiplexing circuit 80, that is, the first multiplexing unit 81 is not provided, but the number of prism output ports 32 is directly set to be the same as the number of driving electrodes 211 in an electrode group 21. For example Figure 8 The first multiplexing unit 81 is a 1:3 multiplexing unit. When the number of driving electrodes 211 in electrode group 21 is 16, Figure 8 In the embodiment, the number of prism output ports 32 is 6. Figure 10 In this embodiment, the number of prism output ports 32 is 16. In specific implementations, a boost circuit 40, an inverter 70, and other structures similar to those in the previous embodiment can also be set between the first trace 51 and the liquid crystal prism panel 20. The specific implementation can be designed according to the actual situation.

[0048] Figure 11 This is a partial structural schematic diagram of another display device provided in an embodiment of the present invention, with reference to... Figure 11 Optionally, the display device further includes a timing control circuit 90, which is electrically connected to the source drive circuit 30. The timing control circuit 90 transmits pixel data signals to the source drive circuit 30. The pixel data signals include a first pixel data signal Data and a second pixel data signal Drive. The first pixel data signal Data is converted into a first data signal DA1 by the source drive circuit 30, and the first data signal DA1 is output from the display output port 31. The second pixel data signal Drive is converted into a second data signal DA2 by the source drive circuit 30, and the second data signal DA2 is output from the prism output port 32.

[0049] The technical solution of this invention enables the joint driving of the display panel 10 and the liquid crystal prism panel 20. The first data signal DA1 is provided by the display panel 10 when displaying different gray levels. DA1 is a data signal provided to the corresponding sub-pixel via data line 11. The second data signal DA2 is a driving signal provided to the liquid crystal prism panel 20. The timing control circuit 90 can serially provide the first pixel data signal Data and the second pixel data signal Drive to the source driving circuit 30, storing them in the data register of the source driving circuit 30. After analog-to-digital conversion and amplification within the source driving circuit 30, the first data signal DA1 is output from the display output port 31, and the second data signal DA2 is output from the prism output port 32. The timing control circuit 90 is also used to provide the source drive circuit 30 with a data clock signal DCLK and a drive enable signal DE. The data clock signal DCLK controls the first pixel data signal Data and the second pixel data signal Drive to be written into the source drive circuit 30 in a serial manner. The drive enable signal DE controls the first data signal DA1 to be provided to the corresponding data line 11 and the second data signal DA2 to be provided to the corresponding drive electrode 211.

[0050] Continue to refer to Figure 11In this embodiment, the display panel 10 further includes multiple scan lines 12 and a gate driving circuit 13. The gate driving circuit 13 is used to control the scan lines 12 to sequentially output scan signals under the control of the timing control circuit 90. For example, when the display panel 10 includes 1080 rows, the scan signals are sequentially the first scan signal Scan1, the second scan signal Scan2, ..., the 1080th scan signal Scan1080. Specifically, the timing control circuit 90 provides the gate driving circuit 13 with a vertical synchronization signal VSYNC, a horizontal synchronization signal HSYNC, and a gate clock signal GCLK. The horizontal synchronization signal HSYNC is also called the line synchronization signal. The time between two vertical synchronization signals VSYNC corresponds to one frame of the display panel 10, and the time between two horizontal synchronization signals HSYNC corresponds to the display panel 10 scanning one row.

[0051] In this embodiment, the gate driving circuit 13 uses a separately configured chip (Gate IC). In other embodiments, the display panel does not use a separate Gate IC, but uses GIP (gate in panel, the gate driving circuit 13 is integrated into the display panel 10). The specific implementation can be designed according to the actual situation.

[0052] Figure 12 This is a timing signal diagram of a timing control circuit provided in an embodiment of the present invention, with reference to... Figure 12 Optionally, the display panel 10 includes multiple sub-pixels; the signals generated by the timing control circuit 90 include a horizontal synchronization signal HSYNC, one horizontal pulse period of the horizontal synchronization signal HSYNC has the duration required to scan one row of sub-pixels; during the period when the horizontal synchronization signal HSYNC is enabled, multiple first pixel data signals Data and at least two second pixel data signals Drive are transmitted to the source drive circuit 30 one by one and latched in the source drive circuit 30.

[0053] For example, refer to Figure 12 In the timing diagram, taking a high level as the effective level as an example, the time period between the first rising edge and the second rising edge of the line synchronization signal HSYNC is the duration required to scan one row of sub-pixels. When the data clock signal DCLK is high, the timing control circuit 90 provides a pixel data signal (the pixel data signal includes a first pixel data signal Data and a second pixel data signal Drive) to the source driving circuit 30. When the line synchronization signal HSYNC is high, multiple first pixel data signals Data and at least two second pixel data signals Drive are transmitted to the source driving circuit 30 one by one. One of the first pixel data signals Data includes the data of multiple sub-pixels. This embodiment of the invention does not limit the transmission order of the multiple first pixel data signals Data and at least two second pixel data signals Drive. For example... Figure 12 As shown, the first pixel data signal Data and the second pixel data signal Drive are transmitted to the source drive circuit 30 at intervals. The time period of one or more second pixel data signals Drive is located between the time periods of two first pixel data signals Data.

[0054] In another embodiment, the first pixel data signal Data can be written first, followed by the second pixel data signal Drive. For example, Figure 13 This is a timing signal diagram of a timing control circuit provided in an embodiment of the present invention. Unlike the embodiments described above, the timing control circuit 90 first provides multiple (e.g., 1920) first pixel data signals Data, and then provides at least two (e.g., 6) second pixel data signals Drive. In another embodiment, the second pixel data signals Drive can be written to the source drive circuit 30 first, and then the first pixel data signals Data can be written to the source drive circuit 30. The specific implementation can be flexibly selected according to the actual situation.

[0055] Figure 14 This is a timing signal diagram of a display device provided in an embodiment of the present invention, with reference to... Figure 14 Optionally, in the first sub-time period T1, the first data signal DA1 is transmitted to the data line 11; in the second sub-time period T2, the second data signal DA2 is transmitted to the drive electrode 211; the first sub-time period T1 and the second sub-time period T2 are within the same time period when the horizontal synchronization signal HSYNC is at its disabled level. After the first pixel data signal Data and the second pixel data signal Drive are sequentially written to the source drive circuit 30 during the high level period of the horizontal synchronization signal HSYNC, during the low level period of the horizontal synchronization signal HSYNC, in the first sub-time period T1, the source drive circuit 30 writes the first data signal DA1 to the data line 11, and in the second sub-time period T2, the source drive circuit 30 writes the second data signal DA2 to the drive electrode 211.

[0056] For example, refer to Figure 14 , Figure 14 The diagram illustrates the signals provided to two data lines 11 and two drive electrodes 211. During the first row's time period, the row synchronization signal HSYNC is low, the drive enable signal DE is high, the first data signal DA1 is written to the corresponding data line 11, the first scan signal Scan1 is high, the first data line 11 (data line 1) provides a data signal to the first row, first column sub-pixel P11, the second data line 11 (data line 2) provides a data signal to the first row, second column sub-pixel P12, and so on. Simultaneously, multiple (e.g., 16) second data signals DA2 are written to multiple (e.g., 16) drive electrodes 211 within the same electrode group 21. Figure 14Only two driving electrodes 211, namely electrode 1 and electrode 2, are schematically shown.

[0057] Optionally, the first sub-time period T1 and the second sub-time period T2 overlap. When writing data signals (i.e., the first data signal DA1) to the display panel 10, a driving voltage (i.e., the second data signal DA2) is simultaneously applied to the liquid crystal prism panel 20.

[0058] When the display panel 10 is not equipped with a multiplexer circuit 80, in the first sub-period T1, 1920×3 first data signals DA1 can be simultaneously written to 1920×3 data lines 11. At the same time, in the second sub-period T2, 16 second data signals DA2 are written to 16 first traces 51. The first traces 51 are electrically connected to the second traces 61, and the 16 second traces 61 supply power to 16×800 to 16×1000 drive electrodes 211. During the second row's time period, the row synchronization signal HSYNC is low, the drive enable signal DE is high, the first data signal DA1 is written to the corresponding data line 11, the second scan signal Scan2 is high, the first data line (data line 1) provides a data signal to the first column sub-pixel P21 of the second row, the second data line (data line 2) provides a data signal to the second column sub-pixel P22 of the second row, and so on. Simultaneously, multiple (e.g., 16) second data signals DA2 are written to multiple (e.g., 16) drive electrodes 211 within the same electrode group 21. Figure 14 Only two driving electrodes 211, namely electrode 1 and electrode 2, are schematically shown.

[0059] Optionally, during the second sub-period T2, multiple second data signals DA2 are simultaneously transmitted to all driving electrodes 211 in the same electrode group 21. If, during the second sub-period T2 of the first row's period, the second data signal DA2 is transmitted to some driving electrodes 211 (e.g., including electrode 1) in the same electrode group 21, but not to the other driving electrodes 211 (e.g., including electrode 2), and during the second sub-period T2 of the second row's period, the second data signal DA2 is applied to the driving electrodes 211 to which the second data signal DA2 has not yet been applied, then during the second sub-period T2 of the first row's period, a large voltage difference is generated between the driving electrodes 211 (e.g., a large voltage difference is generated between electrode 1 and electrode 2), and a large lateral electric field is generated between the driving electrodes 211, affecting the deflection direction of the liquid crystal molecules and causing unnecessary deflection of the liquid crystal molecules. In this embodiment of the invention, multiple second data signals DA2 are simultaneously transmitted to all driving electrodes 211 in the same electrode group 21, thereby avoiding excessively large voltage differences between two adjacent driving electrodes 211 during a certain period. To avoid unnecessary deflection of liquid crystal molecules caused by a large lateral electric field, thereby improving the working stability of the liquid crystal prism panel 20.

[0060] Optionally, during the period when the display panel 10 displays one frame of image, the same second data signal DA2 is applied to a driving electrode 211 multiple times. This provides sufficient charging time for the driving electrode 211, allowing it to reach a preset voltage value and reducing the attenuation of the voltage already written on the driving electrode 211 over time, thus stabilizing the voltage on the driving electrode 211.

[0061] It is understandable that when the display device performs 3D display, the liquid crystal prism panel 20 typically does not need to be refreshed frequently. For example, during the time period when the display panel 10 displays the same frame image, the liquid crystal prism panel 20 always maintains the same state. That is, theoretically, when the display panel 10 displays the same frame image, only one signal needs to be written to the driving electrode 211. However, in actual implementation, since the voltage already written on the driving electrode 211 will decay over time, writing a signal once may not be enough to make the voltage on the driving electrode 211 reach a stable state. When the display panel 10 displays one frame image, the display panel 10 is usually scanned line by line. For example, the display panel 10 scans 1080 lines. Therefore, in this embodiment, during the time period when the display panel 10 displays one frame image, the same second data signal DA2 can be applied to a driving electrode 211 multiple times, similar to... Figure 14 As shown, within each row's time period, the same second data signal DA2 is applied to one driving electrode 211, for a total of 1080 applications of the second data signal DA2. Alternatively, the same second data signal DA2 is applied to one driving electrode 211 only within a portion of the row's time period, with fewer than 1080 applications of the second data signal DA2.

[0062] Optionally, the display panel 10 includes M rows of sub-pixels; during the time period when the display panel 10 displays an image frame, the same second data signal DA2 is applied to a driving electrode 211 a total of M times, where M is a positive integer greater than 1.

[0063] For example, if M=1080 and the display panel 10 includes 1080 rows of sub-pixels, then during the time period when the display panel 10 displays one frame of image, it needs to be scanned 1080 times. That is, the source drive circuit 30 can output data signals 1080 times. During this time period, the source drive circuit 30 can be designed to output driving voltage to the liquid crystal prism panel 20 1080 times according to actual needs. Thus, during the time period of each row, the same second data signal DA2 is applied to one drive electrode 211, for a total of 1080 applications of the second data signal DA2.

[0064] Figure 15 This is a schematic diagram of a source drive circuit provided in an embodiment of the present invention, with reference to... Figure 15Optionally, the source drive circuit 30 includes a data register 301 and an analog-to-digital converter circuit 302. The data register 301 latches the first pixel data signal Data and the second pixel data signal Drive. The output terminal of the data register 301 is electrically connected to the input terminal of the analog-to-digital converter circuit 302. The analog-to-digital converter circuit 302 includes a first conversion channel 3021 and a second conversion channel 3022. The first conversion channel 3021 converts the first pixel data signal Data into a first data signal DA1, and the second conversion channel 3022 converts the second pixel data signal Drive into a second data signal DA2.

[0065] The source drive circuit 30 may further include an amplifier circuit 303, through which the first data signal DA1 and the second data signal DA2 are amplified and output. The source drive circuit 30 may also include a level shifter. Figure 15 (Not shown in the image) The level shifter is electrically connected to the data register 301. The level shifter is used to shift the serial pixel data signals (the pixel data signals include the first pixel data signal Data and the second pixel data signal Drive) one by one and store them in the data register 301.

[0066] In one embodiment, optionally, the display device includes a display driver chip, with the source driving circuit 30 and timing control circuit 90 integrated in the display driver chip. The display device can be a portable display device such as a mobile phone. In some embodiments, the display driver chip is also used to output touch signals to drive a touchpad to achieve touch functionality.

[0067] Figure 16 This is a top view schematic diagram of a liquid crystal prism panel provided in an embodiment of the present invention. Figure 17 for Figure 16 Along the middle B area Figure 16 A schematic diagram of the cross-sectional structure extending along the direction of the driving electrode and passing through a certain driving electrode, for reference. Figure 16 and Figure 17Optionally, the liquid crystal prism panel 20 includes an optical area AA and a non-optical area NA. The non-optical area NA is located around the optical area AA, and the optical area AA corresponds to the display area of ​​the display panel 10. The non-optical area NA corresponds to the non-display area of ​​the display panel 10. The light emitted from the display area of ​​the display panel 10 passes through the optical area AA of the liquid crystal prism panel 20 to form a left-eye beam and a right-eye beam. The liquid crystal prism panel 20 also includes a second substrate 200 and a lead group 220. The electrode group 21 and the lead group 220 are located on one side of the second substrate 200. The driving electrode 211 is located in the optical area AA and the non-optical area NA. The lead group 220 is located in the non-optical area NA and includes multiple leads 221. The driving electrode 211 and the leads 221 are disposed in different layers. An insulating layer 230 is disposed between the driving electrode 211 and the leads 221. One driving electrode 211 is electrically connected to at least one lead 221, and different driving electrodes 211 are electrically connected to different leads 221. Thus, multiple leads 221 in lead group 220 provide driving signals to multiple different driving electrodes 211 in electrode group 21 respectively. One lead 221 can provide the same driving signal to the driving electrodes 211 in multiple electrode groups 21, and different driving electrodes 211 in the same electrode group 21 are provided with driving signals by two different leads 221.

[0068] For example, Figure 16 One of the driving electrodes 211 has its two ends electrically connected to two leads 221 respectively. This arrangement can improve the signal stability of the driving electrode 211. On the one hand, when the driving electrode 211 is long, applying the same driving signal to both ends of the driving electrode 211 improves the driving capability of the driving electrode 211 and makes the driving signal more stable. On the other hand, even if the driving electrode 211 is shorted due to pressure or other reasons, applying the same driving signal to both ends of the driving electrode 211 can prevent abnormal voltage of the driving electrode 211.

[0069] Continue to refer to Figure 16 Optionally, the display device further includes a second flexible circuit board 60, which is bonded to the second substrate 200 and includes a second trace 61; a lead 221 is electrically connected to the second trace 61.

[0070] The lead 221 of the liquid crystal prism panel 20 is electrically connected to the first trace 51 on the first flexible circuit board 50 through the second trace 61 on the second flexible circuit board 60. The first trace 51 on the first flexible circuit board 50 is electrically connected to the prism output port 32 of the source drive circuit 30, thereby realizing the interconnection and conduction of drive signals.

[0071] Figure 18 This is a schematic diagram of the circuit principle of another display device provided in an embodiment of the present invention; see reference. Figure 18Optionally, the extension direction of the driving electrode 211 is the same as the extension direction of the data line 11. By designing the extension direction of the driving electrode 211 to be the same as the extension direction of the data line 11, the edge of the optical area AA of the liquid crystal prism panel 20 can be aligned with the edge of the display area of ​​the display panel 10, which is beneficial for better control of light.

[0072] For example, refer to Figure 2 The extension direction of the driving electrode 211 intersects the extension direction of the data line 11.

[0073] Optionally, the spacing between two adjacent driving electrodes 211 is the first spacing, and the spacing between two adjacent data lines 11 is the second spacing. The first spacing and the second spacing are different. The position of the data lines 11 and the value of the second spacing are mainly constrained by the size, position, and arrangement of the sub-pixels in the display panel 10. The position of the driving electrodes 211 and the value of the first spacing are mainly constrained by the extension direction of the prism unit 210 in the liquid crystal prism panel 20, the width of the prism unit 210, the magnitude of the lateral electric field, the longitudinal electric field, and their mutual influence. The first spacing and the second spacing are subject to different constraints and design objectives, and therefore are different.

[0074] For example, the display panel 10 includes 1920 × 3 = 5760 data lines 11. The liquid crystal prism panel 20 may include 800 to 1000 electrode groups 21, each electrode group 21 including 16 driving electrodes 211. The liquid crystal prism panel 20 includes 12800 to 16000 driving electrodes 211. The display area of ​​the display panel 10 corresponds to the optical area AA of the liquid crystal prism panel 20. The display area of ​​the display panel 10 and the optical area AA of the liquid crystal prism panel 20 have the same or similar area. The number of driving electrodes 211 in the liquid crystal prism panel 20 is greater than the number of data lines 11, thereby the first pitch is smaller than the second pitch.

[0075] Optionally, both the display panel 10 and the liquid crystal prism panel 20 include a liquid crystal layer. In embodiments where the display panel 10 uses a liquid crystal display panel, since the source driving circuit 30 can provide voltages of different polarities to avoid polarization of the liquid crystal molecules during display, and the liquid crystal prism panel 20 includes liquid crystal molecules, the polarity of the driving voltage needs to be reversed to avoid polarization of the liquid crystal molecules. The source driving circuit 30 provides voltages of different polarities, facilitating the polarity reversal of the driving voltage required by the liquid crystal prism panel 20, thus satisfying the driving signal requirements of the liquid crystal prism panel 20.

[0076] This invention also provides a source driver chip, which includes a display output port and a prism output port. The display output port provides signals to the data lines to drive the display panel to display, and the prism output port provides signals to the driving electrodes to drive the liquid crystal prism panel to operate. The source driver circuit is an independent driver chip, and the source driver chip provided in this invention can be used in any of the display devices provided in the above embodiments.

[0077] This invention also provides a display driver chip, which includes a source driving circuit and a timing control circuit. The source driving circuit includes a display output port and a prism output port. The display output port provides signals to a data line, and the prism output port provides signals to a driving electrode. The timing control circuit is electrically connected to the source driving circuit and transmits pixel data signals to the source driving circuit. The source driving circuit is integrated into the display driver chip, and the display driver chip provided by this invention can be used in any of the display devices provided in the above embodiments.

[0078] In practical implementation, the display device can be a portable display device such as a mobile phone, and the source driving circuit and timing control circuit can be integrated together to form a display driver chip. The display device can also be a large-screen display device such as a television, which includes multiple source driving circuits and one timing control circuit. The source driving circuit and timing control circuit are set separately, and the source driving circuit is an independent driver chip.

[0079] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A display device, characterized in that, include: Display panel, including multiple data cables; A liquid crystal prism panel, disposed on the light-emitting side of the display panel, includes multiple electrode groups, each of which includes multiple driving electrodes; The source drive circuit includes a display output port and a prism output port, wherein the display output port is electrically connected to the data line and the prism output port is electrically connected to the drive electrode.

2. The display device according to claim 1, characterized in that, It also includes a boost circuit, the input of which is electrically connected to the output port of the prism, and the output of which is electrically connected to the driving electrode.

3. The display device according to claim 2, characterized in that, It also includes a first flexible circuit board; The display panel includes a first substrate, the data line is located on one side of the first substrate, the first flexible circuit board is bonded to the first substrate, and the boost circuit is located on the first flexible circuit board.

4. The display device according to claim 2, characterized in that, It also includes a second flexible circuit board; The liquid crystal prism panel further includes a second substrate, the driving electrode is located on one side of the second substrate, the second flexible circuit board is bonded to the second substrate, and the boost circuit is located on the second flexible circuit board.

5. The display device according to claim 2, characterized in that, The boost circuit is also configured to reverse the polarity of the voltage signal output from at least a portion of the prism output ports, so that the drive voltages provided to all drive electrodes in the same electrode group have the same polarity.

6. The display device according to claim 5, characterized in that, The input terminals of the boost circuit include a positive input terminal and a negative input terminal, and the output terminals of the boost circuit include a positive output terminal and a negative output terminal. The prism output port includes a first polarity port and a second polarity port, which output voltage signals of different polarities. The first polarity port is electrically connected to the positive input terminal, and the voltage polarity of the positive output terminal is the same as that of the positive input terminal. The second polarity port is electrically connected to the reverse input terminal, and the voltage polarity of the reverse output terminal is opposite to that of the reverse input terminal.

7. The display device according to claim 2, characterized in that, It also includes an inverter, the input terminal of which is electrically connected to the output port of the prism, and the output terminal of which is electrically connected to the input terminal of the boost circuit. The control terminal of the inverter receives a reversal control signal, which is used to control the output terminal of the inverter to reverse the polarity of the voltage at a specific frequency.

8. The display device according to claim 1, characterized in that, It also includes a first flexible circuit board and a second flexible circuit board; The display panel further includes a first substrate, the data line is located on one side of the first substrate, the first flexible circuit board is bonded to the first substrate, and the first flexible circuit board includes a first trace; The liquid crystal prism panel further includes a second substrate, the driving electrode is located on one side of the second substrate, the second flexible circuit board is bonded to the second substrate, and the second flexible circuit board includes a second trace; The first trace is electrically connected to the prism output port, the second trace is electrically connected to the drive electrode, and the first trace is electrically connected to the second trace.

9. The display device according to claim 8, characterized in that, It also includes a multiplexing circuit and multiple first data source lines. The multiplexing circuit includes multiple first multiplexing units. The input terminal of one first multiplexing unit is electrically connected to one first data source line. The first data source line is electrically connected to the prism output port. The first multiplexing unit has at least two output terminals, and one output terminal of the first multiplexing unit is electrically connected to one of the first traces.

10. The display device according to claim 9, characterized in that, It also includes multiple second data source lines, and the multiplexing circuit further includes multiple second multiplexing units. The input terminal of one second multiplexing unit is electrically connected to one second data source line, and the second data source line is electrically connected to the display output port. The second multiplexing unit has at least two outputs, one of which is electrically connected to a data line.

11. The display device according to claim 10, characterized in that, The first multiplexing unit includes a first switching transistor, and the second multiplexing unit includes a second switching transistor. The channel width-to-length ratio of the first switching transistor is different from that of the second switching transistor.

12. The display device according to claim 11, characterized in that, It also includes a boost circuit, the input terminal of which is electrically connected to the first trace, and the output terminal of which is connected to the second trace; The channel width-to-length ratio of the first switching transistor is smaller than that of the second switching transistor.

13. The display device according to claim 8, characterized in that, It also includes a third trace, one end of which is directly electrically connected to the prism output port, and the other end of which is directly electrically connected to the first trace.

14. The display device according to claim 1, characterized in that, It also includes a timing control circuit, which is electrically connected to the source drive circuit and transmits pixel data signals to the source drive circuit; The pixel data signal includes a first pixel data signal and a second pixel data signal. The first pixel data signal is converted into a first data signal by the source driving circuit and is output by the display output port. The second pixel data signal is converted into a second data signal by the source driving circuit and is output by the prism output port.

15. The display device according to claim 14, characterized in that, The display panel includes multiple sub-pixels; the signal generated by the timing control circuit includes a line synchronization signal, and one line pulse period of the line synchronization signal has the duration required to scan one line of the sub-pixels; During the period when the line synchronization signal is enabled, multiple first pixel data signals and at least two second pixel data signals are transmitted to the source drive circuit one by one and latched in the source drive circuit.

16. The display device according to claim 15, characterized in that, In the first sub-time period, the first data signal is transmitted to the data line; in the second sub-time period, the second data signal is transmitted to the driving electrode. The first sub-time period and the second sub-time period are within the same time period when the line synchronization signal is at the disabled level.

17. The display device according to claim 16, characterized in that, The first sub-time period overlaps with the second sub-time period.

18. The display device according to claim 16, characterized in that, During the second sub-period, multiple second data signals are simultaneously transmitted to all the driving electrodes in the same electrode group.

19. The display device according to claim 14, characterized in that, During the period when the display panel displays one frame of image, the same second data signal is applied to one of the driving electrodes multiple times.

20. The display device according to claim 19, characterized in that, The display panel includes M rows of sub-pixels; during the time period when the display panel displays one frame of image, the same second data signal is applied to one of the driving electrodes M times, where M is a positive integer greater than 1.

21. The display device according to claim 15, characterized in that, The source drive circuit includes a data register and an analog-to-digital converter circuit, wherein the data register latches the first pixel data signal and the second pixel data signal; The output terminal of the data register is electrically connected to the input terminal of the analog-to-digital conversion circuit. The analog-to-digital conversion circuit includes a first conversion channel and a second conversion channel. The first conversion channel converts the first pixel data signal into the first data signal, and the second conversion channel converts the second pixel data signal into the second data signal.

22. The display device according to claim 14, characterized in that, It includes a display driver chip, wherein the source driving circuit and the timing control circuit are integrated in the display driver chip.

23. The display device according to claim 1, characterized in that, The liquid crystal prism panel includes an optical area and a non-optical area, wherein the non-optical area is located around the optical area; The liquid crystal prism panel further includes a second substrate and a lead group, the electrode group and the lead group are located on one side of the second substrate, and the driving electrode is located in the optical area and the non-optical area; The lead group is located in the non-optical area and includes multiple leads. The driving electrode and the leads are disposed in different layers. One driving electrode is electrically connected to at least one lead, and different driving electrodes are electrically connected to different leads.

24. The display device according to claim 23, characterized in that, It also includes a second flexible circuit board, which is bonded to the second substrate, and the second flexible circuit board includes a second trace. The lead wire is electrically connected to the second trace.

25. The display device according to claim 1, characterized in that, The extension direction of the driving electrode is the same as the extension direction of the data line.

26. The display device according to claim 1, characterized in that, The spacing between two adjacent driving electrodes is the first spacing, and the spacing between two adjacent data lines is the second spacing. The first spacing is different from the second spacing.

27. The display device according to claim 1, characterized in that, The display panel and the liquid crystal prism panel both include a liquid crystal layer.

28. A source driver chip, characterized in that, It includes a display output port and a prism output port, wherein the display output port is used to provide signals to the data line and the prism output port is used to provide signals to the drive electrode.

29. A display driver chip, characterized in that, It includes a source drive circuit and a timing control circuit. The source drive circuit includes a display output port and a prism output port. The display output port is used to provide signals to the data line, and the prism output port is used to provide signals to the drive electrode. The timing control circuit is electrically connected to the source drive circuit and transmits pixel data signals to the source drive circuit.

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