An internet of things intelligent electric appliance switch control method and system

Abstract

The application discloses a kind of Internet of Things intelligent electric appliance switch control method and system, specifically related to Internet of Things intelligent control technical field, including obtaining batch shutdown instruction coverage space by Internet of Things data acquisition return formation wireless networking hop-by-hop forwarding chain, in digital processing device with gateway root point along hop-by-hop forwarding chain backtracking controlled electric object acquisition source, when registered node is encountered, first entering before forwarding edge is retained, and return forwarding edge is deleted, generating directed acyclic return graph;Based on batch shutdown instruction coverage space by shutdown execution formation power entry branch chain;By the wireless networking hop-by-hop forwarding chain formed by Internet of Things data acquisition return is constructed as directed acyclic return graph, the power entry branch chain formed by shutdown execution is constructed as power supply cut-off graph, and using return domination tree and directed acyclic graph constraint scheduling generates first downstream return, after path cut-off shutdown shutdown control sequence.

Description

Technical Field

[0001] This invention relates to the field of Internet of Things (IoT) intelligent control technology, and more specifically, to an IoT intelligent electrical appliance switch control method and system. Background Technology

[0002] In IoT smart appliance switch control, existing processing is mostly aimed at remote opening and closing, zone group control and execution feedback confirmation. The gateway, scene panel or control host reads the IoT data collection results formed by smart switches, smart sockets, lighting, air conditioners, exhaust fans and water heaters, and then sends the shutdown command to each appliance node according to room group, equipment list or preset scene, and judges whether the group control is completed based on the node report. In scenarios such as power outages during hotel check-out, power outages during shop closures, and power outages via a single click in a residence, the electrical appliances being turned off are often distributed across multiple rooms, multiple socket circuits, and multiple wireless coverage areas. Some wall switches, smart sockets, small gateways, or relay nodes are not only controlled objects but also play a forwarding role in the wireless network, and their power supply may come from the switch circuit or socket circuit that is about to be turned off. If the devices are still turned off sequentially according to the device list or room order, the first power node to be disconnected will simultaneously cut off the wireless forwarding path and IoT data acquisition and transmission path of the downstream nodes. On-site, it can be directly seen that the control terminal has shown that some nodes have completed execution or that the command has been issued, but there are still electrical appliances in the same area that remain powered on, and the downstream nodes cannot be confirmed after going offline, or the previous status is reported only after the power supply is restored. The root cause is that the existing switch control process only focuses on whether a single electrical appliance has received a command and whether it reports its status, without judging whether the power outage of a certain controlled node will destroy the wireless forwarding and data acquisition and transmission conditions of the subsequent nodes before the shutdown. The technical problem this application aims to solve is: how to prevent the interruption of subsequent wireless networking paths and IoT data acquisition paths due to the prior shutdown of nodes that also serve as power supply or forwarding functions in the batch shutdown control of IoT smart appliances, thereby causing downstream appliances to remain unshutted or unable to be verified. Summary of the Invention

[0003] To overcome the aforementioned deficiencies in the prior art, embodiments of the present invention provide an IoT smart appliance switch control method and system. This method constructs a directed acyclic graph by building a hop-by-hop forwarding chain of the wireless network formed by IoT data acquisition and transmission, and constructs a power supply cut-off graph by building a power input branch chain formed by shutdown execution. The method also utilizes the backhaul dominance tree and the directed acyclic graph constraint scheduling to generate a shutdown control sequence that first transmits downstream data and then cuts off the path for shutdown, thereby solving the problems mentioned in the background art.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a method for controlling the switch of an Internet of Things (IoT) smart appliance, comprising: S1. Obtain the wireless network hop-by-hop forwarding chain formed by IoT data collection and backhaul within the coverage area of ​​the batch shutdown command. In the digital processing device, trace back the source of the controlled power consumption object along the hop-by-hop forwarding chain from the gateway root point. When a registered node is encountered, retain the forwarding edge before the first entry and delete the back forwarding edge to generate a directed acyclic backhaul graph. S2. Based on the power input branch chain formed by shutdown execution within the coverage space of the batch shutdown instruction, trace the power-loss controlled power consumption object pulled by the power-off action starting from the shutdown execution object, and write the branch segment between the shutdown execution object and the power-loss controlled power consumption object into the power supply cut-off diagram. S3. Perform root point domination operation on the directed acyclic backhaul graph using the domination tree algorithm. The rule for backhaul domination is that all data acquisition and backhaul paths from the gateway root point to the controlled power consumption object pass through the same shutdown execution object. Generate a backhaul domination tree. S4. Based on the power supply cut-off diagram and the feedback control tree, perform cross-location of the power outage path and the feedback control path for the same controlled power consumption object, write the shutdown execution object that falls into both types of paths into the path truncation position, and generate the path truncation relationship. S5. Based on the path truncation relationship, the logic controller executes the directed acyclic graph constraint scheduling algorithm in the program control system. The controlled power consumption objects pulled by the path truncation position point to the path truncation position to form a constraint arc. The shutdown control sequence is generated according to the rules of shutting down the output of the object without an incoming arc, deleting the arc tail constraint arc of the output object, and recursively reading the shutdown of the object without an incoming arc.

[0005] In a preferred embodiment, it further includes: S6. Issue shutdown commands according to the shutdown control sequence, read the shutdown feedback status based on the data collection and feedback results of this round of IoT, eliminate the corresponding constraint arcs after obtaining the shutdown feedback status, and issue path truncation position shutdown commands after all the incoming arcs at the path truncation positions are eliminated, and output the batch shutdown control results.

[0006] In a preferred embodiment, S1 includes: S11. Starting from the IoT data acquisition and transmission end of the controlled power consumption object, read the previous hop source hop by hop along the wireless network forwarding chain in the digital processing device, stop backtracking at the root point of the gateway, and write the adjacent two hops into a backtracking edge sequence according to the reading order. S12. Perform registration verification along the backtracking edge sequence, write the arrival end that has not entered the registration chain into the registration chain, read the first registration bit of the arrival end when the arrival end has entered the registration chain, delete the backtracking edge pointing to the node in the registration chain after the first registration bit, and output the backtracking edge sequence. S13. Merge the back-and-forth edge sequences according to the IoT data acquisition and back-transmission end. For back-tracing edges that are consistent at both the starting end and the destination end, retain the first-written edge to generate a directed acyclic back-transmission graph for reading when generating the back-transmission dominance tree.

[0007] In a preferred embodiment, S2 includes: S21. Starting from the power-off end of the shutdown execution object, read the next power receiving end segment by segment along the power input branch chain in the power receiving direction. When the next power receiving end loses its power input source, write the next power receiving end into the power loss chain. When the next power receiving end retains its power input source, stop the corresponding branch tracing and output the power loss chain. S22. Based on the power loss chain, read the branch segments between adjacent power receiving ends. When both ends of the branch segment belong to the same power loss chain, write the branch segment into the power supply cut-off edge sequence. When either end of the branch segment leaves the power loss chain, stop writing the branch segment. S23. Merge the power supply cut-off edge sequence according to the shutdown execution object, and connect the power supply cut-off edges driven by the same shutdown execution object to the power supply cut-off diagram according to the power input branch chain reading order, so as to be read when the path truncation relationship is generated.

[0008] In a preferred embodiment, S3 includes: S31. Execute the dominance tree algorithm in the directed acyclic backhaul graph, write the top-end of the gateway root point, write the incremental topology bit for each successor node along the direction of the acquisition backhaul edge, and generate the node calculation sequence in ascending order of the topology bit. S32. Based on the node calculation sequence, establish a dominance bitmap of the same length for each node, write 1 to the gateway root point bit in the gateway root point dominance bitmap and write zero to the other bits, read the dominance bitmap of all incoming edges for non-gateway root points and AND them bit by bit, and write 1 to the current node bit in the result of the bit by bit to generate a node dominance bitmap. S33. Read the control bit map corresponding to the controlled power consumption object according to the node control bit map, and perform bit extraction according to the shutdown execution object bit in the node calculation sequence. When the bit value is one, write the shutdown execution object bit into the feedback control bit map of the controlled power consumption object to generate the feedback control bit map. S34. Read the backhaul control bitmap of the same controlled power consumption object in reverse order of topology bit, write the first shutdown execution object bit with a value of one as the direct control end, and form a backhaul control edge from the direct control end to the controlled power consumption object, and summarize the backhaul control edges to generate a backhaul control tree.

[0009] In a preferred embodiment, S4 includes: S41. Based on the power supply cut-off diagram, read the reverse power input branch corresponding to the controlled power consumption object, read back along the controlled power consumption object to the shutdown execution object, and write 1 for the object bit in the node calculation sequence of the shutdown execution object and write 0 for the object bit of the unread object, and generate a power loss path bit map. S42. Read the direct control end from the same controlled power consumption object in reverse along the backhaul control tree until the gateway root point is reached, and write 1 to the shutdown execution object bit and 0 to the non-control object bit in the direct control end to generate a backhaul control path bit map. S43. Perform a bitwise AND operation on the power outage path bitmap and the feedback control path bitmap of the same controlled power consumption object. Write the shutdown execution object with a value of one in the AND result into the path truncation bit, and use the path truncation bit to guide the controlled power consumption object to generate the path truncation relationship.

[0010] In a preferred embodiment, S5 includes: S51. Taking the path truncation relationship as input, write the path truncation position as the arc head position in the program control system. The controlled power consumption object pulled along the path truncation position reads back the shutdown execution object position and writes it as the arc tail position. When the arc tail position and the arc head position are inconsistent, write 1 at the intersection position of the arc tail position row and the arc head position column to generate the original constraint bit map. S52. Perform arc compression calculation on the original constraint bitmap. The logic controller reads the arc tail bit in reverse order of the shutdown execution object bit. Perform bitwise OR on the arrival bitmap of each arc arrival bit and write it to the arc tail bit arrival bitmap. When the arc head bit already exists in the bitwise OR result of the other arc arrival bits of the same arc tail bit, clear the cross bit from the arc tail bit to the arc head bit to generate the compressed constraint bitmap.

[0011] In a preferred embodiment, S5 further includes: S53. Execute the directed acyclic graph constraint scheduling algorithm in the compressed constraint bitmap. The logic controller calculates the cumulative column value of the shutdown execution object bits that have not been written into the shutdown control sequence. Write the shutdown execution object bits with a cumulative column value of zero into the leading edge bits. Perform trial deletion calculation on each leading edge bit. After clearing the leading edge bit and the same row, count the number of columns that change from non-zero to zero to form the release number. Count the number of columns whose corresponding columns are still non-zero to form the retention truncation number. S54. Read the leading edge bits in ascending order according to the number of truncations to retain. If the number of truncations to retain is the same, read the leading edge bits in descending order according to the number of releases. If both the number of truncations to retain and the number of releases are the same, read the leading edge bits in ascending order according to the bits of the shutdown execution object. Write the reading results into the shutdown control sequence and clear the corresponding row. Then, perform a column value accumulation operation of decrementing one on the column whose value is one in the corresponding row before clearing, until there are no cross bits with a value of one in the compressed constraint bitmap. Output the shutdown control sequence.

[0012] In a preferred embodiment, S6 includes: S61. Generate an execution cursor based on the shutdown control sequence. The logic controller reads the shutdown execution object bit pointed to by the execution cursor and issues a shutdown command. The shutdown execution object bit is concatenated with the current round of acquisition sequence bit to form an execution verification key, which is then written into the arc-to-be-extinguished bitmap. S62. In the data collection and transmission results of this round of IoT, press the execution verification key to retrieve the shutdown transmission status, perform bitwise AND operation between the disconnection bit in the shutdown transmission status and the arc-to-be-extinguished bitmap to obtain the established arc-extinguishing bit, clear the value bit with the established arc-extinguishing bit as the arc tail in the constraint arc map, and output the updated constraint arc map. S63. Based on the updated constraint arc diagram, read the in-arc margin of the path truncation position. When the in-arc margin is zero, issue a shutdown command to the path truncation position at the same position and write it to the path truncation execution position. When the in-arc margin is not zero, maintain the power supply status of the path truncation position at the same position and generate batch shutdown control results by moving the execution cursor backward.

[0013] An Internet of Things (IoT) intelligent electrical appliance switch control system, the system comprising a backtracking mapping module, a tracing module, a control calculation module, a positioning module, a constraint scheduling module, and an arc suppression shutdown module: The backtracking graph module is used to obtain the wireless network hop-by-hop forwarding chain formed by IoT data collection and backhaul within the coverage area of ​​the batch shutdown command. In the digital processing device, the source of the controlled power consumption object is traced back along the hop-by-hop forwarding chain from the gateway root point. When a registered node is encountered, the forwarding edge before the first entry is retained and the back-forwarding edge is deleted to generate a directed acyclic backhaul graph. The tracing module, based on the power input branch chain formed by the shutdown execution within the coverage space of the batch shutdown command, traces the power-loss controlled power consumption objects pulled by the power-off action starting from the shutdown execution object, and writes the branch segments between the shutdown execution object and the power-loss controlled power consumption objects into the power supply cut-off diagram. The domination operation module is used to perform root domination operation on the directed acyclic backhaul graph using the domination tree algorithm. The rule for backhaul domination is that all data acquisition backhaul paths from the gateway root point to the controlled power consumption object pass through the same shutdown execution object, and a backhaul domination tree is generated. The positioning module, based on the power supply cut-off diagram and the feedback control tree, performs cross-positioning of the power outage path and the feedback control path for the same controlled power consumption object, writes the shutdown execution object that falls into both types of paths into the path truncation bit, and generates the path truncation relationship. The constraint scheduling module is used to execute the directed acyclic graph constraint scheduling algorithm in the program control system according to the path truncation relationship. The controlled power consumption objects pulled by the path truncation position point to form a constraint arc. The module generates a shutdown control sequence according to the rules of shutting down the output of the object without an incoming arc, deleting the arc tail constraint arc of the output object, and recursively reading the shutdown of the object without an incoming arc. The arc suppression and shutdown module is used to issue shutdown commands according to the shutdown control sequence, read the shutdown feedback status based on the data acquisition and feedback results of this round of IoT, eliminate the corresponding constraint arcs after obtaining the shutdown feedback status, and issue path truncation position shutdown commands after all incoming arcs at the path truncation position are eliminated, and output batch shutdown control results.

[0014] The technical effects and advantages of this invention are as follows: 1. This solution identifies nodes that serve both power supply and forwarding functions by truncation relationships, allowing downstream nodes to complete shutdown and backhaul before power is cut off, thus reducing the number of cases where shutdown is not completed and verification is not possible. 2. Convert the hop-by-hop forwarding chain of the wireless network into a directed acyclic backhaul graph, delete the backhaul forwarding edges and then perform the dominance operation to reduce the interference of repeated backhauls on the shutdown sequence. 3. Trace the power outage traction range of the power-infeed branch chain to form a branch connection relationship between the power-loss object and the shutdown execution object, thereby relatively improving the power supply dependency identification results; 4. Extract the necessary objects for data acquisition and backhaul from the backhaul control tree, transform the wireless networking path into a control constraint, and enhance the basis for generating group control shutdown sequences. 5. Calculate the control path cutoff position based on constraint arc elimination and arc entry margin, and then cut off the power after the downstream feedback is established, thereby improving the verifiability of batch shutdown execution. Attached Figure Description

[0015] Figure 1 This is a flowchart outlining the method steps of the present invention; Figure 2 This is a schematic diagram of the system module structure of the present invention. Detailed Implementation

[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0017] Refer to the instruction manual appendix Figure 1-2 The present invention provides an IoT smart appliance switch control method, comprising: S1. Obtain the wireless network hop-by-hop forwarding chain formed by IoT data collection and backhaul within the coverage area of ​​the batch shutdown command. In the digital processing device, trace back the source of the controlled power consumption object along the hop-by-hop forwarding chain from the gateway root point. When a registered node is encountered, retain the forwarding edge before the first entry and delete the back forwarding edge to generate a directed acyclic backhaul graph. In this embodiment, S1 is used to convert the IoT data acquisition and backhaul relationship within the coverage space of the batch shutdown command into a directed acyclic backhaul graph for the backhaul dominance tree generation. The processing mechanism is as follows: First, trace back the wireless network hop-by-hop forwarding chain from the IoT data acquisition and backhaul end of the controlled power user. Then, delete the backhaul edges formed by wireless reconnection, repeated forwarding, or backhaul reporting, so that subsequent root point dominance operations only read the acyclic acquisition and backhaul path. The coverage space of the batch shutdown command is generated by spatial identifiers recorded in the group control scenario. The spatial identifiers correspond to the controlled power user, the gateway root point, and the wireless network hop-by-hop forwarding chain in this round. When a spatial identifier is missing, the coverage area of ​​the gateway root point that initiated the batch shutdown command is used as the reading range, without merging across gateways. The IoT data acquisition and backhaul ends write the acquisition sequence number according to the arrival order of the current round of acquisition. The acquisition sequence number is passed along with the backhaul edge sequence for subsequent shutdown backhaul status verification. This implementation process includes the following steps: In S11, the backtracking order of the wireless networking hop-by-hop forwarding chain is obtained from the IoT data acquisition and backtracking end, and the backtracking relationship is converted into an edge sequence. The input quantities are the IoT data acquisition and backtracking end of the controlled power consumption object, the wireless networking hop-by-hop forwarding chain, the gateway root point, and the current round acquisition sequence. In the digital processing device, the IoT data acquisition and backtracking end is used as the starting point, and the previous hop source is read hop-by-hop along the wireless networking hop-by-hop forwarding chain. For each hop read, the current end and the previous hop source are written as a backtracking edge, and written into the backtracking edge sequence according to the reading order, until the previous hop source is equal to the gateway root point, and the backtracking stops. If the previous hop source cannot be read in the middle, the current IoT data acquisition and backtracking end is written into the source missing bit, and the current backtracking edge sequence does not participate in the subsequent backtracking dominance tree generation. If the gateway root point is read, the backtracking edge sequence and the current round acquisition sequence are written into the backtracking result area for S12 to perform registration and verification. In S12, back-back edges in the hop-by-hop forwarding chain of the wireless network are removed to prevent loops from forming in the back-back edge sequence due to duplicate nodes. The inputs are the back-back edge sequence output from S11 and the current round's acquisition sequence. Arrival ends are read edge by edge along the back-back edge sequence. Arrival ends that have not entered the registration chain are written into the registration chain, and the first registration position of the arrival end is recorded. When the arrival end has entered the registration chain, the first registration position of the arrival end is read, and the back-back edges pointing to nodes in the registration chain after the first registration position are marked as back-back edges. The back-back edges are then deleted from the back-back edge sequence to form the de-back-back edge sequence. If there are multiple registered arrival ends in the same back-back edge sequence, the corresponding back-back edges are deleted one by one in the reading order. After deletion, the remaining back-back edges are read again until any arrival end appears only once in the de-back-back edge sequence. The de-back-back edge sequence and the current round's acquisition sequence are written into the de-back result area for merging in S13. In S13, the back-and-forth edge sequences corresponding to multiple controlled power consumption objects are merged into a unified directed acyclic backhaul graph, while maintaining consistency in the source of the collected backhaul edges. The inputs are the back-and-forth edge sequences output from S12, the IoT data collection backhaul end, and the current round collection sequence. The back-and-forth edge sequences are merged according to the IoT data collection backhaul end, and the starting end and destination end in the back-and-forth edge sequence are written into the directed acyclic backhaul graph nodes. The starting end pointing to the destination end is written as a collection backhaul edge. When a backhaul edge with the same starting end and destination end appears repeatedly, the first collection backhaul edge is retained, and the current round collection sequence of the subsequent repeated backhaul edges is merged into the collection sequence set of the same collection backhaul edge, and no new edge is generated. If there are still backhaul edges pointing to registered upstream nodes after merging, the registration verification of S12 is re-executed. The finally generated directed acyclic backhaul graph is written into the graph data area for S3 to read when generating the backhaul dominance tree. Through the above processing, a traceable transformation relationship is formed between the IoT data acquisition and backhaul end, the wireless networking hop-by-hop forwarding chain, the backtracking edge sequence, the back-to-back edge sequence, and the directed acyclic backhaul graph. The subsequent dominance tree algorithm reads the acquisition and backhaul path where the back-to-back edge has been deleted, and will not include the repeated forwarding relationship generated by wireless reconnection in the valid backhaul path. In practical applications: When a hotel room is checked out and power is cut off, the data collection and feedback results of the room's lights, sockets, and air conditioning controllers are first forwarded to the room gateway via the bedside scene panel. If the bedside scene panel repeatedly reports the feedback record of the same controlled power object after reconnection, the digital processing device traces back to the root point of the room gateway from the IoT data collection and feedback end of the controlled power object. The position of the first entry into the bedside scene panel is written into the registration chain, and the return edge that returns to the bedside scene panel again is deleted. In the end, only one loop-free data collection and feedback path from the controlled power object to the root point of the room gateway is retained, so that the subsequent feedback dominating tree can determine whether the data collection and feedback path of the downstream controlled power object will be cut off after the bedside scene panel is powered off.

[0018] S2. Based on the power input branch chain formed by shutdown execution within the coverage space of the batch shutdown instruction, trace the power-loss controlled power consumption object pulled by the power-off action starting from the shutdown execution object, and write the branch segment between the shutdown execution object and the power-loss controlled power consumption object into the power supply cut-off diagram. In this embodiment, S2 is used to convert the power input branch chain within the coverage space of the batch shutdown command into a power supply cut-off diagram. The processing mechanism is as follows: Before the current shutdown command is issued, the digital processing device first reads the power input branch chain from the installation distribution network record, switch branch attribution record, and historical power outage action record. Then, starting from the power outage end of the shutdown execution object, it traces along the power receiving direction to the controlled power-consuming objects that have lost their power source. Finally, it writes the branch segments between the controlled power-consuming objects as power supply cut-off edges. The power input branch chain is not data generated after the current power outage, but rather the branch relationship used to calculate the power outage traction range before the current shutdown execution. The power receiving direction points from the power outage end of the shutdown execution object to the next-level power receiving end, and the branch branches are traced according to the branch hierarchy in the power input branch chain. This implementation process includes the following steps: In S21, the actual power loss range is determined after the shutdown execution object is powered off. The input quantities are the power-off end of the shutdown execution object, the power-inlet branch chain, the power receiving direction, and the power source set of each power receiving end. Starting from the power-off end of the shutdown execution object, the next power receiving end is read segment by segment along the power-inlet branch chain according to the power receiving direction, and the power source set of the next power receiving end is read back item by item to the upstream power supply end. When all the power sources of the next power receiving end pass through the power-off end of the current shutdown execution object, the next power receiving end is written into the power loss chain. When the next power receiving end has a power source that does not pass through the power-off end of the current shutdown execution object, the corresponding branch tracing is stopped. If the power source set of the next power receiving end is missing in the power-inlet branch chain, the next power receiving end is written into the source to be verified bit, and the branch tracing is stopped. After the tracing of each branch is completed, the power loss chain pulled by the shutdown execution object is output for S22 to read the branch segment. In S22, the relationship between the receiving end in the power loss chain is converted into a power supply cut-off edge sequence. The input is the power loss chain output by S21 and the branch segments in the power input branch chain. Based on the power loss chain, the branch segments between adjacent receiving ends are read, and the starting and ending ends of the branch segments are checked for ownership. When both ends of the branch segment belong to the same power loss chain, the branch segment is written into the power supply cut-off edge sequence according to the power receiving direction. When either end of the branch segment is not written into the same power loss chain, or when the branch segment points to the source to be verified bit, the writing of the branch segment is stopped. If there are branch branches in the same power loss chain, the power supply cut-off edges are written according to the branch level of the branch branch in the power input branch chain, and the traction relationship between the branch branch and the shutdown execution object is preserved. The output power supply cut-off edge sequence is used by S23 for merging. In S23, the power cut-off edges pulled by the same shutdown execution object are merged into a power cut-off diagram. The inputs are the power cut-off edge sequence output from S22 and the shutdown execution object. The power cut-off edge sequence is merged according to the shutdown execution object, and the power cut-off edges pulled by the same shutdown execution object are connected to the power cut-off diagram according to the power input branch chain reading order. The direction of the power cut-off edge is kept so that the upper power receiving end points to the lower power receiving end. When the power cut-off edges pulled by the same shutdown execution object have the same starting end and ending end, the first written edge is retained, and the branch level of the subsequent repeated edges is written into the branch sequence set of the same power cut-off edge. If the shutdown execution object does not pull any power loss chain, an empty cut-off bit is written, and it does not participate in the cross-positioning of the power loss path and the return control path in S4. The finally generated power cut-off diagram is written into the graph data area for reading when the path truncation relationship is generated. Through the above processing, a one-way connection relationship is formed between the shutdown execution object, the power-off end, the power input branch chain, the power loss chain, the power supply cut-off edge sequence and the power supply cut-off diagram. S4 can directly read the power loss path corresponding to the controlled power consumption object in reverse along the power supply cut-off diagram and perform cross-positioning with the back-pass control path in the back-pass control tree. In practical applications: When a shop closes and shuts down, the cash register socket, sign light branch, and exhaust branch are all located within the same batch shutdown command coverage area. The digital processing device first reads the power supply branch chain recorded during the distribution network. If shutting down the cash register socket would cause the downstream mini gateway and exhaust controller to lose their power supply simultaneously, then the mini gateway and exhaust controller are written into the same power loss chain, and the branch segment between them is written into the power supply cut-off edge sequence. If the sign light branch still has an independent power supply source, then the sign light branch tracing stops, and it is not written into the power supply cut-off diagram pulled by the current shutdown execution object. This allows S4 to determine whether the cash register socket falls into both the power loss path and the feedback control path at the same time.

[0019] S3. Perform root point domination operation on the directed acyclic backhaul graph using the domination tree algorithm. The rule for backhaul domination is that all data acquisition and backhaul paths from the gateway root point to the controlled power consumption object pass through the same shutdown execution object. Generate a backhaul domination tree. In this embodiment, S3 is used to calculate the backhaul dominance relationship of the controlled power consumption object in the directed acyclic backhaul graph, and write the shutdown execution object that can dominate the acquisition backhaul path into a backhaul dominance tree. The processing mechanism is as follows: first, a node calculation sequence is generated according to the acquisition backhaul edge direction, then a dominance bitmap is established using the node calculation sequence as a unified bit order, then only the shutdown execution object bit is extracted from the dominance bitmap corresponding to the controlled power consumption object, and finally, the shutdown execution object closest to the controlled power consumption object is determined as the direct dominance end according to the topology bit reverse order. The node calculation sequence includes the gateway root point, acquisition backhaul intermediate node, shutdown execution object, and controlled power consumption object. The length of the dominance bitmap is consistent with the length of the node calculation sequence, and each bit in the dominance bitmap corresponds one-to-one with the corresponding node in the node calculation sequence. This implementation process includes the following steps: In S31, a unified node calculation order is established for the dominance tree algorithm, enabling subsequent dominance bitmaps to perform bit-by-bit operations in the same order. The input consists of the directed acyclic backhaul graph generated by S1, the gateway root node, and the acquisition backhaul edges. In the directed acyclic backhaul graph, the gateway root node is written as the first position of the topology. The successor nodes of the gateway root node are read along the direction of the acquisition backhaul edges, and each successor node is written into an incrementing topology bit. When the same successor node is reached by multiple acquisition backhaul edges, all incoming edge source topology bits are read, and the fact that all incoming edge source topology bits have been written is used as the condition for writing the topology bit of the successor node. If a node has no incoming edge source and is not the gateway root node, then the node is written into the isolated bit and does not enter the dominance bitmap operation. Finally, the node calculation sequence is output in ascending order of topology bits for S32 to build the dominance bitmap. In S32, the set of dominant nodes for each node under the reachability relationship with the gateway root is calculated, and the calculation result is fixed in the form of a bitmap. The input is the node calculation sequence output by S31, the collection backhaul edges in the directed acyclic backhaul graph, and the isolated bits away from the root. Based on the node calculation sequence, a dominance bitmap of the same length is built for each node. The gateway root bit in the gateway root dominance bitmap is written with 1 and the other bits are written with zero. For non-gateway root nodes, all incoming edge sources of the current node are read first. If the number of incoming edge sources is one, the dominance bitmap of the incoming edge sources is copied and the current node bit is written with 1 to generate the dominance bitmap of the current node. If the number of incoming edge sources is two or more, a bitwise AND operation is performed on all incoming edge source dominance bitmaps, and the current node bit in the bitwise AND result is written with 1 to generate the dominance bitmap of the current node. If the current node is written with the isolated bits away from the root, the dominance bitmap of the current node is not written into the node dominance bitmap. After all reachable nodes have completed the dominance bitmap calculation, the node dominance bitmap is output for S33 to extract the backhaul dominance bitmap. In S33, the shutdown execution object bits related to batch shutdown control are extracted from the node dominance bit chart, so that ordinary forwarding nodes and gateway root points are not written as path truncation objects. The inputs are the node dominance bit chart generated by S32, the node calculation sequence, and the shutdown execution object bits in the batch shutdown instructions. The dominance bit chart corresponding to each controlled power object is read according to the node calculation sequence, and only the shutdown execution object bits in the node calculation sequence are bit extracted. When the bit value is one, the shutdown execution object bit is written into the feedback dominance bit chart of the controlled power object; when the bit value is zero, it is not written. The gateway root point bit, the acquisition feedback intermediate node bit, and the controlled power object's own bit do not participate in the feedback dominance bit chart writing. If there is no shutdown execution object bit with a bit value of one in the dominance bit chart corresponding to the controlled power object, then the controlled power object is written with no shutdown dominance bit. After all controlled power objects are bit extracted, a feedback dominance bit chart is generated for S34 to generate feedback dominance edges. In S34, the direct control end is determined from the backhaul control bit chart, and a backhaul control tree that can be read by S4 is formed. The inputs are the backhaul control bit chart generated by S33, the node calculation sequence, and the topology bit. Since the topology bit increases along the direction from the gateway root point to the controlled power object, when the backhaul control bit chart of the same controlled power object is read in reverse order of the topology bit, the first shutdown execution object bit with a value of one is the shutdown execution object bit closest to the controlled power object. The first shutdown execution object bit with a value of one is written as the direct control end, and a backhaul control edge is formed by pointing from the direct control end to the controlled power object. If no shutdown control bit is written for the same controlled power object, no backhaul control edge is formed. After summarizing all backhaul control edges, a backhaul control tree is generated, and the backhaul control tree is written to the graph data area for S4 to perform cross-location of the power failure path and the backhaul control path. Through the above processing, the acquisition and transmission edges in the directed acyclic backhaul graph are converted into node calculation sequences. The node calculation sequences further unify the bit order of the dominance bitmap. The node dominance bitmap is then processed by taking bits from the shutdown execution object bits to form a backhaul dominance bitmap. Finally, the backhaul dominance tree is generated by reading the topology bits in reverse order. The entire processing chain ensures that the backhaul dominance tree only expresses the dominance relationship of the shutdown execution object on the acquisition and transmission path of the controlled power consumption object, without including ordinary wireless forwarding nodes in the subsequent path truncation relationship. In practical applications: When a shop closes and shuts down, the data collection and feedback results of the exhaust controller are transmitted back to the gateway root point via the relay on the cashier socket side. The digital processing device first writes the topology bits for the gateway root point, the relay on the cashier socket side, and the exhaust controller in the directed acyclic return graph, and then calculates the dominance bit graph of the exhaust controller. If the relay on the cashier socket side is also a shutdown execution object in the batch shutdown command, and all data collection and feedback paths from the gateway root point to the exhaust controller pass through the relay on the cashier socket side, then the shutdown execution object bit corresponding to the relay on the cashier socket side is set to one in the return dominance bit graph of the exhaust controller. After the topology bits are read in reverse order, they are written as the direct dominance end, thus forming the return dominance edge from the relay on the cashier socket side to the exhaust controller, which is used to determine whether the power outage of the relay on the cashier socket side cuts off the data collection and feedback path of the exhaust controller.

[0020] S4. Based on the power supply cut-off diagram and the feedback control tree, perform cross-location of the power outage path and the feedback control path for the same controlled power consumption object, write the shutdown execution object that falls into both types of paths into the path truncation position, and generate the path truncation relationship. In this embodiment, S4 is used to perform co-position cross-calculation between the power outage path in the power supply cutoff diagram and the feedback control path in the feedback control tree, thereby determining whether the power outage of a certain shutdown execution object simultaneously causes the controlled power consumption object to lose its power source and its data collection feedback path; S4 uses the node calculation sequence formed by S3 as a unified bit order, and the bit width of both the power outage path bitmap and the feedback control path bitmap is equal to the length of the node calculation sequence, and the object bit of the shutdown execution object remains consistent in both types of bitmaps; the power supply cutoff diagram provides the reverse power input branch edge, and the feedback control tree provides the control tree edge and direct control end mark, and the two are combined bit-by-bit on the same controlled power consumption object to form a path truncation relationship; this implementation process includes the following steps: In S41, the power loss path of the controlled power user being pulled by the shutdown execution object is determined from the power supply cut-off diagram, and the power loss path is converted into a power loss path bitmap under a unified bit sequence. The input quantities are the power supply cut-off diagram, the controlled power user, the node calculation sequence, and the shutdown execution object bit. Based on the power supply cut-off diagram, the incoming edge corresponding to the controlled power user is read, and the incoming edge direction is reversed as the reverse incoming power branch edge. Starting from the controlled power user, the upper-level power receiving end is read back segment by segment along the reverse incoming power branch edge until the shutdown execution object is read. During the back reading process, the shutdown execution object read back is written with a 1 according to its object bit in the node calculation sequence, and the shutdown execution object bit not read back is written with a zero, generating a power loss path bitmap. If the controlled power user does not have an incoming edge in the power supply cut-off diagram, or the reverse back reading does not reach any shutdown execution object, the power loss path bitmap is written as a bitmap with all zeros, and the power loss path missing bit is written for S43 to read during bit-by-bit AND. In S42, the backhaul control path of the controlled power consumption object is determined from the backhaul control tree, and the backhaul control path is converted into a backhaul control path bitmap under the same bit sequence. The input quantities are the backhaul control tree, the controlled power consumption object, the node calculation sequence, the gateway root point, and the direct control end marker. The control tree edge is read backward from the same controlled power consumption object along the backhaul control tree. When a direct control end with a shutdown execution object marker is read, the shutdown execution object bit of the direct control end in the node calculation sequence is written as 1. When a normal control node is read, the corresponding bit is written as 0, until the gateway root point is read. If the controlled power consumption object does not have a direct control end in the backhaul control tree, the backhaul control path bitmap is written as an all-zero bitmap and the backhaul control missing bit is written. The generated backhaul control path bitmap and the power loss path bitmap generated in S41 share the bit sequence of the node calculation sequence for S43 to perform the same-bit cross calculation. In S43, the power outage path and the feedback control path of the same controlled power user are cross-referenced to determine the shutdown execution object that is simultaneously located in both types of paths. The input quantities are the power outage path bitmap, the feedback control path bitmap, and the node calculation sequence of the same controlled power user. A bitwise AND operation is performed on the power outage path bitmap and the feedback control path bitmap. The position with a value of 1 in the AND result corresponds to the same shutdown execution object that is located in both the power outage path and the feedback control path. The shutdown execution object is written into the path truncation bit, and the path truncation bit guides the current controlled power user to form a path truncation relationship. If the AND result is all zeros, the current controlled power user is written into the no path truncation bit, and no path truncation relationship is generated. The generated path truncation relationship records at least the path truncation bit, the controlled power user bit, and the corresponding shutdown execution object bit, for reading when S5 forms the constraint arc. Through the above processing, the power outage path in the power outage diagram, the return control path in the return control tree, and the shutdown execution object bit in the node calculation sequence are transformed into the same bit diagram calculation space. The path truncation bit no longer only represents power outage, nor only represents return control, but also represents that the same shutdown execution object simultaneously generates power outage traction and return control traction for the same controlled power consumption object. In practical applications: When a shop closes and shuts down, the exhaust controller reads back to the cashier socket along the reverse power input branch in the power cut-off diagram, and writes a 1 to the shutdown execution object bit corresponding to the cashier socket in the power failure path bit diagram; the same exhaust controller reads back to the relay on the cashier socket side as the direct control end in the backhaul control tree, and writes a 1 to the same shutdown execution object bit in the backhaul control path bit diagram; after bitwise ANDing of the two types of bit diagrams, the object bit is still 1, the cashier socket is written into the path truncation bit, and the exhaust controller is driven to generate a path truncation relationship, so that when the subsequent shutdown control sequence is generated, the shutdown backhaul of the exhaust controller is arranged before the cashier socket is de-energized.

[0021] S5. Based on the path truncation relationship, the logic controller executes the directed acyclic graph constraint scheduling algorithm in the program control system. The controlled power consumption objects pulled by the path truncation position point to the path truncation position to form a constraint arc. The shutdown control sequence is generated according to the rules of shutting down the output of the object without entering arc, deleting the arc tail constraint arc of the output object, and recursively reading the shutdown of the object without entering arc. In this embodiment, S5 is used to convert the path truncation relationship generated by S4 into a shutdown control sequence that can be executed by the logic controller. The processing mechanism is as follows: First, the path truncation bit and the controlled power consumption object pulled by the path truncation bit are converted into an original constraint bitmap. Then, redundant cross bits that can be expressed by multiple constraint arcs are deleted through arrival bitmap calculation. Subsequently, a directed acyclic graph constraint scheduling algorithm is executed on the compressed constraint bitmap, so that shutdown execution objects no longer constrained by incoming arcs are written into the shutdown control sequence first, while the path truncation bit enters the output sequence after its downstream object completes its initial shutdown. This implementation process includes the following steps: In S51, the path truncation relationship is converted into a raw constraint bitmap, providing a bitmap calculation basis for the program control relationship of which devices must shut down and return data first, and which devices must delay shutdown. The inputs are the path truncation relationship, node calculation sequence, shutdown execution object bit, path truncation bit, and the correspondence between controlled power users and shutdown execution objects, all output from S4. In the program control system, the path truncation bit in the path truncation relationship is written as an arc head bit. The controlled power user pulled along the path truncation bit reads back the shutdown execution object bit corresponding to that controlled power user, and the read-back shutdown bit is then processed. The execution object bit is written as the arc tail bit; when the arc tail bit and the arc head bit are inconsistent, the intersection bit of the arc tail bit row and the arc head bit column in the original constraint bit map is written as 1, which is used to indicate that the shutdown execution object corresponding to the arc tail bit needs to complete the shutdown return before the path truncation bit corresponding to the arc head bit; when the arc tail bit and the arc head bit are consistent, the intersection bit is not written to avoid the same shutdown execution object forming a self-constraint; if the controlled power consumption object lacks the corresponding shutdown execution object bit, the controlled power consumption object is written into the constraint source missing bit, and is not written into the original constraint bit map. Finally, the original constraint bit map is output for S52 to perform arc compression calculation. In S52, arc compression calculations are performed on the original constraint bitmap to remove redundant cross bits that can already be expressed through multiple constraint arcs. The inputs are the original constraint bitmap generated in S51 and the shutdown execution object bits. The logic controller first copies the original constraint bitmap corresponding to each shutdown execution object bit in the same row as the initial value of the arrival bitmap for that shutdown execution object bit, and then reads the arc tail bits in reverse order of the shutdown execution object bits. For the current arc tail bit, it reads each outgoing arc arrival bit with a value of one in its row, performs a bitwise OR operation on the arrival bitmap corresponding to each outgoing arc arrival bit, and then... The bitwise OR result is merged into the current arc tail bit arrival bitmap; when performing compression judgment on the cross bit from the current arc tail bit to the current arc head bit, the current cross bit is temporarily masked first, and then the bitwise OR result of the arrival bitmap corresponding to the other outgoing arc arrival bits of the same arc tail bit is read. If the current arc head bit already exists in the bitwise OR result, the cross bit from the current arc tail bit to the current arc head bit is cleared to zero; if the current arc head bit does not exist in the bitwise OR result, the cross bit is retained; after completing the reverse reading of all arc tail bits, the compressed constraint bitmap is output for S53 to execute the directed acyclic graph constraint scheduling algorithm; In S53, the leading edge bits that can enter the current round of output are calculated in the compressed constraint bitmap, and the constraint release status after each leading edge bit is output is evaluated by trial deletion calculation. The inputs are the compressed constraint bitmap, shutdown execution object bits, path truncation bits, and sequence occupancy bits already written into the shutdown control sequence output by S52. The logic controller accumulates the bit values ​​in the compressed constraint bitmap column by column for the shutdown execution object bits that have not been written into the shutdown control sequence to obtain the column value accumulation number corresponding to the shutdown execution object bit. When the column value accumulation number is zero and the sequence occupancy bit is zero, the shutdown execution object is... Write the leading edge bit to the leading edge bit; for each leading edge bit, copy the compressed constraint bitmap to form a trial deletion copy. In the trial deletion copy, clear the row of the leading edge bit, recalculate the cumulative value of each column, and write the number of columns whose cumulative value before clearing is not zero and whose cumulative value after clearing is zero as the release number, and write the number of columns whose corresponding columns after clearing are still non-zero as the retention truncation number; the trial deletion copy is only used to calculate the release number and retention truncation number, and does not replace the compressed constraint bitmap; if there is no leading edge bit in this round and there is still an intersection bit with a value of one in the compressed constraint bitmap, write the scheduling conflict bit and stop the output of the current round; In S54, the output order of the leading edge bits is determined based on the truncation and release counts, and the shutdown control sequence is generated recursively. The inputs are the leading edge bits, truncation count, release count, compressed constraint bitmap, and column value accumulation count generated in S53. The logic controller first reads the leading edge bits in ascending order of truncation count, ensuring that shutdown execution objects with fewer remaining path truncation constraints after output enter the shutdown control sequence first. When the truncation counts of two leading edge bits are the same, the leading edge bits are read in descending order of release count, ensuring that leading edge bits capable of releasing more subsequent shutdown execution objects enter the shutdown control sequence first. When both the truncation and release counts are the same, the leading edge bits are read in ascending order of the shutdown execution object bits. Each time a leading edge bit is read, the output order is... The leading edge bit is written into the shutdown control sequence, and the column with a value of 1 in the same row of the compressed constraint bitmap before being cleared is recorded as the released column. Then the same row is cleared, and the column value accumulation is decremented by one for the released column. The shutdown execution object bits that have been written into the shutdown control sequence are written into the sequence occupancy bit. The calculation of the leading edge bit, the trial deletion arc calculation, and the clearing of the same row are repeated until there are no cross bits with a value of 1 in the compressed constraint bitmap. When the shutdown control sequence is output, the shutdown control sequence is output. If there are still cross bits with a value of 1 in the compressed constraint bitmap and there are no unoutput shutdown execution object bits with a column value accumulation of zero, the scheduling conflict bit is written. The remaining shutdown execution objects remain in an unoutput state for S6 to read when generating batch shutdown control results. Through the above processing, the path truncation relationship is converted into the original constraint bitmap. The original constraint bitmap is compressed into a compressed constraint bitmap after arc compression of the arrival bitmap. The compressed constraint bitmap is then recursively generated into a shutdown control sequence through leading edge bits, release number, and retained truncation number. This shutdown control sequence is not formed according to the equipment list or room order, but according to the order of the influence of the path truncation bits on the data transmission path of the controlled power consumption object. In practical applications: When a shop closes and shuts down, the ventilation controller is pulled by the cashier socket to form a path truncation relationship. The program control system writes the shutdown execution object bit corresponding to the ventilation controller as the arc tail bit and the path truncation bit corresponding to the cashier socket as the arc head bit, forming the cross bit in the original constraint bit diagram. If another lighting controller also needs to complete the shutdown feedback before the cashier socket, the arc compression calculation will retain the cross bit that directly affects the delayed shutdown of the cashier socket and delete the redundant cross bit that has been expressed by multiple constraint arcs. Then, the logic controller prioritizes the output of shutdown execution objects with zero arcs and retains the smaller truncation number, so that after the ventilation controller and lighting controller complete the shutdown feedback, the cashier socket is allowed to enter the subsequent shutdown sequence.

[0022] S6. Issue a shutdown command according to the shutdown control sequence, read the shutdown feedback status based on the data collection and feedback results of this round of IoT, eliminate the corresponding constraint arc after obtaining the shutdown feedback status, and issue a path truncation position shutdown command after all the incoming arcs at the path truncation position are eliminated, and output the batch shutdown control results. In this embodiment, S6 is used to perform batch shutdown based on the shutdown control sequence generated by S5, and to perform arc-suppression processing on the execution constraint bitmap based on the IoT data acquisition feedback results of this round. The processing mechanism is as follows: the logic controller first generates an execution cursor according to the shutdown control sequence, then concatenates the shutdown execution object bit with the current round acquisition sequence bit to form an execution verification key, and uses the execution verification key to retrieve the shutdown feedback status from the current round IoT data acquisition feedback results. Subsequently, the disconnection bit in the shutdown feedback status is used to eliminate the corresponding constraint arc in the execution constraint bitmap, and the path truncation bit shutdown command is issued only after the arc margin of the path truncation bit is zeroed. S6 reads the compressed constraint bitmap output by S5 and writes it as the execution constraint bitmap. Subsequent updates to the constraint arc map all refer to the updated execution constraint bitmap. The current round acquisition sequence bit comes from the sequence bit written by the IoT data acquisition feedback end in S1 according to the order of arrival. This implementation process includes the following steps: In S61, the shutdown control sequence is converted into a verifiable shutdown execution record, ensuring that subsequent shutdown feedback states can accurately match the corresponding shutdown execution object. The inputs are the shutdown control sequence, the execution constraint bitmap, the shutdown execution object bit, and the current acquisition sequence bit. The logic controller initializes the execution cursor to the first position of the shutdown control sequence, reads the shutdown execution object bit pointed to by the execution cursor, and determines whether the shutdown execution object bit belongs to a path truncation bit where the incoming arc margin is not zero. If it does not belong to a path truncation bit where the incoming arc margin is not zero, a shutdown instruction is issued to the corresponding shutdown execution object, using the shutdown execution object bit as the high-order bit. The sequence number of this round of data acquisition is used as the low-order bit and concatenated into an execution verification key with a fixed bit width. The corresponding position of the execution verification key is written into the arc-extinguishing bitmap. If it is a path truncation bit where the arc ingress margin is not zero, no shutdown command is issued. The path truncation bit is written into the hold execution bit, and the execution cursor is moved to the next bit in the shutdown control sequence. If the sequence number of this round of data acquisition is less than the fixed bit width, zeros are padded on the left before concatenation. If the sequence number of this round of data acquisition exceeds the fixed bit width, the sequence overflow bit is written and the arc-extinguishing process of the corresponding shutdown execution object is paused. The arc-extinguishing bitmap, the hold execution bit, and the execution cursor position are written into the execution record area for S62 to retrieve the shutdown feedback status. In S62, the arc-suppression result of the current round of IoT data acquisition and feedback is converted into the execution constraint bitmap. The inputs are the execution verification key, the bitmap to be extinguished, the current round of IoT data acquisition and feedback result, and the execution constraint bitmap written in S61. In the current round of IoT data acquisition and feedback result, the shutdown feedback status is retrieved by pressing the execution verification key. If the retrieved shutdown feedback status indicates that the corresponding shutdown execution object has been disconnected, the disconnection bit in the shutdown feedback status is written as 1. If the shutdown feedback status is not retrieved or the retrieved shutdown feedback status is still... If power is applied, the disconnect bit is written to zero; the disconnect bit is bitwise ANDed with the bitmap to be extinguished to obtain the extinguished arc bit; the row with the extinguished arc bit as the tail is read from the execution constraint bitmap, and the cross bits with a value of 1 in the row are cleared to zero, forming the updated execution constraint bitmap; if the extinguished arc bit is all zero, the execution constraint bitmap remains unchanged, and the corresponding shutdown execution object bit is written to the non-returned execution bit; the updated execution constraint bitmap, the extinguished arc bit, and the non-returned execution bit are written to the execution record area for S63 to read the arc margin of the path truncation bit; In S63, the system determines whether the path truncation bit meets the power-off execution condition based on the updated execution constraint bitmap and generates batch shutdown control results. The inputs are the updated execution constraint bitmap, path truncation bit, hold execution bit, execution cursor position, and arc suppression bit. Based on the updated execution constraint bitmap, the system reads the corresponding column of the path truncation bit, accumulates the cross-bits with a value of one in that column, and obtains the arc-infeed margin of the path truncation bit. When the arc-infeed margin is zero, the logic controller issues a shutdown command to the corresponding path truncation bit and writes the corresponding path truncation bit into the path truncation execution bit. When the arc-infeed margin is not zero, the system holds the execution command. The system maintains the power supply status of the same-position path truncation bit and keeps it in the hold execution bit. After the execution cursor moves forward, it continues to read the next shutdown execution object bit in the shutdown control sequence. Each time an arc-extinguishing bit is obtained, the arc-entry margin of the path truncation bit corresponding to the hold execution bit is recalculated. When the execution cursor reaches the end of the shutdown control sequence and a hold execution bit still exists, the hold execution bit is written into the unverified shutdown result. Finally, the shutdown execution object bits, arc-extinguishing bits, path truncation execution bits, hold execution bits, unreturned execution bits, and unverified shutdown results of the issued shutdown instructions are summarized into the batch shutdown control result. Through the above processing, the shutdown execution object bits in the shutdown control sequence are read item by item by the execution cursor, the execution verification key binds the shutdown instruction with the data collection and feedback results of this round of IoT, the arc extinguishing bit converts the confirmed disconnected shutdown execution object into the constraint arc clearing result in the execution constraint bitmap, and the path truncation bit enters the actual power-off execution after the arc margin is zeroed. In practical applications: When a shop closes and shuts down, the shutdown control sequence first outputs the shutdown execution object bit corresponding to the exhaust controller. The logic controller sends a shutdown command to the exhaust controller and concatenates the shutdown execution object bit of the exhaust controller with the current round of data acquisition sequence bit to execute the verification key. After the exhaust controller returns the shutdown feedback status, the disconnect bit is ANDed with the arc-to-be-extinguished bitmap to form an arc-extinguishing bit. The cross bit with the exhaust controller as the arc tail in the execution constraint bitmap is cleared to zero. When the arc-entry margin of the path cutoff bit corresponding to the cashier socket is zeroed, the logic controller sends a shutdown command to the cashier socket again, so that before the cashier socket is powered off, the exhaust controller has completed the shutdown feedback and eliminated the corresponding constraint arc.

[0023] Furthermore, the present invention also includes an Internet of Things (IoT) intelligent electrical appliance switch control system, the system comprising a backtracking mapping module, a tracing module, a control calculation module, a positioning module, a constraint scheduling module, and an arc suppression shutdown module: The backtracking graph module is used to obtain the wireless network hop-by-hop forwarding chain formed by IoT data collection and backhaul within the coverage area of ​​the batch shutdown command. In the digital processing device, the source of the controlled power consumption object is traced back along the hop-by-hop forwarding chain from the gateway root point. When a registered node is encountered, the forwarding edge before the first entry is retained and the back-forwarding edge is deleted to generate a directed acyclic backhaul graph. The tracing module, based on the power input branch chain formed by the shutdown execution within the coverage space of the batch shutdown command, traces the power-loss controlled power consumption objects pulled by the power-off action starting from the shutdown execution object, and writes the branch segments between the shutdown execution object and the power-loss controlled power consumption objects into the power supply cut-off diagram. The domination operation module is used to perform root domination operation on the directed acyclic backhaul graph using the domination tree algorithm. The rule for backhaul domination is that all data acquisition backhaul paths from the gateway root point to the controlled power consumption object pass through the same shutdown execution object, and a backhaul domination tree is generated. The positioning module, based on the power supply cut-off diagram and the feedback control tree, performs cross-positioning of the power outage path and the feedback control path for the same controlled power consumption object, writes the shutdown execution object that falls into both types of paths into the path truncation bit, and generates the path truncation relationship. The constraint scheduling module is used to execute the directed acyclic graph constraint scheduling algorithm in the program control system according to the path truncation relationship. The controlled power consumption objects pulled by the path truncation position point to form a constraint arc. The module generates a shutdown control sequence according to the rules of shutting down the output of the object without an incoming arc, deleting the arc tail constraint arc of the output object, and recursively reading the shutdown of the object without an incoming arc. The arc suppression and shutdown module is used to issue shutdown commands according to the shutdown control sequence, read the shutdown feedback status based on the data acquisition and feedback results of this round of IoT, eliminate the corresponding constraint arcs after obtaining the shutdown feedback status, and issue path truncation position shutdown commands after all incoming arcs at the path truncation position are eliminated, and output batch shutdown control results.

[0024] Working principle: This solution first reads the IoT data acquisition and backhaul relationship within the batch shutdown range, traces back along the wireless network hop-by-hop forwarding chain to the gateway root point, deletes invalid forwarding edges formed by repeated backhauls, and obtains a directed acyclic backhaul graph; then it reads the power input branch chain corresponding to the shutdown execution object, traces the controlled power consumption objects that will lose their power source after power failure, and forms a power supply cutoff graph; then it uses the dominator tree algorithm to determine which shutdown execution objects are located on the necessary path from the controlled power consumption objects back to the gateway, and cross-locates the power supply cutoff graph with the backhaul dominator tree to find the path truncation position that will cause both power failure and cut off the backhaul path; finally, the logic controller generates a shutdown control sequence based on the path truncation relationship, first shutting down objects that do not affect subsequent backhaul, and then shutting down the path truncation position after the downstream shutdown status is backhauled and the constraint arc is eliminated, thereby completing the batch shutdown control; In a shop closing scenario, the ventilation controller, lighting controller, and cash register socket all fall under the same batch shutdown range, and the data transmission from the ventilation controller needs to pass through the relay node on the cash register socket side to reach the gateway. If the cash register socket is shut down directly first, although the ventilation controller has not completed the shutdown transmission, its wireless transmission path has been interrupted. This solution first confirms the transmission path of the ventilation controller through the IoT data acquisition transmission chain, then confirms through the power input branch chain that the power outage of the cash register socket will affect downstream objects, and then identifies the cash register socket as the path truncation point. Based on this, the logic controller first issues shutdown commands to the ventilation controller and lighting controller, and after receiving the disconnection transmission, cancels the corresponding constraint arc. After the arc margin of the cash register socket returns to zero, the shutdown command for the cash register socket is issued again, so that each controlled power-consuming object in the shop completes shutdown in the order that can complete the transmission verification.

[0025] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for controlling the switch of an Internet of Things (IoT) smart appliance, characterized in that, include: S1. Obtain the wireless network hop-by-hop forwarding chain formed by IoT data collection and backhaul within the coverage area of ​​the batch shutdown command. In the digital processing device, trace back the source of the controlled power consumption object along the hop-by-hop forwarding chain from the gateway root point. When a registered node is encountered, retain the forwarding edge before the first entry and delete the back forwarding edge to generate a directed acyclic backhaul graph. S2. Based on the power input branch chain formed by shutdown execution within the coverage space of the batch shutdown instruction, trace the power-loss controlled power consumption object pulled by the power-off action starting from the shutdown execution object, and write the branch segment between the shutdown execution object and the power-loss controlled power consumption object into the power supply cut-off diagram. S3. Perform root point domination operation on the directed acyclic backhaul graph using the domination tree algorithm. The rule for backhaul domination is that all data acquisition and backhaul paths from the gateway root point to the controlled power consumption object pass through the same shutdown execution object. Generate a backhaul domination tree. S4. Based on the power supply cut-off diagram and the feedback control tree, perform cross-location of the power outage path and the feedback control path for the same controlled power consumption object, write the shutdown execution object that falls into both types of paths into the path truncation position, and generate the path truncation relationship. S5. Based on the path truncation relationship, the logic controller executes the directed acyclic graph constraint scheduling algorithm in the program control system. The controlled power consumption objects pulled by the path truncation position point to the path truncation position to form a constraint arc. The shutdown control sequence is generated according to the rules of shutting down the output of the object without an incoming arc, deleting the arc tail constraint arc of the output object, and recursively reading the shutdown of the object without an incoming arc.

2. The IoT smart appliance switch control method according to claim 1, characterized in that: Also includes: S6. Issue shutdown commands according to the shutdown control sequence, read the shutdown feedback status based on the data collection and feedback results of this round of IoT, eliminate the corresponding constraint arcs after obtaining the shutdown feedback status, and issue path truncation position shutdown commands after all the incoming arcs at the path truncation positions are eliminated, and output the batch shutdown control results.

3. The IoT smart appliance switch control method according to claim 2, characterized in that: S1 includes: S11. Starting from the IoT data acquisition and transmission end of the controlled power consumption object, read the previous hop source hop by hop along the wireless network forwarding chain in the digital processing device, stop backtracking at the root point of the gateway, and write the adjacent two hops into a backtracking edge sequence according to the reading order. S12. Perform registration verification along the backtracking edge sequence, write the arrival end that has not entered the registration chain into the registration chain, read the first registration bit of the arrival end when the arrival end has entered the registration chain, delete the backtracking edge pointing to the node in the registration chain after the first registration bit, and output the backtracking edge sequence. S13. Merge the back-and-forth edge sequences according to the IoT data acquisition and back-transmission end. For back-tracing edges that are consistent at both the starting end and the destination end, retain the first-written edge to generate a directed acyclic back-transmission graph for reading when generating the back-transmission dominance tree.

4. The IoT smart appliance switch control method according to claim 3, characterized in that: S2 includes: S21. Starting from the power-off end of the shutdown execution object, read the next power receiving end segment by segment along the power input branch chain in the power receiving direction. When the next power receiving end loses its power input source, write the next power receiving end into the power loss chain. When the next power receiving end retains its power input source, stop the corresponding branch tracing and output the power loss chain. S22. Based on the power loss chain, read the branch segments between adjacent power receiving ends. When both ends of the branch segment belong to the same power loss chain, write the branch segment into the power supply cut-off edge sequence. When either end of the branch segment leaves the power loss chain, stop writing the branch segment. S23. Merge the power supply cut-off edge sequence according to the shutdown execution object, and connect the power supply cut-off edges driven by the same shutdown execution object to the power supply cut-off diagram according to the power input branch chain reading order, so as to be read when the path truncation relationship is generated.

5. The IoT smart appliance switch control method according to claim 4, characterized in that: S3 includes: S31. Execute the dominance tree algorithm in the directed acyclic backhaul graph, write the top-end of the gateway root point, write the incremental topology bit for each successor node along the direction of the acquisition backhaul edge, and generate the node calculation sequence in ascending order of the topology bit. S32. Based on the node calculation sequence, establish a dominance bitmap of the same length for each node, write 1 to the gateway root point bit in the gateway root point dominance bitmap and write zero to the other bits, read the dominance bitmap of all incoming edges for non-gateway root points and AND them bit by bit, and write 1 to the current node bit in the result of the bit by bit to generate a node dominance bitmap. S33. Read the control bit map corresponding to the controlled power consumption object according to the node control bit map, and perform bit extraction according to the shutdown execution object bit in the node calculation sequence. When the bit value is one, write the shutdown execution object bit into the feedback control bit map of the controlled power consumption object to generate the feedback control bit map. S34. Read the backhaul control bitmap of the same controlled power consumption object in reverse order of topology bit, write the first shutdown execution object bit with a value of one as the direct control end, and form a backhaul control edge from the direct control end to the controlled power consumption object, and summarize the backhaul control edges to generate a backhaul control tree.

6. The IoT smart appliance switch control method according to claim 5, characterized in that: S4 includes: S41. Based on the power supply cut-off diagram, read the reverse power input branch corresponding to the controlled power consumption object, read back along the controlled power consumption object to the shutdown execution object, and write 1 for the object bit in the node calculation sequence of the shutdown execution object and write 0 for the object bit of the unread object, and generate a power loss path bit map. S42. Read the direct control end from the same controlled power consumption object in reverse along the backhaul control tree until the gateway root point is reached, and write 1 to the shutdown execution object bit and 0 to the non-control object bit in the direct control end to generate a backhaul control path bit map. S43. Perform a bitwise AND operation on the power outage path bitmap and the feedback control path bitmap of the same controlled power consumption object. Write the shutdown execution object with a value of one in the AND result into the path truncation bit, and use the path truncation bit to guide the controlled power consumption object to generate the path truncation relationship.

7. The IoT smart appliance switch control method according to claim 6, characterized in that: S5 includes: S51. Taking the path truncation relationship as input, write the path truncation position as the arc head position in the program control system. The controlled power consumption object pulled along the path truncation position reads back the shutdown execution object position and writes it as the arc tail position. When the arc tail position and the arc head position are inconsistent, write 1 at the intersection position of the arc tail position row and the arc head position column to generate the original constraint bit map. S52. Perform arc compression calculation on the original constraint bitmap. The logic controller reads the arc tail bit in reverse order of the shutdown execution object bit. Perform bitwise OR on the arrival bitmap of each arc arrival bit and write it to the arc tail bit arrival bitmap. When the arc head bit already exists in the bitwise OR result of the other arc arrival bits of the same arc tail bit, clear the cross bit from the arc tail bit to the arc head bit to generate the compressed constraint bitmap.

8. The IoT smart appliance switch control method according to claim 7, characterized in that: S5 also includes: S53. Execute the directed acyclic graph constraint scheduling algorithm in the compressed constraint bitmap. The logic controller calculates the cumulative column value of the shutdown execution object bits that have not been written into the shutdown control sequence. Write the shutdown execution object bits with a cumulative column value of zero into the leading edge bits. Perform trial deletion calculation on each leading edge bit. After clearing the leading edge bit and the same row, count the number of columns that change from non-zero to zero to form the release number. Count the number of columns whose corresponding columns are still non-zero to form the retention truncation number. S54. Read the leading edge bits in ascending order according to the number of truncations to retain. If the number of truncations to retain is the same, read the leading edge bits in descending order according to the number of releases. If both the number of truncations to retain and the number of releases are the same, read the leading edge bits in ascending order according to the bits of the shutdown execution object. Write the reading results into the shutdown control sequence and clear the corresponding row. Then, perform a column value accumulation operation of decrementing one on the column whose value is one in the corresponding row before clearing, until there are no cross bits with a value of one in the compressed constraint bitmap. Output the shutdown control sequence.

9. The IoT smart appliance switch control method according to claim 8, characterized in that: S6 includes: S61. Generate an execution cursor based on the shutdown control sequence. The logic controller reads the shutdown execution object bit pointed to by the execution cursor and issues a shutdown command. The shutdown execution object bit is concatenated with the current round of acquisition sequence bit to form an execution verification key, which is then written into the arc-to-be-extinguished bitmap. S62. In the data collection and transmission results of this round of IoT, press the execution verification key to retrieve the shutdown transmission status, perform bitwise AND operation between the disconnection bit in the shutdown transmission status and the arc-to-be-extinguished bitmap to obtain the established arc-extinguishing bit, clear the value bit with the established arc-extinguishing bit as the arc tail in the constraint arc map, and output the updated constraint arc map. S63. Based on the updated constraint arc diagram, read the in-arc margin of the path truncation position. When the in-arc margin is zero, issue a shutdown command to the path truncation position at the same position and write it to the path truncation execution position. When the in-arc margin is not zero, maintain the power supply status of the path truncation position at the same position and generate batch shutdown control results by moving the execution cursor backward.

10. An Internet of Things (IoT) smart appliance switch control system, used to implement the IoT smart appliance switch control method according to any one of claims 1-9, the system comprising a backtracking mapping module, a tracing module, a control calculation module, a positioning module, a constraint scheduling module, and an arc suppression shutdown module, characterized in that: The backtracking graph module is used to obtain the wireless network hop-by-hop forwarding chain formed by IoT data collection and backhaul within the coverage area of ​​the batch shutdown command. In the digital processing device, the source of the controlled power consumption object is traced back along the hop-by-hop forwarding chain from the gateway root point. When a registered node is encountered, the forwarding edge before the first entry is retained and the back-forwarding edge is deleted to generate a directed acyclic backhaul graph. The tracing module, based on the power input branch chain formed by the shutdown execution within the coverage space of the batch shutdown command, traces the power-loss controlled power consumption objects pulled by the power-off action starting from the shutdown execution object, and writes the branch segments between the shutdown execution object and the power-loss controlled power consumption objects into the power supply cut-off diagram. The domination operation module is used to perform root domination operation on the directed acyclic backhaul graph using the domination tree algorithm. The rule for backhaul domination is that all data acquisition backhaul paths from the gateway root point to the controlled power consumption object pass through the same shutdown execution object, and a backhaul domination tree is generated. The positioning module, based on the power supply cut-off diagram and the feedback control tree, performs cross-positioning of the power outage path and the feedback control path for the same controlled power consumption object, writes the shutdown execution object that falls into both types of paths into the path truncation bit, and generates the path truncation relationship. The constraint scheduling module is used to execute the directed acyclic graph constraint scheduling algorithm in the program control system according to the path truncation relationship. The controlled power consumption objects pulled by the path truncation position point to form a constraint arc. The module generates a shutdown control sequence according to the rules of shutting down the output of the object without an incoming arc, deleting the arc tail constraint arc of the output object, and recursively reading the shutdown of the object without an incoming arc. The arc suppression and shutdown module is used to issue shutdown commands according to the shutdown control sequence, read the shutdown feedback status based on the data acquisition and feedback results of this round of IoT, eliminate the corresponding constraint arcs after obtaining the shutdown feedback status, and issue path truncation position shutdown commands after all incoming arcs at the path truncation position are eliminated, and output batch shutdown control results.

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