Adaptive scan frequency dynamic control method and system

Abstract

The application relates to the technical field of computer system hardware monitoring and thermodynamic management, and discloses a dynamic control method and system based on adaptive scanning frequency, which comprises the following steps: acquiring a load change gradient of a front parameter node; calculating a target polling frequency of a target thermodynamic sensing node based on the load change gradient, and generating a high-frequency monitoring time window with a corresponding time length in combination with a physical conduction delay; overwriting a polling period register of the target thermodynamic sensing node through a bottom-layer communication bus to improve a communication scanning frequency to the target scanning frequency; and performing data sampling on the target thermodynamic sensing node according to the target scanning frequency during the high-frequency monitoring time window opening period. The application can improve the sampling frequency to obtain temperature peak value data before heat is conducted to the sensor, and can reduce the continuous occupation of the bus bandwidth by high-frequency communication by using the time window.

Description

Technical Field

[0001] This invention relates to the field of computer system hardware monitoring and thermodynamic management technology, specifically to an adaptive scanning frequency dynamic control method and system. Background Technology

[0002] Existing computing nodes are typically configured with thermodynamic sensor nodes to monitor hardware operating temperature and rely on the underlying serial communication bus to obtain polling data. To reduce the occupation of bus physical bandwidth, the system generally adopts a fixed low-frequency scanning mechanism. As the complexity of computing tasks increases, the processor's power consumption often fluctuates drastically in a short period of time, causing transient heat buildup. Because the sampling interval of the low-frequency scanning mechanism is fixed, the bus controller has difficulty capturing transient temperature jumps, resulting in a lag in the system's internal heat dissipation intervention. This can easily lead to the processor triggering hardware-level forced frequency reduction or shutdown protection due to localized overheating.

[0003] A common approach to improvement is to globally increase the communication scan frequency of the underlying bus to increase data sampling density. However, the underlying hardware monitoring bus typically connects to multiple peripherals simultaneously. Simply increasing the polling frequency of a single thermodynamic sensor can squeeze bus bandwidth, causing communication delays for other devices on the same bus, such as voltage regulators or fan controllers. Under sustained high load conditions, indiscriminate frequency increases can easily trigger communication conflicts between multiple devices, leading to bus communication blockage or deadlock.

[0004] Furthermore, traditional monitoring logic relies on fixed thermodynamic parameters preset at the factory, lacking the ability to adapt to the long-term operating conditions of the equipment. With the long-term service of computing devices, phenomena such as the degradation of thermal grease performance and the aging of electronic components can cause drift in the actual heat conduction delay time, leading to an increase in the sensor's reference noise floor. Fixed monitoring parameters cannot adapt to the evolution of physical characteristics, making the system prone to monitoring timing misalignments, false alarms due to noise floor fluctuations, and increased computing power consumption in later stages of operation. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides an adaptive scanning frequency dynamic control method and system, which solves the problem that existing computing node thermodynamic monitoring systems typically use a static low-frequency polling mechanism. When faced with sudden high-density computing loads, the underlying communication bus struggles to capture the transient heat accumulation process, resulting in monitoring gaps and easily leading to system frequency reduction or hardware overheating damage.

[0006] To address the above problems, the present invention provides the following technical solution: The first aspect of the present invention provides an adaptive scanning frequency dynamic control method, comprising: The system acquires the load change gradient triggered by the preceding parameter node in the computing node; calculates the target scanning frequency based on the load change gradient, and generates a high-frequency monitoring timing window of corresponding duration by combining the physical conduction delay; overwrites the polling cycle configuration register corresponding to the target thermodynamic sensor node in the underlying bus controller or monitoring scheduler through the underlying bus interface to increase the polling frequency of the target thermodynamic sensor node to the target polling frequency; during the opening of the high-frequency monitoring timing window, performs high-density data sampling on the target thermodynamic sensor node according to the target polling frequency; when the high-frequency monitoring timing window ends and the recovery condition is met, the high-frequency priority scheduling state of the target thermodynamic sensor node is released, and its polling frequency is smoothly restored to the initial low-frequency polling frequency.

[0007] This invention establishes a correlation model between electrical load and thermal response, increases the sampling frequency before heat is conducted to the sensor, and obtains peak temperature data; and uses a timing window to control the operating span of high-frequency communication to reduce the continuous occupation of bus bandwidth.

[0008] Furthermore, the calculation of the target scanning frequency based on the load change gradient specifically includes: introducing a logarithmic mapping model containing a preset frequency gain coefficient to calculate a scanning frequency multiplier factor to prevent logarithmic dead zones in true number operations; multiplying the scanning frequency multiplier factor by the initial low-frequency scanning frequency parameter to obtain the theoretical target frequency; and logically comparing the theoretical target frequency with the highest scanning frequency threshold limited by the system's hardware operating limits, taking the smaller of the two values ​​as the final target scanning frequency. Using a logarithmic mapping algorithm to limit the frequency gain range under high load changes helps maintain the operational stability of the bus controller.

[0009] Furthermore, the step of generating a high-frequency monitoring time series window of corresponding duration by combining physical conduction delay specifically includes: extracting the calculated dynamic heat conduction delay time; obtaining a tolerance buffer time set based on the standard deviation of the normal distribution from multiple rounds of thermodynamic pressure tests; and superimposing the dynamic heat conduction delay time with the tolerance buffer time to generate the duration variable of the high-frequency monitoring time series window. The superposition of the tolerance buffer time ensures that the generated time series window duration can encompass the actual delay time of the heat conduction process.

[0010] Furthermore, during the high-frequency monitoring timing window, a bus bandwidth contention control mechanism for multiple devices is implemented: The proportion of the bus occupied by the target thermodynamic sensor node per unit time is counted in real time; when the proportion reaches the set maximum bus occupancy threshold, new high-frequency polling requests to the target thermodynamic sensor node are suspended; non-target nodes in the underlying bus waiting queue are scheduled to perform guaranteed polling, and high-frequency access to the target thermodynamic sensor node is resumed after the guaranteed polling is completed. Introducing guaranteed polling when the bus occupancy limit is reached maintains the communication capability with non-target devices on the same bus, avoiding underlying communication blockage.

[0011] Furthermore, during the high-density data sampling, an adaptive waiting mechanism is configured in the underlying driver: when the target thermodynamic sensor node returns an unacknowledged signal or triggers a bus clock stretching state, a hardware idle period of preset width is actively inserted after the current read command; the reading is resumed only after the sensor releases the clock line or completes its internal state update, and the continuously acquired sampling data is written to a circular buffer queue in timestamp order. When the target thermodynamic sensor node returns an unacknowledged signal or triggers a bus clock stretching state, a hardware idle period of preset width is inserted after the current read command, and the read is re-initiated only after the sensor releases the clock line or completes its internal state update.

[0012] Furthermore, the process of satisfying the recovery conditions and performing recovery specifically includes: when the high-frequency monitoring timing window is exhausted, extracting continuous temperature sampling data at the end of the window and performing differential calculation or linear fitting calculation to obtain the current temperature change gradient; comparing the temperature change gradient with a preset temperature stability threshold; if it is greater than the temperature stability threshold, extending the high-frequency monitoring timing window by a preset buffer period; if it is less than or equal to the temperature stability threshold, determining that the recovery conditions are met, and entering the bus release and frequency reduction process. Determining whether the hardware state is in a stable period based on the temperature change gradient prevents premature frequency reduction due to differences in the heat dissipation environment.

[0013] Furthermore, the step of smoothly restoring the scanning frequency to the initial low-frequency scanning frequency specifically includes: obtaining the frequency difference between the target scanning frequency and the initial low-frequency scanning frequency, dividing it into multiple preset frequency steps; using a stepped frequency reduction strategy to successively decrease the target frequency within a fixed clock cycle, and gradually overwriting the polling cycle register of the low-speed serial bus controller until it smoothly falls back to the initial low-frequency scanning frequency; sending a cache release instruction to the system kernel to reclaim space or reset the read / write pointers of the circular cache queue. The stepped frequency reduction strategy includes: determining multiple frequency steps based on the frequency difference between the target polling frequency and the initial low-frequency polling frequency, and updating the polling cycle configuration register sequentially according to the multiple frequency steps until it falls back to the initial low-frequency polling frequency.

[0014] Furthermore, after the high-frequency monitoring timing window ends, the baseline parameters of the physical conduction model are adaptively corrected: the timestamp of the load mutation trigger and the timestamp of the first time the target thermodynamic parameter meets the temperature rise confirmation condition are extracted to calculate the actual heat conduction delay time under the current operating condition; an exponential moving average algorithm with a forgetting factor is introduced to dynamically update the baseline heat conduction delay constant at the system's bottom layer using the actual heat conduction delay time. Iteratively updating parameters using the actual measured time difference can eliminate monitoring timing deviations caused by long-term changes in hardware parameters.

[0015] Furthermore, the method also includes a background noise compensation mechanism: when the system is determined to be in a stable, unloaded state where load fluctuations are close to zero over multiple consecutive sampling periods, continuous power consumption sampling data is extracted to calculate the noise floor standard deviation; a new benchmark variance threshold is calculated based on the noise floor standard deviation and a fixed margin bias factor, and this new benchmark variance threshold is overridden. The variance threshold is adjusted based on the unloaded noise floor characteristics to prevent invalid sampling triggered by increased equipment noise.

[0016] Furthermore, the method also includes a long-term health status assessment and prediction mechanism based on neural networks: extracting multi-dimensional historical data containing a set of pre-parameters, a set of hysteresis parameters, and heat dissipation characteristic signals from the system's persistent memory, and constructing a fixed-length time series sliding window; performing tensor quantization reconstruction and normalization preprocessing on the time series sliding window, and feeding it into a pre-trained cascaded temporal neural network for forward computation and inference; and outputting an anomaly probability score representing the existence of implicit physical degradation in the current heat dissipation system through the activation function of the fully connected layer.

[0017] Furthermore, the cascaded temporal neural network comprises a one-dimensional convolutional layer and a long short-term memory network: the one-dimensional convolutional layer is used to slide along the time axis to extract local power consumption abrupt change edges and temperature-following transient features in the input tensor; the long short-term memory network is used to receive the sequence feature map output by the one-dimensional convolutional layer and to capture the long-term physical delay inertia in the heat conduction process using internal logic gates; when the output anomaly probability score exceeds the risk alarm threshold for multiple consecutive preset evaluation cycles, a system event log early warning message is sent to the out-of-band management network. The output anomaly probability score characterizes the physical structure state and provides an early warning output when the alarm threshold is exceeded, forming a predictive evaluation mechanism for the hardware.

[0018] A second aspect of the present invention provides an adaptive scanning frequency dynamic control system, including a substrate management controller, wherein the substrate management controller includes a pre-sampling module, a hysteresis sampling module, a heat dissipation acquisition module, a frequency scheduling module, and a deviation calibration module; The pre-sampling module is used to obtain the load change gradient of the pre-parameter node; The heat dissipation acquisition module is used to acquire the operating status parameters of the heat dissipation equipment; The frequency scheduling module is used to calculate the target polling frequency of the target thermodynamic sensor node based on the load change gradient, generate a high-frequency monitoring timing window of corresponding duration by combining the physical conduction delay, and increase the polling frequency of the target thermodynamic sensor node to the target polling frequency by overwriting the polling cycle configuration corresponding to the target thermodynamic sensor node in the underlying bus controller or monitoring scheduler. The hysteresis sampling module is used to perform data sampling on the target thermodynamic sensing node according to the target polling frequency during the opening of the high-frequency monitoring timing window. The frequency scheduling module is also used to count the bus occupancy ratio of the target thermodynamic sensing node during the high-frequency monitoring timing window, and when the bus occupancy ratio reaches the maximum bus occupancy rate upper limit threshold, schedule non-target nodes to perform guaranteed polling. The frequency scheduling module is also used to restore the polling frequency of the target thermodynamic sensing node to the initial low-frequency polling frequency when the high-frequency monitoring timing window ends and the recovery conditions are met. The deviation calibration module is used to dynamically update the reference thermal conduction delay constant according to the actual thermal conduction delay time, and update the reference variance threshold according to the power consumption sampling data under no-load steady state. The deviation calibration module is also used to output an anomaly probability score based on historical data including a set of pre-parameters, a set of hysteresis parameters, and heat dissipation characteristic signals, and to output an early warning message when the anomaly probability score meets preset alarm conditions.

[0019] This invention provides an adaptive scanning frequency dynamic control method and system. It has the following beneficial effects: 1. This invention calculates the target scanning frequency by acquiring the load change gradient and generates a high-frequency monitoring timing window by combining it with physical conduction delay. Within this window, the polling period register is overwritten to increase the sampling frequency. This design utilizes the time difference between electrical load abrupt changes and thermal response to increase data sampling density before heat reaches the sensor, solving the problem of traditional static low-frequency polling easily missing transient temperature peaks. At the same time, the timing window mechanism limits high-frequency communication to a necessary time period, and automatically restores to the initial low frequency after the window ends, avoiding continuous occupation of the underlying communication bus bandwidth by global high-frequency scanning.

[0020] 2. This invention calculates the actual heat conduction delay time and dynamically updates the baseline heat conduction delay constant using an exponential moving average algorithm with a forgetting factor. It also recalculates the variance threshold based on power consumption noise floor when the system is under no-load conditions. This adaptive parameter correction mechanism uses actual operating data to iteratively compensate the underlying physical model, offsetting the physical timing drift caused by the aging of the heat-conducting medium and reducing the probability of invalid high-frequency sampling triggers caused by increased noise floor of electronic components. This maintains the accuracy of the thermodynamic monitoring logic during long-term equipment operation.

[0021] 3. This invention employs a cascaded temporal neural network composed of a one-dimensional convolutional layer and a long short-term memory network to extract features from multi-dimensional historical data containing both pre- and post-parameter parameters, and outputs anomaly probability scores to trigger risk warnings. This network structure combines the ability of a one-dimensional convolutional layer to extract local signal mutation features with the ability of a long short-term memory network to handle long-term physical delay inertia. It can identify the structural degradation features accumulated in the heat dissipation module from multi-dimensional time-series data, thereby providing proactive predictive maintenance information before the equipment suffers physical damage or forced shutdown due to severe overheating. Attached Figure Description

[0022] Figure 1 This is a diagram illustrating the architecture of an adaptive scanning frequency control system according to an embodiment of the present invention. Figure 2 This is a flowchart illustrating the overall workflow of the control method according to an embodiment of the present invention. Figure 3 This is a heterogeneous parameter causal mapping and basic configuration topology diagram of an embodiment of the present invention; Figure 4 This is a timing diagram of high-frequency monitoring of pre-parameters and gradient calculation in an embodiment of the present invention; Figure 5 This is a schematic diagram illustrating the dynamic thermal damping compensation calculation principle of an embodiment of the present invention. Figure 6 This is a timing diagram of cross-domain frequency mapping and bus preemption according to an embodiment of the present invention; Figure 7 This is a schematic diagram of the high-frequency timing window state monitoring and bus arbitration principle according to an embodiment of the present invention; Figure 8 This is a timing diagram of monitoring timing window recycling and bus frequency reset according to an embodiment of the present invention; Figure 9 This is a schematic diagram illustrating the principle of thermodynamic data closed-loop processing and adaptive parameter updating in an embodiment of the present invention. Figure 10 This is a schematic diagram illustrating the principle of long-term health status assessment and prediction based on neural networks, as exemplified by an embodiment of the present invention. Figure 11 The figure shows a simulation comparison of physical causal mapping and dynamic scheduling of sampling frequency for heterogeneous sensors in a specific application embodiment of the present invention.

[0023] Among them, 100 is the baseboard management controller; 101 is the pre-sampling module; 102 is the hysteresis sampling module; 103 is the heat dissipation acquisition module; 104 is the frequency scheduling module; and 105 is the deviation calibration module. Detailed Implementation

[0024] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] See attached document Figure 1 , Figure 1 This is an architecture diagram of an adaptive scanning frequency control system according to an embodiment of the present invention. The present invention provides an adaptive scanning frequency control system applied in hardware computing nodes with out-of-band management capabilities.

[0026] The system includes a baseboard management controller 100. The baseboard management controller 100 is internally equipped with a pre-sampling module 101, a hysteresis sampling module 102, a heat dissipation acquisition module 103, a frequency scheduling module 104, and a deviation calibration module 105.

[0027] The pre-sampling module 101 is connected to the computing core unit on the external motherboard via a high-speed communication link. The high-speed communication link adopts the platform environment control interface communication protocol or the peripheral component extended interconnect bus specification. The pre-sampling module 101 is used to acquire the instantaneous electrical power consumption parameters or instruction throughput logic parameters of the computing core unit.

[0028] The hysteresis sampling module 102 is connected to thermodynamic sensing nodes distributed on an external motherboard via a low-speed serial bus. The low-speed serial bus adopts either the integrated circuit built-in bus specification or the system management bus specification. The hysteresis sampling module 102 is used to acquire real-time temperature parameters of each physical region.

[0029] The heat dissipation acquisition module 103 establishes a communication connection with the pulse width modulation fan controller on the external motherboard to obtain the real-time operating duty cycle signal of the active heat dissipation device.

[0030] See attached document Figure 2 , Figure 2 This is a flowchart illustrating the overall workflow of a control method according to an embodiment of the present invention. The present invention provides an adaptive scanning frequency control method, comprising the following steps: S10, the frequency scheduling module 104 reads the reference thermal conduction delay constant and the initial thermal damping coefficient of each sensing node from the internal non-volatile memory, and configures the initial low-frequency polling frequency of the target thermodynamic sensing node for the hysteresis sampling module 102. S20, the pre-sampling module 101 uses an internal micro-thread to perform high-frequency non-blocking sampling of electrical parameters through a high-speed communication link, and calculates the first-order gradient of the parameters in the discrete time window in real time. S30, when the frequency scheduling module 104 determines that the first-order change gradient exceeds the set reference variance threshold and meets the preset state de-jitter condition, it obtains the current duty cycle of the cooling fan input by the heat dissipation acquisition module 103, and calculates the expected heat conduction delay time under the current physical environment by combining the reference thermal conduction delay constant, the initial thermal damping coefficient and the current cooling fan duty cycle. S40, the frequency scheduling module 104 calculates the corresponding polling frequency multiplier factor according to the first-order change gradient, raises the polling frequency of one or more target thermodynamic sensing nodes in the low-speed serial bus that have a causal mapping relationship with the trigger pre-parameter node to the target polling frequency, and opens a high-frequency monitoring timing window of the corresponding duration according to the expected heat conduction delay time. S50, within the high-frequency monitoring timing window, the hysteresis sampling module 102 performs sampling and monitoring of the target thermodynamic sensing node according to the improved target polling frequency; S60, when the high-frequency monitoring timing window reaches the preset duration, the frequency scheduling module 104 extracts the continuous thermodynamic sampling data at the end of the window, calculates the temperature change gradient, and determines whether to extend the current high-frequency monitoring timing window or enter the recovery candidate state based on the comparison result of the temperature change gradient and the preset temperature stability threshold; when the temperature change gradient is not greater than the preset temperature stability threshold, and the pre-sampling module 101 detects that the first-order change gradient has fallen back to below the reference variance threshold for a preset number of consecutive times, the system marks the current target thermodynamic sensing node as meeting the recovery execution conditions, triggers the timing error calibration process in step S70, and enters the frequency recovery process described in step S80; S70, the deviation calibration module 105 extracts the timing error value, performs background iterative correction operation on the reference thermal conduction delay constant and optional initial thermal damping coefficient stored in the non-volatile memory, and preferably performs write-back when the parameters meet the preset convergence conditions or reach the preset update cycle, so as to reduce the life loss and abnormal power failure risk caused by frequent erasure and writing of non-volatile memory. S80, when the frequency scheduling module 104 confirms that the target thermodynamic parameter has entered the stable range according to the judgment result of step S60, and the pre-sampling module 101 detects that the first-order change gradient has fallen back to below the benchmark variance threshold after a preset number of consecutive times, the frequency scheduling module 104 modifies the underlying polling configuration parameters, restores the polling frequency of the target thermodynamic sensing node to the initial low-frequency polling frequency, closes the high-frequency monitoring timing window, and performs cache and internal scheduling status cleanup.

[0031] As an optional preferred implementation, the deviation calibration module 105 performs predictive diagnosis based on historical multidimensional time-series data and outputs the health status assessment results of the heat dissipation system. The predictive diagnosis function is not a necessary component of the adaptive scanning frequency control basic process. By default, the system can still complete temperature monitoring and frequency recovery control by relying solely on pre-sampling, hysteresis sampling, frequency scheduling, and deviation calibration.

[0032] See attached document Figure 3 , Figure 3 This is a heterogeneous parameter causal mapping and basic configuration topology diagram according to an embodiment of the present invention. In this embodiment, the frequency scheduling module 104 performs the instantiation of the underlying data structure in the memory of the baseboard management controller 100 and performs basic write operations on the operating parameters of the communication interface. The specific implementation process of step S10 includes: S101, the frequency scheduling module 104 allocates address space in the volatile memory of the baseboard management controller 100, and automatically identifies and divides the heterogeneous sensing nodes in the system by parsing the device tree configuration file or hardware description language in the system firmware, and constructs the causal mapping matrix of the heterogeneous sensing nodes.

[0033] As one possible implementation, the causal mapping matrix can be generated based on any one or a combination of the following: motherboard component topology, factory thermal test calibration results, preset configuration table, thermal simulation results, or manual maintenance configuration. The device tree configuration file or hardware description language is mainly used to identify node and interface relationships, and the thermal influence relationships between nodes can be further determined by the preset mapping table or calibration results. The electrical signals of the computing core unit convert into heat energy when doing work in the physical field. This conversion has a fixed physical time difference, causing abrupt changes in electrical state to typically exhibit a time-leading characteristic on the time axis. Considering that high-density computing devices have tightly packed internal components and share system airflow, an increased load on a core component often leads to a chain reaction of temperature rises in the surrounding area. Establishing a cross-domain mapping model becomes crucial for predicting changes in physical state in advance. The system defines the high-speed hardware nodes monitored by the pre-sampling module 101 as the pre-parameter set. The elements in the set include electrical parameters such as the instantaneous power consumption of the central processing unit and the transient current of the graphics processing unit; the low-speed peripheral nodes monitored by the hysteresis sampling module 102 are defined as the hysteresis parameter set. The elements within the set include thermodynamic parameters such as the temperature of the voltage regulation module and the temperature of the dual in-line memory module. The frequency scheduling module 104... Nodes in Directed edges are established between nodes affected by heat conduction or heat radiation, generating a causal mapping matrix. Causal mapping matrix Boolean elements Defined as: ; In the formula, the index number and These represent unique identifiers for different hardware monitoring nodes in the mapping model. This is achieved by constructing a causal mapping matrix. The system transforms isolated hardware monitoring nodes into a topological network with physical causal relationships, providing a data retrieval basis for subsequent cross-bus collaborative scheduling.

[0034] In S102, the frequency scheduling module 104 accesses the non-volatile memory through the peripheral bus integrated inside the baseboard management controller 100 and loads the underlying physical empirical constants.

[0035] For the causal mapping matrix middle For each directed edge, the frequency scheduling module 104 reads the corresponding reference thermal conduction delay constant. and initial thermal damping coefficient Reference thermal conduction delay constant Characterized in a natural convection environment without active fan intervention, heat flows from the heat source node. Conducted to temperature sensor node The absolute physical conduction time required for the area on the printed circuit board in which it is located. Initial thermal damping coefficient. This characterizes the damping effect of current motherboard heatsink material properties and physical airflow structure on heat transfer efficiency. As a preferred implementation, a reference thermal conduction delay constant is used. With initial thermal damping coefficient Typically, during the factory thermodynamic stress testing phase before mass production of hardware motherboards, the timing difference of real-time data is obtained by injecting a step-type power load into the computing core and recording the changes in peripheral temperature offline, and then pre-programmed into non-volatile memory. When the frequency scheduling module 104 detects an error in the checksum of the non-volatile memory or the hardware is in its initial power-on state, it will trigger a safety fallback mechanism, calling the pre-set safety configuration table in the firmware code to adjust the reference thermal conduction delay constant. By assigning a conservative value much smaller than the normal conduction period, the system can enter the high-frequency monitoring window or extend the monitoring coverage area earlier after a sudden load change, so as to ensure that high-frequency monitoring can be triggered in advance in subsequent calculations and avoid temperature underreporting.

[0036] In S103, the frequency scheduling module 104 configures the basic scanning frequency for the low-speed serial bus under steady-state conditions.

[0037] Frequency scheduling module 104 extracts the basic scanning frequency parameters of the target thermodynamic sensing node. In a typical server operating environment, this initial low-frequency scan frequency parameter... Corresponding scan cycle The frequency is typically set to a long period ranging from several seconds to tens of seconds. The frequency scheduling module 104 writes the initial low-frequency scan period parameter into the communication register of the low-speed serial bus controller. The corresponding polling cycle configuration value allows the delayed sampling module 102 to issue read commands to the thermodynamic sensing node at this low-frequency clock interval when the hardware system is in a steady-state, low-load period. This register write operation helps release most of the communication bandwidth resources of the low-speed serial bus, preventing bus occupancy saturation and arbitration collisions during normal system operation. For the specific read / write addressing operations and physical waveform duty cycle timing of the low-speed serial communication bus registers, those skilled in the art can directly apply the standard low-level driver program of the integrated circuit built-in bus specification. Its communication handshake logic and address arbitration principle are well-known technologies in the field and will not be elaborated upon here.

[0038] See attached document Figure 4 , Figure 4This is a timing diagram of high-frequency monitoring of pre-parameters and gradient calculation according to an embodiment of the present invention. In this embodiment, the system utilizes a dedicated data channel independent of traditional sensor networks to extract the load mutation characteristics of computing nodes. To facilitate understanding of the execution mechanism of this monitoring logic, the specific implementation process of step S20 includes: S201, the pre-sampling module 101 uses an internal micro-thread to perform high-frequency non-blocking sampling of electrical parameters through a high-speed communication link.

[0039] For hardware computing nodes with out-of-band management capabilities, the core processor typically has built-in registers for recording real-time electrical states. The pre-sampling module 101 sends status query commands to the aforementioned computing core unit via a background execution unit formed by firmware tasks, operating system threads, interrupt service routines, or combinations thereof in the baseboard management controller 100. To ensure the continuity of the sampling process and avoid monitoring blind spots or thread deadlocks caused by hardware communication anomalies, when a status query command encounters a bus timeout or data verification error, the system actively discards the abnormal data packet and postpones it to the next micro-thread clock cycle to re-initiate the register read operation. To achieve the high-frequency non-blocking sampling described in the functional features, the system relies on an independent high-speed communication link in its physical architecture. The pre-sampling module 101 uses a dedicated microprocessor sideband bus or direct memory access channel to obtain the return data of the aforementioned status query commands. Because this high-speed communication link is isolated from the low-speed serial bus connecting the temperature sensor at both the physical pin and controller levels, the pre-sampling module 101 does not cause queuing or communication congestion at the low-speed serial bus level when frequently reading instantaneous power consumption values ​​such as the operating average power limit register. The micro-thread context scheduling mechanism and the low-level register addressing of the direct memory access channel can be implemented using conventional techniques of general-purpose embedded operating systems.

[0040] S202, the system continuously acquires raw operating data from the underlying hardware.

[0041] The pre-sampling module 101 calculates the first-order gradient of the electrical parameters within a discrete-time window in real time. The system maintains a discrete-time window of constant span in the kernel timer. As a preferred implementation, this discrete-time window The settings are typically configured in milliseconds to ensure sufficient capture resolution for transient load spikes. The pre-sampling module 101 extracts the parameter sample values ​​at the current moment in real time. And extract the parameter sampling values ​​of historical moments from the cache queue. The system constructs a difference operation model based on the extracted parameter values ​​to calculate the first-order gradient of the pre-existing parameters. First-order gradient of change The specific calculation formula is expressed as follows: ; In the formula, Characterizes the rate of increase or decrease of electrical power consumption of the computing core unit per unit time. The parameter sample value at the current moment. These are parameter sampling values ​​from historical moments. This represents a discrete-time window. The gradient value can directly map the degree of sudden increase in the system's internal task load, providing a mathematical basis for predicting the subsequent potential physical temperature rise.

[0042] S203, after obtaining the gradient of parameter change, the system performs noise filtering and event triggering determination on the calculation results.

[0043] During normal operation, hardware circuits naturally experience signal jitter, and the daily background task scheduling of the operating system also causes minor power consumption fluctuations. To prevent such non-essential load transitions from frequently triggering subsequent intervention mechanisms and consuming processor computing power, the frequency scheduling module 104 acquires the first-order gradient change... Compared with the system's preset benchmark variance threshold Perform comparative analysis. Benchmark variance threshold. Typically, during the hardware initialization phase, multiple consecutive power consumption samples are collected within a specific time window under idle and stable conditions. The standard deviation of this sample interval is calculated and multiplied by a preset confidence coefficient to extract the power consumption. The specific value range can be dynamically scaled according to the thermal design power tolerance specified by the motherboard processor at the factory.

[0044] Furthermore, to prevent the gradient value from exceeding the baseline variance threshold... Frequent edge transitions can create scheduling dead zones. The frequency scheduling module 104 is internally configured with a state de-jitter counter. When the first-order gradient changes... Less than or equal to the baseline variance threshold When the frequency scheduling module 104 determines that the system is currently in a normal operating range and the hardware heat generation is within the natural dissipation capacity of the current heat dissipation system, the system continues the routine polling operation of sub-step S201 and resets the state debouncing counter to zero. When the first-order gradient changes... Greater than the baseline variance threshold If the set de-jitter clock cycle is exceeded, the frequency scheduling module 104 determines that a significant load change event has occurred in the underlying hardware. It determines that the sudden increase in power consumption will be converted into a large amount of heat energy accumulation after a short physical delay. The system then records the current moment as the trigger point of the change and immediately starts the dynamic damping compensation calculation process in step S30.

[0045] See attached document Figure 5 , Figure 5This is a schematic diagram illustrating the dynamic thermal damping compensation calculation principle according to an embodiment of the present invention. In this embodiment, after detecting a significant load change in the underlying hardware, the system calculates the expected heat conduction delay time under the current conditions based on the active heat dissipation status inside the physical chassis. To clearly demonstrate the calculation mechanism of this process, the specific implementation process of step S30 includes: S301, the heat dissipation acquisition module 103 acquires the duty cycle of the cooling fan currently acting on the target hardware area.

[0046] The physical time required for the initial burst of power consumption to be converted into heat and conducted to the remote temperature sensor is constrained by the intensity of forced convection in the environment. The heat dissipation acquisition module 103 extracts the real-time duty cycle signal of the current cooling fan through the pulse width modulation interface on the external motherboard. The duty cycle signal The value range is [0,1], and its magnitude objectively reflects the current airflow velocity inside the chassis. To avoid parameter acquisition blockage and calculation dead zones caused by fan offline or interface hardware damage, the system is configured with a communication timeout detection mechanism in the underlying driver of the pulse width modulation interface. When the heat dissipation acquisition module 103 fails to read valid response data within the specified bus clock cycle, it will send the duty cycle signal of the current cycle. The value is forcibly set to 0 to ensure that subsequent thermal damping compensation calculations can be safely performed under the most conservative no-wind intervention condition. The low-level register reading method of the pulse width modulation controller and the parsing of the duty cycle waveform can be achieved through conventional low-level configuration methods of the microprocessor.

[0047] S302, after obtaining the fluid dynamics parameters, the frequency scheduling module 104 constructs a cross-physical domain fluid dynamics damping attenuation model, and converts the fluid dynamics parameters into quantitative intervention variables of physical conduction time.

[0048] As the heat generated by the computing core unit diffuses to the surrounding area of ​​the printed circuit board, the high-speed cooling fan carries away some of the surface heat, altering the thermal resistance along the original conduction path. This, in turn, delays the time it takes for heat to reach the remote sensor. To describe this process mathematically, the system extracts a reference thermal conduction delay constant loaded in non-volatile memory. With initial thermal damping coefficient The frequency scheduling module 104 constructs an exponential decay function using the natural base. This exponential term converts the mechanical fan speed parameter into a thermodynamic time damping factor, enabling the system to nonlinearly correct the static conduction period based on the current heat dissipation intensity.

[0049] Based on the damping attenuation model constructed above, the frequency scheduling module 104 completes the final calculation of the dynamic heat conduction delay time in sub-step S303. Considering the firmware processing time consumed when the microcontroller performs low-level communication scheduling, the system introduces a fixed compensation time constant. The frequency scheduling module 104 calculates the dynamic heat conduction delay time. The specific formula is: ; In the formula, Characterizes the theoretical time required for heat to be transferred from the heat-generating core to the hysteretic thermodynamic sensing node under current operating conditions. As the reference thermal conduction delay constant, This is the thermal damping coefficient. This refers to the duty cycle of the cooling fan. This is a fixed compensation time constant. This covers the hardware timing overhead caused by low-speed serial bus queuing, carrier sense multiple access arbitration, and operating system context switching. As a preferred approach, this constant... During the system firmware compilation phase, bus communication waveforms and interrupt response signals under a specific microprocessor platform are captured using a logic analyzer or oscilloscope. The actual delay times are calculated, averaged, and then embedded into the code. This calculation model integrates static physical prior knowledge with dynamic device operating states, outputting the dynamic heat conduction delay time. This serves as the core time reference for subsequently seizing the underlying bus and opening a high-frequency monitoring window.

[0050] See attached document Figure 6 , Figure 6 This is a timing diagram for cross-domain frequency mapping and high-frequency priority scheduling according to an embodiment of the present invention. In this embodiment, after calculating the parameters of load mutation and conduction delay, the system performs targeted adaptive reconfiguration of underlying communication resources.

[0051] The specific implementation process of step S40 includes: S401, the frequency scheduling module 104 constructs a logarithmic level mapping model based on the first-order change gradient obtained above, and calculates the corresponding scanning frequency multiplier factor.

[0052] In actual computing node operation, sudden increases in power consumption are often accompanied by transient spikes. Using a simple linear scaling conversion can easily lead to the calculated communication frequency exceeding the physical baud rate limit of the integrated circuit's built-in bus or system management bus, thus increasing the risk of bus deadlock or packet loss. As a preferred approach, the system introduces a natural logarithm function to smoothly reduce the dimensionality of the input parameters. The frequency scheduling module 104 calculates the scanning frequency multiplier factor. The specific formula is: ; In the formula, This is a preset frequency gain coefficient used to adjust the sensitivity of the frequency to changes in load. The first-order gradient of change is calculated by the pre-sampling module 101; This is a pre-set baseline variance threshold for the system. The logarithmic model utilizes an internal increment operation to ensure the validity of logical operations in extreme cases, preventing logarithmic dead zones. Typically, the frequency gain coefficient... The value is set between 0.5 and 2.0, and the specific value can be statically evaluated and tested based on the communication bandwidth redundancy of the motherboard sensor bus controller. This calculation not only ensures a moderate increase in the scanning frequency when the load slightly exceeds the threshold, but also allows the frequency multiplier factor to converge smoothly under extreme load conditions.

[0053] When there are multiple target thermodynamic sensing nodes in the causal mapping matrix M that correspond to the current triggering node, the frequency scheduling module 104 can select to increase all or part of their scanning frequency according to preset hardware priority, physical distance or historical response weight.

[0054] S402, after obtaining the scanning frequency multiplier factor, the system calculates the target frequency and performs preemptive modification of the underlying communication register.

[0055] Frequency scheduling module 104 will use the initial low-frequency polling frequency parameters configured in step S10. The polling frequency multiplier factor calculated above Multiplying these values ​​yields the theoretical target polling frequency. To mitigate the potential risks of system frequency configuration overflow and sensor node response exceeding limits, the system internally configures physical clock limits for the low-speed serial buses. and the upper limit of the polling frequency of the target thermodynamic sensing node. .in, Limited by low-speed serial bus protocols and hardware clock trees, for example, in motherboards using system management bus protocols, the bus physical clock can be configured to standard modes such as 100kHz or 400kHz. The frequency scheduling module 104 determines the frequency based on the data conversion time of the target thermodynamic sensor node, the bus bandwidth margin, and the drive scheduling capability. The frequency scheduling module 104 will then use the theoretical target polling frequency and... A logical comparison is performed, and the smaller value between the two is taken as the final target polling frequency. and within no more than The underlying bus controller's communication clock and polling scheduling parameters are configured under the premise of [previous configuration]. Based on this, considering the potential bus bandwidth exhaustion caused by concurrent sudden changes in multiple electrical nodes, a dynamic bus bandwidth margin assessment mechanism is introduced. When the high-frequency monitoring timing windows corresponding to multiple load change events overlap in time, the frequency scheduling module 104 performs merge scheduling, sequential scheduling, or frequency limiting scheduling on each target thermodynamic sensor node according to a preset priority. For cases where the same target thermodynamic sensor node is triggered simultaneously by multiple preceding parameter nodes, the frequency scheduling module 104 preferentially uses the maximum safe value among the candidate target frequencies as the actual delivery frequency for that target thermodynamic sensor node, and uses the latest time among the end times of each candidate high-frequency monitoring timing window as the actual window end time for that target thermodynamic sensor node, to avoid monitoring omissions caused by repeated register overwriting, repeated window opening, or premature window closing. Before delivering the target frequency, the frequency scheduling module 104 accumulates the requested communication frequencies of each active node on the current bus. If the accumulated value approaches the physical bandwidth limit, the target frequency is scheduled according to a preset hardware priority. Perform proportional attenuation. At a safe target frequency is determined. Subsequently, the frequency scheduling module 104 directly addresses and overwrites the polling cycle register of the corresponding thermodynamic sensor node in the low-speed serial bus controller through the internal bus interface of the baseboard management controller 100. This operation changes the clock cycle of the underlying communication, forcibly shortens the communication polling interval of the physical node, and realizes the directional tilting of communication bandwidth resources.

[0056] S403 After completing the communication frequency boosting operation, the system sets and opens a high-frequency monitoring timing window of the corresponding duration.

[0057] Because the actual heat conduction process is objectively constrained by physical differences at the microscopic level, the dynamic heat conduction delay time calculated in step S30... Statistically, this represents the expected time when heat arrives at the target area. To ensure the system can fully capture the instantaneous change in the hysteresis parameter, a monitoring interval is typically set, starting from the moment the load change is triggered and covering at least the period after the expected time, with a preset buffer duration. The frequency scheduling module 104 extracts the dynamic heat conduction delay time. And add a preset tolerance buffer time. Generate the duration variable of the high-frequency monitoring time series window. Its mathematical logic is expressed as follows: Tolerance buffer time The size depends on the physical distance of the motherboard components. As a preferred calibration method, multiple rounds of thermodynamic stress tests are conducted on motherboards of the same model to extract the standard deviation of the normal distribution of the actual temperature rise arrival time, and three times this standard deviation is set as the tolerance buffer time. This covers occasional variations that may occur during actual transmission. Subsequently, the frequency scheduling module 104 invokes the timing mechanisms available to the baseboard management controller 100, including operating system timers, firmware timers, hardware timers, or combinations thereof, to determine the duration variable. A countdown begins for the overload value. During this window, the system will maintain the increased target frequency. And lock the bus preemption state.

[0058] See attached document Figure 7 , Figure 7 This is a schematic diagram of high-frequency timing window status monitoring and bus arbitration according to an embodiment of the present invention. In this embodiment, after the system completes the reconfiguration of the underlying communication scheduling parameters and sets the high-frequency monitoring timing window, it enters the high-frequency data acquisition stage for the target thermodynamic sensing node. To illustrate the specific execution and anti-collision mechanism of this stage under high-frequency communication conditions, the specific implementation process of step S50 includes: S501, the hysteresis sampling module 102 in the duration variable Within the defined timing window, according to the boosted target frequency High-density data sampling is performed on the target thermodynamic parameter nodes.

[0059] Specifically, the delayed sampling module 102 calculates the current adjacent sampling time interval based on the target frequency. The specific mathematical relationship is expressed as follows: ; The target polling frequency of the target thermodynamic sensing node is set by the hysteresis sampling module 102. To trigger the cycle, a register read command is sent to the target temperature sensor via a low-speed serial bus to extract the real-time temperature value output by its internal analog-to-digital converter. To properly manage the large data stream generated by high-density sampling, the system allocates a fixed-depth circular buffer queue in volatile memory. Continuously acquired sampling data is written to this queue in timestamp order. When the queue reaches its full capacity, newly written data will automatically overwrite the oldest invalid data, thereby avoiding the risk of memory overflow caused by continuous high-frequency sampling.

[0060] Furthermore, considering that the hardware analog-to-digital conversion rate of some traditional temperature sensors has an objective physical limit, if the bus communication frequency... Approaching or exceeding the sensor's conversion limit, the sensor may return an unacknowledged signal or actively pull the clock line low due to insufficient internal data preparation. To avoid data loss and polling dead zones caused by such hardware limitations, the system is configured with an adaptive waiting mechanism in the underlying driver. When the hysteresis sampling module 102 detects an unacknowledged signal or a stretched bus clock state, it actively inserts a hardware idle period of a preset width after the current read command. As a preferred approach, the width of this hardware idle period is typically pre-configured based on the maximum analog-to-digital conversion time parameter specified in the target temperature sensor's datasheet. Reading is only performed after the sensor releases the clock line or completes its internal state update, thus ensuring the integrity of the high-density data sampling stream.

[0061] S502, during the high-density data sampling process described above, the system performs bandwidth contention control among multiple devices.

[0062] Bandwidth contention control is preferably achieved by the frequency scheduling module 104 generating a polling scheduling decision at the firmware or driver layer. The low-speed serial bus controller then executes corresponding access order control, polling clock speed control, and abnormal retry control according to this scheduling decision, thereby arbitrating the access priority of multiple devices. Since the low-speed serial bus typically hosts multiple peripheral monitoring devices, increasing the communication frequency of the target sensor node will inevitably crowd out the shared physical bandwidth. If bus occupancy is not constrained, other non-target nodes on the bus (such as voltage monitoring chips and fan speed reading chips) may trigger system-level device offline alarms due to prolonged failure to obtain a communication token.

[0063] As a preferred approach, the frequency scheduling module 104 is configured with a dynamic polling arbitration strategy with reserved bandwidth. This strategy can manifest as one or a combination of target node priority polling, non-target node guaranteed polling, and delayed retrying for abnormal nodes, and is executed by the bus controller. The system sets a maximum bus occupancy rate threshold for high-frequency monitoring tasks. The threshold value is typically set between 70% and 80% of the total physical bandwidth to reserve basic out-of-band management communication margin. The frequency scheduling module 104, or its cooperating underlying driver, calculates the bus occupancy rate of the target sensor node in real time per unit time. When this rate reaches the maximum bus occupancy rate upper limit threshold... When a new high-frequency polling request to the target sensor node is initiated, the process pauses. Instead, non-target nodes in the waiting queue are scheduled to perform at least one regular low-frequency polling, after which high-frequency access to the target sensor node is resumed. After the regular polling is completed, the token is returned to the target sensor node. This arbitration mechanism ensures that the target thermodynamic parameters obtain high-frequency monitoring resources while avoiding bus starvation and preventing the underlying communication logic from getting deadlocked. The carrier sense and clock stretching mechanism of the low-speed serial bus is implemented based on the standard system management bus protocol specification.

[0064] See attached document Figure 8 , Figure 8 This is a timing diagram for monitoring window reclamation and bus frequency reset according to an embodiment of the present invention. In this embodiment, after completing high-frequency monitoring within the expected time period, the system releases bus bandwidth resources and restores the system state. The specific implementation process of step S60 includes: When the duration variable of the high-frequency monitoring time sequence window When the timer runs out, the timer mechanism generates an expiration notification, which can be an asynchronous interrupt, a timer event, a polling flag, or a combination thereof.

[0065] S601, Perform a secondary check of the thermodynamic state and subsequent recovery decision at the end of the execution window.

[0066] The frequency scheduling module 104 intercepts the interrupt signal and performs a secondary thermodynamic state check. Uncontrollable physical factors such as abnormal external ambient temperature or obstructed internal airflow may delay the heat buildup process of the underlying hardware. If the frequency is directly reduced simply because the timer has run out, the system may miss the actual temperature peak. As a preferred method, the frequency scheduling module 104 extracts the continuous temperature sampling data acquired by the hysteresis sampling module 102 at the end of the window. In the basic implementation, the temperature change gradient... The difference can be calculated based on two adjacent sampling points; in a preferred embodiment, the temperature change gradient... Linear fitting calculations can also be performed based on three or more consecutive sampling points at the end of the window. Temperature change gradient. The calculation formula is expressed as follows: ; In the formula, The current temperature value of the target sensing node; The temperature value from the previous sampling period; This refers to the time interval between adjacent samplings set within the high-frequency window. The temperature rise confirmation threshold is used to determine whether heat has actually been transferred to the target area, and the temperature stabilization threshold... The temperature rise confirmation threshold and the temperature stabilization threshold are used to determine whether the target area is still in a state of continuous temperature rise at the end of the high-frequency monitoring window; these two thresholds can be the same or different. As a preferred embodiment, the temperature rise confirmation threshold and the temperature stabilization threshold can be determined based on any one or a combination of thermal simulation results, prototype calibration results, historical operation statistics, or firmware preset values. The temperature stabilization threshold... The natural dissipation rate of the target motherboard's cooling system was pre-calibrated through thermal simulation, with a typical value ranging from 0.1 to 0.5 degrees Celsius per second. Greater than At this time, it indicates that the target hardware area is still in the heat rise phase, and the system forcibly changes the duration variable. Extend the buffer period by a preset interval to maintain high-frequency monitoring. This preset buffer period is typically set to 10% to 20% of the original window duration to balance monitoring timeliness and bus utilization. Less than or equal to When the peak heat conduction has passed, the hardware has entered the natural cooling range, and the system is authorized to enter the subsequent resource release process.

[0067] S602, after confirming that the thermodynamic state is stable, the frequency scheduling module 104 performs frequency reduction rewriting of the underlying register and release of the bus.

[0068] Frequency scheduling module 104 extracts the low-frequency scan cycle parameters initially backed up in step S10. Considering that abrupt frequency jumps can easily cause transient spikes and glitches on the serial bus clock line, increasing the bit error rate of other devices on the same bus, the frequency scheduling module 104 adopts a stepped frequency reduction strategy. In specific implementation, the system determines the frequency based on the current target frequency. With low-frequency scan period parameters The frequency difference between the two frequencies is divided into several equal parts (e.g., four to five equal parts) as a preset frequency step size. Subsequently, the system successively decreases the target frequency within a fixed clock cycle, gradually overwriting the polling cycle register of the low-speed serial bus controller until the communication frequency smoothly falls back to the low-frequency scan cycle parameter. This operation allows the delayed sampling module 102 to reliably return to the steady-state low-frequency monitoring mode, while simultaneously deactivating the high-frequency priority scheduling state of the target thermodynamic sensing node, allowing physical communication resources to be reallocated to other peripheral nodes mounted on the bus according to the conventional scheduling strategy.

[0069] After the bus frequency returns to a steady state, the S603 system cleans up and reclaims the memory and internal scheduling state.

[0070] The frequency scheduling module 104 sends a cache release command to the system kernel to reclaim space or reset the read / write pointers of the first-in-first-out circular cache queue opened in step S50, in order to avoid memory fragmentation or address out-of-bounds access caused by long-term continuous background monitoring. Simultaneously, the system resets the state debouncing counter inside the pre-sampling module 101 and clears the historical cache queue of first-order change gradients. This series of state reset operations signifies the end of the current cross-domain collaborative monitoring cycle for a specific load mutation event. The baseboard management controller 100 then resumes monitoring of the pre-parameter set. With hysteresis parameter set The system uses regular asynchronous polling to put the entire system into a ready state, waiting for the next load spike. The mapping of the microprocessor interrupt vector table and memory garbage collection can be implemented with reference to the relevant specifications of general embedded operating systems. In some implementations, the system can also perform similar exponential sliding updates or segmented calibration updates on the initial thermal damping coefficient λ based on the fitting deviation between the actual heat conduction delay and the cooling fan duty cycle over multiple rounds.

[0071] See attached document Figure 9 , Figure 9 This is a schematic diagram illustrating the closed-loop processing and adaptive parameter update principle of thermodynamic data according to an embodiment of the present invention. In this embodiment, after completing one high-frequency monitoring cycle, the system further performs extreme value analysis on the collected high-density data and triggers hardware-level thermal protection judgment when necessary. Simultaneously, it adaptively corrects the underlying heat conduction model based on the actual thermal response duration. To explain this closed-loop control mechanism in detail, the specific implementation process of step S70 includes: S701, the substrate management controller 100 performs extreme value extraction and hardware-level thermal protection determination on the thermodynamic data captured within the high-frequency timing window.

[0072] During the aforementioned high-frequency monitoring process, the hysteresis sampling module 102 writes a large amount of transient temperature data into a circular buffer queue. The substrate management controller 100 traverses the valid dataset in this buffer queue and extracts the highest temperature peak value. and the corresponding peak timestamp To prevent irreversible physical damage to computing nodes due to continuous heavy loads, the critical hardware protection thresholds for the corresponding computing core units are pre-programmed into the system's internal non-volatile memory. This critical hardware protection threshold Strictly adhering to the maximum operating temperature specifications of the silicon wafers published by processor manufacturers, typically set within the range of 95 to 105 degrees Celsius. The substrate management controller 100 extracts the highest temperature peak value. With critical hardware protection threshold Perform a logical comparison. When Greater than or equal to At this time, the baseboard management controller 100 usually triggers a non-maskable interrupt through the underlying hardware pins to notify the operating system to perform frequency reduction and throttling or, in extreme cases, directly cut off the motherboard power supply, thereby completing the lowest-level thermal protection hardware cascade action. This hardware-level thermal protection determination is executed independently of the aforementioned adaptive scanning frequency control logic as a safety protection mechanism.

[0073] S702, if the system does not trigger the above power failure protection, the frequency scheduling module 104 adaptively corrects the reference parameters in the fluid dynamics damping attenuation model according to the actual measured physical timing.

[0074] In long-term engineering practice, objective physical aging phenomena such as the drying of thermal grease on printed circuit boards or wear of fan bearings can cause the statically set reference thermal conduction delay constant to be affected. Gradually deviating from the actual physical characteristics, this may cause deviations in monitoring timing. To compensate for this slow, systematic physical drift, the frequency scheduling module 104 extracts the load surge trigger timestamp recorded by the pre-sampling module 101. And combined with the timestamp of the first time the thermodynamic parameters meet the temperature rise confirmation conditions, Calculate the actual heat conduction delay time under the current operating conditions. The relationship between them is as follows: ; The temperature rise confirmation condition can be that the temperature change gradient of the target thermodynamic parameter first exceeds the preset temperature rise confirmation threshold, or that the target thermodynamic parameter, relative to the baseline temperature, first exceeds the preset temperature rise amount threshold. Peak timestamp Used to characterize the highest temperature peak The occurrence time can be used for extreme value analysis, protection determination, or subsequent diagnostic analysis, but it is not considered as the actual heat conduction delay time. The basis for the calculation.

[0075] As a preferred approach, the frequency scheduling module 104 introduces an exponential moving average algorithm with a forgetting factor to dynamically update the baseline heat conduction delay constant. The update formula is specifically expressed as follows: ; In the formula, This is the updated baseline thermal conduction delay constant; This is a historical baseline thermal conduction delay constant left over from the previous cycle; A preset forgetting factor is used to adjust the system's trust in historical data and its response speed to new test data. Considering the strong time inertia of the physical process of hardware aging, the forgetting factor... The value is typically set between 0.90 and 0.99 to effectively filter out parameter jumps caused by occasional measurement errors. This correction mechanism uses statistical methods to smooth out underlying physical noise, ensuring that the calculated expected time delay covariance always matches the actual aging state of the current hardware, largely avoiding timing window misalignment blind spots caused by parameter mismatch during long-term operation.

[0076] S703, the substrate management controller 100 performs background noise compensation for the reference variance threshold of the pre-sampling module 101.

[0077] As the motherboard power management chip and filter capacitors age, the natural fluctuations in underlying electrical parameters tend to increase with the age of the device. If the baseline variance threshold... Maintaining factory static settings will easily lead to frequent and meaningless false alarms due to increased background noise, consuming unnecessary bus computing power. To address this issue, the board management controller 100 extracts the latest continuous power consumption sampling data series and calculates the current standard deviation of the background noise when the system is in a stable, unloaded state (i.e., when the first-order gradient of the pre-parameter is close to zero over multiple consecutive sampling periods). Subsequently, the system uses the formula Calculate the new baseline variance threshold, where This is a fixed margin bias factor, typically set between 1.5 and 2.0. After calculation, the system uses the newly calculated... Covering the old baseline variance threshold Through the aforementioned parameter corrections, the system completes a full monitoring loop from data acquisition and anomaly capture to model self-verification, thereby improving the robustness of the cross-physical domain bus scheduling logic throughout the hardware's lifecycle to a certain extent. The hardware triggering circuit for non-maskable interrupts and the floating-point operation optimization of the exponential moving average algorithm are implemented using conventional techniques in the relevant field. Furthermore, as an optional preferred implementation, the deviation calibration module 105, in addition to performing timing error correction and parameter iterative updates, is also used to perform predictive diagnostic functions based on historical multi-dimensional time-series data.

[0078] See attached document Figure 10 , Figure 10 This is a schematic diagram illustrating the principle of long-term health status assessment and prediction based on a neural network according to an embodiment of the present invention. In this embodiment, after completing the underlying burst extreme value capture and physical parameter self-verification, the system utilizes long-term accumulated multi-dimensional time-series data to construct an intelligent prediction mechanism for the overall health status of the heat dissipation system. The specific implementation process of the prediction and diagnosis function includes: S801, the deviation calibration module 105 performs tensor quantization reconstruction and preprocessing on multidimensional historical data.

[0079] The deviation calibration module 105 extracts the set of preceding parameters (i.e., power consumption fluctuations), the set of hysteresis parameters (i.e., temperature response), and the real-time duty cycle signal of the cooling fan from the system's persistent memory. To enable the neural network to effectively process this cross-physical domain data, the system constructs a fixed-length time-series sliding window. Let the length of this sliding window be... The system extracts continuous The above three-dimensional data from each sampling period are stitched together to form the input tensor. In a single-target link implementation, its dimension can be W×3; in an implementation where multiple preceding parameter nodes, multiple lagging parameter nodes, or multiple heat dissipation status features participate in the modeling simultaneously, its dimension can be expanded to W×C, where C is the number of feature dimensions involved in the prediction. This addresses the issue of insufficient historical data due to system power-on or reset. During the cold start dead zone of each cycle, the deviation calibration module 105 performs zero-filling at the beginning of the tensor matrix to ensure the consistency of the input dimensions. Subsequently, the system uses a maximum-minimum normalization algorithm to scale the input tensor, mapping the physical absolute values ​​of each dimension to the [0,1] interval. To avoid triggering a denominator division-by-zero anomaly when the system is under constant no-load conditions for a long time (i.e., the maximum value equals the minimum value), the system adds a very small preset bias constant to the denominator term of the normalization calculation. (For example, a value of 1×10⁻⁶). For a specific parameter window length... The setting of the sampling point, as a preferred method, is usually selected based on the macroscopic inertial period of heat conduction, with a typical range of 64 to 256 sampling points.

[0080] S802, after completing data preprocessing, the system feeds the normalized tensor into the cascaded temporal neural network for forward computation.

[0081] Considering the physical differences between local power consumption spikes and long-term heat accumulation, the system does not employ a single network but instead constructs a cascaded architecture containing one-dimensional convolutional layers and a long short-term memory (LSM) network. From a mechanics perspective, the one-dimensional convolutional layer excels at capturing local high-frequency features, while the LSM network can maintain long-distance temporal dependencies. In the actual data flow, the input tensor flows into the one-dimensional convolutional layer, which contains multiple convolutional kernels of size 3 or 5. The convolution operation slides along the time axis on the input tensor, responsible for extracting local power consumption abrupt change edges and transient features following temperature changes, and outputting a low-dimensional feature map. To adapt to the input requirements of the next layer, the one-dimensional convolutional layer retains the temporal step dimension of the features, transforming them into sequential feature maps before feeding them into the LSM network. The forget gate and input gate logic within the LSM network can capture the long-term physical delay inertia during heat conduction, outputting a hidden state vector containing temporal dependencies. This hidden state vector is passed to the fully connected layer at the end, where a sigmoid activation function outputs a scalar value. The output value The physical business meaning represents the abnormal probability score of the current heat dissipation system having hidden physical degradation (such as severe drying of thermal grease, slight loosening of heat sink, etc.), and its value range is strictly limited to (0,1).

[0082] S803 performs offline training on cascaded temporal neural networks and then deploys the trained model in a fixed manner.

[0083] The training dataset was derived from telemetry logs accumulated by the same type of computing nodes during aging tests and long-term operation and maintenance. Regarding the definition of sample labels, researchers extracted data segments from the normal operating cycle and labeled them as tags. Data segments that were manually verified to occur just before a radiator failure or thermal interface material failure were tagged. During the training phase, the algorithm engine uses binary cross-entropy as the core loss function for gradient backpropagation. Binary cross-entropy loss function. The specific formula is expressed as follows: ; In the formula, The total number of samples in a single training batch; For the first The true physical label of each sample; Let be the predicted anomaly probability output by the network for the i-th sample. The training process uses an adaptive moment estimation optimization algorithm to iteratively update the weights of the one-dimensional convolutional kernel and the internal matrix parameters of the long short-term memory network until the loss function converges on the validation set. The trained fixed-point model weights are stored in the non-volatile flash memory of the substrate management controller 100 for online inference. During operation, the substrate management controller 100 performs forward inference with fixed model parameters, while model training, structure search, and weight updates are preferably completed offline in an external training environment.

[0084] S804, based on the above reasoning output, the deviation calibration module 105 executes the predictive maintenance business logic.

[0085] The deviation calibration module 105 will calculate the anomaly probability score in real time. With preset risk alarm threshold Compare the results. This risk alarm threshold... Typically, the value is strictly calibrated based on the fault tolerance requirements of data center operations and maintenance, and is generally set between 0.80 and 0.90. When the alarm threshold is exceeded for N consecutive preset evaluation cycles (where N is a positive integer, pre-configurable according to operational fault tolerance requirements), it indicates that physical degradation of the system's conduction structure is occurring, although not triggering a hard crash. At this time, the baseboard management controller 100 proactively sends a standard system event log warning message to the out-of-band management network, prompting data center operations personnel to perform a physical inspection and reapply thermal paste to the node's heat dissipation module during the next maintenance window. This mechanism, to a certain extent, represents a leap from passive downtime protection to proactive health prediction.

[0086] Specific application examples: Deployment architecture and steady-state configuration (corresponding to S10): This system is deployed in an AI inference server equipped with dual CPUs and multiple GPU nodes. The Baseboard Management Controller (BMC) directly connects to the CPU's internal power monitoring unit (front-end parameter node) via its built-in PECI channel (high-speed sideband), and connects to the VRM temperature sensor (hysteresis thermodynamic parameter node) in the motherboard power supply area via the I2C0 bus (low-speed serial bus). During the server's low-load standby phase, the system configures the I2C0 bus with a base scan frequency. At Hz (polling cycle of 5 seconds), the underlying bus bandwidth utilization is less than 2%, and the cooling fan maintains a low speed with a 20% duty cycle.

[0087] Load surges and hardware real-time monitoring interception (corresponding to S20-S50): Seconds: When the server scheduling engine issues a full load of image inference tasks, the instantaneous CPU power consumption jumps from 80W to 350W within 100 milliseconds.

[0088] The high-frequency polling micro-thread of the pre-sampling module captures this action and calculates the first-order gradient of power consumption change. W / s, far exceeding the benchmark variance threshold.

[0089] The frequency scheduling module reads the real-time fan duty cycle (20%) through the PWM controller. If an arbitration hang occurs on the PWM bus at this time, causing a read timeout, the system will trigger a conservative timing defense, forcing the fan to... The dynamic heat conduction delay time was calculated based on the condition of no effective air cooling intervention, and a relatively long high-frequency monitoring timing window was used to prevent the monitoring window from ending prematurely due to unknown heat dissipation status. This read was normal, and the system calculated the expected heat conduction delay time using the thermal damping coefficient. Second.

[0090] After detecting that the I2C0 bus is currently idle, the frequency scheduling module directly addresses the APB bus inside the BMC, overwrites the clock divider register of the I2C0 controller, and synchronously increases the SCL clock frequency with the polling cycle, so that the target frequency of the VRM sensor reaches [the specified frequency]. Hz (sampling interval 0.1 seconds), and open a 4-second high-frequency monitoring window.

[0091] Seconds: Physical heat flow is conducted to the VRM region, and the temperature curve begins to rise sharply. At this time, the system is in the 10Hz high-density sampling period, accurately capturing transient temperature peaks and the maximum point of the first thermodynamic derivative.

[0092] State fallback and underlying closed-loop self-calibration (corresponding to S60-S80): Seconds: The high-frequency monitoring window expires, triggering a timer interrupt. The system verifies the temperature change gradient over the last 500 milliseconds, confirming that the gradient is approaching zero (temperature is under control and stable).

[0093] The frequency scheduling module sends a bus scheduling recovery command to the I2C0 controller or the corresponding monitoring scheduler, rewrites the initial polling configuration parameters, restores the 0.2Hz low-frequency heartbeat polling, and releases the high-frequency priority scheduling resources of the I2C0 bus.

[0094] The deviation calibration module extracted the timestamp record and found that the actual heat conduction delay was 2.6 seconds. The underlying engine directly called the exponential moving average algorithm formula (with the forgetting factor set to 0.95) to process the data stored in Flash. Constant execution write-back fine-tuning eliminates static deviations caused by hardware aging.

[0095] The predictive diagnostic module takes in the three-dimensional sequence tensor of "power consumption-temperature-wind speed", performs forward inference using 1DCNN+LSTM, and outputs a physical degradation score. (Safety) No need to generate maintenance work orders.

[0096] Experimental verification and comparison of core indicators: Under identical hardware testing conditions (ambient temperature 25℃, closed-loop airflow), a step load tester was used to continuously inject dynamic load into the computing nodes for 72 hours, and data was captured from the bus logic analyzer. This system (hereinafter referred to as: ASFC architecture) was compared with the traditional out-of-band management standard process for servers (hereinafter referred to as: fixed polling architecture, constant 1Hz sampling): According to the above experimental table and appendix Figure 11 As can be seen, the out-of-band scheduling and underlying thermal management mechanism of this scheme can be verified through the following indicators. Traditional out-of-band monitoring uses fixed-frequency polling on the I2C / SMBus bus, which easily leads to a problem of difficulty in balancing bus utilization and peak false alarm rate. This scheme uses electrical abrupt events as triggering preconditions, and only within the physical delay window of actual heat conduction, briefly increases the polling frequency of the target thermodynamic sensing node.

[0097] Packet capture data from the logic analyzer shows that, while keeping the capture error of transient temperature peaks within 0.2℃ in the test samples, the global weighted occupancy rate of the low-speed bus decreased from 12.5% ​​to 2.8%. This mechanism reduces invalid redundant polling, frees up the motherboard's out-of-band communication bandwidth, and reduces the probability of arbitration collisions when multiple sensor nodes are concurrent.

[0098] Conventional BMC temperature control relies on absolute threshold triggering by NTC or thermocouples. Due to the low-pass filtering effect of PCB copper plating and heat sink thermal capacitance, physical thermal damping lag is easily generated. This solution directly extracts the first derivative of the preceding power consumption mutation as a feedforward quantity to compensate for the heat conduction time lag. The stress test timing diagram shows that the speed-up intervention delay of the cooling fan PWM duty cycle is shortened from 2.5 seconds in the passive follow state to 0.2 seconds in the pre-response state, thereby improving the timeliness of thermal management under sudden high load scenarios.

[0099] To address long-term physical degradation phenomena such as thermal grease pumping out, thermal grease drying, and fan bearing wear, this solution extracts the three-dimensional temporal characteristics of "power consumption-temperature-fan speed" from the daily temperature control data stream. At the micro-execution layer, the underlying firmware updates the static damping constant in Flash online using an exponential moving average algorithm based on the measured thermal delay difference to compensate for hardware aging drift. At the macro-logic layer, a lightweight model composed of a one-dimensional convolutional neural network and a long short-term memory network performs forward inference, outputting a thermal topology degradation warning with an accuracy rate of 94.2% in the test samples. The above self-calibration and diagnosis reuse the existing motherboard sensing topology, improving the predictive maintenance capability of the board management controller without adding additional sensing hardware.

[0100] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A dynamic scanning frequency control method based on adaptive scanning frequency, characterized in that, include: Obtain the first-order load change gradient of the preceding electrical parameter node within the discrete time window; When it is determined that the first-order load change gradient exceeds the set reference variance threshold and meets the preset state debouncing condition, the target polling frequency of the target thermodynamic sensor node is calculated based on the first-order load change gradient, and a high-frequency monitoring timing window of corresponding duration is generated in combination with the physical conduction delay. The method of obtaining the physical conduction delay includes: obtaining the current duty cycle of the cooling fan, and calculating the expected heat conduction delay time under the current physical environment in combination with the reference heat conduction delay constant, the initial thermal damping coefficient and the current cooling fan duty cycle. By overwriting the polling cycle configuration register corresponding to the target thermodynamic sensing node in the underlying bus controller or monitoring scheduler through the underlying communication bus interface, the polling frequency of the target thermodynamic sensing node is increased to the target polling frequency. During the high-frequency monitoring timing window, data sampling is performed on the target thermodynamic sensing node according to the target polling frequency. When the high-frequency monitoring timing window ends and the recovery conditions are met, the polling frequency of the target thermodynamic sensing node is restored to the initial low-frequency polling frequency.

2. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, The calculation of the target polling frequency of the target thermodynamic sensing node based on the first-order load change gradient specifically includes: A logarithmic mapping model containing a preset frequency gain coefficient is introduced, and the polling frequency multiplier factor is calculated based on the first-order load change gradient. Multiply the polling frequency multiplier factor by the initial low-frequency polling frequency to obtain the theoretical target frequency; The theoretical target frequency is logically compared with the highest polling frequency threshold limited by hardware operating limits, and the smaller of the two values ​​is taken as the final target polling frequency.

3. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, The process of generating a high-frequency monitoring timing window of corresponding duration by combining physical conduction delay specifically includes: Obtain the tolerance buffer time set based on the standard deviation of the normal distribution of thermodynamic pressure test; The expected heat conduction delay time is superimposed with the tolerance buffer time to generate the duration variable of the high-frequency monitoring timing window.

4. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, During the high-frequency monitoring timing window, a bus bandwidth contention control mechanism for multiple devices is executed, which includes: Real-time statistics are collected on the bus occupancy ratio of the target thermodynamic sensing node on the underlying communication bus per unit time. When the bus occupancy rate reaches the set maximum bus occupancy rate threshold, the initiation of new high-frequency polling requests to the target thermodynamic sensing node is paused. The non-target nodes in the waiting queue of the underlying communication bus are scheduled to perform guaranteed polling, and high-frequency access to the target thermodynamic sensing node is resumed after the guaranteed polling is completed.

5. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, When performing data sampling on the target thermodynamic sensing node according to the target polling frequency, an adaptive waiting mechanism is executed, the adaptive waiting mechanism including: When the target thermodynamic sensor node returns an unacknowledged signal or triggers a bus clock stretching state, a hardware idle cycle of a preset width is inserted after the current read instruction. Reading will resume only after the target thermodynamic sensing node releases its clock line or completes its internal state update, and the continuously acquired sampling data will be written into a circular buffer queue in timestamp order.

6. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, The process of satisfying the recovery conditions specifically includes: When the high-frequency monitoring time window is exhausted, the continuous temperature sampling data at the end of the window is extracted for differential calculation or linear fitting calculation to obtain the current temperature change gradient; The temperature change gradient is compared with a preset temperature stability threshold. If the temperature change gradient is greater than the temperature stability threshold, the high-frequency monitoring time window will be extended by a preset buffer period. If the temperature change gradient is less than or equal to the temperature stability threshold, then the recovery condition is determined to be met.

7. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, Restoring the polling frequency of the target thermodynamic sensing node to its initial low-frequency polling frequency specifically includes: Obtain the frequency difference between the target polling frequency and the initial low-frequency polling frequency, and divide the frequency difference into multiple preset frequency steps; A stepped frequency reduction strategy is adopted within a fixed clock cycle. The target frequency is gradually reduced according to the frequency step size, and the polling cycle register is gradually overwritten until the communication polling frequency falls back to the initial low-frequency polling frequency. Send a cache release command to the system kernel to reclaim space or reset read / write pointers in the cache space storing sampled data inside the system.

8. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, After the high-frequency monitoring timing window ends, adaptive correction and compensation are performed on the hardware parameters. The adaptive correction and compensation includes: Extract the load mutation trigger timestamp and the timestamp when the target thermodynamic parameter first meets the temperature rise confirmation condition, calculate the actual heat conduction delay time, and use the exponential moving average algorithm with forgetting factor to dynamically update the reference heat conduction delay constant based on the actual heat conduction delay time. When the system is determined to be in a stable no-load state where the load fluctuation is close to zero within multiple consecutive sampling periods, the continuous power consumption sampling data is extracted to calculate the noise floor standard deviation, and a new benchmark variance threshold is calculated based on the noise floor standard deviation and a fixed margin bias factor to cover the old benchmark variance threshold.

9. The adaptive scanning frequency dynamic control method according to claim 1, characterized in that, After completing at least one round of high-frequency monitoring, a long-term health status assessment and prediction mechanism is also implemented, which includes: Historical data containing a set of pre-existing electrical parameters, a set of hysteresis parameters, and thermal characteristic signals are extracted from the system persistent memory to construct a time series sliding window; After tensor quantization reconstruction and normalization preprocessing of the historical data within the time series sliding window, the data is fed into a cascaded temporal neural network containing a one-dimensional convolutional layer and a long short-term memory network for forward computation and inference. The one-dimensional convolutional layer extracts local power consumption mutation and temperature following features, and the long short-term memory network extracts physical delay inertia features in the heat conduction process. The activation function of the fully connected layer in the cascaded temporal neural network outputs an anomaly probability score, and when the anomaly probability score exceeds the risk alarm threshold for multiple consecutive evaluation cycles, an early warning message is output.

10. An adaptive scanning frequency dynamic control system, used to execute the adaptive scanning frequency dynamic control method as described in any one of claims 1-9, characterized in that, It includes a baseboard management controller, which includes a pre-sampling module, a hysteresis sampling module, a heat dissipation acquisition module, a frequency scheduling module, and a deviation calibration module; The pre-sampling module is used to obtain the first-order load change gradient of the pre-electrical parameter node within the discrete time window. The heat dissipation acquisition module is used to acquire the operating status parameters of the heat dissipation equipment, including the current duty cycle of the cooling fan. The frequency scheduling module is used to calculate the target polling frequency of the target thermodynamic sensor node based on the first-order load change gradient when it is determined that the first-order load change gradient exceeds the set reference variance threshold and meets the preset state debouncing conditions. It then generates a high-frequency monitoring timing window of corresponding duration by combining the physical conduction delay. The physical conduction delay is obtained by combining the reference thermal conduction delay constant, the initial thermal damping coefficient, and the current cooling fan duty cycle to calculate the expected thermal conduction delay time under the current physical environment. The frequency scheduling module is also used to count the bus occupancy ratio of the target thermodynamic sensing node during the high-frequency monitoring timing window, and when the bus occupancy ratio reaches the maximum bus occupancy rate upper limit threshold, schedule non-target nodes to perform guaranteed polling. The frequency scheduling module is also used to restore the polling frequency of the target thermodynamic sensing node to the initial low-frequency polling frequency when the high-frequency monitoring timing window ends and the recovery conditions are met. The deviation calibration module is used to dynamically update the reference thermal conduction delay constant according to the actual thermal conduction delay time, and update the reference variance threshold according to the power consumption sampling data under no-load steady state. The deviation calibration module is also used to output an anomaly probability score based on historical data including a set of pre-amplitude electrical parameters, a set of hysteresis parameters, and heat dissipation characteristic signals, and to output an early warning message when the anomaly probability score meets preset alarm conditions.

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