An enhanced scalable on-chip network packet encapsulation and parsing method

Abstract

This invention belongs to the field of integrated circuit chip design technology, specifically an enhanced and scalable on-chip network data packet encapsulation and parsing method. The method includes: defining a structured data packet with a fixed total bit width, the packet header containing at least a broadcast mask field and a priority field; receiving the data to be transmitted and control parameters; during encapsulation, filling the broadcast mask field according to the communication mode, filling the priority field according to the priority, and encapsulating the data into the payload field according to scenario-based packaging rules; during parsing, parsing the broadcast mask, priority, and payload data in parallel within one clock cycle, and outputting the priority to the arbitration module and the broadcast mask to the broadcast engine. This invention achieves arbitrary subset broadcasting in a single transmission through the broadcast mask, saving 93.75% of bandwidth; supports differentiated scheduling through the priority field; and, combined with single-cycle parallel parsing, achieves 100% path utilization and high real-time performance, adaptable to various parallel computing platforms.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit chip design technology, and in particular to an enhanced and scalable on-chip network data packet encapsulation and parsing method. Background Technology

[0002] As the core communication architecture of multi-core and array-based parallel computing systems, the packet format of on-chip networks directly determines the data transmission efficiency and system flexibility. Current mainstream solutions mostly adopt fixed-format packets based on flow control units (Flit), which have the following main drawbacks: (1) Single function, mainly supporting point-to-point unicast, lacking native support for broadcast / multicast communication, resulting in serious bandwidth waste in scenarios such as weighted data distribution; (2) Lack of priority identifiers, unable to provide differentiated basis for upper-layer arbitration scheduling, making it difficult to meet real-time requirements; (3) Fixed load bit width, not combined with the data characteristics of typical application scenarios, resulting in generally low data path utilization; (4) Poor format scalability, making it difficult to adapt to the customized needs of parallel computing platforms of different scales; (5) The parsing process usually requires multiple clock cycles, resulting in insufficient real-time performance. Therefore, there is an urgent need for a new packet format and method that is fully functional, highly scalable, and highly efficient in parsing. Summary of the Invention

[0003] This invention proposes an enhanced and scalable on-chip network packet encapsulation and parsing method, which aims to solve the technical problems in the existing on-chip network packet format that lacks a field design that simultaneously supports dynamic broadcasting and priority scheduling, and the parsing method that cannot complete the parallel extraction and distribution of broadcast mask and priority field within one clock cycle.

[0004] This invention provides an enhanced and scalable on-chip network packet encapsulation and parsing method, comprising: Step S1: Define a structured data packet framework with a fixed total bit width, and clarify the bit width boundaries between the header field and the expandable payload field; the header field includes at least a broadcast mask field and a priority field, the broadcast mask field is used to dynamically specify any subset of processing units as broadcast targets by setting each bit to 1 or 0, and the priority field is used to identify the transmission priority of the data packet; Step S2: Receive the data to be transmitted and the corresponding transmission control parameters, wherein the parameters include at least the communication mode, target set, and priority; Step S3: Fill the header field according to the communication mode. When the communication mode is broadcast, fill the broadcast mask field according to the target set; fill the priority field according to the received priority; and encapsulate the data to be transmitted into the expandable payload field according to the preset packaging rules to generate a complete data packet. Step S4: Within one clock cycle of receiving a data packet, the packet header fields, including at least the broadcast mask field and the priority field, and the payload data in the scalable payload field are parsed in parallel. Step S5: Output the parsed priority field to the upper-layer arbitration module, output the parsed broadcast mask field to the upper-layer broadcast engine, and output the load data after disassembling it according to the preset packaging rules.

[0005] Furthermore, the packet header field in step S1 also includes a multicast group ID field; in step S3, when the communication mode is multicast, the multicast group ID field is filled according to the target set; in step S5, the parsed multicast group ID field is output to the upper-layer broadcast engine.

[0006] Furthermore, the packet header field in step S1 also includes a unicast target coordinate field; in step S3, when the communication mode is unicast, the unicast target coordinate field is filled according to the target set; in step S5, the parsed unicast target coordinate field is output to the upper-layer routing module.

[0007] Furthermore, the packet header field in step S1 also includes at least one of the following: virtual channel ID field, operation type field, path type field, and sequence number field; in step S3, the above fields are filled in according to the transmission control parameters; in step S5, the parsed virtual channel ID field is output to the upper-layer channel manager.

[0008] Furthermore, the preset packaging rule in step S3 is: according to the data type characteristics of the data to be transmitted, the data to be transmitted is spliced ​​into a data block that matches the bit width of the expandable payload field.

[0009] Furthermore, in step S3, the encapsulation step is completed within one clock cycle, and all header fields are filled simultaneously using parallel field filling technology.

[0010] Furthermore, in step S4, the parsing step uses full-field parallel parsing technology to complete the synchronous extraction of all bit segments in the packet header field within one clock cycle. The extraction includes parallel identification of each bit in the broadcast mask field.

[0011] Furthermore, in step S4, when the packet header field also includes a multicast group ID field, the parallel parsing step simultaneously parses out the multicast group ID field; in step S5, the parsed multicast group ID field is output to the upper-layer broadcast engine.

[0012] Furthermore, in step S5, when the packet header field also includes a multicast group ID field, the parallel parsing step simultaneously parses out the multicast group ID field and outputs it to the upper-layer broadcast engine.

[0013] Furthermore, step S4 or S5 also includes a sequence number verification step: parsing the sequence number field in the packet header field and comparing it with the local expected sequence number to perform packet loss detection or out-of-order reordering.

[0014] The technical effects of the disclosed technical solution are as follows: (1): A structured enhanced data packet with a fixed total bit width was designed, which adds a broadcast mask field, a priority field, and a multicast group ID field to the packet header. The resulting technical effect is that it breaks through the limitation of traditional data packets that only support unicast, and provides unified underlying data support for dynamic broadcast / multicast and priority scheduling of on-chip networks for the first time. Specifically, by independently controlling a target processing unit through each bit of the broadcast mask field, the broadcast of any subset can be completed in a single transmission. In a scenario with 16 processing units, the transmission efficiency is improved by 15 times and the bandwidth is saved by 93.75%.

[0015] (2): A matching full-field parallel encapsulation and parsing method was proposed. The resulting technical effect is that complete encapsulation and parsing within one clock cycle is achieved, breaking through the efficiency bottleneck of traditional multi-cycle parsing, and the encapsulation / parsing efficiency is improved by more than 5 times, which fully meets the real-time transmission requirements of high-speed on-chip networks.

[0016] (3): An expandable field width and scenario-based load packing rules were designed. The resulting technical effects are: the broadcast mask width (e.g., 8 / 16 / 32 bits) can be dynamically adjusted according to the platform scale, and the packing format such as grayscale mode, Sobel mode or MAC mode can be matched according to the application scenario to achieve 100% full load transmission. The data path utilization rate is increased from ≤60% in the traditional solution to 100%, and the transmission throughput is increased by 3 times compared with the traditional 32-bit load solution.

[0017] (4): The data packet format is not limited to a single platform. The resulting technical effect is that it can be seamlessly adapted to all parallel computing and data transmission scenarios such as coarse-grained reconfigurable computing arrays (CGRA), AI acceleration arrays, digital signal processing (DSP) arrays, and multi-core processors. The field bit width supports dynamic configuration of 1-1024 processing units, which greatly reduces the cost of industrial adaptation. Attached Figure Description

[0018] Figure 1 This is a timing flowchart illustrating an enhanced and scalable on-chip network packet encapsulation and parsing method proposed in an embodiment of the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] This invention addresses the problems of existing on-chip network (PCN) packet formats lacking dynamic broadcast and priority scheduling support, as well as low parsing efficiency. The following embodiment is provided, using a PCN system with 16 processing units (4×4 grid) as an example to describe the complete implementation process of this invention. The specific parameters used are: a total packet width of 128 bits, including a 16-bit basic header and a 96-bit expandable payload field; a 16-bit broadcast mask field (corresponding to 16 processing units); and a 3-bit priority field (supporting 8 priority levels). It should be noted that these parameters can be adjusted through compile-time configuration according to the actual platform scale; this embodiment is merely illustrative.

[0021] Step 1: Define the data packet format (corresponding to step S1).

[0022] During the hardware design phase (such as register-transfer level design using Verilog or VHDL), the following structured data packet format is defined.

[0023] The total width of the data packet is fixed at 128 bits, and it is divided into the following three parts: Basic packet header (16 bits): includes packet type (2 bits), operation type (2 bits), virtual channel ID (2 bits), multicast group ID (4 bits), path type (2 bits), sequence number (2 bits), priority (3 bits), and the remaining 1 bit is reserved.

[0024] Broadcast mask field (16 bits): Following the base header, each bit corresponds to a processing unit. Setting it to 1 or 0 dynamically specifies any subset of processing units as the broadcast target.

[0025] in, Figure 1 The header shown is 32 bits, containing a base header (16 bits) and a broadcast mask field (16 bits).

[0026] Scalable payload field (96-bit): Used to carry the valid data to be transmitted.

[0027] In the above format, the broadcast mask field and the priority field are the core features. Each bit of the broadcast mask field independently controls a target processing unit; for example, bit 0 corresponds to processing unit 0, bit 1 corresponds to processing unit 1, and so on. The priority field identifies the transmission priority of the data packet; the larger the value, the higher the priority.

[0028] Step 2: Receive the data to be transmitted and control parameters (corresponding to step S2).

[0029] Set a set of registers or handshake signals at the input of the data packet encapsulation module. When an external host unit (such as a DMA controller or processor core) needs to send data, write the following information to the input interface of the encapsulation module simultaneously: Valid data to be transmitted (96-bit width; if the actual data is insufficient, fill the high bits with 0).

[0030] Communication mode (2 bits): For example, 2'b01 indicates broadcast.

[0031] Target set: If it is broadcast mode, the target set is a 16-bit broadcast mask value (e.g., 16'b1111_1111_1111_1111 represents all 16 units); if it is unicast mode, it is an 8-bit coordinate; if it is multicast mode, it is a 4-bit group ID.

[0032] Priority (3 bits): Value range 0-7.

[0033] Other optional parameters: Virtual Channel ID (2 digits), Operation Type (2 digits), Path Type (2 digits), Serial Number (2 digits, which can be automatically generated by the sender).

[0034] All of the above parameters arrive at the input port of the packaged module in parallel within one clock cycle.

[0035] Step 3: Perform encapsulation (corresponding to step S3).

[0036] This step is completed within one clock cycle and is implemented using fully combinational logic.

[0037] 3.1. Parallel population of header fields.

[0038] The encapsulation module contains a set of parallel field filling units, implemented by hardwire: The input communication mode is directly assigned to the packet type field in the base packet header.

[0039] Assign the input operation type, virtual channel ID, path type, and serial number to the corresponding fields.

[0040] Assign the input priority to the priority field in the base packet header.

[0041] Depending on the communication mode: if it is broadcast mode, the input target set (16-bit mask) is directly assigned to the broadcast mask field; if it is not broadcast mode, the broadcast mask field is set to all 0s.

[0042] If it is a multicast mode, the multicast group ID field is filled; if it is a unicast mode, the unicast target coordinate field is filled (in this embodiment, the unicast target coordinate can occupy the reserved bit in the basic packet header or be extended separately, which is a conventional technology in this field and will not be described in detail).

[0043] All assignment operations are performed simultaneously using parallel bit-concatenation syntax, without creating serial dependencies.

[0044] 3.2 Scenario-based load balancing.

[0045] The encapsulation module includes a scenario-based packaging unit that selects different concatenation rules based on the input data type flags. This embodiment supports the following three rules: Grayscale mode: Three 32-bit RGB pixels are sequentially concatenated into a 96-bit data block (pixel 0 occupies [31:0], pixel 1 occupies [63:32], and pixel 2 occupies [95:64]).

[0046] Sobel mode: Concatenates nine 8-bit pixel data into 72 bits in row-major order in a 3×3 window, and pads the high bits with 24 bits of 0 to form 96 bits.

[0047] MAC mode: Concatenate two 32-bit operands (operand A, operand B) and an 8-bit mode flag to form a 72-bit array, padding the high-order bits with 24 bits of 0, resulting in a 96-bit array.

[0048] The above splicing operation is performed by a multiplexer that selects the corresponding data path based on the data type flag. All operations are completed within a combinational logic cycle of one clock cycle.

[0049] 3.3 Generate a complete data packet.

[0050] The outputs of the parallel field filling unit (each header field) and the output of the contextualized packetization unit (96-bit payload) are combined into a complete data packet via bit concatenation: {base header, broadcast mask, payload}. This data packet is driven to the output port within the same clock cycle and fed into the input buffer of the on-chip network router.

[0051] The encapsulation process described above is implemented entirely with combinational logic, and the total delay from input parameter latching to valid data packet output is less than one clock cycle. The encapsulation accuracy is 100%.

[0052] The data type characteristics must include at least one of the following: image pixel parallelism, data arrangement of the convolution window, and operand combination for multiplication-accumulation operations. However, they are not limited to these. The pattern can be customized (any algorithm is acceptable) depending on what operation the data packet is used with, as long as the pattern format is adjusted according to different algorithms.

[0053] Step 4: Perform parsing.

[0054] The parsing module is located at the output port of each router or the interface of the processing unit. This step is also completed within one clock cycle, using fully combinational logic for parallel parsing.

[0055] 4.1 Parallel parsing of all fields.

[0056] After capturing the input data packet on the rising edge of the clock, the parsing module immediately extracts all fields simultaneously through hard-wired bit slicing operations: Use a fixed bit index to retrieve the following subfields from the base packet header: packet type, operation type, virtual channel ID, multicast group ID, path type, sequence number, and priority.

[0057] Use a fixed-bit index to retrieve the broadcast mask field (16 bits).

[0058] Use a fixed-bit index to retrieve the scalable load field (96 bits).

[0059] The extraction operations described above are performed in parallel, without any serial dependencies or state machine transitions. The extraction of the priority field and the broadcast mask field is completed within the same combinational logic path.

[0060] For each bit of the broadcast mask field, the parsing module simultaneously generates 16 independent output signals (mask[0] to mask

[15] ), each of which directly drives the corresponding processing unit selection line in the broadcast engine.

[0061] 4.2. Distribute synchronously to upper-level functional units.

[0062] Each parsed field is directly driven to its corresponding output port within the same clock cycle: The priority field is output to the request input port of the upper-level arbitration module.

[0063] The broadcast mask field is output to the upper-level broadcast engine.

[0064] The multicast group ID field (if it exists) is output to the broadcast engine for table lookup.

[0065] The unicast target coordinate field is output to the upper-layer routing module.

[0066] The virtual channel ID field is output to the upper-level channel manager.

[0067] The serial number field and package type field are output to the reliability verification module.

[0068] 4.3 Load data breakdown.

[0069] The load splitting unit in the parsing module selects the corresponding depackaging rule based on the packet type field or a pre-configured data type flag: If it is grayscale mode: split the 96-bit payload into three 32-bit pixel data, and output them to three parallel data ports respectively.

[0070] In Sobel mode: the data is split into nine 8-bit pixel data and output to the window buffer of the processing unit in row order.

[0071] If it is in MAC mode: it is split into two 32-bit operands and one 8-bit mode flag, and output to the multiply-accumulate calculation unit.

[0072] This splitting operation is also implemented using combinational logic multiplexers, without adding any extra clock cycles.

[0073] The entire parsing process is completed within one clock cycle, from data packet input latching to signal stabilization at each output port, with a delay of less than one clock cycle. The field parsing accuracy is 100%.

[0074] Step 5: Output data and complete communication.

[0075] The output port of the parsing module is directly connected to the input register of the upper-level functional unit. Upon the arrival of the next rising edge of the clock, these functional units latch the parsing result and perform the corresponding operation: The arbitration module selects the winning request based on priority and controls the cross switch.

[0076] The broadcast engine copies data packets to multiple output ports based on the broadcast mask. When the mask value is 16'b0000_0000_0000_0001, only target processing unit 0 receives data; when the mask value is 16'b1111_1111_1111_1111, all 16 units receive data simultaneously.

[0077] The routing module calculates the next-hop address and forwards the data packet to the adjacent router.

[0078] Once the computation unit obtains the complete operands or pixel data, it begins to perform the computation.

[0079] Preferred solution: Serial number verification.

[0080] This embodiment also includes a serial number verification mechanism. After the parsing module extracts the serial number field, it compares it with the expected serial number register maintained locally at the receiving end: If they are equal, it means that the data packet was transmitted correctly. The data packet is accepted, the expected sequence number is incremented by 1 (mod 16), and an acknowledgment signal is sent back to the sender.

[0081] If they are not equal and the difference is within a reasonable range, it indicates that a packet loss has occurred. The current data packet is discarded and a negative acknowledgment is sent back, requesting the sender to retransmit from that sequence number.

[0082] If the sequence numbers are out of order, the data packets are temporarily cached, and the missing packets are submitted in order after they arrive.

[0083] Additional hardware implementation notes: The above encapsulation and parsing logic is implemented in the hardware description language in the following way: Encapsulation module: Uses always_comb combinational logic blocks to assign values ​​to each field of the output data packet in parallel according to the input signals.

[0084] Parsing module: Uses always_comb combinational logic block to directly assign the values ​​of each field of the input data packet to the output signal through bit index.

[0085] Scenario-based packaging / unpacking: using case statements and bitwise concatenation operators.

[0086] Synthesized using a 28nm process, the critical path delays for the packaging module and the resolution module are 0.42ns and 0.58ns, respectively, which meet the timing requirements for a 1.5GHz clock frequency.

[0087] Through the above steps, this embodiment achieves a 15-fold increase in transmission efficiency and a 93.75% reduction in bandwidth in a broadcast scenario with 16 processing units; data path utilization reaches 100%; and the transmission delay of high-priority data packets (priority 7) does not exceed 10 clock cycles in the worst-case scenario. These effects have been verified through end-to-end testing on an FPGA verification platform.

[0088] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

Claims

1. An enhanced and scalable on-chip network packet encapsulation and parsing method, characterized in that, include: Step S1: Define a structured data packet framework with a fixed total bit width, and clarify the bit width boundaries between the header field and the expandable payload field; the header field includes at least a broadcast mask field and a priority field, the broadcast mask field is used to dynamically specify any subset of processing units as broadcast targets by setting each bit to 1 or 0, and the priority field is used to identify the transmission priority of the data packet; Step S2: Receive the data to be transmitted and the corresponding transmission control parameters, wherein the parameters include at least the communication mode, target set, and priority; Step S3: Fill the packet header field according to the communication mode. When the communication mode is broadcast, fill the broadcast mask field according to the target set; fill the priority field according to the received priority. The data to be transmitted is encapsulated into an extensible payload field according to preset packaging rules to generate a complete data packet; Step S4: Within one clock cycle of receiving a data packet, the packet header fields, including at least the broadcast mask field and the priority field, and the payload data in the scalable payload field are parsed in parallel. Step S5: Output the parsed priority field to the upper-layer arbitration module, output the parsed broadcast mask field to the upper-layer broadcast engine, and output the load data after disassembling it according to the preset packaging rules.

2. The method according to claim 1, characterized in that, The header field in step S1 also includes a multicast group ID field; in step S3, when the communication mode is multicast, the multicast group ID field is filled according to the target set; in step S5, the parsed multicast group ID field is output to the upper-layer broadcast engine.

3. The method according to claim 1, characterized in that, The packet header field in step S1 also includes a unicast target coordinate field; in step S3, when the communication mode is unicast, the unicast target coordinate field is filled according to the target set. In step S5, the parsed unicast target coordinate field is output to the upper-layer routing module.

4. The method according to claim 1, characterized in that, The header field in step S1 also includes at least one of the following: virtual channel ID field, operation type field, path type field, and sequence number field; in step S3, the above fields are filled in according to the transmission control parameters; in step S5, the parsed virtual channel ID field is output to the upper-layer channel manager.

5. The method according to claim 1, characterized in that, The preset packaging rule in step S3 is: according to the data type characteristics of the data to be transmitted, the data to be transmitted is spliced ​​into a data block that matches the bit width of the expandable payload field.

6. The method according to claim 1, characterized in that, In step S3, the encapsulation step is completed within one clock cycle, and all header fields are filled simultaneously using parallel field filling technology.

7. The method according to claim 1, characterized in that, In step S4, the parsing step uses full-field parallel parsing technology to complete the synchronous extraction of all bit fields in the packet header field within one clock cycle. The extraction includes parallel identification of each bit in the broadcast mask field.

8. The method according to claim 1, characterized in that, The specific implementation of parallel parsing in step S4 is as follows: use combinational logic to perform bit slicing operation on the received data packet, and simultaneously separate the broadcast mask field, priority field and other header fields, and synchronously separate the scalable payload field.

9. The method according to claim 1, characterized in that, In step S4, when the packet header field also includes a multicast group ID field, the parallel parsing step simultaneously parses out the multicast group ID field; in step S5, the parsed multicast group ID field is output to the upper-layer broadcast engine.

10. The method according to claim 1, characterized in that, Step S4 further includes a sequence number verification step: parsing out the sequence number field in the packet header field and comparing it with the local expected sequence number to perform packet loss detection or out-of-order reordering.

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