Design method and system for power amplifier

Abstract

The application provides a design method and system for a power amplifier, and relates to the technical field of power amplifier design. The application actively detects the real impedance of a power supply under the current environment and aging degree, and accurately calculates the drain current and voltage drop of the power amplifier at the moment of transmitting a radio frequency signal by using a mathematical method, so that the system can calculate the accurate compensation voltage according to the physical model of the semiconductor, and the compensation voltage is superimposed on the initial bias voltage and then loaded into the gate of the power tube of the power amplifier before the radio frequency signal is output, so that the transconductance characteristic of the power amplifier can be enhanced at the moment of transmitting the radio frequency signal, and the influence of voltage drop on gain is offset at the physical level.

Description

Technical Field

[0001] This invention relates to the field of power amplifier design technology, specifically to a design method and system for power amplifiers. Background Technology

[0002] For devices such as handheld terminals and mobile walkie-talkies, when they transmit high-power data in low-power environments, the power amplifier needs to draw a large current from the power supply momentarily, which causes a momentary drop in the power supply voltage. This is insufficient to support the dynamic range requirements of the power amplifier, resulting in compression of the peak value of the radio frequency signal waveform and causing severe peak clipping distortion.

[0003] In existing technologies, when designing RF circuits containing power amplifiers, compensation methods often employ static compensation with preset fixed parameters or feedback adjustment based on post-monitoring. Fixed parameter methods cannot account for aging drift caused by battery aging over time, often resulting in mismatched compensation amounts. Furthermore, feedback adjustment mechanisms, due to inherent signal processing link delays, cannot complete adjustments at the time of RF signal transmission, making it difficult to effectively suppress signal envelope distortion and meet the demands of modern high-performance communication.

[0004] The information disclosed in the background section is only intended to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a design method and system for power amplifiers to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: The design methodology for power amplifiers includes the following steps: S1: Perform orthogonal experiments on the power amplifier, collect the output power of the power amplifier under different drain voltages, and combine the bilinear interpolation method to generate the drain efficiency model of the power amplifier to reflect the mapping relationship between drain voltage, output power and drain efficiency. S2: In the RF circuit where the power amplifier is located, a preset pulse current is periodically applied to the power supply. The static voltage of the power supply before the pulse current is applied and the load voltage after the pulse current is applied are collected respectively. Then the real-time internal resistance of the power supply is calculated and updated. S3: Before the RF circuit outputs the RF signal, calculate the required output power of the RF signal, and combine the drain efficiency model of the power amplifier to iteratively solve the drain current of the power amplifier during this RF signal output process. S4: Based on the square law model of the power amplifier and the voltage compensation principle of the output power in the RF circuit, a voltage compensation model is constructed, and then the drain current is substituted into the model to calculate the compensation voltage. S5: The compensation voltage is superimposed with the initial bias voltage, and the superimposed composite voltage is then applied to the gate of the power amplifier through the bias network. The increase in the gate bias voltage is used to compensate for the impact of the drain voltage drop on the output power after the output RF signal.

[0007] Preferably, the real-time internal resistance of the power supply is calculated based on the static voltage, load voltage, pulse current, and the static current of the radio frequency current. Specifically, it is the difference between the static voltage and the load voltage, divided by the pulse current.

[0008] Preferably, in step S3, the output power of the radio frequency signal is calculated using the link budget method, and the drain current is solved using the fixed-point iteration method. The process includes: Calculate the drain current under the condition that the drain voltage does not drop, and use it as the initial current for the iterative process; The initial current is substituted into the preset iterative model to calculate the voltage drop caused by the real-time internal resistance of the power supply, and a new drain current is obtained simultaneously. The iteration process is repeated until the absolute difference between two adjacent iterations is less than a preset difference threshold. At this point, convergence is considered achieved, the iteration is complete, and the latest iteration result is output as the final drain current.

[0009] Preferably, the initial current is calculated from the output power, drain efficiency, and static voltage, specifically by dividing the output power by the product of the drain efficiency and the static voltage. The iterative model includes output power, drain efficiency, static voltage, real-time internal resistance, drain current before iteration, and drain current after iteration. Specifically, the drain current after iteration is equal to the output power divided by the product of drain efficiency and sag voltage; where sag voltage is the difference between static voltage and voltage drop, and voltage drop is the product of drain current before iteration and real-time internal resistance.

[0010] Preferably, the construction logic of the voltage compensation model is as follows: By deforming the square-law model of the power amplifier, the mapping equation between the bias voltage at the gate and the drain current of the power amplifier is obtained. Based on the voltage compensation principle of output power in RF circuits, a voltage drop ratio factor is generated, which is the ratio of static voltage to drop voltage minus 1. A voltage compensation model is constructed based on the mapping equation and the voltage drop ratio factor. The left side of the equation in the voltage compensation model is the compensation voltage, and the right side is the product of the mapping equation, the voltage drop ratio factor, and the compensation factor.

[0011] Preferably, the compensation factor is preset in advance and its value ranges from 0.8 to 1.2.

[0012] Preferably, the composite voltage is the sum of the compensation voltage and the initial bias voltage; During the output of a radio frequency signal, a composite voltage is applied to the gate of the power amplifier before the output radio frequency signal, and the timing difference between the composite voltage and the radio frequency signal is less than a preset timing threshold.

[0013] A design system for power amplifiers, the design system being used to execute the above-described design method, specifically including: The data acquisition module is used to perform orthogonal experiments on the power amplifier, acquire the output power of the power amplifier under different drain voltages, and generate a drain efficiency model of the power amplifier by combining the bilinear interpolation method to reflect the mapping relationship between drain voltage, output power and drain efficiency. The internal resistance calculation module is used to periodically apply a preset pulse current to the power supply in the radio frequency circuit where the power amplifier is located, collect the static voltage of the power supply before the pulse current is applied and the load voltage after the pulse current is applied, and then calculate and update the real-time internal resistance of the power supply. The numerical iteration module is used to calculate the required output power of the radio frequency signal before the radio frequency circuit outputs the radio frequency signal, and to iteratively solve the drain current of the power amplifier during the current radio frequency signal output process by combining the drain efficiency model of the power amplifier. The voltage calculation module is used to construct a voltage compensation model based on the square law model of the power amplifier and the voltage compensation principle of the output power in the radio frequency circuit, and then substitute the drain current into the model to calculate the compensation voltage. A voltage loading module is used to superimpose the compensation voltage with the initial bias voltage, and then apply the superimposed composite voltage to the gate of the power amplifier through a bias network. The increase in the gate bias voltage is used to compensate for the impact of the drain voltage drop on the output power after the output RF signal.

[0014] Compared with the prior art, the beneficial effects of the present invention are: This invention actively detects the true impedance of the power supply under the current environment and aging level, and uses mathematical methods to accurately calculate the drain current and voltage drop of the power amplifier at the instant of transmitting the radio frequency signal. This allows the system to calculate an accurate compensation voltage based on the physical model of the semiconductor. The compensation voltage is then superimposed on the initial bias voltage and synchronously applied to the gate of the power transistor in the power amplifier before the radio frequency signal is output. This ensures that the transconductance characteristics of the power amplifier are enhanced at the instant of radio frequency signal transmission, thereby physically offsetting the impact of voltage drop on gain. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the overall method flow of the present invention; Figure 2 This is a schematic diagram of the modular structure of the system designed in this invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments.

[0017] It should be noted that, unless otherwise defined, the technical or scientific terms used in this invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0018] Example: Please see Figure 1 The present invention provides a technical solution: The design methodology for power amplifiers includes the following steps: S1: Perform orthogonal experiments on the power amplifier, collect the output power of the power amplifier under different drain voltages, and combine the bilinear interpolation method to generate the drain efficiency model of the power amplifier to reflect the mapping relationship between drain voltage, output power and drain efficiency.

[0019] In this step, by conducting orthogonal experiments on the power amplifier, the nonlinear coupling relationship between voltage, power, and efficiency can be captured. In other words, it can be determined how much the efficiency of the power amplifier decreases to maintain the same output power when the drain voltage drops from high to low. Furthermore, the bilinear interpolation method means that only a small number of feature points need to be collected to obtain the efficiency over the entire range, reducing the number of experiments and ensuring the continuity and integrity of the data.

[0020] S2: In the RF circuit where the power amplifier is located, a preset pulse current is periodically applied to the power supply. The static voltage of the power supply before the pulse current is applied and the load voltage after the pulse current is applied are collected respectively. Then the real-time internal resistance of the power supply is calculated and updated.

[0021] The real-time internal resistance of the power supply is calculated based on the static voltage, load voltage, pulse current, and RF current. Specifically, it is the difference between the static voltage and the load voltage, divided by the pulse current. The formula is as follows: In the formula Indicates real-time internal resistance. , These represent the static voltage and the load voltage, respectively. This indicates a pulse current.

[0022] Understandably, in practical engineering applications, the power supply is not an ideal voltage source, but rather a series model of a voltage source and its internal resistance. In radio frequency (RF) circuits, when transmitting high-power data, the power amplifier must draw a larger DC current from the power supply to generate a high-power RF signal. This increases the voltage drop across the power supply's internal resistance, causing a momentary decrease in the power supply's output, i.e., a voltage sag. If the power supply voltage is already insufficient (e.g., in a mobile device with a low battery), this voltage sag will lower the power amplifier's breakover limit. If the peak value of the RF signal exceeds the power supply's voltage support range, the signal will experience clipping distortion.

[0023] Furthermore, the internal resistance of a power supply is not constant; it changes with age, ambient temperature, and other factors. Using a fixed internal resistance to calculate voltage compensation would lead to calculation distortion. Therefore, in this step, by actively applying a pulsed current and using an incremental method to calculate the real-time internal resistance of the power supply, we can not only avoid interference from system quiescent current and background noise but also promptly identify changes in the power supply's internal resistance, thereby significantly improving the accuracy of subsequent compensation voltage calculations.

[0024] S3: Before the RF circuit outputs the RF signal, calculate the required output power of the RF signal, and combine the drain efficiency model of the power amplifier to iteratively solve the drain current of the power amplifier during this RF signal output process.

[0025] In step S3, the output power of the radio frequency signal is calculated using the link budget method. Before each data packet is transmitted as an radio frequency signal, the baseband processor calculates the required transmit power based on the current channel quality and communication distance, and then converts it from a dBm scale to a parameter in watts using a linear transformation formula. This ensures the system knows the required output power, allowing for targeted compensation.

[0026] The drain current is solved using a fixed-point iterative method, the process of which includes: Calculate the drain current under the condition of no drain voltage drop, and use it as the initial current for the iterative process. The initial current is calculated by combining the output power, drain efficiency, and quiescent voltage. Specifically, it is calculated by dividing the output power by the product of the drain efficiency and the quiescent voltage. The formula is as follows: In the formula This represents the initial current, and the subscript 0 indicates that 0 iterations have been performed. This indicates the output power required for the radio frequency signal. This indicates the drain efficiency of the power amplifier; The initial current is substituted into a preset iterative model to calculate the voltage drop caused by the real-time internal resistance of the power supply, and a new drain current is obtained simultaneously. The iterative model includes output power, drain efficiency, static voltage, real-time internal resistance, drain current before iteration, and drain current after iteration. Specifically, the drain current after iteration is equal to the output power divided by the product of drain efficiency and sag voltage; where sag voltage is the difference between static voltage and voltage drop, and voltage drop is the product of drain current before iteration and real-time internal resistance, and its functional expression is: In the formula , They represent the first Second and third The drain current of the next step, subscript Index indicating the number of iterations; The iteration process is repeated until the absolute difference between two adjacent iterations is less than a preset difference threshold (usually set between 0.8 and 1 mA). At this point, convergence is considered achieved, the iteration is complete, and the latest iteration result is output as the final drain current.

[0027] As can be seen from the function expression of the iterative model, it simulates the physical negative feedback balance process, namely: the drain current increases - the voltage drop increases - the power supply drop voltage (i.e., the drain voltage) decreases - in order to maintain stable output power, the power amplifier needs to draw more current, which further increases the drain current.

[0028] In this step, the drain current is calculated using the fixed-point iteration method, taking into account the mutual influence between current and voltage. Through multiple approximations, an approximate point of current-voltage balance is found, thus reflecting a more realistic physical meaning. Furthermore, the fixed-point iteration method converges extremely quickly when dealing with such monotonic functions, typically within 2-3 iterations. This makes the system computationally very fast, meeting the requirements for precise timing.

[0029] S4: Based on the square-law model of the power amplifier and the voltage compensation principle of the output power in the RF circuit, a voltage compensation model is constructed, and then the drain current is substituted into the model to calculate the compensation voltage.

[0030] The logic for constructing the voltage compensation model is as follows: By deforming the square-law model of the power amplifier, the mapping equation between the bias voltage at the gate and the drain current of the power amplifier is obtained. The square-law model, also known as the Schichman-Hodges model, describes the relationship between the output current and input voltage of a field-effect transistor (FET) when it operates in the saturation region. Its functional expression is: In the formula Indicates drain current. This represents the carrier mobility of the power transistor in a power amplifier. This represents the gate oxide capacitance of the power transistor. , These represent the width and length of the power transistor, respectively. , , These represent the gate bias voltage, drain voltage (equivalent to the power supply voltage), and threshold voltage, respectively. The modulation coefficient represents the channel length.

[0031] From the physical properties of power transistors, it is known that when the power transistor in a power amplifier is in the saturation region, the drain current is mainly controlled by the gate bias voltage and is insensitive to changes in the drain voltage. Therefore, it can be ignored in calculations. Based on the functional expression of this model, the transconductance of the power transistor can be obtained. The definition of (the ability to convert voltage into current) is: This indicates that the transconductance of the power transistor is linearly positively correlated with the bias voltage. Because of this, when a voltage drop in the power supply causes a decrease in the drain voltage, the saturation point of the power transistor in the power amplifier will drop, resulting in a lower gain. To compensate for this loss, the transconductance of the power transistor needs to be increased by raising the gate bias voltage, thereby enhancing its amplification capability and compensating for the voltage drop.

[0032] After transforming the function, we get: This means that in order to keep the drain current constant (equivalent to keeping the output power constant), the gate bias voltage needs to be adjusted by a square root ratio.

[0033] Based on the voltage compensation principle of output power in radio frequency circuits, a voltage drop ratio factor is generated. Specifically, it is the ratio of static voltage to voltage drop minus 1, and its expression is: As can be seen from the expression for the voltage sag ratio factor, when there is no voltage sag, this term is 0, and the subsequent compensation is also 0. Conversely, the more voltage sags, the greater the voltage drop, and the higher the voltage sag. The smaller this overall value, the larger the voltage drop ratio factor, and the more compensation is required afterward.

[0034] A voltage compensation model is constructed based on the mapping equation and the voltage drop ratio factor. The left side of the voltage compensation model equation is the compensation voltage, and the right side is the product of the mapping equation, the voltage drop ratio factor, and the compensation factor. Its expression is as follows: In the formula Indicates the compensation voltage. This represents the compensation factor. The compensation factor is preset and its value ranges from 0.8 to 1.2.

[0035] Understandably, due to This parameter is only affected by the physical properties of the power transistor; the compensation voltage is actually the voltage applied to the transistor. The increment, and in actual operation, the bias voltage is much greater than Therefore, in order to improve computation speed and ensure that timing requirements are met, the final calculation... The text has been omitted.

[0036] S5: The compensation voltage is superimposed with the initial bias voltage, and the superimposed composite voltage is then applied to the gate of the power amplifier through the bias network. The increase in the gate bias voltage is used to compensate for the impact of the drain voltage drop on the output power after the output RF signal.

[0037] The composite voltage is the sum of the compensation voltage and the initial bias voltage; During the output of an RF signal, a composite voltage is applied to the gate of the power amplifier before the output RF signal, and the timing difference between the composite voltage and the RF signal is less than a preset timing threshold. In other words, it ensures that the rising edge of the composite voltage is aligned with the rising edge of the envelope of the RF signal.

[0038] In this step, by controlling the timing of the composite voltage loading, it can be ensured that the compensation is loaded before the RF signal is output, thereby greatly reducing the voltage drop time after the RF signal is output, thus ensuring good linearity in all output processes.

[0039] Please see Figure 2 The present invention also provides a design system for a power amplifier, which is used in the above-mentioned design method, and specifically includes: a data acquisition module, an internal resistance calculation module, a numerical iteration module, a voltage calculation module, and a voltage loading module.

[0040] The data acquisition module is used to perform orthogonal experiments on the power amplifier, collect the output power of the power amplifier under different drain voltages, and generate the drain efficiency model of the power amplifier by combining the bilinear interpolation method to reflect the mapping relationship between drain voltage, output power and drain efficiency. The internal resistance calculation module is used to periodically apply a preset pulse current to the power supply in the RF circuit where the power amplifier is located, collect the static voltage of the power supply before the pulse current is applied and the load voltage after the pulse current is applied, and then calculate and update the real-time internal resistance of the power supply. The numerical iteration module is used to calculate the required output power of the RF signal before the RF circuit outputs the RF signal, and to iteratively solve the drain current of the power amplifier during the current RF signal output process by combining the drain efficiency model of the power amplifier. The voltage calculation module is used to construct a voltage compensation model based on the square law model of the power amplifier and the voltage compensation principle of the output power in the RF circuit, and then substitute the drain current into the model to calculate the compensation voltage. The voltage loading module is used to superimpose the compensation voltage with the initial bias voltage, and then apply the superimposed composite voltage to the gate of the power amplifier through the bias network. The increase in gate bias voltage is used to compensate for the impact of the drain voltage drop on the output power after the output RF signal.

[0041] The above formulas are all dimensionless calculations. The formulas are derived from software simulations based on a large amount of collected data to obtain the most recent real-world results. The preset parameters in the formulas are set by those skilled in the art according to the actual situation.

[0042] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented in software, the above embodiments can be implemented, in whole or in part, as a computer program product. Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution.

[0043] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0044] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A design method for power amplifiers, characterized in that, The specific steps include: S1: Perform orthogonal experiments on the power amplifier, collect the output power of the power amplifier under different drain voltages, and combine the bilinear interpolation method to generate the drain efficiency model of the power amplifier to reflect the mapping relationship between drain voltage, output power and drain efficiency. S2: In the RF circuit where the power amplifier is located, a preset pulse current is periodically applied to the power supply. The static voltage of the power supply before the pulse current is applied and the load voltage after the pulse current is applied are collected respectively. Then the real-time internal resistance of the power supply is calculated and updated. S3: Before the RF circuit outputs the RF signal, calculate the required output power of the RF signal, and combine the drain efficiency model of the power amplifier to iteratively solve the drain current of the power amplifier during this RF signal output process. S4: Based on the square law model of the power amplifier and the voltage compensation principle of the output power in the RF circuit, a voltage compensation model is constructed, and then the drain current is substituted into the model to calculate the compensation voltage. The construction logic of the voltage compensation model is as follows: By transforming the square-law model of the power amplifier, we obtain the mapping equation between the gate bias voltage and the drain current of the power amplifier, and the functional expression is: In the formula Indicates drain current. This represents the carrier mobility of the power transistor in a power amplifier. This represents the gate oxide capacitance of the power transistor. , These represent the width and length of the power transistor, respectively. , , These represent the gate bias voltage, drain voltage (equivalent to the power supply voltage), and threshold voltage, respectively. Modulation coefficients representing channel length; Based on the voltage compensation principle of output power in radio frequency circuits, a voltage drop ratio factor is generated, the specific expression of which is: In the formula This represents the voltage drop ratio factor. Indicates real-time internal resistance. Indicates static voltage. Indicates the first The drain current of the next iteration, subscript Index indicating the number of iterations; A voltage compensation model is constructed based on the mapping equation and the voltage drop ratio factor. The expression of the voltage compensation model is as follows: In the formula Indicates the compensation voltage. This represents the compensation factor; the compensation factor is preset and its value ranges from 0.8 to 1.

2. S5: The compensation voltage is superimposed with the initial bias voltage, and the superimposed composite voltage is then applied to the gate of the power amplifier through the bias network. The increase in the gate bias voltage is used to compensate for the impact of the drain voltage drop on the output power after the output RF signal.

2. The design method for a power amplifier according to claim 1, characterized in that: The real-time internal resistance of the power supply is calculated based on the static current of the static voltage, load voltage, pulse current, and radio frequency current. The specific calculation formula is as follows: In the formula Indicates the load voltage. This indicates a pulse current.

3. The design method for a power amplifier according to claim 2, characterized in that: In step S3, the output power of the radio frequency signal is calculated using the link budget method, and the drain current is solved using the fixed-point iteration method. The process includes: Calculate the drain current under the condition that the drain voltage does not drop, and use it as the initial current for the iterative process; The initial current is substituted into the preset iterative model to calculate the voltage drop caused by the real-time internal resistance of the power supply, and a new drain current is obtained simultaneously. The iteration process is repeated until the absolute difference between two adjacent iterations is less than a preset difference threshold. At this point, convergence is considered achieved, the iteration is complete, and the latest iteration result is output as the final drain current.

4. The design method for a power amplifier according to claim 3, characterized in that: The initial current is calculated from the output power, drain efficiency, and static voltage, and the specific calculation formula is as follows: In the formula This represents the initial current, and the subscript 0 indicates that 0 iterations have been performed. This indicates the output power required for the radio frequency signal. This indicates the drain efficiency of the power amplifier; The iterative model includes output power, drain efficiency, static voltage, real-time internal resistance, drain current before iteration, and drain current after iteration. Specifically, the drain current after iteration is equal to the output power divided by the product of drain efficiency and sag voltage; where sag voltage is the difference between static voltage and voltage drop, and voltage drop is the product of drain current before iteration and real-time internal resistance; the functional expression of the iterative model is: In the formula Indicates the first The drain current of the next iteration.

5. The design method for a power amplifier according to claim 4, characterized in that: The composite voltage is the sum of the compensation voltage and the initial bias voltage; During the output of a radio frequency signal, a composite voltage is applied to the gate of the power amplifier before the output radio frequency signal, and the timing difference between the composite voltage and the radio frequency signal is less than a preset timing threshold.

6. A design system for power amplifiers, characterized in that: The design system is used to execute the design method as described in any one of claims 1-5, specifically including: The data acquisition module is used to perform orthogonal experiments on the power amplifier, acquire the output power of the power amplifier under different drain voltages, and generate a drain efficiency model of the power amplifier by combining the bilinear interpolation method to reflect the mapping relationship between drain voltage, output power and drain efficiency. The internal resistance calculation module is used to periodically apply a preset pulse current to the power supply in the radio frequency circuit where the power amplifier is located, collect the static voltage of the power supply before the pulse current is applied and the load voltage after the pulse current is applied, and then calculate and update the real-time internal resistance of the power supply. The numerical iteration module is used to calculate the required output power of the radio frequency signal before the radio frequency circuit outputs the radio frequency signal, and to iteratively solve the drain current of the power amplifier during the current radio frequency signal output process by combining the drain efficiency model of the power amplifier. The voltage calculation module is used to construct a voltage compensation model based on the square law model of the power amplifier and the voltage compensation principle of the output power in the radio frequency circuit, and then substitute the drain current into the model to calculate the compensation voltage. A voltage loading module is used to superimpose the compensation voltage with the initial bias voltage, and then apply the superimposed composite voltage to the gate of the power amplifier through a bias network. The increase in the gate bias voltage is used to compensate for the impact of the drain voltage drop on the output power after the output RF signal.

Images