Method and device for generating process flowchart, computer device and storage medium

Abstract

The application relates to the technical field of industrial informatization, and discloses a process flowchart generation method and device, computer equipment and a storage medium. The method comprises the following steps: performing character rule analysis on original character data to determine a target topology matrix; performing semantic mapping and shape deduction based on the target topology matrix and a preset process list to obtain target node attributes; performing region calculation based on the target node attributes to obtain parallel stage parameters; and performing obstacle avoidance connection generation based on the parallel stage parameters and a preset safety constant to obtain a target flowchart. The method has the beneficial effect that the certainty deduction of global layout is realized through pre-region calculation, and a heavy third-party layout engine does not need to be relied on. The non-crossing orthogonal connection generation is realized through a safety channel, and manual dragging of nodes and connection lines is not needed, so that the process flowchart conforming to the industrial specification can be quickly generated in a lightweight front-end environment, and the process document preparation efficiency and the standardization level are greatly improved.

Description

Technical Field

[0001] This application relates to the field of industrial information technology, and in particular to a method, apparatus, computer equipment, and storage medium for generating process flow diagrams. Background Technology

[0002] In related technologies, methods for generating flowcharts typically rely on complex drag-and-drop component libraries. Since they cannot directly generate corresponding parallel / serial logic diagrams based on process texts, they suffer from low drawing efficiency. Therefore, a method for generating flowcharts that can efficiently and accurately draw process specifications is needed. Summary of the Invention

[0003] This application aims to at least partially solve one of the technical problems in related technologies. To this end, this application proposes a method, apparatus, computer equipment, and storage medium for generating a process flow diagram. The main technical solutions adopted in this application include: In a first aspect, this application provides a method for generating a process flow diagram, the method comprising: parsing character rules using raw character data to determine a target topology matrix; performing semantic mapping and shape deduction based on the target topology matrix and a preset process list to obtain target node attributes; performing region calculation based on the target node attributes to obtain parallel stage parameters; and generating obstacle avoidance connections based on the parallel stage parameters and preset safety constants to obtain the target flow diagram.

[0004] Automatic conversion from one-dimensional text instructions to multi-dimensional topological matrices is achieved through character rule parsing, eliminating the need for users to manually configure complex structured data. Adaptive adjustment of node geometry is achieved through semantic mapping and shape deduction, eliminating the need for users to manually switch node shapes. Deterministic deduction of the global layout is achieved through pre-region calculation, eliminating the need for heavy-duty third-party layout engines. Orthogonal connections without intersections are generated through secure channels, eliminating the need for manual adjustment of connection positions. The overall solution eliminates the need for manual dragging and dropping of nodes and connections, enabling rapid generation of process flow diagrams conforming to industrial standards in a lightweight front-end environment. This significantly improves the efficiency and standardization of process document preparation, while ensuring real-time synchronization of data and graphics.

[0005] Optionally, the parallel stage parameters include intra-group node parameters and inter-group boundary parameters of at least one parallel group in the target process; obstacle avoidance connection generation is performed based on the parallel stage parameters and preset safety constants to obtain the target flowchart, including: extending the inter-group boundary parameters using preset safety constants to obtain safe position data of the parallel group; performing path planning based on the safe position data and intra-group node parameters to obtain a branch connection sequence; and generating obstacle avoidance connections based on the branch connection sequence to obtain the target flowchart.

[0006] By extending a preset safety constant to generate a dedicated safety channel, and using an internal and external separation routing mechanism to generate non-intersecting orthogonal connections, the problem of easy intersection and manual adjustment of connections in traditional flowcharts is completely solved. At the same time, it maintains lightweight operation characteristics and can quickly generate process flow diagrams that conform to industrial standards in the front-end environment.

[0007] Optionally, path planning is performed based on safe location data and intra-group node parameters to obtain a branch connection sequence, including: determining branch parameters of the parallel group based on safe location data; wherein the branch parameters include the inlet coordinates and outlet coordinates of the parallel group; performing inter-group routing based on the inlet coordinates and outlet coordinates to obtain an external connection sequence; performing intra-group routing based on intra-group node parameters to obtain an internal connection sequence; and combining the external connection sequence and the internal connection sequence to obtain a branch connection sequence.

[0008] By splitting path planning into two independent levels, inter-group routing and intra-group routing, and using preset safe channels to generate orthogonal connections, the system ensures that all connections will not intersect or overlap with nodes without the need for complex physical collision detection algorithms, thus greatly improving the efficiency and standardization of connection generation.

[0009] Optionally, region calculation is performed based on target node attributes to obtain parallel stage parameters, including: calculating the bounding size based on target node attributes and preset layout parameters to obtain the current bounding parameters; performing boundary verification based on the current bounding parameters to obtain the line break determination result; if the line break determination result indicates that line break processing is required, performing global line break adjustment to obtain the adjusted layout parameters; repeating the above bounding size calculation, boundary verification processing, and global line break adjustment based on target node attributes and adjusted layout parameters until the current bounding parameters meet the preset boundary conditions, and using the adjusted layout parameters to determine the parallel stage parameters.

[0010] By iteratively calculating the bounding size, verifying the boundaries, and adjusting global line wrapping, the optimal number of nodes and layout size for each row are determined through pure mathematical deduction before graphics rendering. This eliminates the need for complex physical collision detection and third-party layout engines, achieving layout calculations with linear time complexity. This significantly improves front-end efficiency while ensuring that all nodes are fully displayed within the rendering area, avoiding the problem of nodes exceeding the boundaries.

[0011] Optionally, character rule parsing is performed using the original character data to determine the target topology matrix, including: performing order reduction recognition processing based on the original character data to obtain stage character data; performing order expansion recognition processing based on the stage character data to obtain branch character data; and performing node extraction and ordered reconstruction based on the branch character data to obtain the target topology matrix.

[0012] Through hierarchical expansion and reduction recognition processing and ordered reconstruction, unstructured one-dimensional text rules are transformed into standardized multi-dimensional topological data structures, enabling direct conversion from minimal text instructions to complex process logic. This eliminates the need to rely on highly structured object representations (such as JSON) data sources, significantly reducing the user input threshold and data processing complexity.

[0013] Optionally, semantic mapping and shape deduction are performed based on the target topology matrix and the preset process list to obtain the target node attributes, including: semantic recognition based on the target topology matrix and the preset process list to obtain the semantic recognition result; and shape rendering and attribute deduction based on the semantic recognition result to obtain the target node attributes.

[0014] First, semantic recognition is performed to obtain a set of valid nodes. Then, the shape and size attributes of the nodes are automatically deduced based on the semantic matching results. This realizes the automatic mapping of process semantics to graphic rendering attributes, eliminating the need for users to manually specify the shape and size of each node. This ensures the standardization and consistency of flowchart drawing and further reduces the user's operating threshold.

[0015] Optionally, semantic recognition is performed based on the target topology matrix and the preset process list to obtain semantic recognition results, including: traversing the array based on the target topology matrix to obtain node record results; performing validity checks based on the node record results and the preset process list to obtain validity check results; and updating the node record results based on the validity check results to obtain semantic recognition results.

[0016] An ordered traversal of the target topology matrix yields complete node record results. Combined with a pre-defined process list for validity checks and updates, this automatically filters invalid nodes and empty branches, effectively resolving common issues in industrial input such as discontinuous or out-of-bounds sequence numbers. It also prevents program crashes due to node addressing failures, significantly improving system fault tolerance and stability.

[0017] Secondly, this application provides an apparatus for generating a process flow diagram, the apparatus comprising: The character parsing module is used to parse character rules from raw character data in order to determine the target topology matrix; The mapping and deduction module is used to perform semantic mapping and shape deduction based on the target topology matrix and the preset process list to obtain the target node attributes; among which, the target node attributes are used to describe the rendering attributes of the nodes in the target process. The region calculation module is used to perform region calculations based on the target node attributes to obtain parallel stage parameters; wherein, the parallel stage parameters include intra-group node parameters and inter-group boundary parameters of at least one parallel group in the target process; The obstacle avoidance connection module is used to generate obstacle avoidance connections based on parallel stage parameters and preset safety constants to obtain the target flowchart.

[0018] Thirdly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of any of the methods described above.

[0019] Fourthly, this application also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of any of the methods described above. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0021] Figure 1a This is a flowchart of a process flow diagram generation method according to an embodiment of this application; Figure 1b This is a schematic diagram of a process flow diagram provided according to an embodiment of this application; Figure 2 This is a flowchart of a method for determining target node attributes according to an embodiment of this application; Figure 3 This is a flowchart of a method for determining a target flowchart according to another embodiment of this application; Figure 4 This is a structural block diagram of a process flow diagram generation apparatus according to an embodiment of this application; Figure 5 This is an internal structural diagram of a computer device provided according to an embodiment of this application. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0023] It should be noted that since most of the related technologies adopt a manual interactive mode with a visual canvas, users need to drag and drop nodes to the specified positions one by one and manually draw the connections. There is no automatic mapping relationship between the process text and the flowchart graphics. Once the process content changes, both the text and graphics need to be modified simultaneously, which not only increases the amount of repetitive work, but also easily leads to data inconsistency due to manual transcription.

[0024] Meanwhile, the tools in the relevant technologies cannot recognize the business semantics of the process text, and the geometry of the nodes needs to be manually switched by the user according to the process type, making it difficult to guarantee the standardization of the drawing. For complex process flow diagrams containing multi-branch parallel logic, the automatically generated connections often have a large number of intersections and overlaps, requiring a lot of time for manual adjustment, and the original layout is easily destroyed during the adjustment process.

[0025] In addition, the automatic layout function in related technologies mostly relies on heavy third-party directed acyclic graph layout engines, which have high operating resource consumption, cannot run stably in lightweight front-end environments or offline states, and are difficult to achieve convenient access and use across terminals, which seriously restricts the efficiency and standardization of process flow diagram compilation.

[0026] Based on this, according to the embodiments of this application, an embodiment of a method for generating a process flow diagram is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0027] This embodiment provides a method for generating a process flow diagram, such as... Figure 1a As shown, the method includes the following steps: S110. Use the original character data to perform character rule parsing in order to determine the target topology matrix.

[0028] The raw character data can refer to one-dimensional string data describing the serial or parallel logical relationships between processes in the process flow, which is directly input by the user. For example, the user can input a string like "1-3, 4-6; 7" in the flowchart generation interface, which is the raw character data.

[0029] The target topology matrix can refer to a multi-dimensional data structure that precisely maps the sequential dependencies and parallel execution states between processes. For example, it can be a hierarchical array containing serial and parallel structure objects, which can be directly recognized by the computer and used for subsequent graphics rendering.

[0030] Specifically, using the original character data to parse character rules in order to determine the target topology matrix can include: first, performing a reduction-order recognition process based on the original character data to obtain stage character data; then, performing an expansion-order recognition process based on the stage character data to obtain branch character data; and finally, performing node extraction and ordered reconstruction based on the branch character data to obtain the target topology matrix.

[0031] It should be noted that the raw character data may exist in various input formats, containing different types of delimiters and writing rules. To ensure that the machine can uniformly and accurately interpret the user's intent, a unified set of feature delimiters can be predefined. These feature delimiters can refer to a set of boundary symbols used to identify different logical levels in the process flow, specifically including decrement symbols for dividing serial stages and expansion symbols for dividing parallel branches. The meanings represented by these feature delimiters are predefined and adhere to the same set of definition rules as the raw character data.

[0032] Among them, the reduction recognition processing can refer to the processing method of detecting reduction symbols and performing reduction division, that is, detecting whether there are reduction symbols in the original character data used to divide serial stages. If they exist, the strings before and after the reduction symbol are divided into two independent substrings to obtain character data of multiple stages.

[0033] The character data in this stage can refer to a string fragment that no longer contains decrementing characters. Each stage of character data corresponds to an independent major process stage (such as a set of tasks executed in parallel or a serial step), and the order of the character data in each stage is strictly consistent with the order of the original character data input by the user.

[0034] Specifically, a preset descent character (such as a semicolon ";") can be used to perform descent recognition on the original character data. That is, the original character data is traversed from beginning to end. Whenever a descent character is encountered, that position is used as a split point. The string before the split point is treated as a stage of character data, and the remaining part is processed. After the traversal is complete, the last string also becomes the last stage of character data. This splits the original string into a set of ordered stage character data, containing multiple substrings, and each substring no longer contains descent characters.

[0035] For example, suppose the user inputs the original character data as "1-3, 4-6; 7". The system uses the semicolon ";" as a delimiter for splitting. During the traversal, each semicolon is encountered and a split is made, resulting in the first stage of character data "1-3, 4-6" and the remaining second stage of character data "7".

[0036] Subsequently, the character data at each stage is subjected to expanded-level recognition processing.

[0037] Specifically, expansion identification processing can refer to a processing method that detects expansion symbols and divides the data. That is, it detects whether there are expansion symbols in the character data of the detection stage that are used to divide parallel branches. If they exist, the strings before and after the expansion symbol are divided into multiple independent branch strings.

[0038] Branch character data can refer to string segments that no longer contain expansion characters. Each branch character data corresponds to a specific process range or a single process number, and branch character data within the same stage maintains its original order in the string.

[0039] For example, continuing with the previous example, let's assume the comma "," is used as the expansion character. Then, for the stage character data "1-3, 4-6", the system, upon detecting the comma, will split it into two branch character data: "1-3" and "4-6". For the stage character data "7", since it doesn't contain a comma, it will be treated as a branch character data. Ultimately, we get three branch character data: "1-3", "4-6", and "7", with the first two branch character data having attributes of the first stage, and the third branch character data having attributes of the second stage.

[0040] It should be noted that if the stage character data obtained after the reduction process does not contain any expansion characters, it means that the original character data indicates a purely serial process flow. In this case, the expansion identification process will not generate any dividing points, and the stage character data obtained after the reduction process can be directly used as the only branch character data.

[0041] Furthermore, after obtaining the branch character data, node extraction and ordered reconstruction can be performed based on the branch character data to obtain the target topology matrix.

[0042] Specifically, for each branch character data, the system first identifies whether it contains a connector (e.g., a hyphen "-"). If a connector is present, all process numbers between the two numbers before and after the connector (including both ends) are extracted to form a node list. If no connector is present, the number is directly treated as a node. Then, according to the stage order of the branch character data and the original order of branches within the same stage, the extracted node list is assembled into a multi-dimensional data structure containing stages (each stage corresponds to a serial step), branches (parallel stages contain multiple branches, serial stages contain only one branch), and specific node numbers. This serves as a target topology matrix that accurately reflects the sequential dependencies (serial) and parallel execution relationships between processes.

[0043] For example, continuing with the above example, if the branch character data "1-3" contains a connector, then all nodes are extracted to obtain 1, 2, and 3. Similarly, for the branch character data "4-6", nodes 4, 5, and 6 are extracted; for the branch character data "7", node 7 is extracted. Then, according to the original order: the first stage contains two branches, namely nodes [1, 2, 3] and nodes [4, 5, 6] (indicating parallel execution). The second stage contains one branch, namely node [7] (indicating serial execution). Finally, the target topology matrix is ​​obtained, which clearly expresses the logical relationship that "processes 1 to 3 are executed in parallel with processes 4 to 6, and then converge to execute process 7".

[0044] Through hierarchical expansion and reduction recognition processing and ordered reconstruction, unstructured one-dimensional text rules are transformed into standardized multi-dimensional topological data structures, enabling direct conversion from minimal text instructions to complex process logic. This eliminates the need to rely on highly structured JSON data sources, significantly reducing the user input threshold and data processing complexity.

[0045] S120. Based on the target topology matrix and the preset process list, perform semantic mapping and shape deduction to obtain the target node attributes.

[0046] It should be noted that, in order to achieve automatic mapping between process information and graphical nodes, a preset process list can be maintained in the system in advance.

[0047] This preset process list represents the mapping relationship between node number, specific process name, and the corresponding graphic rendering attribute of the process. That is, it not only defines the specific process corresponding to the node number, but also specifies the shape presented by the process (such as rectangle or rhombus).

[0048] Specifically, the preset process list can be determined by reading the assembly process card filled in by the user before the current flowchart drawing task, or it can be manually entered by the user in the flowchart generation interface.

[0049] Specifically, after constructing the target topology matrix, the system sequentially traverses all nodes in the target topology matrix, searches for the corresponding process name and rendering attributes in the preset process list according to the node number, and then determines the geometric shape (such as rectangle or rhombus) and size of each node based on the rendering attributes. Finally, it integrates the rendering-related parameters of all nodes to obtain the global target node attributes.

[0050] The target node attribute describes the rendering attributes of nodes in the target process. The target process is the entire technological process defined by the user using raw character data. Each node is the graphic unit corresponding to each specific step in the process. The rendering attributes include the shape type (rectangle or rhombus), width and height of each node, and the text content and format within the node. For example, if the user-defined target process includes six steps: "cleaning, assembly, testing, packaging, inspection, and warehousing," then each step corresponds to one node, and each node has independent rendering attributes.

[0051] S130. Perform region calculations based on target node attributes to obtain parallel stage parameters.

[0052] It should be noted that since the flowchart rendering area has fixed boundaries and cannot be extended infinitely horizontally or vertically, if all nodes are arranged directly according to the original logic, the nodes will exceed the rendering area. Therefore, it is necessary to divide the target process into multiple parallel groups that meet the boundary requirements through region calculation, so that subsequent calculations can be performed based on its parallel stage parameters.

[0053] The parallel stage parameters can refer to a set of parameters that can describe the overall layout characteristics of the parallel execution stage in the process flow, including intra-group node parameters and inter-group boundary parameters of at least one parallel group in the target process.

[0054] In this context, a parallel group can refer to an independent layout unit divided by row or column in the process flow. Each parallel group corresponds to a row or column of node arrangement area and can participate in the global layout calculation as an independent black box.

[0055] Intra-group node parameters refer to a set of parameters that describe the arrangement characteristics of each child node within the parallel group. Specifically, these can include the total number of nodes in the group, the preset width, preset height, and positioning point of each node. The positioning point can be a reference point on the canvas where the node is positioned, such as the top-left corner or center point of the node; there are no restrictions, but all nodes must use the same positioning rules. Inter-group boundary parameters refer to a set of parameters that describe the overall outer contour dimensions of the parallel group, including the maximum horizontal width and cumulative vertical height of the parallel group.

[0056] For example, please refer to Figure 1bThe document displays a flowchart of a specific process flow, including a first parallel group 101 in the first row, a second parallel group 102 in the second row, and a third parallel group 103 in the third row. The first parallel group includes "Process 1", "Process 2", "Process 3", "Process 4", and "Process 5"; the second parallel group 102 includes "Process 6", "Process 7", "Process 8", "Process 9", and "Process 10"; and the third parallel group 103 includes "Process 11", "Process 12", and "Process 13". Node parameters within each group can include the specific shape and size of each process, while boundary parameters between groups can include the total width and height of the overall rectangular area of ​​each parallel group.

[0057] Specifically, firstly, the bounding size is calculated based on the target node attributes and preset layout parameters to obtain the current bounding parameters; then, boundary verification is performed based on the current bounding parameters to obtain the line break determination result; subsequently, if the line break determination result indicates that line break processing is required, global line break adjustment is performed to obtain the adjusted layout parameters; then, the adjusted layout parameters are used as the new preset layout parameters, and the above bounding size calculation, boundary verification processing, and global line break adjustment are repeated until the current bounding parameters meet the preset boundary conditions, and then the parallel stage parameters are determined using the adjusted layout parameters.

[0058] The preset layout parameters can refer to the node arrangement strategy for each parallel group as defined by the user, i.e., the preset number of nodes. For example, when arranging each parallel group in a row-based manner, the preset layout parameters can refer to the number of nodes expected to be placed in the current row; when arranging each parallel group in a column-based manner, the preset layout parameters can refer to the number of nodes expected to be placed in the current column.

[0059] The current bounding parameter can refer to the total bounding data required for the parallel group calculated based on the current preset layout parameters. If a row layout is used, the current bounding parameter refers to the total width required for the row in the horizontal direction; if a column layout is used, the current bounding parameter refers to the total height of the column in the vertical direction.

[0060] For example, let's take a row-based layout as an example. First, based on preset layout parameters (such as the preset number of nodes N for a single row), the preset width and preset height values ​​of the first N nodes to be placed in the current row (i.e., the current parallel group) are extracted sequentially from the target node attributes. Then, combined with the preset horizontal spacing between nodes, the total width of all nodes in this row is calculated (the total width is equal to the sum of the widths of each node and the sum of the horizontal spacing between each node). This total width is the current enclosing parameter.

[0061] Then, boundary verification is performed based on the current enclosing parameters to obtain the line break determination result.

[0062] Specifically, the current bounding parameters can be compared with the valid parameters of the preset rendering area. The valid parameters of the preset rendering area are the total canvas parameters minus the safety margins reserved on the left and right sides. This determines whether the nodes of the current row can be fully displayed in the rendering area, thus obtaining the line break determination result.

[0063] The line break determination result can refer to the binarized result indicating whether the current parallel group needs line break adjustment. That is, if the current bounding parameter is greater than the effective width of the preset rendering area, it means that the parallel group under the current preset layout parameters cannot be completely rendered within the preset area, and the output result indicates that line break processing is required. Conversely, if the current bounding parameter is less than or equal to the effective width of the preset rendering area, it means that the parallel group under the current preset layout parameters can be completely rendered, and the output result indicates that line break processing is not required.

[0064] Furthermore, if the line break determination result indicates that no line break processing is required, then the attribute parameters of the N nodes in the current row are directly used as the intra-group node parameters, and the current enclosing parameter and the total height of the row are used as the inter-group boundary parameters, and the parallel stage parameters of the parallel group are obtained by combining them.

[0065] If the line break determination result indicates that line break processing is required, then perform a global line break adjustment to obtain the adjusted layout parameters.

[0066] Specifically, global line break adjustment can refer to decreasing the number of single-line planning nodes in the preset layout parameters to obtain an updated number of single-line planning nodes, which is then used as the adjusted layout parameters. For example, if the current number of single-line planning nodes is 6, and the line break determination result indicates that a line break is required, then the number of single-line planning nodes is adjusted to 5, resulting in the adjusted layout parameters.

[0067] Subsequently, under the adjusted layout parameters, the bounding size is calculated again based on the target node attributes and the adjusted layout parameters to obtain the updated current bounding parameters. Boundary verification is then performed based on the updated current bounding parameters to obtain a new line break determination result. The above steps of bounding size calculation, boundary verification, and global line break adjustment are repeated until the new round of current bounding parameters meets the preset boundary conditions.

[0068] Understandably, this preset boundary condition means that the current bounding parameter is less than or equal to the effective width of the preset rendering area. Then, the node attributes corresponding to the final adjusted layout parameters are used as the intra-group node parameters, and the final current bounding parameter and the total height of the row are used as the inter-group boundary parameters, combining them to obtain the parallel stage parameters for this parallel group.

[0069] By iteratively calculating the bounding size, verifying the boundaries, and adjusting global line wrapping, the optimal number of nodes and layout size for each row are determined through pure mathematical deduction before graphics rendering. This eliminates the need for complex physical collision detection and third-party layout engines, achieving layout calculations with linear time complexity. This significantly improves front-end efficiency while ensuring that all nodes are fully displayed within the rendering area, avoiding the problem of nodes exceeding the boundaries.

[0070] S140. Obstacle avoidance connections are generated based on parallel stage parameters and preset safety constants to obtain the target flowchart.

[0071] It should be noted that related technologies often generate flowchart connections by directly connecting the center of nodes, which easily leads to problems such as lines crossing nodes and lines overlapping, requiring a lot of manual adjustments. In contrast, this solution introduces the concept of preset safety constants to achieve the generation of orthogonal connections without crossing or overlapping.

[0072] Among them, the preset safety constant can refer to the numerical parameter that defines the minimum safe distance between the connection and the node, that is, a predefined offset value or safety margin, which is used to extend the boundary of the parallel group outward, thereby reserving a dedicated safe channel for the connection.

[0073] Specifically, obstacle avoidance connection generation based on parallel stage parameters and preset safety constants to obtain the target flowchart can include: first, using preset safety constants to extend the inter-group boundary parameters to obtain safe position data for each parallel group; then, performing path planning based on the safe position data and intra-group node parameters to obtain a branch connection sequence, i.e., the set of path instructions required to connect each node; finally, generating corresponding Scalable Vector Graphics (SVG) connection elements based on the branch connection sequence, and assembling them with the SVG elements of all nodes to obtain the complete target flowchart.

[0074] In the above implementation, automatic conversion from one-dimensional text instructions to multi-dimensional topological matrices is achieved through character rule parsing, eliminating the need for users to manually configure complex structured data. Adaptive adjustment of node geometry is achieved through semantic mapping and shape deduction, eliminating the need for users to manually switch node shapes. Deterministic deduction of the global layout is achieved through pre-region calculation, eliminating the need to rely on heavy third-party layout engines. Orthogonal connections without intersections are generated through secure channels, eliminating the need for manual adjustment of connection positions. The overall solution eliminates the need for manual dragging and dropping of nodes and connections, enabling rapid generation of process flow diagrams conforming to industrial standards in a lightweight front-end environment. This significantly improves the efficiency and standardization of process document preparation, while ensuring real-time synchronization of data and graphics.

[0075] In some implementation methods, please refer to the appendix. Figure 2Based on the target topology matrix and a preset process list, semantic mapping and shape deduction are performed to obtain the target node attributes, including: S210. Perform semantic recognition based on the target topology matrix and the preset process list to obtain the semantic recognition result.

[0076] Specifically, semantic recognition based on the target topology matrix and the preset process list to obtain semantic recognition results may include: first, traversing the array based on the target topology matrix to obtain node record results; then, performing validity checks based on the node record results and the preset process list to obtain validity check results; and finally, updating the node record results based on the validity check results to obtain semantic recognition results.

[0077] The node record result can refer to an ordered array of all process numbers extracted in logical order from the target topology matrix. That is, a list of numbers formed by extracting all node numbers in sequence according to the stage and branch order recorded in the target topology matrix, which reflects the process logical structure described by the target topology matrix.

[0078] Specifically, a depth-first or breadth-first traversal can be performed according to the hierarchical structure of the target topology matrix, visiting each node in turn, and recording the node index in an array according to the visiting order, thereby obtaining the node recording result.

[0079] It should be noted that this process does not involve matching process names and attributes; it only involves the orderly collection and recording of serial numbers.

[0080] For example, assuming the target topology matrix contains a first-stage parallel branch [1-3], [4-6] and a second-stage serial branch [7], then the node record result obtained after traversing the array is [1, 2, 3, 4, 5, 6, 7]. Similarly, if there are non-contiguous indices in the target topology matrix, such as [1-3], [7], the node record result will still record all indices in the traversal order, that is, [1, 2, 3, 7].

[0081] Subsequently, a validity check is performed based on the node record results and the preset process list to obtain a valid check result.

[0082] The validity check result can be a comprehensive verification result that reflects whether the sequence numbers of each process in the node record are valid. It can include a list of valid nodes, a list of invalid nodes, and a marker for missing sequence numbers, indicating whether each process number exists in the preset process list.

[0083] For example, assuming the node record result of the target topology matrix is ​​[1, 2, 3, 4, 5, 6, 7], and the preset process list records processes 1 to 6 but not process 7, then the valid verification result output after the validity check can include: valid nodes [1, 2, 3, 4, 5, 6], and invalid nodes [7].

[0084] Optionally, during the node extraction and validity verification process based on the target topology matrix, a bistable flag capture algorithm can be used to handle scenarios where serial numbers are discontinuous or out of bounds, which may occur in industrial inputs.

[0085] Specifically, suppose that a node range expression in the target topology matrix contains a hyphen (e.g., "1-6"), indicating that all nodes between the starting index (index 1) and the ending index (index 6) need to be extracted. In this case, the system does not rely on the method of continuously accumulating the indexes, but instead uses a bistable probe to traverse the ordered array of the preset process list.

[0086] For example, a trigger probe can first be set to an initial state of being off. Then, the ordered array of the preset process list is traversed sequentially (the numbers in the array are arranged in natural ascending order). When the probe matches the starting number (e.g., number 1), the trigger probe flips to the on state, and the system begins to record all nodes encountered during the traversal (including the currently matched starting node).

[0087] Then continue traversing. When the probe matches the end sequence number (e.g., sequence number 6), record the current node (i.e., the end node), reset the trigger probe to the off state, and immediately interrupt the traversal loop.

[0088] It is important to note that if the system fails to find an end number after traversing to the physical end of the pre-defined process list's ordered array, it will record all nodes from the starting number to the end of the array as the node extraction result for that range expression. If the final recorded node array has a length of 0 (e.g., the starting number itself does not exist in the pre-defined process list), this empty node list can be silently discarded and not included in the final node record result, thus completely preventing program crashes caused by node addressing failures.

[0089] The node record results can then be updated using the valid verification results to obtain the semantic recognition results.

[0090] Specifically, based on the valid verification results, all process numbers marked as invalid can be removed from the node record results to obtain the semantic recognition results.

[0091] It should be noted that if the valid verification results show that all process numbers in the node record results exist in the preset process list, then the node record results can be directly used as semantic recognition results.

[0092] An ordered traversal of the target topology matrix yields complete node record results. Combined with a pre-defined process list for validity checks and updates, this automatically filters invalid nodes and empty branches, effectively resolving common issues in industrial input such as discontinuous or out-of-bounds sequence numbers. It also prevents program crashes due to node addressing failures, significantly improving system fault tolerance and stability.

[0093] S220. Based on the semantic recognition results, perform shape rendering and attribute deduction to obtain the target node attributes.

[0094] Specifically, after obtaining the semantic recognition result, the system can sequentially traverse each valid node number in the semantic recognition result and look up the corresponding process name and rendering attribute (such as the default shape type of the process: rectangle or rhombus) from the preset process list based on the number.

[0095] For example, the system maintains a preset keyword semantic dictionary, which contains predefined special words such as "inspection", "test" and "check" to trigger shape mutations.

[0096] Before rendering the shape based on the semantic recognition results, the system inputs the extracted semantic recognition results into the dictionary for matching. If a keyword is matched (e.g., the process name is "quality inspection"), the system changes the rendering instruction label of the node from the default rectangle ( <rect x=".." y=".." width=".." height=".." / > Forced switch to polygon ( <polygon points="..." / > This changes the geometry of the node. If the keyword is not matched, the default rectangle shape type is retained.

[0097] Then, for each node, the geometric parameters required for rendering are determined based on its shape type. For example, for a rectangular node, its width and height need to be determined. For a rhombus node, the relative coordinates of its four vertices need to be calculated based on the preset width and height. In addition, the display parameters of the text inside the node need to be pre-calculated based on the length of the process name and the node size. Then, the shape type, size parameters, and process name of the node are integrated to determine the rendering attributes of the node.

[0098] For example, if the semantic recognition result contains node 5, its process name is obtained from the preset process list as "quality inspection". After matching the preset keyword semantic dictionary, the rendering shape is determined to be a rhombus. Then, according to the preset size specification, the width of the rhombus is determined to be 140 pixels (px) and the height is 60px. These parameters together constitute the rendering attributes of node 5.

[0099] Finally, by systematically integrating the rendering attributes of all nodes globally, the attributes of the target node can be obtained.

[0100] It should be noted that the target node attributes obtained here only include the node's inherent rendering attributes and have not yet been assigned absolute physical coordinates. However, its width, height, shape type, text content, and other parameters have been determined and can be directly used in subsequent region calculation steps.

[0101] In the above implementation, semantic recognition is first performed to obtain a set of valid nodes, and then the shape and size attributes of the nodes are automatically deduced based on the semantic matching results. This realizes the automatic mapping of process semantics to graphic rendering attributes, eliminating the need for users to manually specify the shape and size of each node, ensuring the standardization and consistency of flowchart drawing, and further reducing the user's operating threshold.

[0102] In some implementation methods, please refer to the appendix. Figure 3 Obstacle avoidance connections are generated based on parallel stage parameters and preset safety constants to obtain the target flowchart, including: S310. Extend the boundary parameters between groups using preset safety constants to obtain the safe position data of the parallel groups.

[0103] Among them, the safe position data can refer to the set of size parameters after the overall outer contour of the parallel group is safely expanded. That is, the new rectangular size data is obtained by expanding the inter-group boundary parameters of the parallel group (i.e., the original total width and total height of the parallel group) at equal intervals in the four directions of up, down, left and right according to the preset safe constant.

[0104] It should be noted that this safety location data is still relative size data and does not yet include absolute coordinate information, but its width and height already include the space occupied by the dedicated safety passage required for the connection.

[0105] Specifically, the system acquires the inter-group boundary parameters for each parallel group, including the maximum horizontal width and cumulative vertical height of the group. Then, using a preset safety constant (e.g., 30 pixels) as a reference, the maximum horizontal width and cumulative vertical height in the inter-group boundary parameters are extended in all directions. That is, the system extends the maximum horizontal width and cumulative vertical height by a preset safety constant distance on the left, right, top, and bottom of the parallel group, respectively, and calculates the total width and total height after extension, which are used as the safe position data for the parallel group.

[0106] For example, if the boundary parameters between parallel groups are a width of 900px and a height of 60px, and the preset safety constant is 30px, then after extending 30px outwards on the left and right sides, the total width is 900 + 30 × 2 = 960px, and after extending 30px outwards on the top and bottom sides, the total height is 60 + 30 × 2 = 120px. Finally, the safe position data of the parallel group is a width of 960px and a height of 120px.

[0107] S320. Based on the safe location data and the parameters of the nodes within the group, perform path planning to obtain the branch connection sequence.

[0108] The branch connection sequence refers to a set of path instructions that can be used to guide the drawing of specific connections; that is, a standardized set of path instructions used to guide the rendering of SVG connections. Each instruction includes the coordinates to move to and the type of connection (horizontal or vertical). This sequence is arranged in the order of execution, and the system can directly generate SVG connection elements based on this sequence.

[0109] Specifically, path planning is performed based on safe location data and intra-group node parameters to obtain a branch connection sequence, including: first, determining the branch parameters of the parallel group based on the safe location data; then, performing inter-group routing based on the inlet and outlet coordinates to obtain the external connection sequence; intra-group routing can also be performed based on intra-group node parameters to obtain the internal connection sequence; finally, the external connection sequence and the internal connection sequence are combined to obtain the branch connection sequence.

[0110] Among them, the branch parameters can refer to the data set describing the specific connection point coordinates of the parallel group on the canvas, that is, the reference point coordinates of the parallel group participating in the global connection, which can include the entry coordinates and exit coordinates of the parallel group.

[0111] The entry coordinates can include the branch entry coordinates and the node entry coordinates, and the exit coordinates can include the branch exit coordinates and the node exit coordinates of the current parallel group.

[0112] Specifically, taking a row-based layout as an example, the branch entry coordinates refer to the coordinates of the access point on the left safe channel of the entire parallel group, used to receive connections from the previous parallel group. The node entry coordinates refer to the coordinates of the midpoint of the left border of the first node within the parallel group, used as the starting point for connecting routes within the group. Similarly, the exit coordinates include the branch exit coordinates (the point on the right safe channel of the entire parallel group used to lead connections to the next parallel group) and the node exit coordinates (the coordinates of the midpoint of the right border of the last node within the parallel group).

[0113] Furthermore, to support complex orthogonal routing, the route midpoint can be determined based on secure location data. This route midpoint can refer to a reference point used for turning across parallel groups of lines.

[0114] For example, please continue to refer to Figure 1bFor the first parallel group 101, the midpoint of its left border is the branch entry coordinate, and the midpoint of the left border of the first node in the group is the node entry coordinate. The midpoint of its right border (B2) is the branch exit coordinate, and the midpoint of the right border of the last node in the group (B1) is the node exit coordinate. The route midpoint can include the left route midpoint (i.e., the lower left corner C1 of the coordinate area corresponding to the safe location data) and the right route midpoint (i.e., the lower right corner C2 of the coordinate area corresponding to the safe location data).

[0115] Specifically, the system calculates the absolute rectangular area occupied by the parallel group based on the safe position data (i.e., the total width and total height after extension) and the current global cursor position (i.e., the absolute coordinates of the upper left corner of the parallel group on the canvas).

[0116] Then, based on the preset node size and spacing, the absolute coordinates of each node are obtained from the node parameters within the group, and the midpoints of the left and right borders of each node are calculated. Specifically, the midpoint of the left border of the first node is the node's entry coordinate, and the midpoint of the right border of the last node is the node's exit coordinate. Simultaneously, the midpoint of the left side of the rectangle is the branch's entry coordinate, the midpoint of the right side is the branch's exit coordinate, and the bottom left and bottom right vertices are the route's midpoints, thus completing the determination of the branch parameters.

[0117] Furthermore, inter-group routing is performed based on the ingress and egress coordinates to obtain the external connection sequence, and intra-group routing is performed based on the intra-group node parameters to obtain the internal connection sequence.

[0118] The external connection sequence can refer to the set of path coordinate points connecting different parallel groups. It is defined by a set of path instructions that connect the exit of the previous parallel group to the entrance of the current parallel group, and connect the exit of the current parallel group to the entrance of the next parallel group.

[0119] Specifically, during inter-group routing, multi-segment path points are generated in the following order: the exit coordinates of the current parallel group node, the exit coordinates of the current parallel group branch, the midpoint of the current parallel group's right route, the midpoint of the next parallel group's left route, the entry coordinates of the next parallel group's branch, and the entry coordinates of the next parallel group node, forming an external connection sequence. For example, please refer to... Figure 1b After obtaining the node exit coordinates B1 of the current parallel group, the branch exit coordinates B2 of the current parallel group, the right route midpoint C2, the left route midpoint C1, the branch entry coordinates A1 of the next parallel group, and the node entry coordinates A2 of the next parallel group, multiple connection instructions are generated in the above order to form an external connection sequence. The external connection sequence can be: from B1 to the right to B2; from B2 down to C2; from C2 to the left to C1; from C1 down to A1; from A1 to the right to A2.

[0120] An internal connection sequence can refer to the set of path coordinates connecting adjacent nodes within the same parallel group. Similarly, when performing intra-group routing, based on the node entry coordinates (midpoint of the left border) and node exit coordinates (midpoint of the right border) of each node in the group's node parameters, horizontal connection instructions can be generated from the node exit coordinates of the previous node to the node entry coordinates of the next node, arranged in the order of the nodes. This forms an orderly internal connection sequence.

[0121] Finally, following the execution order of the process flow, all external and internal connection sequences are sequentially concatenated. For example, the connections from the previous parallel group to the current parallel group in the external connection sequence can be placed first, followed by the internal connection sequences within the current parallel group, and then the connections from the current parallel group to the next parallel group in the external connection sequence. All parallel groups are processed in sequence to obtain the complete branch connection sequence.

[0122] By splitting path planning into two independent levels, inter-group routing and intra-group routing, and using preset safe channels to generate orthogonal connections, the system ensures that all connections will not intersect or overlap with nodes without the need for complex physical collision detection algorithms, thus greatly improving the efficiency and standardization of connection generation.

[0123] S330. Generate obstacle avoidance connections based on the branch connection sequence to obtain the target flowchart.

[0124] Specifically, the system iterates through each instruction in the branch connection sequence. Each instruction includes the start coordinates, end coordinates, and connection type (horizontal or vertical). The system generates the corresponding SVG path element based on the instruction. <path>) or polyline element ( <polyline>The system sets appropriate stroke colors, line widths, and arrow markers (e.g., endpoint arrows). Simultaneously, based on the previously obtained target node attributes, the system generates SVG graphic elements (rectangles or polygons) for each node, along with their internal text elements. Finally, all generated SVG elements are inserted into an SVG container in layer order (nodes first, then lines, or lines first, then nodes, depending on specific requirements) to form a complete process flow diagram, i.e., the target flow diagram. This target flow diagram can be directly rendered and displayed on a webpage or exported as an image, Portable Document Format (PDF), or other formats.

[0125] In the above implementation, a dedicated safety channel is generated by extending the preset safety constant, and a routing mechanism that separates the internal and external connections is used to generate non-intersecting orthogonal connections. This completely solves the problem that traditional flowchart connections are prone to intersection and require manual adjustment, while maintaining lightweight operation characteristics and enabling the rapid generation of process flow diagrams that conform to industrial standards in the front-end environment.

[0126] It should be understood that although the steps in the flowchart above are shown sequentially as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowchart above may include multiple steps or stages, which are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps.

[0127] This specification also provides a process flow diagram generation apparatus 400, such as... Figure 4 As shown, it includes: a character parsing module 410, a mapping deduction module 420, a region calculation module 430, and an obstacle avoidance connection module 440, wherein: The character parsing module 410 is used to parse character rules using the original character data in order to determine the target topology matrix.

[0128] The mapping and deduction module 420 is used to perform semantic mapping and shape deduction based on the target topology matrix and the preset process list to obtain the target node attributes.

[0129] The region calculation module 430 is used to perform region calculations based on the target node attributes to obtain parallel stage parameters.

[0130] The obstacle avoidance connection module 440 is used to generate obstacle avoidance connections based on parallel stage parameters and preset safety constants to obtain the target flowchart.

[0131] In some implementations, the parallel phase parameters include intra-group node parameters and inter-group boundary parameters of at least one parallel group in the target process; the obstacle avoidance connection module 440 is further used to extend the inter-group boundary parameters using preset safety constants to obtain safe position data of the parallel group; perform path planning based on the safe position data and intra-group node parameters to obtain a branch connection sequence; and generate obstacle avoidance connections based on the branch connection sequence to obtain the target flowchart.

[0132] In some implementations, the obstacle avoidance connection module 440 is further configured to determine the branch parameters of the parallel group based on safe location data; wherein the branch parameters include the entrance coordinates and exit coordinates of the parallel group; perform inter-group routing based on the entrance coordinates and exit coordinates to obtain an external connection sequence; perform intra-group routing based on intra-group node parameters to obtain an internal connection sequence; and combine the external connection sequence and the internal connection sequence to obtain a branch connection sequence.

[0133] In some implementations, the region calculation module 430 is further configured to calculate the bounding size based on the target node attributes and preset layout parameters to obtain the current bounding parameters; perform boundary verification based on the current bounding parameters to obtain the line break determination result; if the line break determination result indicates that line break processing is required, perform global line break adjustment to obtain the adjusted layout parameters; and repeat the above-mentioned bounding size calculation, boundary verification processing, and global line break adjustment based on the target node attributes and adjusted layout parameters until the current bounding parameters meet the preset boundary conditions, and use the adjusted layout parameters to determine the parallel stage parameters.

[0134] In some implementations, the character parsing module 410 is also used to perform a reduction-order recognition process based on the original character data to obtain stage character data; perform an expansion-order recognition process based on the stage character data to obtain branch character data; and perform node extraction and ordered reconstruction based on the branch character data to obtain the target topology matrix.

[0135] In some implementations, the mapping and deduction module 420 is also used to perform semantic recognition based on the target topology matrix and the preset process list to obtain semantic recognition results; and to perform shape rendering and attribute deduction based on the semantic recognition results to obtain the target node attributes.

[0136] In some implementations, the mapping and deduction module 420 is also used to perform array traversal based on the target topology matrix to obtain node record results; to perform validity verification based on the node record results and the preset process list to obtain validity verification results; and to update the node record results based on the validity verification results to obtain semantic recognition results.

[0137] For specific limitations regarding the apparatus for generating a process flow diagram, please refer to the limitations regarding the method for generating a process flow diagram described above, and will not be repeated here. Each module in the aforementioned apparatus for generating a process flow diagram can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0138] In this embodiment, the process flow diagram generation device is presented in the form of functional units. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0139] Please see Figure 5 , Figure 5 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application, such as... Figure 5 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processor can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on an external input / output device (such as a display device coupled to the interface). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations. Figure 5 Take a processor 10 as an example.

[0140] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GPA), or any combination thereof.

[0141] The memory 20 stores instructions executable by at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiments.

[0142] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0143] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0144] The computer device also includes an input device 30 and an output device 40. The processor 10, memory 20, input device 30, and output device 40 can be connected via a bus or other means. Figure 5 Taking the example of a connection between China and Israel via a bus.

[0145] Input device 30 can receive input numerical or character information, and generate key signal inputs related to user settings and function control of the computer device, such as a touchscreen, keypad, mouse, trackpad, touchpad, joystick, one or more mouse buttons, trackball, joystick, etc. Output device 40 may include display devices, auxiliary lighting devices (e.g., LEDs), and haptic feedback devices (e.g., vibration motors). The aforementioned display devices include, but are not limited to, liquid crystal displays, light-emitting diodes, displays, and plasma displays. In some alternative embodiments, the display device may be a touchscreen.

[0146] This application also provides a computer-readable storage medium. The methods described in this application can be implemented in hardware or firmware, or implemented as recordable on a storage medium, or implemented as computer code downloaded over a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and subsequently stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code. When the software or computer code is accessed and executed by the computer, processor, or hardware, the methods shown in the above embodiments are implemented.

[0147] The apparatus, module, or unit described in the above embodiments can be implemented by a computer chip or entity, or by a product having a certain function. A typical implementation device is a computer. Specifically, the computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0148] For ease of description, the above devices are described separately by function as various units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware.

[0149] Those skilled in the art will understand that embodiments of this application can be provided as methods, apparatus, or computer devices. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0150] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus, and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0151] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0152] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

[0153] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0154] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0155] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

[0156] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and such modifications and variations all fall within the scope defined by the appended claims.< / polyline> < / path>

Claims

1. A method for generating a process flow diagram, characterized in that, The method includes: The original character data is used to parse character rules in order to determine the target topology matrix; Based on the target topology matrix and the preset process list, semantic mapping and shape deduction are performed to obtain the target node attributes; Regional calculations are performed based on the target node attributes to obtain parallel stage parameters; Obstacle avoidance connections are generated based on the parallel stage parameters and preset safety constants to obtain the target flowchart.

2. The method according to claim 1, characterized in that, The parallel phase parameters include intra-group node parameters and inter-group boundary parameters of at least one parallel group in the target process; the obstacle avoidance connection generation based on the parallel phase parameters and preset safety constants to obtain the target flowchart includes: The inter-group boundary parameters are extended using the preset safety constant to obtain the safe position data of the parallel group; Path planning is performed based on the secure location data and the node parameters within the group to obtain a branch connection sequence; Obstacle avoidance connections are generated based on the branch connection sequence to obtain the target flowchart.

3. The method according to claim 2, characterized in that, The path planning process based on the secure location data and the node parameters within the group to obtain the branch connection sequence includes: The branch parameters of the parallel group are determined based on the safety location data; wherein, the branch parameters include the inlet coordinates and outlet coordinates of the parallel group; Inter-group routing is performed based on the ingress coordinates and the egress coordinates to obtain an external connection sequence; Intra-group routing is performed based on the intra-group node parameters to obtain the internal connection sequence; The external connection sequence and the internal connection sequence are combined to obtain the branch connection sequence.

4. The method according to claim 1, characterized in that, The process of calculating the region based on the target node attributes to obtain parallel stage parameters includes: The enclosure size is calculated based on the target node attributes and preset layout parameters to obtain the current enclosure parameters; Boundary verification is performed based on the current enclosing parameters to obtain the line break determination result; If the line break determination result indicates that line break processing is required, perform a global line break adjustment to obtain the adjusted layout parameters; Based on the target node attributes and the adjusted layout parameters, repeat the above-mentioned enclosing size calculation, boundary verification processing and global line wrapping adjustment until the current enclosing parameters meet the preset boundary conditions, and use the adjusted layout parameters to determine the parallel stage parameters.

5. The method according to claim 1, characterized in that, The step of parsing character rules using raw character data to determine the target topology matrix includes: Based on the original character data, a down-order recognition process is performed to obtain stage character data; Based on the stage character data, perform extended-order recognition processing to obtain branch character data; Based on the branch character data, node extraction and ordered reconstruction are performed to obtain the target topology matrix.

6. The method according to claim 1, characterized in that, The semantic mapping and shape deduction based on the target topology matrix and the preset process list to obtain target node attributes include: Semantic recognition is performed based on the target topology matrix and the preset process list to obtain semantic recognition results; Based on the semantic recognition results, shape rendering and attribute deduction are performed to obtain the target node attributes.

7. The method according to claim 6, characterized in that, The semantic recognition based on the target topology matrix and the preset process list to obtain semantic recognition results includes: The array is traversed based on the target topology matrix to obtain the node record results; The validity of the node record results and the preset process list is checked to obtain a valid check result; The node record results are updated based on the valid verification results to obtain semantic recognition results.

8. A device for generating a process flow diagram, characterized in that, The device includes: The character parsing module is used to parse character rules from raw character data in order to determine the target topology matrix; The mapping and deduction module is used to perform semantic mapping and shape deduction based on the target topology matrix and the preset process list to obtain target node attributes; wherein, the target node attributes are used to describe the rendering attributes of nodes in the target process; A region calculation module is used to perform region calculations based on the target node attributes to obtain parallel stage parameters; wherein, the parallel stage parameters include intra-group node parameters and inter-group boundary parameters of at least one parallel group in the target process; The obstacle avoidance connection module is used to generate obstacle avoidance connections based on the parallel stage parameters and preset safety constants to obtain the target flowchart.

9. A computer device, characterized in that, include: A memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, the processor executing the computer instructions to perform the method of any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to perform the method of any one of claims 1 to 7.

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