Method of controlling communications performed in a display device

Abstract

A method of controlling communication performed in a display apparatus according to an embodiment of the disclosure includes transmitting, by a first module in a first substrate, a data packet related to panel compensation data to a second module in a second substrate, transmitting, by the second module in the second substrate, the data packet related to the panel compensation data to a memory in the second substrate only when it is determined that the data packet is valid by referring to a specific field included in the data packet related to the panel compensation data, receiving, by the first module in the first substrate, at least one completion command from the memory via the second module in the second substrate in a write mode, receiving, by the first module in the first substrate, panel compensation data stored in the memory via the second module in the second substrate in a read mode, and correcting image data based on the received panel compensation data.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2025-0014803, filed on February 5, 2025, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] Embodiments of this disclosure directly or indirectly relate to a technique for controlling communications performed in a display device. For example, V-by-One (V×1) and the like can be used, but the scope of this disclosure is not limited thereto. Background Technology

[0004] Organic light-emitting diode (OLED) displays are self-emissive displays that emit light without a separate light source. Unlike the local dimming technology used in liquid crystal displays (LCDs), the pixel dimming technology in OLEDs has the advantage of displaying perfect image quality without light leakage because it allows for independent control of the brightness of each pixel.

[0005] Self-emissive OLEDs do not require components such as backlights, liquid crystals, and color filters, and have the advantage of providing clear image quality while having a thin and simple structure.

[0006] In addition, OLED offers the following four technical effects.

[0007] First, OLED's high contrast allows for deeper and more detailed rendering of the brightest whites and blacks. Bright areas become brighter, dark areas become darker, and both are rendered with precise detail and accuracy.

[0008] Second, OLEDs do not require flickering driving methods that can cause eye fatigue and emit less than half the harmful light of LCDs, thus allowing users to comfortably enjoy content on their eyes for extended periods.

[0009] Third, OLEDs can express detailed colors because they do not require backlighting or other structural elements that reduce light purity. OLEDs vividly express all the colors of nature without distortion or loss.

[0010] Fourth, OLED does not require the use of a large number of plastic components, such as backlights. Therefore, compared with LCD, OLED displays are environmentally friendly displays with only 10% plastic content and a recycling rate of up to 90%.

[0011] However, according to existing technology, in display devices such as OLED displays, panel compensation data is stored in a control printed circuit board (C-PCB).

[0012] Furthermore, the problem is that when a problem occurs in the C-PCB or in the display panel itself other than the C-PCB, since the information on the display panel is stored in the embedded multimedia card (eMMC) or NAND memory that serves as the storage medium in the C-PCB, the C-PCB or display panel cannot be replaced separately; the entire display panel must be replaced together with the C-PCB. Summary of the Invention

[0013] The embodiments of this disclosure are intended to store panel compensation data in a specific board within the display device.

[0014] Another embodiment of this disclosure aims to store panel compensation data in a source printed circuit board (S-PCB) in a display device and to solve various problems that arise during communication between the S-PCB and the control printed circuit board (C-PCB).

[0015] Furthermore, another embodiment of this disclosure aims to limit communication to a display device capable of sending / receiving data to / from non-volatile memory over long distances, rather than a chip-to-chip approach.

[0016] To achieve the above-mentioned technical objectives, a method for controlling communication performed in a display device according to embodiments of the present disclosure includes: a first module in a first substrate sending a data packet related to panel compensation data to a second module in a second substrate; the second module in the second substrate sending the data packet related to panel compensation data to a memory in the second substrate only when the data packet is determined to be valid by referring to a specific field included in the data packet related to panel compensation data; in a write mode, the first module in the first substrate receiving at least one completion command from the memory via the second module in the second substrate; and in a read mode, the first module in the first substrate receiving panel compensation data stored in the memory via the second module in the second substrate, and correcting image data based on the received panel compensation data.

[0017] The data packets associated with panel compensation data may include: a first field for synchronizing the data packet start point and defining the attribute information of the data to be sent; a second field for defining the address and length information of the data to be sent; a third field for defining the actual data included in the data packet; and a fourth field for validating the validity of the data packet. Specifically, a particular field may correspond to the fourth field.

[0018] The second module in the second substrate may send the data packet related to panel compensation data to the memory in the second substrate only when the data packet is determined to be valid by referring to a specific field included in the data packet related to panel compensation data. This may further include sending a shadow done command to the first module at the same time as sending the data packet related to panel compensation data to the memory in the second substrate.

[0019] The method for controlling communication performed in a display device according to embodiments of the present disclosure may further include: a first module that receives a shadow completion command sending another data packet related to panel compensation data to a second module.

[0020] The memory can correspond to, for example, NAND flash memory or an embedded multimedia card (eMMC).

[0021] In addition, the first substrate and the second substrate can be connected by a first type of flexible flat cable (FFC), and the second substrate and another second substrate can be connected by a second type of FFC.

[0022] Additionally, a display device according to an embodiment of the present disclosure includes: a first module in a first substrate that generates and transmits data packets related to panel compensation data; and a second module in a second substrate that receives data packets related to panel compensation data, decodes the received data packets, and transmits the data packets related to panel compensation data to a memory only when the data packets are determined to be valid by means of a specific field included in the reference data packets.

[0023] In write mode, the first module in the first substrate can receive at least one completion command from the memory via the second module in the second substrate.

[0024] On the other hand, in the readout mode, the first module in the first substrate can be designed to receive panel compensation data stored in the memory via the second module in the second substrate, and correct the image data based on the received panel compensation data. Attached Figure Description

[0025] The accompanying drawings, which are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application, illustrate embodiments of this disclosure and, together with the specification, serve to explain the principles of this disclosure. In the drawings:

[0026] Figure 1 This illustrates a display device based on the prior art;

[0027] Figure 2 A display device according to an embodiment of the present disclosure is shown;

[0028] Figure 3 A display device according to another embodiment of the present disclosure is shown;

[0029] Figure 4 Show in more detail Figure 3 The communication protocol between the first module in the first substrate and the second module in the second substrate is shown.

[0030] Figure 5 Shown in Figure 4 The example shown is of the data packets used in the communication process between the first module and the second module;

[0031] Figure 6 The following diagram illustrates the use of Figure 5 The timing diagram for the data packets shown is shown.

[0032] Figure 7 The write mode and read mode of a display device according to an embodiment of the present disclosure are illustrated schematically;

[0033] Figure 8 To show in more detail Figure 7 The flowchart showing the write mode;

[0034] Figure 9 It is used to further improve Figure 8 A flowchart illustrating the processing speed in the write mode;

[0035] Figure 10 Is in Figure 9 The flowchart illustrates the process for handling issues in the Cyclic Redundancy Check (CRC) information during the write mode shown.

[0036] Figure 11 Two embodiments of a control printed circuit board (C-PCB) and a source printed circuit board (S-PCB) included in a display device according to embodiments of the present disclosure are shown;

[0037] Figure 12 Showing with Figure 11 The embodiments shown are different implementation methods. Detailed Implementation

[0038] Throughout this specification, the same reference numerals denote substantially the same parts. In the following description, details concerning parts irrelevant to key components of this disclosure, as well as configurations and functions known in the art, may be omitted.

[0039] The advantages and features of this disclosure, as well as methods for implementing this disclosure, will be clearly understood by referring to the accompanying drawings and embodiments, which will be described in detail below. However, this disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. Embodiments are provided to fully explain these embodiments to those skilled in the art and to fully define the scope of this disclosure. The scope of this disclosure is defined only by the appended claims.

[0040] The shapes, dimensions, ratios, angles, quantities, etc., disclosed in the accompanying drawings for describing embodiments of this disclosure are merely exemplary, and therefore this disclosure is not limited to the details shown. Throughout the specification, the same reference numerals denote the same parts. Furthermore, in the description of this disclosure, detailed descriptions of relevant known configurations or functions will be omitted when they are deemed unnecessarily obscuring the gist of the disclosure.

[0041] When using the terms “comprising,” “including,” “having,” and “consisting of” as described in this specification, additional parts may be added unless “only” is used. Unless otherwise expressly stated, the singular expression of composition encompasses the plural expression.

[0042] When interpreting a composition, it is interpreted as including a range of errors, even without a separate explicit description.

[0043] When describing positional relationships, such as when the positional relationship between two parts is described as "on top of," "above," "below," "next to," etc., one or more other parts may be located between the two parts unless "immediately" or "directly" is used.

[0044] When describing temporal relationships, such as when using phrases like "after," "after," "next," or "before," non-continuous cases may be included unless "immediately" or "directly" is used.

[0045] It should be understood that although the terms "first," "second," etc., may be used herein to describe various components, these components should not be limited by these terms. These terms may only be used to distinguish one component from another. Therefore, within the scope of this disclosure, the "first" component mentioned below may also be the "second" component.

[0046] The term "at least one" should be understood to include all possible combinations of one or more related items. For example, "at least one of the first, second, and third items" can mean not only each of the first, second, and third items, but also any combination of items that can be represented by two or more of the first, second, and third items.

[0047] The features of the various embodiments disclosed herein can be combined in part or in whole, or can be combined with each other, and various technical connections and operations are possible. Each embodiment can be implemented independently of each other or together in relation to each other.

[0048] In the following, embodiments of this application will be described in detail with reference to the accompanying drawings.

[0049] Figure 1 A display device according to the prior art is shown.

[0050] like Figure 1 As shown, the display device according to the prior art includes a control printed circuit board (C-PCB) 100, a source printed circuit board (S-PCB) 110, and a flexible flat cable (FFC) 120 connecting the C-PCB 100 and the S-PCB 110.

[0051] Furthermore, despite Figure 1 Not shown, but the C-PCB 100 is equipped with NAND flash memory, which is an example of a non-volatile memory that stores compensation data for panels related to organic light-emitting diodes (OLEDs).

[0052] However, as mentioned above, when the NAND flash memory for storing panel compensation data is installed on the C-PCB 100, there is an issue of increased maintenance / repair costs for the OLED panel.

[0053] To solve this problem, it is necessary to install non-volatile memory on other boards to store compensation data related to OLEDs and other panels, and this will be referred to below. Figure 2 Describe the implementation methods associated with it.

[0054] Figure 2 A display device according to an embodiment of the present disclosure is shown.

[0055] like Figure 2 As shown, the display device according to an embodiment of the present disclosure includes a C-PCB 200, an S-PCB 210, and an FFC 220 connecting the C-PCB 200 and the S-PCB 210.

[0056] However, with Figure 1 Unlike other NAND flash memory, the NAND flash 211 (which is an example of a non-volatile memory that stores panel-compensated data) is designed to be mounted on the S-PCB 210 instead of the C-PCB 200.

[0057] In addition, the application-specific integrated circuit (ASIC) 201 mounted on the C-PCB 200 can use the NAND flash memory 211 to read and write panel compensation data.

[0058] When Figure 2 When designing as shown, there is an advantage in reducing the replacement / repair / maintenance costs of OLED panels, boards, etc.

[0059] However, when panel compensation data is stored in NAND flash memory 211, for example, every 30 minutes, there is an issue of increased electromagnetic interference (EMI).

[0060] In this case, when the length of the FFC 220 is 155mm, the EMI problem can be solved to some extent by adding an RC filter 202 (e.g., 22Ω + 33pF).

[0061] On the other hand, when the length of FFC 220 is 350mm, there is a limitation that EMI problems cannot be solved by the aforementioned RC filter 202.

[0062] Furthermore, when using an embedded multimedia card (eMMC) instead of NAND flash memory 211, the length of the FFC 220 is limited by, for example, the 1.8 V input / output (IO) signal transmission, and the signal distortion and loss are also significant, making it difficult to replace NAND flash memory 211 in the application of eMMC.

[0063] Even when using NAND flash memory 211 continuously, there are limitations in applying FFC 220 with a length of 500mm or more, and the data transfer speed is limited.

[0064] In other words, the following will refer to Figure 3 The implementation method for addressing the aforementioned limitations that arise when the memory for compensating data for the storage panel is mounted on the S-PCB is described in more detail.

[0065] Figure 3 A display device according to another embodiment of the present disclosure is shown.

[0066] Figure 3 The display device shown (for example, it may include an OLED panel, but this disclosure is not limited thereto) includes a first substrate 300 and a second substrate 310.

[0067] Here, the first substrate 300 corresponds to, for example, the C-PCB described above, and the second substrate 310 corresponds to, for example, the S-PCB described above.

[0068] The first module 301 in the first substrate 300 generates and sends data packets related to panel compensation data. The first module 301 corresponds to, for example, an ASIC. Alternatively, the first module 301 may correspond to a timing controller (T-CON).

[0069] The second module 311 in the second substrate 310 receives data packets related to panel compensation data, decodes the received data packets, and sends the data packets related to panel compensation data to the memory 312 only when the data packet is determined to be valid by a specific field included in the reference data packet. The second module 311 may be referred to, for example, as a companion chip or a bridge integrated circuit (IC). References will follow... Figure 11 A more detailed description of the related implementation methods follows.

[0070] Memory 312 corresponds to, for example, NAND flash memory or eMMC.

[0071] The first substrate 300 and the second substrate 310 are connected by a first type FFC 320, and the second substrate 310 and another second substrate are connected by a second type FFC 330.

[0072] Additionally, each of the plurality of second substrates 310 is connected to a plurality of source driver ICs (SDICs) 340. Figure 3 In the diagram, four SDICs 340 are shown electrically connected to a second substrate 310, but this disclosure is not limited thereto.

[0073] In write mode, the first module 301 in the first substrate 300 receives at least one completion command from the memory 312 via the second module 311 in the second substrate 310.

[0074] On the other hand, in readout mode, the first module 301 in the first substrate 300 is designed to receive panel compensation data stored in the memory 312 via the second module 311 in the second substrate 310, and correct image data based on the received panel compensation data. Due to the nature of OLEDs, the technique of correcting image data using panel compensation data is important.

[0075] Meanwhile, the data packet related to the panel compensation data sent or received by the first module 301 in the first substrate 300 and the second module 311 in the second substrate 310 includes: a first field for synchronizing the data packet start point and defining the attribute information of the data to be sent when sending data; a second field for defining the address and length information of the data to be sent; a third field for defining the actual data included in the data packet; and a fourth field for validating the validity of the data packet. Specifically, the aforementioned specific field corresponds to the fourth field. Reference will be made below. Figure 5 A more detailed description of the related implementation methods follows.

[0076] The second module 311 in the second substrate 310 receives data packets related to panel compensation data, decodes the received data packets, and sends the data packets related to panel compensation data to the memory 312 only when the data packet is determined to be valid by a specific field included in the reference data packet, and simultaneously sends a shading completion command to the first module 301. Additionally, when the shading completion command is received, the first module 301 sends another data packet related to panel compensation data to the second module 311. The following will refer to... Figure 9 A more detailed description of the related implementation methods follows.

[0077] When differential transmission is used between the first module 301 in the first substrate 300 and the second module 311 in the second substrate 310, there is a technical effect that reduces EMI, a problem in the prior art.

[0078] In addition, the advantages are that the length of FFC 320 can be extended to 1000mm, and when the memory 312 is implemented, the memory 312 can be applied not only to NAND flash memory, but also to eMMC.

[0079] Meanwhile, the following will refer to Figure 4 An example is described of sending or receiving data between a first module 301 in a first substrate 300 and a second module 311 in a second substrate 310.

[0080] Figure 4 Show in more detail Figure 3 The communication protocol between the first module in the first substrate and the second module in the second substrate is shown.

[0081] The ASIC 401 mounted on the first substrate 400 corresponds to, for example... Figure 3 The first module 301 is shown.

[0082] The matching chip 411 mounted on the second substrate 410 corresponds to, for example, Figure 3 The second module 311 is shown.

[0083] The memory 412 mounted on the second substrate 410 corresponds to, for example, Figure 3 The memory 312 shown.

[0084] For example, for data communication via the V-by-One interface, besides the main link between the first module 401 and the second module 411 (e.g., Figure 4 In addition to the data transmitted via A.TXp, A.TXn, C.TXp, C.TXn, etc., as shown, there should also be auxiliary signal links such as LOCKN (e.g., Figure 4 (As shown in C.LOCKN, A.LOCKN, etc.).

[0085] Meanwhile, the following will refer to Figure 5 Description used as Figure 4 The example ASIC 401 of the first module shown transmits or receives data packets of panel compensation data with the accompanying chip 411, which is an example of the second module.

[0086] Figure 5 Shown in Figure 4 The example shown illustrates the data packets used in the communication process between the first and second modules.

[0087] Data packets associated with panel compensation data defined by embodiments of this disclosure include Figure 5 The fields shown.

[0088] The first field, 510 (Indicator), is used to synchronize the start point of data packets during data transmission and to define the attribute information of the data to be sent. Meanwhile, in... Figure 5 In this context, “nand req” and “nand done” are exemplified as information included in the first field 510, but this assumes that NAND memory is used as a storage medium, and this disclosure can be applied to various storage media, such as eMMC, etc.

[0089] The second field, 520 (Address / Len), is used to define the address and length information of the data to be sent.

[0090] The third field, 530 (Data), is used to define the actual data included in the data packet.

[0091] In addition, the fourth field 540 (Cyclic Redundancy Check (CRC)) is designed for validating the validity of data packets.

[0092] Specifically, the specific field described in this specification corresponds to the fourth field 540 mentioned above, and the fourth field 540 is used to verify the validity of the data packet related to the panel compensation data. According to the prior art, CRC information is not used when sending or receiving image display data.

[0093] Figure 6 The following diagram illustrates the use of Figure 5 The diagram shows the timing of the data packets. Figure 6 Although a data format stream is assumed when using V×1, this disclosure is not limited thereto.

[0094] In addition, Figure 6 The present invention illustrates “NAND write” and “NAND write complete”, but this assumes only that NAND memory is used as a storage medium, and this disclosure can be applied to various storage media such as eMMC.

[0095] Figure 6 (a) shows a data format stream output by an ASIC, which is an example of a first module in a first substrate. Figure 6 (b) shows the data format stream output by a companion chip, which is an example of a second module in a second substrate.

[0096] Figure 6 The DE signal shown is a signal that indicates the actual input portion of the image data after input Hsync.

[0097] However, as Figure 6 As shown in (a), when the DE signal changes from a low state to a high state, the ASIC outputs panel compensation data as an example of the first module in the first substrate.

[0098] On the other hand, such as Figure 6 As shown in (b), when the DE signal changes from a low state to a high state, the matching chip, which is an example of the second module in the second substrate, outputs a completion data indicating that panel compensation data has been written into the memory.

[0099] Figure 7 The write mode and read mode of a display device according to an embodiment of the present disclosure are illustrated schematically.

[0100] First, the process of performing a panel compensation data writing mode using internal communication in a display device according to an embodiment of the present disclosure will be described.

[0101] The first module 710 in the first substrate sends the address information Address.0 and the actual data data.0 used to write panel compensation data to the second module 721 in the second substrate 720 (S701).

[0102] The second module 721 in the second substrate 720 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 710 (S702).

[0103] As a result of the inspection (in S702), when no errors are found in the data packet related to the panel compensation data, the second module 721 sends the address information Address.0 and the actual data data.0 used to write the panel compensation data to the memory 722 in the second substrate 720 (S703).

[0104] When the memory 722 stores the compensation data of the panel, the program completion message is sent to the second module 721 (S704), and the second module 721 also sends the program completion message to the first module 710 (S705).

[0105] Next, the process of using internal communication to perform a reading mode for panel compensation data in a display device according to an embodiment of the present disclosure will be described.

[0106] The first module 710 in the first substrate sends the address information Address.0 and the actual data data.0 used to read the panel compensation data to the second module 721 in the second substrate 720 (S706).

[0107] The second module 721 sends the address information Address.0 and the actual data data.0 used to read the panel compensation data to the memory 722 in the second substrate 720 (S707).

[0108] The memory 722 sends the actual panel compensation data R_Data to the second module 721, and the second module 721 checks... Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the memory 722 (S709).

[0109] As a result of the inspection (in S709), when no errors are found in the data packet related to the panel compensation data, the second module 721 sends the panel compensation data R Data to the first module 710 (S710).

[0110] The following will refer to Figure 8 A more detailed description of the corresponding Figure 7 Operations S701 to S705 of the write mode shown.

[0111] Figure 8 To explain in more detail Figure 7 The flowchart shows the write mode.

[0112] The first module 810 in the first substrate sends the address information Address.0 and the actual data data.0 used to write panel compensation data to the second module 821 in the second substrate 820 (S801).

[0113] The second module 821 in the second substrate 820 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 810 (S802).

[0114] As a result of the check (in S802), when no errors are found in the data packet related to the panel compensation data, the second module 821 sends the address information Address.0 and the actual data data.0 used to write the panel compensation data to the memory 822 in the second substrate 820 (S803).

[0115] When the memory 822 stores the compensation data of the panel, the program completion message is sent to the second module 821 (S804), and the second module 821 also sends the program completion message to the first module 810 (S805).

[0116] When there are multiple panel compensation data, the above process is designed to be repeated.

[0117] The first module 810 in the first substrate sends the address information Address.1 and the actual data data.1 used to write panel compensation data to the second module 821 in the second substrate 820 (S806).

[0118] The second module 821 in the second substrate 820 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 810 (S807).

[0119] As a result of the check (in S807), when no errors are found in the data packet related to the panel compensation data, the second module 821 sends the address information Address.1 and the actual data data.1 used to write the panel compensation data to the memory 822 in the second substrate 820 (S808).

[0120] When the memory 822 stores the compensation data of the panel, the program completion message is sent to the second module 821 (S809), and the second module 821 also sends the program completion message to the first module 810 (S810).

[0121] Assuming there are n panel compensation data entries to be written to memory in write mode, the above process is designed to be repeated n times.

[0122] The first module 810 in the first substrate sends the address information Address.n and the actual data data.n used to write panel compensation data to the second module 821 in the second substrate 820 (S811).

[0123] The second module 821 in the second substrate 820 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 810 (S812).

[0124] As a result of the check (in S812), when no errors are found in the data packet related to the panel compensation data, the second module 821 sends the address information Address.n and the actual data data.n used to write the panel compensation data to the memory 822 in the second substrate 820 (S813).

[0125] When the memory 822 stores the compensation data of the panel, the program completion message is sent to the second module 821 (S814), and the second module 821 also sends the program completion message to the first module 810 (S815).

[0126] However, when Figure 8 The design described herein suffers from a limitation where the write mode takes an excessively long time as the amount of panel compensation data to be written to memory increases. To address this issue, embodiments of this disclosure introduce a shadow done message, which will be referenced below. Figure 9 Describe the relevant implementation methods.

[0127] Figure 9 It is used to further improve Figure 8 The flowchart shows the processing speed in the write mode.

[0128] The first module 910 in the first substrate sends the address information Address.0 and the actual data data.0 used to write panel compensation data to the second module 921 in the second substrate 920 (S901).

[0129] The second module 921 in the second substrate 920 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 910 (S902).

[0130] As a result of the inspection (in S902), when no errors are found in the data packet related to the panel compensation data, the second module 921 sends the address information Address.0 and the actual data data.0 used to write the panel compensation data to the memory 922 in the second substrate 920 (S904).

[0131] In addition, with Figure 8 The implementation methods shown are different, in Figure 9 In the process, the second module 921 sends the shadow completion message to the first module 910 (S903). This operation can be performed simultaneously with operation S904.

[0132] Therefore, there is a technical effect that the first module 910 can send the next data packet related to the panel compensation data to the second module 921 more quickly.

[0133] When the memory 922 stores the compensation data of the panel, a program completion message is sent to the second module 921 (S906), but the second module 921 does not need to send the program completion message to the first module 910. This is because the shadow completion message has already been sent immediately after operation S902 (S903).

[0134] The first module 910 in the first substrate sends the address information Address.1 and the actual data data.1 used to write panel compensation data to the second module 921 in the second substrate 920 (S905).

[0135] The second module 921 in the second substrate 920 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 910 (S907).

[0136] As a result of the inspection (in S907), when no errors are found in the data packet related to the panel compensation data, the second module 921 sends the address information Address.1 and the actual data data.1 used to write the panel compensation data to the memory 922 in the second substrate 920 (S909).

[0137] In addition, with Figure 8 The implementation methods shown are different, in Figure 9 In the process, the second module 921 sends the shadow completion message to the first module 910 (S908). This operation can be performed simultaneously with operation S909.

[0138] When the memory 922 stores the compensation data of the panel, a program completion message is sent to the second module 921 (S910), but the second module 921 does not need to send the program completion message to the first module 910. This is because the shadow completion message has already been sent immediately after operation S907 (S908).

[0139] The first module 910 in the first substrate sends the address information Address.n and the actual data data.n used to write panel compensation data to the second module 921 in the second substrate 920 (S911).

[0140] The second module 921 in the second substrate 920 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 910 (S912).

[0141] As a result of the check (in S912), when no errors are found in the data packet related to the panel compensation data, the second module 921 sends the address information Address.n and the actual data data.n used to write the panel compensation data to the memory 922 in the second substrate 920 (S914).

[0142] In addition, with Figure 8 The implementation methods shown are different, in Figure 9 In the process, the second module 921 sends the shadow completion message to the first module 910 (S913). This operation can be performed simultaneously with operation S914.

[0143] When the memory 922 stores the compensation data of the panel, a program completion message is sent to the second module 921 (S915), but the second module 921 does not need to send the program completion message to the first module 910. This is because the shadow completion message has already been sent immediately after operation S912 (S913).

[0144] In the previous Figures 7 to 9 In the illustrated implementation, it is assumed that the CRC included in the data packets related to panel compensation data is not problematic, but reference will be made below. Figure 10 Describes a solution for situations where errors exist in the corresponding data packet.

[0145] Figure 10 Is in Figure 9 The flowchart illustrates the handling process when there are problems with the CRC information in the write mode shown. (The remaining text is omitted.) Figures 7 to 9 The same operation is described in the text.

[0146] The first module 1010 in the first substrate sends the address information Address.1 and the actual data data.1 used to write panel compensation data to the second module 1021 in the second substrate 1020 (S1001).

[0147] The second module 1021 in the second substrate 1020 is inspected. Figure 5 The CRC, etc. shown, is used to check whether there are any errors in the data packets (related to panel compensation data) received from the first module 1010 (S1002).

[0148] As a result of the inspection (in S1002), when an error is detected in the data packet related to panel compensation data, the second module 1021 does not send the address information Address.1 and the actual data data.1 used to write the panel compensation data to the memory 1022 in the second substrate 1020.

[0149] The second module 1021 sends a message to the first module 1010 indicating that an error has occurred (S1003).

[0150] Therefore, the first module 1010 is designed to resend the address information Address.1 and the actual data data.1 used to write panel compensation data to the second module 1021 in the second substrate 1020 (S1004).

[0151] Figure 11 Two embodiments of C-PCB and S-PCB included in a display device according to embodiments of the present disclosure are shown.

[0152] At the same time, Figure 11 The example shown is an eMMC memory, but this disclosure can be equally applied to various storage media, such as NAND memory.

[0153] Figure 11 (a) illustrates an implementation of a C-PCB including two chips. Figure 11 (b) illustrates an implementation that includes a chip in a C-PCB.

[0154] like Figure 11 As shown in (a), C-PCB 1110 is implemented using ASIC 1111 and bridge IC 1112, and S-PCB 1120 is implemented using bridge IC 1121 and eMMC memory 1122.

[0155] Figure 11 (a) has the advantage of being able to reuse existing T-CONs.

[0156] like Figure 11 As shown in (b), the C-PCB 1130 is implemented using a single ASIC 1131, and the S-PCB 1140 is implemented using a matching IC 1141 and an eMMC memory 1142.

[0157] Figure 11 (b) has the advantage of enabling C-PCBs with a single chip to further improve their processing speed.

[0158] also, Figure 12 Showing with Figure 11 The embodiments shown are different implementation methods.

[0159] A memory 1201 capable of storing panel compensation data is mounted on an S-PCB 1200, and an ASIC 1211 is mounted on a C-PCB 1210.

[0160] Memory 1201 is connected to a first transceiver Rx / Tx via a 12-pin transistor-to-transistor logic (TTL) connection to communicate with each other, and ASIC 1211 is connected to a second transceiver Tx / Rx via a 12-pin TTL connection to communicate with each other. Finally, the first and second transceivers Rx / Tx are designed to perform 10-pin differential communication. However, these figures are merely exemplary and this disclosure is not limited thereto.

[0161] According to embodiments of this disclosure, for example, panel compensation data in display devices such as OLED displays can be stored in a specific board (e.g., S-PCB, etc.), and various problems that arise during communication between the S-PCB and C-PCB can be resolved.

[0162] More specifically, for example, there are technical effects such as reducing EMI and increasing the length of flexible flat cables (FFCs) connecting between boards.

[0163] Furthermore, by storing panel compensation data in the S-PCB instead of the C-PCB, the entire board does not need to be replaced when a panel failure occurs, thus reducing the maintenance / repair costs of OLEDs.

[0164] In addition, it is foreseeable that the proposed technical effects, such as those of a data packet structure suitable for the V×1 standard, could enable long-distance data transmission of non-volatile memory in display devices.

[0165] In addition to the technical effects explicitly described herein, technical effects that a person skilled in the art can infer from the intent of the entire specification also fall within the scope of this disclosure.

[0166] Those skilled in the art will understand that various modifications can be made without departing from the scope of this disclosure and without changing the essential features.

[0167] Furthermore, the methods described in this specification can be implemented, at least in part, using one or more computer programs or components. The components may be provided as a series of computer instructions via computer-readable or machine-readable media, including volatile and non-volatile memory. The instructions may be provided as software or firmware and may be implemented wholly or partially in hardware configurations, such as ASICs, field-programmable gate arrays (FPGAs), digital signal processors (DSPs), or other similar devices. The instructions may be executed by one or more processors or other hardware components, and the processors or other hardware components, when executing the series of computer instructions, perform all or part of the methods and procedures disclosed in this specification, or enable the methods and procedures to be performed.

[0168] Therefore, the above embodiments should be considered in a descriptive sense only and not for limiting purposes. Consequently, the scope of this disclosure is not limited to the embodiments. The scope of this disclosure is defined by the appended claims and covers all modifications and equivalents falling within the scope of the appended claims.

Claims

1. A method for controlling communication performed in a display device, the method comprising: The first module in the first substrate sends data packets related to panel compensation data to the second module in the second substrate; The second module in the second substrate sends the data packet related to the panel compensation data to the memory in the second substrate only when the data packet is determined to be valid by referring to a specific field included in the data packet related to the panel compensation data; In write mode, the first module in the first substrate receives at least one completion command from the memory via the second module in the second substrate; In read mode, the first module in the first substrate receives the panel compensation data stored in the memory via the second module in the second substrate, and corrects the image data based on the received panel compensation data.

2. The method according to claim 1, wherein, The data packet associated with the panel compensation data includes: The first field is used to synchronize the starting point of the data packet when sending data and to define the attribute information of the data to be sent; The second field is used to define the address and length information of the data to be sent; The third field is used to define the actual data included in the data packet; and The fourth field is used for validating the data packet. The specific field corresponds to the fourth field.

3. The method according to claim 1, wherein, The second module in the second substrate, when determining that the data packet is valid by referring to the specific field included in the data packet related to the panel compensation data, sends the data packet related to the panel compensation data to the memory in the second substrate, further comprising: simultaneously sending the data packet related to the panel compensation data to the memory in the second substrate, the second module sends a shadow completion command to the first module.

4. The method according to claim 3, further comprising: The first module, upon receiving the shadow completion command, sends another data packet related to the panel compensation data to the second module.

5. The method according to claim 1, wherein, The memory corresponds to NAND flash memory or an embedded multimedia card (eMMC).

6. The method according to claim 1, wherein, The first substrate and the second substrate are connected via a first type of FFC (flexible flat cable). The second substrate and another second substrate are connected via a second type of FFC.

7. A display device, comprising: The first module in the first substrate generates and sends data packets related to panel compensation data. and A second module in the second substrate receives the data packet related to the panel compensation data, then decodes the received data packet, and sends the data packet related to the panel compensation data to the memory only if the data packet is determined to be valid by referring to a specific field included in the data packet. In write mode, the first module in the first substrate receives at least one completion command from the memory via the second module in the second substrate. In read mode, the first module in the first substrate receives the panel compensation data stored in the memory via the second module in the second substrate, and corrects the image data based on the received panel compensation data.

8. The display device according to claim 7, wherein, The memory corresponds to NAND flash memory or an embedded multimedia card (eMMC).

9. The display device according to claim 7, wherein, The first substrate and the second substrate are connected via a first type of FFC (flexible flat cable). The second substrate and another second substrate are connected via a second type of FFC.

10. The display device according to claim 7, wherein, The data packet associated with the panel compensation data includes: The first field is used to synchronize the starting point of the data packet when sending data and to define the attribute information of the data to be sent; The second field is used to define the address and length information of the data to be sent; The third field is used to define the actual data included in the data packet; and The fourth field is used for validating the data packet. The specific field corresponds to the fourth field.

11. The display device according to claim 7, wherein, The second module in the second substrate receives the data packet related to the panel compensation data, then decodes the received data packet, and sends the data packet related to the panel compensation data to the memory only when the data packet is determined to be valid by referring to a specific field included in the data packet, and at the same time sends a shadow completion command to the first module.

12. The display device according to claim 11, wherein, Upon receiving the shadow completion command, the first module sends another data packet related to the panel compensation data to the second module.

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