Radiation resistance method, device and equipment of non-volatile register and storage medium

Abstract

The application provides an anti-radiation method and device of a nonvolatile register, equipment and a storage medium. The method comprises the following steps: obtaining a first preset number of first comparators, connecting all the first comparators to the third pins of nonvolatile registers on two different word lines to obtain a nonvolatile register detection circuit; when all the nonvolatile registers do not perform a read operation or a write operation, all the first comparators continuously output first comparison values based on the current values of the two nonvolatile registers connected to the first comparators; for any one first comparator, when the first comparison values output by the first comparator are different, the two nonvolatile registers connected to the first comparator are determined as risk nonvolatile registers; and the stored data of the nonvolatile registers connected to the first comparators with the same first comparison values is read and written into the risk nonvolatile registers. According to the technical scheme of the embodiment of the application, the data in the nonvolatile registers can be recovered, and the anti-radiation capability is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor memory technology, and in particular to a radiation-resistant method, apparatus, device, and storage medium for non-volatile registers. Background Technology

[0002] Integrated circuit chips are exposed to prolonged space radiation environments in space applications. As the operating frequency, integration density, and process size limits of integrated circuit chips increase, they become increasingly susceptible to the effects of space radiation. Typically, non-volatile registers in integrated circuit chips are modified to resist the effects of space radiation, achieving radiation hardening against single-event upsets and sustained total radiation dose.

[0003] However, although changing the structure of non-volatile registers can improve the radiation resistance of individual non-volatile registers, it also causes changes to the data stored in the non-volatile registers, leading to data loss. Summary of the Invention

[0004] The present invention aims to at least solve one of the technical problems existing in the prior art. To this end, the present invention proposes a method, apparatus, device, and storage medium for radiation resistance of non-volatile registers, which can recover the data in the non-volatile register after the data stored in the non-volatile register has been changed, thereby improving the radiation resistance of the non-volatile register.

[0005] In a first aspect, embodiments of the present invention provide a radiation protection method for non-volatile registers, applied to a non-volatile register circuit. The non-volatile register circuit includes two word lines, each word line being connected to a first pin of a first number of non-volatile registers. Second pins of adjacent non-volatile registers are interconnected. The first preset number is an integer greater than four. Both word lines store the same data. The method includes: Obtain the first preset number of first comparators, assign a unique first comparator to the non-volatile registers connected to the same word line, and connect all the first comparators to the third pins of two corresponding non-volatile registers to obtain a non-volatile register detection circuit. In this circuit, the two non-volatile registers connected to any first comparator are located on different word lines, and the first comparators connected to the non-volatile registers connected to the same word line are all different. The status of all the non-volatile registers is determined. When none of the non-volatile registers are read or written, all the first comparators continuously output a first comparison value based on the current value of the two connected non-volatile registers. The first comparison value is used to indicate the real-time comparison result of the independent current value of the two non-volatile registers connected to the first comparator. The independent current value is the current value output by the third pin of the non-volatile register. For any one of the first comparators, when the multiple first comparison values ​​output by the first comparator are different, both non-volatile registers connected to the first comparator are determined as risky non-volatile registers. The stored data is read from the non-volatile register connected to the first comparator with all the same first comparison values, and the read data is written into the risky non-volatile register.

[0006] According to some embodiments of the present invention, after performing state determination on all the non-volatile registers, the method further includes: When the non-volatile register performs a write operation, a second preset number of second comparators are obtained, a unique second comparator is assigned to all the non-volatile registers, and the second comparators are respectively connected to the corresponding third pin and the reference current to obtain the non-volatile register write circuit, wherein the second preset number is twice the first preset number; Perform an erase operation on all of the non-volatile registers, and perform an erase verification operation on all of the non-volatile registers; Once all the non-volatile registers have passed the erase verification, a programming operation is performed on one of the word lines, and data is written to all the non-volatile registers connected to the word line where the programming operation was performed.

[0007] According to some embodiments of the present invention, the two character lines are respectively a first character line and a second character line; Once all the non-volatile registers have passed the erase verification, a programming operation is performed on one of the word lines, including: A write operation is performed on all the non-volatile registers of the first word line or the second word line, and all the second comparators continuously output a second comparison value based on the reference current and the independent current value of the corresponding non-volatile register, wherein the second comparison value is used to characterize the real-time comparison result of the independent current value of the non-volatile register and the reference current; When multiple consecutive second comparison values ​​are different, the write operation is paused, and both non-volatile registers connected to the second comparator are identified as risk non-volatile registers. Data read from the non-volatile registers connected to the second comparator with all output second comparison values ​​being the same is written into the risk non-volatile registers.

[0008] According to some embodiments of the present invention, performing a write operation on all of the non-volatile registers of the first word line or the second word line includes: When the data to be written is 0, 0 is written to all the non-volatile registers connected to the first word line through programming operations. Programming verification operations are performed on all the non-volatile registers connected to the first word line. When all the non-volatile registers connected to the first word line pass the programming verification, the write operation ends. Alternatively, when the data to be written is 1, the 1 is written to all the non-volatile registers connected to the second word line through programming operations, and programming verification operations are performed on all the non-volatile registers connected to the second word line. When all the non-volatile registers connected to the second word line pass the programming verification, the write operation ends.

[0009] According to some embodiments of the present invention, after performing programming verification operations on all the non-volatile registers connected to the first word line, the method further includes: If at least one of the non-volatile registers connected to the first word line fails the programming verification, the erase operation and erase verification operation are performed again on all the non-volatile registers connected to the first word line in sequence, and the programming operation is performed again on the first word line or the second word line. Perform a programming verification operation on all the non-volatile registers that have completed the programming operation.

[0010] According to some embodiments of the present invention, after performing state determination on all the non-volatile registers, the method further includes: When the non-volatile register performs a read operation, a third comparator and a fourth comparator are obtained. All non-volatile registers on the first word line are divided into a first register group and a second register group. All non-volatile registers on the second word line are divided into a third register group and a fourth register group. The third comparator is connected to the first register group and the third register group, and the fourth comparator is connected to the second register group and the fourth register group to obtain a non-volatile register read circuit. The third comparator is used to indicate the comparison result of the combined current of the first register group and the combined current of the third register group. The fourth comparator is used to indicate the comparison result of the combined current of the second register group and the combined current of the fourth register group. The combined current is the sum of the independent current values ​​of the multiple non-volatile registers. When multiple consecutive third comparison values ​​are different and multiple consecutive fourth comparison values ​​are the same, the write operation is paused, all non-volatile registers connected to the third comparator are identified as risky non-volatile registers, data is read from the third register group or the fourth register group, and the read data is written to all risky non-volatile registers. Alternatively, when multiple consecutive fourth comparison values ​​are different and multiple consecutive third comparison values ​​are the same, the write operation is paused, all non-volatile registers connected to the fourth comparator are identified as risky non-volatile registers, data is read from the first register group or the second register group, and the read data is written to all risky non-volatile registers.

[0011] In a second aspect, embodiments of the present invention provide a non-volatile register radiation protection device, including at least one control processor and a memory for communicatively connecting to the at least one control processor; the memory stores instructions executable by the at least one control processor, the instructions being executed by the at least one control processor to enable the at least one control processor to perform the non-volatile register radiation protection method as described in the first aspect above.

[0012] Thirdly, embodiments of the present invention provide an electronic device including a radiation-resistant device having a non-volatile register as described in the second aspect above.

[0013] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing computer-executable instructions for performing the radiation-resistant method for non-volatile registers as described in the first aspect above.

[0014] According to an embodiment of the present invention, a radiation protection method for non-volatile registers is applied to a non-volatile register circuit. The non-volatile register circuit includes two word lines, each word line being connected to a first pin of a first preset number of non-volatile registers. The second pins of adjacent non-volatile registers are interconnected. The first preset number is an integer greater than four. Both word lines store the same data. The method has at least the following advantages: it obtains the first preset number of first comparators, assigns a unique first comparator to each non-volatile register connected to the same word line, and connects all the first comparators to the third pins of two corresponding non-volatile registers to obtain a non-volatile register detection circuit. Specifically, the two non-volatile registers connected to any one of the first comparators are located on different word lines, and the first comparators connected to the non-volatile registers on the same word line are connected to the first comparators... The comparators are all different; a status judgment is performed on all the non-volatile registers. When none of the non-volatile registers are read or written, all the first comparators continuously output a first comparison value based on the current values ​​of the two connected non-volatile registers. The first comparison value is used to indicate the real-time comparison result of the independent current values ​​of the two non-volatile registers connected to the first comparator. The independent current value is the current value output by the third pin of the non-volatile register. For any one of the first comparators, if the multiple first comparison values ​​output by the first comparator are different, the two non-volatile registers connected to the first comparator are determined to be risky non-volatile registers. The stored data is read from the non-volatile register connected to the first comparator with the same output first comparison values, and the read data is written to the risky non-volatile register. According to the technical solution of the present invention, multiple non-volatile registers are used to store the same data, which enhances the radiation resistance of the non-volatile registers. The non-volatile registers can be automatically detected, judged and restored to their state, ensuring the reliability of the stored data. This compensates for the insufficient long-term radiation resistance of the non-volatile registers themselves, improves the overall resistance of the non-volatile registers to the total radiation dose, and enhances the reliability of the chip. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of a non-volatile register detection circuit provided in one embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a non-volatile register write circuit provided in another embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of a non-volatile register read circuit provided in another embodiment of the present invention; Figure 4 This is a flowchart of a radiation-resistant method for non-volatile registers provided in another embodiment of the present invention; Figure 5 This is a flowchart of a non-volatile register radiation resistance method performing a detection operation, provided in another embodiment of the present invention; Figure 6 This is a flowchart of a non-volatile register radiation-resistant method for performing a write operation, provided in another embodiment of the present invention; Figure 7 This is a structural diagram of a radiation-resistant device for a non-volatile register provided in another embodiment of the present invention. Detailed Implementation

[0016] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0017] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0018] In the description of this invention, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0019] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0020] This invention provides a radiation-resistant method, apparatus, device, and storage medium for non-volatile registers. The radiation-resistant method for non-volatile registers is applied to a non-volatile register circuit, which includes two word lines. Each word line is connected to a first pin of a first number of non-volatile registers. Adjacent second pins of the non-volatile registers are interconnected. The first preset number is an integer greater than four. Both word lines store the same data. The radiation-resistant method for non-volatile registers includes: acquiring the first preset number of first comparators; assigning a unique first comparator to each non-volatile register connected to the same word line; and connecting all first comparators to the third pins of two corresponding non-volatile registers to obtain a non-volatile register detection circuit. The two non-volatile registers connected to any first comparator are located on different word lines, and the second pins of adjacent non-volatile registers connected to the same word line are interconnected. The first comparators connected to the non-volatile registers are all different; a status judgment is performed on all the non-volatile registers. When none of the non-volatile registers are read or written, all the first comparators continuously output a first comparison value based on the current values ​​of the two connected non-volatile registers. The first comparison value is used to indicate the real-time comparison result of the independent current values ​​of the two non-volatile registers connected to the first comparator. The independent current value is the current value output by the third pin of the non-volatile register. For any one of the first comparators, if the multiple first comparison values ​​output by the first comparator are different, the two non-volatile registers connected to the first comparator are determined to be risky non-volatile registers. The stored data is read from the non-volatile register connected to the first comparator with the same output first comparison values, and the read data is written to the risky non-volatile register. According to the technical solution of the present invention, multiple non-volatile registers are used to store the same data, which enhances the radiation resistance of the non-volatile registers. The non-volatile registers can be automatically detected, judged and restored to their state, ensuring the reliability of the stored data. This compensates for the insufficient long-term radiation resistance of the non-volatile registers themselves, improves the overall resistance of the non-volatile registers to the total radiation dose, and enhances the reliability of the chip.

[0021] First, the method of this invention is applied to a non-volatile register circuit, referring to... Figures 1 to 3 The non-volatile register circuit in this embodiment includes two word lines. Each word line is connected to a first pin of a first preset number of non-volatile registers. The second pins of adjacent non-volatile registers are interconnected. The first preset number is an integer greater than four. Both word lines store the same data. The two word lines are designated as the first word line and the second word line.

[0022] It should be noted that the two word lines of the non-volatile register circuit are the first word line and the second word line, which are word lines of two sets of non-volatile registers storing the same data. Both the first word line and the second word line are connected to a first preset number of non-volatile registers.

[0023] It should be noted that each of the two word lines is connected to a first preset number of non-volatile registers. All non-volatile registers connected to the first word line are in program state, and all non-volatile registers connected to the second word line are in erase state. That is, for all non-volatile registers, the first register group and the second register group are in program state and combined on the first word line, while the third register group and the fourth register group are in erase state and combined on the second word line.

[0024] It should be noted that in this embodiment, the non-volatile register is an N-channel enhancement-mode MOS field-effect transistor, with the first pin being the gate of the MOS field-effect transistor, the second pin being the source of the MOS field-effect transistor, and the third pin being the drain of the MOS field-effect transistor. The choice of non-volatile register device can be replaced according to actual requirements.

[0025] It should be noted that, based on the non-volatile register circuit, a first preset number of first comparators are obtained. The input terminals of the first comparators are respectively connected to a pair of non-volatile registers. The pairs of non-volatile registers correspond one-to-one and are located on different word lines. That is, the first comparators are respectively connected to a non-volatile register connected to the first word line and a non-volatile register connected to the second word line, thus obtaining the non-volatile register detection circuit.

[0026] It should be noted that, based on the non-volatile register circuit, a second preset number of second comparators is obtained, which is twice the first preset number. A unique second comparator is assigned to each of the non-volatile registers, and the non-volatile registers are connected to the second comparators one by one to obtain the non-volatile register write circuit.

[0027] It should be noted that, based on the non-volatile register circuit, both the first and second word lines are connected to a first preset number of non-volatile registers. All non-volatile registers on the first word line are divided into a first register group and a second register group, and all non-volatile registers on the second word line are divided into a third register group and a fourth register group, resulting in a non-volatile register read circuit. The number of non-volatile registers in the first, second, third, and fourth register groups is the same. A third comparator is used to compare the combined current of the first and third register groups. The combined current of the first register group is the sum of the independent current values ​​of all non-volatile registers in the first register group, and the combined current of the third register group is the sum of the independent current values ​​of all non-volatile registers in the third register group. A fourth comparator is used to compare the combined current of the second and fourth register groups. The combined current of the second register group is the sum of the independent current values ​​of all non-volatile registers in the second register group, and the combined current of the fourth register group is the sum of the independent current values ​​of all non-volatile registers in the fourth register group.

[0028] Reference Figures 1 to 3 In the figure, WLp and WLn are the first word line and the second word line, BLp0(0), BLp0(1) and BLp0(i) are the non-volatile registers of the first register group on the first word line, BLpm(0), BLpm(1) and BLpm(i) are the non-volatile registers of the second register group on the first word line, BLn0(0), BLn0(1) and BLn0(i) are the non-volatile registers of the third register group on the second word line, and BLnm(0), BLnm(1) and BLnm(i) are the non-volatile registers of the fourth register group on the second word line; SA is a comparator used to compare two non-volatile registers or a non-volatile register and a reference current. The output of the comparator is used to output the comparison value, which is used to indicate the comparison result of its input. The comparison value Vi(j) is used to represent the current comparison result of the j-th data and the ith data of BLp and BLn in WLp and WLn, where i is greater than 2, j is greater than or equal to 0, and i and j are both integers.

[0029] It should be noted that, in Figure 1 In the first comparator, the current before merging two non-volatile registers is compared, i.e., the independent current values ​​are compared; V0(i) is the comparison value of the i-th pair of non-volatile registers in the first register group and the third register group, and Vm(i) is the comparison value of the i-th pair of non-volatile registers in the second register group and the fourth register group. i is greater than 2, m is greater than or equal to 0, and i and m are both integers.

[0030] It should be noted that, in Figure 2In the first register group, the second comparator is used to compare the current before the non-volatile registers are combined with the reference current, that is, to compare the independent current value of the non-volatile registers with the reference current; Rp0(i) is the comparison value of the i-th non-volatile register in the first register group with the reference current, Rpm(i) is the comparison value of the i-th non-volatile register in the second register group with the reference current; Rn0(i) is the comparison value of the i-th non-volatile register in the third register group with the reference current, and Rnm(i) is the comparison value of the i-th non-volatile register in the fourth register group with the reference current.

[0031] It should be noted that, in Figure 3 In the above, R0, the output of the third comparator, is the comparison value of the current after the first register group and the third register group are combined, and Rm, the output of the fourth comparator, is the comparison value of the current after the second register group and the fourth register group are combined.

[0032] The following is based on Figures 1 to 3 The technical solutions of the embodiments of the present invention will be further described below.

[0033] Reference Figure 4 and Figure 5 , Figure 4 This is a flowchart illustrating a radiation protection method for a non-volatile register, provided by an embodiment of the present invention. The radiation protection method for the non-volatile register includes, but is not limited to, the following steps: S10: Obtain a first preset number of first comparators, assign a unique first comparator to the non-volatile registers connected to the same word line, and connect all the first comparators to the third pins of two corresponding non-volatile registers to obtain a non-volatile register detection circuit. In this circuit, the two non-volatile registers connected to any first comparator are located on different word lines, and the first comparators connected to the non-volatile registers connected to the same word line are all different.

[0034] It should be noted that a first preset number of first comparators are added to the non-volatile register circuit, and the first comparators are respectively connected to the non-volatile registers on the first word line and the non-volatile registers on the second word line. The non-volatile registers are only connected to one first comparator. The first comparator is used to compare the current values ​​of the third pins of the two non-volatile registers storing the same data.

[0035] S20, perform status judgment on all non-volatile registers. When none of the non-volatile registers are read or written, all first comparators continuously output the first comparison value based on the current value of the two connected non-volatile registers. The first comparison value is used to indicate the real-time comparison result of the independent current values ​​of the two non-volatile registers connected to the first comparator. The independent current value is the current value output by the third pin of the non-volatile register.

[0036] It should be noted that the status of all non-volatile registers is checked, and the detection of non-volatile registers is automatically started when there are no read or write operations on non-volatile registers.

[0037] S30: For any first comparator, when multiple first comparison values ​​output by the first comparator are different, both non-volatile registers connected to the first comparator are determined as risky non-volatile registers. The stored data is read from the non-volatile register connected to the first comparator with all the same first comparison values, and the read data is written into the risky non-volatile register.

[0038] It should be noted that during the detection of non-volatile registers, if the comparison values ​​output by any of the first comparators are different twice consecutively, it is determined that the data in the non-volatile register is at risk, and the data (i.e., the stored value) stored in the non-volatile register has been altered. Therefore, a data recovery operation needs to be performed on the non-volatile register. Thus, the correct data is read from the non-volatile register whose output comparison values ​​are the same twice consecutively, and the correct data is written to the risky non-volatile register, thereby achieving data recovery of the non-volatile register and improving its radiation resistance.

[0039] It should be noted that no operation can be performed on the non-volatile register before the write-back operation on the risky non-volatile register is completed. The write-back operation is the data recovery operation.

[0040] It should be noted that this application uses multiple non-volatile registers to store one piece of data, which enhances the radiation resistance of the non-volatile registers. It can also automatically detect the state of the non-volatile registers, determine and restore the state of the non-volatile registers, and ensure the reliability of the stored data. This makes up for the lack of long-term radiation resistance of the non-volatile registers themselves, improves the overall resistance of the non-volatile registers to the total radiation dose, and improves the reliability of the chip.

[0041] Currently, integrated circuit chips are exposed to prolonged space radiation environments in space applications. As the operating frequency, integration density, and process dimensions of integrated circuit chips increase, they become increasingly susceptible to the effects of space radiation. Non-volatile registers typically resist the effects of space radiation by modifying the device structure, achieving radiation hardening against single-event upsets and sustained total radiation dose. While altering the structure of a non-volatile register can improve the radiation resistance of an individual register, it may also alter the value stored in the register.

[0042] Therefore, this application proposes a radiation resistance method for non-volatile registers. Each data item is stored by connecting multiple non-volatile registers via two word lines, thereby enhancing the overall radiation resistance of the non-volatile registers. Furthermore, after the data or value stored in the non-volatile registers changes, the stored data or value can be recovered, thus improving the radiation resistance of the non-volatile registers. The more non-volatile registers there are, the stronger the radiation resistance of the non-volatile register circuit.

[0043] Additionally, in one embodiment, reference is made to Figure 4 and Figure 6 In step S20, after determining the status of all non-volatile registers, the following steps are included, but are not limited to: S41, when a non-volatile register performs a write operation, a second preset number of second comparators are obtained, a unique second comparator is allocated to all non-volatile registers, and the second comparators are connected to the corresponding third pin and the reference current respectively to obtain a non-volatile register write circuit, wherein the second preset number is twice the first preset number; S42, perform an erase operation on all non-volatile registers, and perform an erase verification operation on all non-volatile registers; S43, when all non-volatile registers have passed the erase verification, perform a programming operation on one of the word lines, and write data to all non-volatile registers connected to the word line where the programming operation was performed.

[0044] It should be noted that, to ensure correct data or value writing, an erase operation is performed on all non-volatile registers connected to the two word lines beforehand. After the erase operation is completed, an erase verify operation is performed on all non-volatile registers. During the erase verify operation, the second comparator compares the reference current with the connected non-volatile registers. During the write operation, different word lines are selected based on the different values ​​being written, and a program operation and a program verify operation are performed on all non-volatile registers of the selected word line. During the program verify operation, the second comparator compares the reference current with the connected non-volatile registers.

[0045] In another embodiment, in step S43, when all non-volatile registers have passed the erase verification, a programming operation is performed on one of the word lines, including but not limited to the following steps: S431, perform a write operation on all non-volatile registers of the first word line or the second word line, and all second comparators continuously output a second comparison value based on the reference current and the independent current value of the corresponding non-volatile register. The second comparison value is used to characterize the real-time comparison result between the independent current value of the non-volatile register and the reference current. S432, when multiple consecutive second comparison values ​​are different, pause the write operation, determine both non-volatile registers connected to the second comparator as risky non-volatile registers, and write the data read from the non-volatile register connected to the second comparator with all the same output second comparison values ​​into the risky non-volatile register.

[0046] It should be noted that the non-volatile register detection circuit is called based on multiple second comparison values ​​to perform data recovery operations on the risky non-volatile register.

[0047] It should be noted that during the erase operation and programming verification operation, the non-volatile register current and the reference current are compared by the second comparator, and the independent current values ​​of the non-volatile registers on the first word line and the second word line are compared by the first comparator, that is, the current before the non-volatile register currents are combined.

[0048] In another embodiment, in step S431, a write operation is performed on all non-volatile registers of the first word line or the second word line, including but not limited to the following steps: S4311: When the data to be written is 0, the 0 is written to all non-volatile registers connected to the first word line through programming operation. Programming verification operation is performed on all non-volatile registers connected to the first word line. When all non-volatile registers connected to the first word line pass the programming verification, the write operation ends. S4312, or, when the data to be written is 1, write 1 to all non-volatile registers connected to the second word line through programming operation, perform programming verification operation on all non-volatile registers connected to the second word line, and end the write operation when all non-volatile registers connected to the second word line pass the programming verification.

[0049] It should be noted that different word lines are used for programming operations and programming verification operations depending on the data or value written. When the data or value written is 0, the first word line is selected; when the data or value written is 1, the second word line is selected.

[0050] In another embodiment, after performing programming verification operations on all non-volatile registers connected to the first word line in step S4311, the following steps are included, but are not limited to: S4313, when at least one non-volatile register connected to the first word line fails the programming verification, the erase operation and erase verification operation are performed again on all non-volatile registers connected to the first word line in sequence, and the programming operation is performed again on the first word line or the second word line; S4314 performs a programming verification operation on all non-volatile registers that have completed the programming operation.

[0051] It should be noted that, to ensure that the data or values ​​stored in all non-volatile memory locations of the first word line are identical, if at least one non-volatile register fails the programming verification, all non-volatile registers of the first word line will be sequentially erased, erased and verified, and then programmed again. The programming verification operation will then be performed again.

[0052] It should be noted that after the programming verification operation is performed on all non-volatile registers of the second word line, if at least one non-volatile register connected to the second word line fails the programming verification, the subsequent execution steps are the same as in this embodiment.

[0053] In another embodiment, after performing a status check on all non-volatile registers in step S20, the following steps are included, but are not limited to: S51, when a non-volatile register performs a read operation, the third comparator and the fourth comparator are obtained. All non-volatile registers on the first word line are divided into the first register group and the second register group. All non-volatile registers on the second word line are divided into the third register group and the fourth register group. The third comparator is connected to the first register group and the third register group, and the fourth comparator is connected to the second register group and the fourth register group to obtain the non-volatile register read circuit. The third comparator is used to indicate the comparison result of the combined current of the first register group and the combined current of the third register group. The fourth comparator is used to indicate the comparison result of the combined current of the second register group and the combined current of the fourth register group. The combined current is the sum of the independent current values ​​of multiple non-volatile registers. S52, when multiple consecutive third comparison values ​​are different and multiple consecutive fourth comparison values ​​are the same, pause the write operation, determine all non-volatile registers connected to the third comparator as risky non-volatile registers, read data from the third register group or the fourth register group, and write the read data to all risky non-volatile registers. S53, or, when multiple consecutive fourth comparison values ​​are different and multiple consecutive third comparison values ​​are the same, pause the write operation, determine all non-volatile registers connected to the fourth comparator as risky non-volatile registers, read data from the first register group or the second register group, and write the read data to all risky non-volatile registers.

[0054] It should be noted that when performing a read operation on a non-volatile register, taking the third comparator as an example, the third pins of half of the non-volatile registers on the first word line are connected together to form the first register group, and the third pins of half of the non-volatile registers on the third word line are connected together to form the third register group. The third comparator compares the current of the first and third register groups after they are combined. If no operation is performed on the non-volatile registers, a detection operation is initiated, and the first comparator continuously compares the current of the two non-volatile registers before they are combined. The fourth comparator works similarly.

[0055] like Figure 7 As shown, Figure 7 This is a structural diagram of a radiation-resistant device for a non-volatile register provided in one embodiment of the present invention. The present invention also provides a radiation-resistant device for a non-volatile register, comprising: The processor 601 can be implemented using a general-purpose central processing unit (CPU), microprocessor, application specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 602 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 602 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 602 and is called and executed by the processor 601 to execute the non-volatile register radiation protection method of the embodiments of this application. The input / output interface 603 is used to implement information input and output; The communication interface 604 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 605 transmits information between various components of the device (e.g., processor 601, memory 602, input / output interface 603, and communication interface 604); The processor 601, memory 602, input / output interface 603, and communication interface 604 are connected to each other within the device via bus 605.

[0056] This application also provides an electronic device including a radiation-resistant device for a non-volatile register as described above.

[0057] This application also provides a storage medium, which is a computer-readable storage medium, storing a computer program that, when executed by a processor, implements the above-described non-volatile register radiation protection method.

[0058] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof. The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate, and may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0059] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0060] The above provides a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of the present invention.

Claims

1. A radiation protection method for a non-volatile register, characterized in that, The method is applied to a non-volatile register circuit, which includes two word lines connected to a first number of first pins of non-volatile registers, with adjacent second pins of the non-volatile registers interconnected. The first preset number is an integer greater than four, and both word lines store the same data. Obtain the first preset number of first comparators, assign a unique first comparator to the non-volatile registers connected to the same word line, and connect all the first comparators to the third pins of two corresponding non-volatile registers to obtain a non-volatile register detection circuit. In this circuit, the two non-volatile registers connected to any first comparator are located on different word lines, and the first comparators connected to the non-volatile registers connected to the same word line are all different. The status of all the non-volatile registers is determined. When none of the non-volatile registers are read or written, all the first comparators continuously output a first comparison value based on the current value of the two connected non-volatile registers. The first comparison value is used to indicate the real-time comparison result of the independent current value of the two non-volatile registers connected to the first comparator. The independent current value is the current value output by the third pin of the non-volatile register. For any one of the first comparators, when the multiple first comparison values ​​output by the first comparator are different, both non-volatile registers connected to the first comparator are determined as risky non-volatile registers. The stored data is read from the non-volatile register connected to the first comparator with all the same first comparison values, and the read data is written into the risky non-volatile register.

2. The radiation resistance method for non-volatile registers according to claim 1, characterized in that, After performing state checks on all the aforementioned non-volatile registers, the process also includes: When the non-volatile register performs a write operation, a second preset number of second comparators are obtained, a unique second comparator is assigned to all the non-volatile registers, and the second comparators are respectively connected to the corresponding third pin and the reference current to obtain the non-volatile register write circuit, wherein the second preset number is twice the first preset number; Perform an erase operation on all of the non-volatile registers, and perform an erase verification operation on all of the non-volatile registers; Once all the non-volatile registers have passed the erase verification, a programming operation is performed on one of the word lines, and data is written to all the non-volatile registers connected to the word line where the programming operation was performed.

3. The radiation resistance method for non-volatile registers according to claim 2, characterized in that, The two character lines are the first character line and the second character line, respectively; Once all the non-volatile registers have passed the erase verification, a programming operation is performed on one of the word lines, including: A write operation is performed on all the non-volatile registers of the first word line or the second word line, and all the second comparators continuously output a second comparison value based on the reference current and the independent current value of the corresponding non-volatile register, wherein the second comparison value is used to characterize the real-time comparison result of the independent current value of the non-volatile register and the reference current; When multiple consecutive second comparison values ​​are different, the write operation is paused, and both non-volatile registers connected to the second comparator are identified as risk non-volatile registers. Data read from the non-volatile registers connected to the second comparator with all output second comparison values ​​being the same is written into the risk non-volatile registers.

4. The radiation resistance method for non-volatile registers according to claim 3, characterized in that, Perform a write operation on all of the non-volatile registers of the first word line or the second word line, including: When the data to be written is 0, 0 is written to all the non-volatile registers connected to the first word line through programming operations. Programming verification operations are performed on all the non-volatile registers connected to the first word line. When all the non-volatile registers connected to the first word line pass the programming verification, the write operation ends. Alternatively, when the data to be written is 1, the 1 is written to all the non-volatile registers connected to the second word line through programming operations, and programming verification operations are performed on all the non-volatile registers connected to the second word line. When all the non-volatile registers connected to the second word line pass the programming verification, the write operation ends.

5. The radiation resistance method for non-volatile registers according to claim 4, characterized in that, After performing programming verification operations on all the non-volatile registers connected to the first word line, the process further includes: If at least one of the non-volatile registers connected to the first word line fails the programming verification, the erase operation and erase verification operation are performed again on all the non-volatile registers connected to the first word line in sequence, and the programming operation is performed again on the first word line or the second word line. Perform a programming verification operation on all the non-volatile registers that have completed the programming operation.

6. The radiation resistance method for non-volatile registers according to claim 3, characterized in that, After performing state checks on all the aforementioned non-volatile registers, the process also includes: When the non-volatile register performs a read operation, a third comparator and a fourth comparator are obtained. All non-volatile registers on the first word line are divided into a first register group and a second register group. All non-volatile registers on the second word line are divided into a third register group and a fourth register group. The third comparator is connected to the first register group and the third register group, and the fourth comparator is connected to the second register group and the fourth register group to obtain a non-volatile register read circuit. The third comparator is used to indicate the comparison result of the combined current of the first register group and the combined current of the third register group. The fourth comparator is used to indicate the comparison result of the combined current of the second register group and the combined current of the fourth register group. The combined current is the sum of the independent current values ​​of the multiple non-volatile registers. When multiple consecutive third comparison values ​​are different and multiple consecutive fourth comparison values ​​are the same, the write operation is paused, all non-volatile registers connected to the third comparator are identified as risky non-volatile registers, data is read from the third register group or the fourth register group, and the read data is written to all risky non-volatile registers. Alternatively, when multiple consecutive fourth comparison values ​​are different and multiple consecutive third comparison values ​​are the same, the write operation is paused, all non-volatile registers connected to the fourth comparator are identified as risky non-volatile registers, data is read from the first register group or the second register group, and the read data is written to all risky non-volatile registers.

7. A radiation-resistant device with a non-volatile register, characterized in that, It includes at least one control processor and a memory for communicatively connecting to the at least one control processor; the memory stores instructions executable by the at least one control processor, which, when executed by the at least one control processor, enable the at least one control processor to perform the radiation protection method of the non-volatile register as described in any one of claims 1 to 6.

8. An electronic device, characterized in that, Radiation-resistant device including the non-volatile register as described in claim 7.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to perform the radiation-resistant method of the non-volatile register as described in any one of claims 1 to 6.

Images