Under-voltage protection for direct current output voltage

Abstract

The application relates to an under-voltage protection device of a direct-current output voltage. The device comprises a sampling comparison module, an under-voltage locking module and an enable control module, the input end of the sampling comparison module is connected with the direct-current output voltage of an auxiliary power supply, the output end of the sampling comparison module is connected with the input end of the under-voltage locking module, the output end of the under-voltage locking module is connected with the input end of the enable control module, and the output end of the enable control module is connected with the enable end of a power supply control chip; the sampling comparison module is used for sampling the direct-current output voltage, comparing the sampling voltage with an under-voltage threshold value, and outputting an under-voltage trigger signal when the sampling voltage is lower than the under-voltage threshold value; the under-voltage threshold value is generated by a reference setting circuit inside the sampling comparison module; the under-voltage locking module is used for receiving the under-voltage trigger signal and entering a self-locking state in response to the under-voltage trigger signal, and outputs a locking signal. The method can improve the reliability of a system.

Description

Technical Field

[0001] This application relates to the field of new energy photovoltaic power generation technology, and in particular to an undervoltage protection device for DC output voltage. Background Technology

[0002] With the rapid development of new energy photovoltaic power generation technology, photovoltaic inverters, as the core equipment of photovoltaic power generation systems, have been widely used. In a photovoltaic inverter, the auxiliary power supply is a crucial component providing operating voltage to the control circuit, drive circuit, protection circuit, and communication module; its reliability directly affects the stable operation of the entire inverter. Among these, the undervoltage protection function of the auxiliary power supply's DC output voltage is particularly important. This is because, when the input voltage is too low, without reliable undervoltage protection, the auxiliary power supply will continue to operate, potentially leading to abnormal operation of the power chip, output voltage drops, or insufficient drive of the power switching devices. This can cause severe overheating or even damage to the power transistors, and in severe cases, may cause the entire inverter to stop working.

[0003] In traditional technologies, undervoltage protection of auxiliary power supplies typically employs microcontrollers for voltage monitoring and control. Specifically, the input voltage is sampled via analog-to-digital conversion, and the microcontroller determines whether the input voltage has reached an undervoltage threshold. If the determination is that the input voltage has reached the undervoltage threshold, a control signal is output to cut off the power supply chip's output, thereby achieving undervoltage protection.

[0004] However, the above-mentioned traditional methods have obvious shortcomings in practical applications. The microcontroller itself needs an auxiliary power supply to work properly. When the output voltage of the auxiliary power supply is undervoltage, the microcontroller can no longer obtain a stable power supply and therefore cannot perform the undervoltage protection function, resulting in a logical dead loop. Summary of the Invention

[0005] Therefore, it is necessary to provide an undervoltage protection device for DC output voltage to address the aforementioned technical problems.

[0006] In a first aspect, this application provides an undervoltage protection device for DC output voltage. The device includes: a sampling comparison module, an undervoltage lockout module, an enable control module, and an auxiliary power supply. The input terminal of the sampling comparison module is connected to the DC output voltage of the auxiliary power supply, the output terminal of the sampling comparison module is connected to the input terminal of the undervoltage lockout module, the output terminal of the undervoltage lockout module is connected to the input terminal of the enable control module, and the output terminal of the enable control module is connected to the enable terminal of the power control chip.

[0007] The sampling and comparison module is used to sample the DC output voltage and compare the sampled voltage with the undervoltage threshold. When the sampled voltage is lower than the undervoltage threshold, an undervoltage trigger signal is output. The undervoltage threshold is generated by the reference setting circuit inside the sampling and comparison module.

[0008] The undervoltage lockout module is used to receive an undervoltage trigger signal and, in response to the undervoltage trigger signal, enter a self-locking state and output a lockout signal;

[0009] The enable control module is used to receive the lock signal and pull the level of the enable terminal to the off state to turn off the power control chip.

[0010] In one embodiment, the sampling comparison module includes:

[0011] The sampling voltage divider circuit includes a first resistor and a second resistor. The first end of the first resistor is connected to the DC output voltage, the second end of the first resistor is connected to the first end of the second resistor, the second end of the second resistor is grounded, and the connection point of the first resistor and the second resistor serves as the sampling voltage output terminal.

[0012] The reference setting circuit includes a third resistor, a fourth resistor, and a fifth resistor. The first end of the third resistor is connected to the DC output voltage. The second end of the third resistor is connected to the first end of the fourth resistor. The second end of the fourth resistor is connected to the first end of the fifth resistor. The second end of the fifth resistor is grounded. The connection point of the third and fourth resistors outputs the undervoltage threshold.

[0013] The comparator has its first input connected to the sampled voltage output and its second input connected to the undervoltage threshold. The comparator outputs an undervoltage trigger signal when the sampled voltage is lower than the undervoltage threshold.

[0014] In one embodiment, the sampling comparison module further includes a filter capacitor;

[0015] The first terminal of the filter capacitor is connected to the DC output voltage, and the second terminal of the filter capacitor is grounded.

[0016] In one embodiment, the comparator is an adjustable reference integrated circuit with a built-in reference voltage source, and the adjustable reference integrated circuit includes a reference terminal, a positive terminal, and a negative terminal;

[0017] The reference terminal serves as the first input terminal, the anode terminal serves as both the second input terminal and the output terminal, and the cathode terminal is grounded.

[0018] In one embodiment, the undervoltage lockout module includes: a trigger capacitor, a first switching transistor, a second switching transistor, and a pull-up resistor;

[0019] The first end of the trigger capacitor is connected to the output of the sampling comparison module, the second end of the trigger capacitor is connected to the control terminal of the first switching transistor, the output of the first switching transistor is connected to the control terminal of the second switching transistor, the output of the second switching transistor is connected to the input of the enable control module, the input of the second switching transistor is connected to the DC output voltage, the first end of the pull-up resistor is connected to the DC output voltage, and the second end of the pull-up resistor is connected to the control terminal of the second switching transistor.

[0020] In one embodiment, the undervoltage lockout module further includes a positive feedback branch, which includes a diode and a sixth resistor;

[0021] In this configuration, the anode of the diode is connected to the output terminal of the second switching transistor, the cathode of the diode is connected to the first terminal of the sixth resistor, and the second terminal of the sixth resistor is connected to the control terminal of the first switching transistor.

[0022] In one embodiment, the first switching transistor is an NPN transistor, including a base, a collector, and an emitter;

[0023] In this configuration, the base serves as the control terminal of the first switching transistor, the collector serves as the output terminal of the first switching transistor, and the emitter is grounded.

[0024] In one embodiment, the second switch is a PMOS field-effect transistor, including a gate, a source, and a drain;

[0025] In this configuration, the gate serves as the control terminal of the second switch, the source serves as the input terminal of the second switch, and the drain serves as the output terminal of the second switch.

[0026] In one embodiment, the enable control module includes: a drive resistor, an execution switch, a seventh resistor, and an eighth resistor;

[0027] The first end of the driving resistor is connected to the output end of the undervoltage lockout module, the second end of the driving resistor is connected to the control end of the execution switch, the first conducting end of the execution switch is connected to the enable end, the second conducting end of the execution switch is grounded, the first end of the seventh resistor is connected to the DC output voltage, the second end of the seventh resistor is connected to the first end of the eighth resistor, the second end of the eighth resistor is grounded, and the connection point of the seventh and eighth resistors is connected to the enable end.

[0028] In one embodiment, the switching transistor is an NPN transistor, including a base, a collector, and an emitter;

[0029] In this circuit, the base serves as the control terminal of the switching transistor, the collector serves as the first conducting terminal of the switching transistor, and the emitter serves as the second conducting terminal of the switching transistor.

[0030] The aforementioned DC output voltage undervoltage protection device includes: a sampling comparison module, an undervoltage lockout module, and an enable control module. The input terminal of the sampling comparison module is connected to the DC output voltage of the auxiliary power supply, the output terminal of the sampling comparison module is connected to the input terminal of the undervoltage lockout module, the output terminal of the undervoltage lockout module is connected to the input terminal of the enable control module, and the output terminal of the enable control module is connected to the enable terminal of the power control chip. The sampling comparison module is used to sample the DC output voltage and compare the sampled voltage with an undervoltage threshold. When the sampled voltage is lower than the undervoltage threshold, it outputs an undervoltage trigger signal. The undervoltage threshold is generated by a reference setting circuit inside the sampling comparison module. The undervoltage lockout module is used to receive the undervoltage trigger signal and, in response to the undervoltage trigger signal, enter a self-locking state and output a lockout signal. The enable control module receives the lock signal and pulls the enable pin to the off state, shutting down the power control chip. The aforementioned device, through the reference setting circuit within the sampling and comparison module, can flexibly adjust the undervoltage threshold according to the actual scenario. Furthermore, by employing pure hardware circuitry, it eliminates the need for a microcontroller, avoiding the logical dead loop problem of microcontroller failure under undervoltage conditions found in traditional solutions, thus improving system reliability. Simultaneously, utilizing the self-locking function of the undervoltage lockout module, it continuously locks after undervoltage is triggered, effectively preventing damage to the power transistors caused by repeated voltage oscillations near the threshold. Moreover, the pure hardware circuitry has the advantage of fast response speed, enabling timely shutdown of the power control chip before insufficient power switching transistor drive, ensuring safe system operation. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is one of the structural schematic diagrams of an undervoltage protection device for DC output voltage in one embodiment;

[0033] Figure 2 This is a second schematic diagram of the undervoltage protection device for DC output voltage in one embodiment;

[0034] Figure 3 This is the third schematic diagram of the undervoltage protection device for DC output voltage in one embodiment;

[0035] Figure 4 This is the fourth schematic diagram of the undervoltage protection device for DC output voltage in one embodiment;

[0036] Figure 5 This is the fifth schematic diagram of the undervoltage protection device for DC output voltage in one embodiment;

[0037] Figure 6 This is a circuit diagram of an undervoltage protection device for DC output voltage in one embodiment.

[0038] Explanation of key component designations:

[0039] 1. Undervoltage protection device for DC output voltage;

[0040] 10. Sampling and comparison module; 20. Undervoltage lockout module; 30. Enable control module; 40. Auxiliary power supply; 50. Power control chip;

[0041] 11. Sampling voltage divider circuit; 12. Reference setting circuit; 13. Comparator; 14. Filter capacitor;

[0042] 111. First resistor; 112. Second resistor;

[0043] 121. Third resistor; 122. Fourth resistor; 123. Fifth resistor;

[0044] 21. Trigger capacitor; 22. First switching transistor; 23. Second switching transistor; 24. Pull-up resistor; 25. Positive feedback branch;

[0045] 251. Diode; 252. Sixth resistor;

[0046] 31. Driving resistor; 32. Actuating switch; 33. Seventh resistor; 34. Eighth resistor. Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0048] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0049] With the rapid development of new energy photovoltaic power generation technology, photovoltaic inverters, as the core equipment of photovoltaic power generation systems, have been widely used. In a photovoltaic inverter, the auxiliary power supply is a crucial component providing operating voltage to the control circuit, drive circuit, protection circuit, and communication module; its reliability directly affects the stable operation of the entire inverter. Among these, the undervoltage protection function of the auxiliary power supply's DC output voltage is particularly important. This is because, when the input voltage is too low, without reliable undervoltage protection, the auxiliary power supply will continue to operate, potentially leading to abnormal operation of the power chip, output voltage drops, or insufficient drive of the power switching devices. This can cause severe overheating or even damage to the power transistors, and in severe cases, may cause the entire inverter to stop working.

[0050] In traditional technologies, undervoltage protection of auxiliary power supplies typically employs microcontrollers for voltage monitoring and control. Specifically, the input voltage is sampled via analog-to-digital conversion, and the microcontroller determines whether the input voltage has reached an undervoltage threshold. If the determination is that the input voltage has reached the undervoltage threshold, a control signal is output to cut off the power supply chip's output, thereby achieving undervoltage protection.

[0051] However, the above-mentioned traditional methods have obvious shortcomings in practical applications. The microcontroller itself needs an auxiliary power supply to work properly. When the output voltage of the auxiliary power supply is undervoltage, the microcontroller can no longer obtain a stable power supply and therefore cannot perform the undervoltage protection function, resulting in a logical dead loop.

[0052] In view of the above-mentioned technical problems, this application provides an undervoltage protection device for DC output voltage. The following embodiments will specifically describe the undervoltage protection device for DC output voltage.

[0053] In one exemplary embodiment, such as Figure 1 As shown, an undervoltage protection device for DC output voltage is provided. The undervoltage protection device 1 for DC output voltage includes: a sampling comparison module 10, an undervoltage lockout module 20, an enable control module 30, and an auxiliary power supply 40. The input terminal of the sampling comparison module 10 is connected to the DC output voltage of the auxiliary power supply 40, the output terminal of the sampling comparison module 10 is connected to the input terminal of the undervoltage lockout module 20, the output terminal of the undervoltage lockout module 20 is connected to the input terminal of the enable control module 30, and the output terminal of the enable control module 30 is connected to the enable terminal of the power control chip 50.

[0054] The sampling and comparison module 10 is used to sample the DC output voltage and compare the sampled voltage with the undervoltage threshold. When the sampled voltage is lower than the undervoltage threshold, an undervoltage trigger signal is output. The undervoltage threshold is generated by the reference setting circuit inside the sampling and comparison module.

[0055] The undervoltage lockout module 20 is used to receive an undervoltage trigger signal and enter a self-locking state in response to the undervoltage trigger signal, and output a lockout signal.

[0056] The enable control module 30 is used to receive the lock signal and pull the level of the enable terminal to the off state to turn off the power control chip.

[0057] The working principle of the DC output voltage undervoltage protection device 1 described in this application embodiment includes:

[0058] First, under normal operating conditions: When the DC output voltage of the auxiliary power supply 40 is normal, the sampling module 10 samples this DC output voltage and compares the sampled voltage with the undervoltage threshold generated by the reference setting circuit inside the sampling module 10. Since the sampled voltage is higher than the undervoltage threshold, the sampling comparison module 10 does not output an undervoltage trigger signal. Because the undervoltage lockout module 20 does not receive an undervoltage trigger signal and is in an unlocked state, the undervoltage lockout module 20 does not output a lockout signal. Subsequently, the enable control module 30 does not receive a lockout signal and keeps the enable terminal of the power control chip 50 at a high level, and the power control chip 50 operates normally.

[0059] Second, in the undervoltage protection triggered state: when the DC output voltage of the auxiliary power supply 40 drops below the undervoltage threshold, the sampling module 10 detects that the sampling voltage is below the undervoltage threshold and immediately outputs an undervoltage trigger signal. Upon receiving the undervoltage trigger signal, the undervoltage lockout module 20 immediately responds to the signal and enters a self-locking state, outputting a lockout signal. Subsequently, upon receiving the lockout signal, the enable control module 30 responds to the lockout signal and pulls the level of the enable terminal of the power control chip 50 to the off state, thereby turning off the power control chip 50.

[0060] Third, in the self-locking maintenance state: When the undervoltage lockout module 20 enters the self-locking state, even if the undervoltage trigger signal output by the sampling comparison module 10 disappears, the undervoltage lockout module 20 still maintains the self-locking state and continues to output a lockout signal. The enable control module 30 will also continuously receive the lockout signal, and the enable terminal of the power control chip 50 will remain at a continuously off level, thus keeping the power control chip 50 in an off state.

[0061] Fourth, in the recovery state, when the DC output voltage of the auxiliary power supply 40 is completely de-energized, the undervoltage protection device 1 for the DC output voltage loses power, and the circuit returns to its initial state. When the power is restored next time, if the DC output voltage is normal, the sampling comparison module 10 determines that it is in a normal state, and therefore does not output an undervoltage trigger signal. The undervoltage lockout module 20 remains unlocked, the enable control module 30 restores the high level of the enable terminal of the power control chip 50, and the power control chip 50 restarts.

[0062] The aforementioned DC output voltage undervoltage protection device includes: a sampling comparison module, an undervoltage lockout module, and an enable control module. The input terminal of the sampling comparison module is connected to the DC output voltage of the auxiliary power supply, the output terminal of the sampling comparison module is connected to the input terminal of the undervoltage lockout module, the output terminal of the undervoltage lockout module is connected to the input terminal of the enable control module, and the output terminal of the enable control module is connected to the enable terminal of the power control chip. The sampling comparison module is used to sample the DC output voltage and compare the sampled voltage with an undervoltage threshold. When the sampled voltage is lower than the undervoltage threshold, it outputs an undervoltage trigger signal. The undervoltage threshold is generated by a reference setting circuit inside the sampling comparison module. The undervoltage lockout module is used to receive the undervoltage trigger signal and, in response to the undervoltage trigger signal, enter a self-locking state and output a lockout signal. The enable control module receives the lock signal and pulls the enable pin to the off state, shutting down the power control chip. The aforementioned device, through the reference setting circuit within the sampling and comparison module, can flexibly adjust the undervoltage threshold according to the actual scenario. Furthermore, by employing pure hardware circuitry, it eliminates the need for a microcontroller, avoiding the logical dead loop problem of microcontroller failure under undervoltage conditions found in traditional solutions, thus improving system reliability. Simultaneously, utilizing the self-locking function of the undervoltage lockout module, it continuously locks after undervoltage is triggered, effectively preventing damage to the power transistors caused by repeated voltage oscillations near the threshold. Moreover, the pure hardware circuitry has the advantage of fast response speed, enabling timely shutdown of the power control chip before insufficient power switching transistor drive, ensuring safe system operation.

[0063] In one exemplary embodiment, such as Figure 2 As shown, Figure 1 The sampling comparison module 10 shown includes: a sampling voltage divider circuit 11, a reference setting circuit 12, and a comparator 13.

[0064] The sampling voltage divider circuit 11 includes a first resistor 111 and a second resistor 112. The first end of the first resistor 111 is connected to the DC output voltage, the second end of the first resistor 111 is connected to the first end of the second resistor 112, the second end of the second resistor 112 is grounded, and the connection point of the first resistor 111 and the second resistor 112 serves as the sampling voltage output terminal.

[0065] The reference setting circuit 12 includes a third resistor 121, a fourth resistor 122, and a fifth resistor 123. The first terminal of the third resistor 121 is connected to the DC output voltage, the second terminal of the third resistor 121 is connected to the first terminal of the fourth resistor 122, the second terminal of the fourth resistor 122 is connected to the first terminal of the fifth resistor 123, the second terminal of the fifth resistor 123 is grounded, and the connection point of the third resistor 121 and the fourth resistor 122 outputs the undervoltage threshold.

[0066] The first input terminal of comparator 13 is connected to the sampling voltage output terminal, the second input terminal of comparator 13 is connected to the undervoltage threshold, and the output terminal of comparator 13 outputs an undervoltage trigger signal when the sampling voltage is lower than the undervoltage threshold.

[0067] Optionally, the sampling comparison module 10 also includes a filter capacitor 14, with the first end of the filter capacitor 14 connected to the DC output voltage and the second end of the filter capacitor 14 grounded.

[0068] Based on the foregoing Figure 1 The working principle of the DC output voltage undervoltage protection device 1 described in this application embodiment includes: Under normal operating conditions, the DC output voltage of the auxiliary power supply 40 is within the normal range. At this time, the voltage divider sampling circuit composed of the first resistor 111 and the second resistor 112 will take a portion of the DC output voltage as the sampling voltage, while the third resistor 121, the fourth resistor 122, and the fifth resistor 123 are responsible for generating a set undervoltage threshold. Since the DC output voltage is normal and the sampling voltage is higher than the undervoltage threshold, the comparator 13 determines that the voltage is normal at this time, so it will not output an undervoltage trigger signal. The filter capacitor 14 is used to filter out voltage fluctuations to ensure that the comparator 13 can obtain a stable operating voltage. When the DC output voltage drops below the undervoltage threshold, the DC output voltage undervoltage protection device 1 enters the undervoltage operating state. At this time, the sampling voltage also decreases accordingly. After the comparator 13 detects that the sampling voltage is lower than the undervoltage threshold, its output terminal immediately jumps to a high level and outputs an undervoltage trigger signal. This undervoltage trigger signal is sent to the undervoltage lockout module 20 to initiate subsequent undervoltage protection actions.

[0069] In some embodiments, the comparator may be an adjustable reference integrated circuit with a built-in reference voltage source, which includes a reference terminal, a positive terminal, and a negative terminal. The reference terminal serves as the first input terminal, the positive terminal serves as both the second input terminal and the output terminal, and the negative terminal is grounded.

[0070] In one exemplary embodiment, such as Figure 3 As shown, Figure 1 The undervoltage lockout module 20 shown includes: a trigger capacitor 21, a first switching transistor 22, a second switching transistor 23, and a pull-up resistor 24.

[0071] Specifically, the first end of the trigger capacitor 21 is connected to the output end of the sampling comparison module 10, and the second end of the trigger capacitor 21 is connected to the control end of the first switch transistor 22; the output end of the first switch transistor 22 is connected to the control end of the second switch transistor 23; the output end of the second switch transistor 23 is connected to the input end of the enable control module 30, and the input end of the second switch transistor 23 is connected to the DC output voltage; the first end of the pull-up resistor 24 is connected to the DC output voltage, and the second end of the pull-up resistor 24 is connected to the control end of the second switch transistor 23.

[0072] The first switching transistor 22 is an NPN transistor, which includes a base, a collector, and an emitter. The base serves as the control terminal of the first switching transistor 22, the collector serves as the output terminal of the first switching transistor 22, and the emitter is grounded.

[0073] The second switch 23 is a PMOS field-effect transistor, which includes a gate, a source, and a drain. The gate serves as the control terminal of the second switch 23, the source serves as the input terminal of the second switch 23, and the drain serves as the output terminal of the second switch 23.

[0074] Based on the foregoing Figure 1 The working principle of the DC output voltage undervoltage protection device 1 described in this application embodiment includes:

[0075] First, under normal operating conditions: When the DC output voltage of the auxiliary power supply 40 is normal, the sampling voltage divider circuit 11 in the sampling comparison module 10 samples the DC output voltage and compares the sampled voltage with the undervoltage threshold output by the reference setting circuit 12 through the comparator 13. Since the sampled voltage is higher than the undervoltage threshold, the comparator 13 does not output an undervoltage trigger signal. At this time, since the first end of the trigger capacitor 21 in the undervoltage lockout module 20 does not receive the undervoltage trigger signal, the second end of the trigger capacitor 21 has no trigger voltage to be output to the control terminal of the first switch 22, and the first switch 22 remains in the off state. When the first switch 22 is off, the control terminal of the second switch 23 is pulled up to the high level of the DC output voltage through the pull-up resistor 24. Since the second switch 23 is a PMOS field-effect transistor, the second switch 23 is off when its control terminal (i.e., gate) is high. Since the second switch 23 is cut off, there is no lock signal to be output to the enable control module 30. Consequently, the enable control module 30 does not receive a lock signal. Therefore, the enable terminal of the power control chip 50 remains at a high level, and the power control chip 50 operates normally.

[0076] Second, in the undervoltage protection trigger state: When the DC output voltage of the auxiliary power supply 40 drops below the undervoltage threshold, the comparator 13 in the sampling comparison module 10 detects that the sampled voltage is below the undervoltage threshold, and its output immediately jumps to a high level, outputting an undervoltage trigger signal. When the first end of the trigger capacitor 21 in the undervoltage lockout module 20 receives this undervoltage trigger signal, due to the characteristic that the voltage across the capacitor cannot change abruptly, the second end of the trigger capacitor 21 couples this high level to the control terminal of the first switching transistor 22. The first switching transistor 22 is an NPN transistor, and when its control terminal (base) receives a high level, the first switching transistor 22 is turned on. After the first switching transistor 22 is turned on, its output terminal (i.e., collector) is pulled low to a low level, and this low level acts on the control terminal (gate) of the second switching transistor 23. Since the second switching transistor 23 is a PMOS field-effect transistor, when its control terminal (gate) is low, the second switching transistor 23 is turned on. After the second switching transistor 23 is turned on, its output terminal (drain) outputs a lockout signal to the input terminal of the enable control module 30. When the enable control module 30 receives the lock signal, it pulls the enable pin of the power control chip 50 to a low level, thereby turning off the power control chip 50.

[0077] Third, in the self-locking maintenance state: After the second switch 23 is turned on, the lock signal output from its output terminal (drain) is not only sent to the enable control module 30, but also fed back to the control terminal (base) of the first switch 22 through the positive feedback branch, maintaining the first switch 22 in a continuously conducting state. The continuous conduction of the first switch 22 will keep the control terminal (gate) of the second switch 23 in a continuously low level state, thereby maintaining the second switch 23 in a continuously conducting state. Once this positive feedback loop is established, even if the undervoltage trigger signal output by the sampling comparison module 10 disappears and the trigger capacitor 21 no longer provides a trigger signal, the first switch 22 and the second switch 23 will still remain in a conducting state, and the undervoltage lockout module 20 will continue to output a lock signal. The enable control module 30 continuously receives the lock signal, the enable terminal of the power control chip 50 remains at a low level, and the power control chip 50 remains in a turned-off state.

[0078] Fourth, in the recovery state, when the DC output voltage of the auxiliary power supply 40 is completely de-energized, the undervoltage protection device 1 of the DC output voltage loses power, and the circuit returns to its initial state, that is, the first switch 22 and the second switch 23 return to the off state, and the self-locking state is released. When the power is restored next time, if the DC output voltage is normal, the sampling comparison module 10 determines that it is in a normal state, and therefore does not output an undervoltage trigger signal. The undervoltage lockout module 20 remains in an unlocked state, the enable control module 30 restores the high level of the enable terminal of the power control chip 50, and the power control chip 50 restarts.

[0079] In one exemplary embodiment, such as Figure 4 As shown, Figure 1The undervoltage lockout module 20 shown includes a positive feedback branch 25.

[0080] The positive feedback branch 25 includes a diode 251 and a sixth resistor 252.

[0081] In this circuit, the anode of diode 251 is connected to the output terminal of the second switch 23, the cathode of diode 251 is connected to the first terminal of the sixth resistor 252, and the second terminal of the sixth resistor 252 is connected to the control terminal of the first switch 22.

[0082] Based on the foregoing Figure 3 The working principle of the DC output voltage undervoltage protection device 1 described in this application embodiment includes:

[0083] First, under normal operating conditions: When the DC output voltage of the auxiliary power supply 40 is normal, the sampling module 10 samples the DC output voltage and compares the sampled voltage with the undervoltage threshold generated by the reference setting circuit inside the sampling module 10. Since the sampled voltage is higher than the undervoltage threshold, the sampling comparison module 10 does not output an undervoltage trigger signal. At this time, since the first end of the trigger capacitor 21 in the undervoltage lockout module 20 does not receive an undervoltage trigger signal, the second end of the trigger capacitor 21 has no trigger voltage to output to the control terminal of the first switch 22, and the first switch 22 remains in the off state. When the first switch 22 is off, the control terminal of the second switch 23 is pulled up to the high level of the DC output voltage through the pull-up resistor 24. Since the second switch 23 is a PMOS field-effect transistor, the second switch 23 is off when its control terminal (i.e., gate) is high. Since the second switch 23 is off, its output terminal has no lock signal to output to the enable control module 30, and therefore the anode of the diode 251 in the positive feedback branch 25 has no voltage input, so the positive feedback branch 25 does not work. Since the enable control module 30 did not receive a lock signal, the enable terminal of the power control chip 50 remained at a high level, and the power control chip 50 operated normally.

[0084] Second, in the undervoltage protection trigger state: When the DC output voltage of the auxiliary power supply 40 drops below the undervoltage threshold, the comparator 13 in the sampling comparison module 10 detects that the sampled voltage is below the undervoltage threshold, and its output immediately jumps to a high level, outputting an undervoltage trigger signal. When the first end of the trigger capacitor 21 in the undervoltage lockout module 20 receives this undervoltage trigger signal, due to the characteristic that the voltage across the capacitor cannot change abruptly, the second end of the trigger capacitor 21 couples this high level to the control terminal of the first switching transistor 22. The first switching transistor 22 is an NPN transistor, and when its control terminal (base) receives a high level, the first switching transistor 22 is turned on. After the first switching transistor 22 is turned on, its output terminal (collector) is pulled low to a low level, and this low level acts on the control terminal (gate) of the second switching transistor 23. Since the second switching transistor 23 is a PMOS field-effect transistor, when its control terminal (gate) is low, the second switching transistor 23 is turned on. After the second switching transistor 23 is turned on, its output terminal (drain) outputs a lockout signal to the input terminal of the enable control module 30. When the enable control module 30 receives the lock signal, it pulls the enable pin of the power control chip 50 to a low level, thereby turning off the power control chip 50.

[0085] Third, in the self-locking maintenance state: After the second switch 23 is turned on, the lock signal output from its output terminal (drain) is not only sent to the enable control module 30, but also fed back to the control terminal of the first switch 22 via diode 251 and the sixth resistor 252 in the positive feedback branch 25, maintaining the first switch 22 in a continuously conducting state. The continuous conduction of the first switch 22 will keep the control terminal (gate) of the second switch 23 in a continuously low level state, thereby maintaining the second switch 23 in a continuously conducting state. Once this positive feedback loop is established, even if the undervoltage trigger signal output by the sampling comparison module 10 disappears and the trigger capacitor 21 no longer provides a trigger signal, the first switch 22 and the second switch 23 will still remain in a conducting state, and the undervoltage lockout module 20 will continue to output a lock signal. Diode 251 is used to prevent reverse current flow and ensure the unidirectionality of the positive feedback loop. The enable control module 30 continuously receives the lock signal, the enable terminal of the power control chip 50 remains at a low level, and the power control chip 50 remains in a turned-off state.

[0086] Fourth, in the recovery state, when the DC output voltage of the auxiliary power supply 40 is completely de-energized, the undervoltage protection device 1 of the DC output voltage loses power, the circuit returns to its initial state, that is, the first switch 22 and the second switch 23 return to the cut-off state, the positive feedback branch 25 stops working, and the self-locking state is released. When the power is restored next time, if the DC output voltage is normal, the sampling comparison module 10 judges it to be in a normal state, then it does not output an undervoltage trigger signal, the undervoltage lockout module 20 remains in an unlocked state, the enable control module 30 restores the high level of the enable terminal of the power control chip 50, and the power control chip 50 restarts.

[0087] In one exemplary embodiment, such as Figure 5 As shown, Figure 1 The enable control module 30 shown includes: a drive resistor 31, an execution switch 32, a seventh resistor 33, and an eighth resistor 34.

[0088] Among them, the first end of the driving resistor 31 is connected to the output end of the undervoltage lockout module 20, the second end of the driving resistor 31 is connected to the control end of the execution switch 32, the first conducting end of the execution switch 32 is connected to the enable end of the power control chip 50, and the second conducting end of the execution switch 32 is grounded; the first end of the seventh resistor 33 is connected to the DC output voltage, the second end of the seventh resistor 33 is connected to the first end of the eighth resistor 34, the second end of the eighth resistor 34 is grounded, and the connection point of the seventh resistor 33 and the eighth resistor 34 is connected to the enable end.

[0089] Among them, the execution switch 32 is an NPN transistor, including a base, a collector and an emitter; the base serves as the control terminal of the execution switch 32, the collector serves as the first conduction terminal of the execution switch 32, and the emitter serves as the second conduction terminal of the execution switch 32.

[0090] Based on the foregoing Figure 1 The working principle of the DC output voltage undervoltage protection device 1 described in this application embodiment includes:

[0091] First, under normal operating conditions: When the DC output voltage of the auxiliary power supply 40 is normal, the sampling module 10 samples the DC output voltage and compares the sampled voltage with the undervoltage threshold generated by the reference setting circuit inside the sampling module 10. Since the sampled voltage is higher than the undervoltage threshold, the sampling comparison module 10 does not output an undervoltage trigger signal. At this time, since the first end of the trigger capacitor 21 in the undervoltage lockout module 20 does not receive an undervoltage trigger signal, the second end of the trigger capacitor 21 has no trigger voltage to output to the control terminal of the first switch 22, and the first switch 22 remains in the off state. When the first switch 22 is off, the control terminal of the second switch 23 is pulled up to the high level of the DC output voltage through the pull-up resistor 24. Since the second switch 23 is a PMOS field-effect transistor, the second switch 23 is off when its control terminal (i.e., gate) is high. Since the second switch 23 is off, its output terminal has no lock signal to output to the enable control module 30, and it is in the unlocked state. Since the enable control module 30 does not receive a lockout signal from the undervoltage lockout module 20, there is no drive current at the control terminal of the actuator switch 32, thus the actuator switch 32 is in the off state. At this time, the DC output voltage is divided by the seventh resistor 33 and the eighth resistor 34, and the connection point of the seventh resistor 33 and the eighth resistor 34 provides a high level to the enable terminal. Therefore, the enable terminal of the power control chip 50 is at a high level, and the power control chip 50 operates normally.

[0092] Second, in the undervoltage protection trigger state: When the DC output voltage of the auxiliary power supply 40 drops below the undervoltage threshold, the comparator 13 in the sampling comparison module 10 detects that the sampled voltage is below the undervoltage threshold, and its output immediately jumps to a high level, outputting an undervoltage trigger signal. When the first end of the trigger capacitor 21 in the undervoltage lockout module 20 receives this undervoltage trigger signal, due to the characteristic that the voltage across the capacitor cannot change abruptly, the second end of the trigger capacitor 21 couples this high level to the control terminal of the first switching transistor 22. The first switching transistor 22 is an NPN transistor, and when its control terminal (base) receives a high level, the first switching transistor 22 is turned on. After the first switching transistor 22 is turned on, its output terminal (i.e., collector) is pulled low to a low level, and this low level acts on the control terminal (gate) of the second switching transistor 23. Since the second switching transistor 23 is a PMOS field-effect transistor, when its control terminal (gate) is low, the second switching transistor 23 is turned on. After the second switching transistor 23 is turned on, its output terminal (drain) outputs a lockout signal to the input terminal of the enable control module 30. When the first terminal of the drive resistor 31 in the enable control module 30 receives a lock signal from the undervoltage lockout module 20, the lock signal is transmitted to the control terminal of the execution switch 32 through the drive resistor 31. After receiving the lock signal, the execution switch 32 turns on, and its first conducting terminal (collector) pulls the enable terminal of the power control chip 50 to a low level, thereby turning off the power control chip 50.

[0093] Third, in the self-locking maintenance state: After the second switch 23 is turned on, the lock signal output from its output terminal (drain) is not only sent to the enable control module 30, but also fed back to the control terminal (base) of the first switch 22 through the positive feedback branch, maintaining the first switch 22 in a continuously conducting state. The continuous conduction of the first switch 22 will keep the control terminal (gate) of the second switch 23 in a continuously low level state, thereby maintaining the second switch 23 in a continuously conducting state. Once this positive feedback loop is established, even if the undervoltage trigger signal output by the sampling comparison module 10 disappears and the trigger capacitor 21 no longer provides a trigger signal, the first switch 22 and the second switch 23 will still remain in a conducting state, and the undervoltage lockout module 20 will continue to output a lock signal. The enable control module 30 continuously receives the lock signal, keeps the switch 32 in a conducting state, keeps the enable terminal of the power control chip 50 in a continuously low level, and keeps the power control chip 50 in a turned-off state.

[0094] Fourth, in the recovery state, when the DC output voltage of the auxiliary power supply 40 is completely de-energized, the undervoltage protection device 1 of the DC output voltage loses power, and the circuit returns to its initial state. That is, the first switch 22 and the second switch 23 return to the off state, the self-locking state is released, and the execution switch 32 in the enable control module 30 returns to the off state. When the power is restored next time, if the DC output voltage is normal, the seventh resistor 33 and the eighth resistor 34 re-divide the DC output voltage to provide a high level to the enable terminal, and the power control chip 50 restarts.

[0095] The following detailed description of the DC output voltage undervoltage protection device provided in this application embodiment is based on a specific circuit example. This example does not constitute any limitation on the protection scope of this application.

[0096] In one exemplary embodiment, such as Figure 6 The diagram shows the circuit structure of an undervoltage protection device 1 for DC output voltage. The device includes a sampling comparison module 10, an undervoltage lockout module 20, an enable control module 30, an auxiliary power supply 40, and a power control chip 50.

[0097] The input terminal of the sampling comparison module 10 is connected to the DC output voltage of the auxiliary power supply 40; the output terminal of the sampling comparison module 10 is connected to the input terminal of the undervoltage lockout module 20; the output terminal of the undervoltage lockout module 20 is connected to the input terminal of the enable control module 30; and the output terminal of the enable control module 30 is connected to the enable terminal of the power control chip 50.

[0098] The internal circuit of the auxiliary power supply 40 includes a power control chip U6, transformers T1 and T2, and a first capacitor C18, which together form the primary circuit for the driving voltage.

[0099] In the embodiments of this application, the sampling comparison module 10 is mainly used to sample the DC output voltage of the auxiliary power supply 40 and compare the sampled voltage with an undervoltage threshold. When the sampled voltage is lower than the undervoltage threshold, an undervoltage trigger signal is output. The sampling comparison module 10 includes a sampling voltage divider circuit 11, a reference setting circuit 12, a comparator 13, and a filter capacitor 14.

[0100] The sampling voltage divider circuit 11 consists of a first resistor R11 and a second resistor R14. The first terminal of the first resistor R11 is connected to the DC output voltage of the auxiliary power supply 40, the second terminal of the first resistor R11 is connected to the first terminal of the second resistor R14, and the second terminal of the second resistor R14 is grounded. The connection point of the first resistor R11 and the second resistor R14 serves as the sampling voltage output terminal.

[0101] The reference setting circuit 12 consists of a third resistor R9, a fourth resistor R12, and a fifth resistor R13. The first terminal of the third resistor R9 is connected to the DC output voltage of the auxiliary power supply 40. The second terminal of the third resistor R9 is connected to the first terminal of the fourth resistor R12. The second terminal of the fourth resistor R12 is connected to the first terminal of the fifth resistor R13. The second terminal of the fifth resistor R13 is grounded. The connection point between the third resistor R9 and the fourth resistor R12 serves as the undervoltage threshold output terminal, connected to the second pin of comparator 13 (i.e., the anode of U7).

[0102] Comparator 13 uses an adjustable reference integrated circuit U7 with a built-in reference voltage source. The first pin (reference terminal) of U7 is connected to the sampling voltage output terminal, the second pin (anode terminal) of U7 is connected to the undervoltage threshold output terminal, and the third pin (cathode terminal) of U7 is grounded.

[0103] Filter capacitor 14 is capacitor C24. The first terminal of capacitor C24 is connected to the DC output voltage of auxiliary power supply 40, and the second terminal of capacitor C24 is grounded.

[0104] The undervoltage lockout module 20 is mainly used to receive the undervoltage trigger signal output by the sampling comparison module 10, and in response to the undervoltage trigger signal, enter a self-locking state and output a lockout signal. The undervoltage lockout module 20 includes a trigger capacitor C23, a first switching transistor Q3, a second switching transistor Q2, a pull-up resistor R8, and a positive feedback branch 25. The positive feedback branch 25 includes a diode D13 and a sixth resistor R10.

[0105] The first end of the trigger capacitor C23 is connected to the output of the sampling comparison module 10 (i.e., the output of the comparator 13), and the second end of the trigger capacitor C23 is connected to the base of the first switching transistor Q3.

[0106] The first switching transistor Q3 is an NPN transistor. The base of the first switching transistor Q3 is connected to the second terminal of the trigger capacitor C23, the collector of Q3 is connected to the gate of the second switching transistor Q2, and the emitter of Q3 is grounded.

[0107] The second switch Q2 is a PMOS field-effect transistor. The source of the second switch Q2 is connected to the DC output voltage of the auxiliary power supply 40, the gate of Q2 is connected to the collector of the first switch Q3, and the drain of Q2 is connected to the input terminal of the enable control module 30.

[0108] The first end of the pull-up resistor R8 is connected to the DC output voltage of the auxiliary power supply 40, and the second end of the pull-up resistor R8 is connected to the gate of the second switching transistor Q2.

[0109] In the positive feedback branch 25, the anode of diode D13 is connected to the drain of the second switch Q2, the cathode of diode D13 is connected to the first terminal of the sixth resistor R10, and the second terminal of the sixth resistor R10 is connected to the base of the first switch Q3.

[0110] The enable control module 30 is mainly used to receive the lockout signal output by the undervoltage lockout module 20 and pull the enable terminal of the power control chip 50 to the off state. The enable control module 30 includes a drive resistor R6, an execution switch Q1, a seventh resistor R5, and an eighth resistor R7.

[0111] The first end of the drive resistor R6 is connected to the output terminal of the undervoltage lockout module 20 (i.e., the drain of the second switch Q2), and the second end of the drive resistor R6 is connected to the base of the execution switch Q1.

[0112] The switching transistor Q1 is an NPN transistor. The base of Q1 is connected to the second terminal of the drive resistor R6, the collector of Q1 is connected to the enable terminal of the power control chip 50, and the emitter of Q1 is grounded.

[0113] The first terminal of the seventh resistor R5 is connected to the DC output voltage of the auxiliary power supply 40, and the second terminal of the seventh resistor R5 is connected to the first terminal of the eighth resistor R7 and the enable terminal.

[0114] The first terminal of the eighth resistor R7 is connected to the second terminal of the seventh resistor R5 and the enable terminal, while the second terminal of the eighth resistor R7 is grounded. The enable signal for the power control chip 50 is obtained by voltage division between the seventh resistor R5 and the eighth resistor R7.

[0115] The auxiliary power supply 40 also includes a secondary first output voltage circuit and a secondary second output voltage circuit, which are used to provide drive voltage for the power transistors in the subsequent stage.

[0116] The secondary first-channel output voltage circuit includes rectifier diodes D5, D6, D7, and D8, a filter capacitor C14, a resistor R3, a capacitor C17, and a Zener diode ZD1. This secondary first-channel output voltage circuit outputs the first DC output voltage -Vo1.

[0117] The secondary second-path output voltage circuit includes rectifier diodes D9, D10, D11, and D12, filter capacitor C19, resistor R4, capacitor C22, and Zener diode ZD2. This secondary first-path output voltage circuit outputs the second DC output voltage -Vo2.

[0118] Based on the foregoing Figure 6 The circuit structure shown illustrates the working principle of the DC output voltage undervoltage protection device 1 described in this embodiment of the application, which is as follows:

[0119] First, under normal operating conditions: When the DC output voltage +VCC1 of the auxiliary power supply 40 is normal, the voltage after +VCC1 is divided by the first resistor R11 and the second resistor R14 is greater than the internal reference voltage of comparator U7. The internal transistor of U7 operates, and the second pin of U7 outputs 2V. The base voltage of the first switching transistor Q3, after being divided by the fourth resistor R12 and the fifth resistor R13, cannot turn on Q3, so Q3 remains off. When Q3 is off, the gate voltage of the second switching transistor Q2 is not pulled low, so Q2 remains off. At this time, the DC voltage +VCC1 is applied across the seventh resistor R5 and the eighth resistor R7. After being divided by the seventh resistor R5 and the eighth resistor R7, the enable terminal is high, and the power control chip 50 operates normally.

[0120] Second, under the undervoltage protection trigger state: When the DC output voltage +VCC1 of the auxiliary power supply 40 drops below the undervoltage threshold, the voltage of +VCC1 after being divided by R11 and R14 is less than the internal reference voltage of U7. The internal transistor of U7 is cut off, the internal comparator flips rapidly, and the voltage output of the second pin of U7 is equal to the real-time voltage of +VCC1 connected to the third resistor R9 (i.e., the current undervoltage value). At this time, the voltage across the trigger capacitor C23 changes abruptly from a very small value to this undervoltage value. The instantaneous charging of the capacitor is equivalent to a short circuit, making the instantaneous base voltage of the first switching transistor Q3 equal to this undervoltage value. This undervoltage value is greater than the gate voltage of the first switching transistor Q3, so the first switching transistor Q3 turns on. After the first switching transistor Q3 turns on, its collector is instantly grounded, and the gate of the second switching transistor Q2 is pulled low and turns on. After the second switch Q2 is turned on, an undervoltage value is applied to diode D13 and the sixth resistor R10. This undervoltage value is fed back to the base of the first switch Q3 through the positive feedback branch, keeping the first switch Q3 continuously on. At the same time, this undervoltage value drives the base of the execution switch Q1 through the drive resistor R6, turning on the execution switch Q1. The collector of the execution switch Q1 pulls the enable terminal low, thereby stopping the output of the power control chip 50 at the back end.

[0121] Third, self-locking maintenance state: After the positive feedback branch is established, even if the undervoltage trigger signal output by the sampling and comparison module 10 disappears, the first switch Q3 and the second switch Q2 will still remain in the conducting state, the enable terminal will remain at a low level, and the power control chip 50 will remain off.

[0122] Fourth, recovery state: When the DC voltage +VCC1 returns to normal output, the voltage after voltage division by the first resistor R11 and the second resistor R14 is greater than the reference voltage value inside U7. The comparator of U7 flips rapidly again, and the second pin of U7 outputs a 2V voltage, which draws the current from the base of the first switching transistor Q3, causing the first switching transistor Q3 to turn off quickly. The second switching transistor Q2 then turns off quickly, and the execution switching transistor Q1 turns off. The enable terminal immediately flips to a high level, triggering the power control chip 50 to output the normal voltage.

[0123] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0124] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0125] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An undervoltage protection device for DC output voltage, characterized in that, The device includes: a sampling comparison module, an undervoltage lockout module, an enable control module, and an auxiliary power supply. The input terminal of the sampling comparison module is connected to the DC output voltage of the auxiliary power supply. The output terminal of the sampling comparison module is connected to the input terminal of the undervoltage lockout module. The output terminal of the undervoltage lockout module is connected to the input terminal of the enable control module. The output terminal of the enable control module is connected to the enable terminal of the power control chip. The sampling comparison module is used to sample the DC output voltage and compare the sampled voltage with an undervoltage threshold. When the sampled voltage is lower than the undervoltage threshold, an undervoltage trigger signal is output. The undervoltage threshold is generated by the reference setting circuit inside the sampling comparison module. The undervoltage lockout module is used to receive the undervoltage trigger signal, and in response to the undervoltage trigger signal, enter a self-locking state and output a lockout signal; The enable control module is used to receive the lock signal and pull the level of the enable terminal to the off state to turn off the power control chip.

2. The apparatus according to claim 1, characterized in that, The sampling comparison module includes: The sampling voltage divider circuit includes a first resistor and a second resistor. The first end of the first resistor is connected to the DC output voltage, the second end of the first resistor is connected to the first end of the second resistor, the second end of the second resistor is grounded, and the connection point of the first resistor and the second resistor serves as the sampling voltage output terminal. The reference setting circuit includes a third resistor, a fourth resistor, and a fifth resistor. The first end of the third resistor is connected to the DC output voltage, the second end of the third resistor is connected to the first end of the fourth resistor, the second end of the fourth resistor is connected to the first end of the fifth resistor, the second end of the fifth resistor is grounded, and the connection point of the third resistor and the fourth resistor outputs the undervoltage threshold. A comparator, wherein the first input terminal of the comparator is connected to the sampling voltage output terminal, the second input terminal of the comparator is connected to the undervoltage threshold, and the output terminal of the comparator outputs the undervoltage trigger signal when the sampling voltage is lower than the undervoltage threshold.

3. The apparatus according to claim 2, characterized in that, The sampling comparison module further includes: a filter capacitor; The first terminal of the filter capacitor is connected to the DC output voltage, and the second terminal of the filter capacitor is grounded.

4. The apparatus according to claim 2, characterized in that, The comparator is an adjustable reference integrated circuit with a built-in reference voltage source, and the adjustable reference integrated circuit includes a reference terminal, a positive terminal, and a negative terminal; Wherein, the reference terminal serves as the first input terminal, the anode terminal serves as the second input terminal and the output terminal, and the cathode terminal is grounded.

5. The apparatus according to claim 1, characterized in that, The undervoltage lockout module includes: a trigger capacitor, a first switching transistor, a second switching transistor, and a pull-up resistor; Wherein, the first end of the trigger capacitor is connected to the output end of the sampling comparison module, the second end of the trigger capacitor is connected to the control end of the first switching transistor, the output end of the first switching transistor is connected to the control end of the second switching transistor, the output end of the second switching transistor is connected to the input end of the enable control module, the input end of the second switching transistor is connected to the DC output voltage, the first end of the pull-up resistor is connected to the DC output voltage, and the second end of the pull-up resistor is connected to the control end of the second switching transistor.

6. The apparatus according to claim 5, characterized in that, The undervoltage lockout module also includes a positive feedback branch, which includes a diode and a sixth resistor; The anode of the diode is connected to the output terminal of the second switching transistor, the cathode of the diode is connected to the first terminal of the sixth resistor, and the second terminal of the sixth resistor is connected to the control terminal of the first switching transistor.

7. The apparatus according to claim 5, characterized in that, The first switching transistor is an NPN transistor, which includes a base, a collector, and an emitter; Wherein, the base serves as the control terminal of the first switching transistor, the collector serves as the output terminal of the first switching transistor, and the emitter is grounded.

8. The apparatus according to claim 5, characterized in that, The second switch is a PMOS field-effect transistor, which includes a gate, a source, and a drain; Wherein, the gate serves as the control terminal of the second switch, the source serves as the input terminal of the second switch, and the drain serves as the output terminal of the second switch.

9. The apparatus according to claim 1, characterized in that, The enable control module includes: a drive resistor, an execution switch, a seventh resistor, and an eighth resistor; Wherein, the first end of the driving resistor is connected to the output end of the undervoltage lockout module, the second end of the driving resistor is connected to the control end of the execution switch, the first conducting end of the execution switch is connected to the enable end, the second conducting end of the execution switch is grounded, the first end of the seventh resistor is connected to the DC output voltage, the second end of the seventh resistor is connected to the first end of the eighth resistor, the second end of the eighth resistor is grounded, and the connection point of the seventh resistor and the eighth resistor is connected to the enable end.

10. The apparatus according to claim 9, characterized in that, The switching transistor is an NPN transistor, which includes a base, a collector, and an emitter. Wherein, the base serves as the control terminal of the execution switch, the collector serves as the first conducting terminal of the execution switch, and the emitter serves as the second conducting terminal of the execution switch.

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