Primary and passive cooperative protection device of primary and secondary fusion ring network box

Abstract

This application relates to the fields of distribution automation and relay protection technology, and discloses an active-passive coordinated protection device for a primary and secondary integrated ring main unit, including a communication quantization module, a token management module, a sampling and anchoring module, a bypass current shunting module, and a simulation and verification module. The communication quantization module is used to establish a peer-to-peer communication link and output communication status words; the token management module is used to extract the steady-state electrical quantities of each line branch when communication is normal, calculate the complex power differential current vector, and encapsulate it into a pre-armed token data packet written to volatile memory; the sampling and anchoring module is used to extract dynamic periodic time axis parameters; the bypass current shunting module is used to generate a closing time window based on circuit breaker position changes, block high-frequency simulations, and call instantaneous overcurrent protection; the simulation and verification module is used to output isolation commands when there is a fault and no communication messages. This invention breaks the rigid dependence on real-time communication, avoids cascading tripping caused by communication impairment, and improves the reliability of operation under complex working conditions.

Description

Technical Field

[0001] This invention relates to the field of power distribution automation and relay protection technology, specifically to a primary and secondary integrated ring network box with active and passive coordinated protection equipment. Background Technology

[0002] In urban power distribution networks, ring main units (RMUs) are the core hub nodes for power distribution and load transfer. With the continuous development of smart grids, the requirements for power supply reliability and fault recovery speed are increasing. Distributed distribution systems have emerged to address this need. These systems decentralize traditional centralized protection logic to the edge control terminals of each RMU, aiming to achieve fault isolation and power restoration to non-faulty areas within milliseconds through autonomous decision-making by local nodes, thereby enhancing the overall self-healing capability of the power distribution network.

[0003] Currently, mainstream distributed power distribution control schemes heavily rely on peer-to-peer communication links built using fiber optics or wireless Ethernet. When a short circuit or ground fault occurs on a line, the node that detects an abnormal over-limit current immediately sends a control message containing status word information to adjacent nodes in the topology. The protection device negotiates the fault boundary by exchanging such blocking or enabling signals. When a node detects fault characteristics, if it receives a blocking message from a downstream node within a set very short time window, the controller determines that the fault is located in the downstream external section and blocks the local trip output; conversely, if it does not receive the blocking message within the very short time window, it determines that the fault occurred within its own protection zone and triggers the local circuit breaker to operate.

[0004] However, the intense electromagnetic radiation accompanying severe short circuits in existing distribution networks can easily cause instantaneous congestion or physical interruption of communication channels between nodes. When the cooperative protection logic, lacking message constraints, fails directly, the system is forced to degrade to long-term local overcurrent protection. The significantly delayed fault clearing time easily triggers cascading trips from upstream substations. Using a fixed time window to extract historical waveforms for differential calculation inevitably produces phase misalignment, and distorted measurement results directly lead to logical misjudgments. Conventional abrupt change algorithms based on voltage-time derivatives face extremely low voltage amplitudes near the zero-crossing point of the AC waveform, failing to exceed the starting setpoint and resulting in protection failure. Furthermore, in the face of complex topologies with multiple line branches connected to a ring main unit, the polarity discrimination mechanism of a single line branch cannot accurately characterize the energy flow difference between internal bus short circuits and external line faults. Therefore, this invention provides a primary and secondary integrated ring main unit active-passive cooperative protection device to address the shortcomings of existing technologies. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides an active-passive collaborative protection device for primary and secondary integrated ring main units. This device solves the problem that when existing ring main units experience power grid faults accompanied by communication quality degradation or interruption, the collaborative protection logic is prone to failure and passively degrades to delayed overcurrent protection, leading to delayed fault isolation and an expanded over-tripping range. At the same time, conventional transient inference algorithms suffer from problems such as phase misalignment in data extraction and lack of boundary constraints when facing complex operating conditions such as AC zero-crossing, power grid frequency drift, short circuits on multiple branch busbars, and no-load closing.

[0006] To achieve the above objectives, the present invention provides a primary and secondary integrated ring network enclosure with active and passive coordinated protection, comprising: The communication quantization module is configured to establish a communication link, collect communication quality parameters, and output a communication status word. The token management module is configured to be driven by the communication status word in the normal state, extract the steady-state electrical quantities of each line branch, calculate the steady-state complex power differential current vector of the local node, and encapsulate it into a pre-armed token data packet and write it into volatile memory. The sampling and anchoring module is configured to separate and generate a high-frequency transient data stream and a low-frequency fundamental data stream in response to the state of the pre-armed token data packet, and extract dynamic periodic time axis parameters; The bypass shunt module is configured to monitor the mechanical auxiliary contact displacement of the local node circuit breaker, generate a closing time window based on the closing displacement characteristics, block high-frequency simulation within the closing time window, and call the instantaneous overcurrent protection logic to control the circuit breaker to perform fault isolation. The deduction and verification module is configured to isolate the high-frequency deduction algorithm when the pre-arming token data packet fails if the fault start signal is received outside the closing time window; and when the pre-arming token data packet remains valid, it combines the high-frequency transient data stream, dynamic periodic time axis parameters, and pre-arming token data packet to perform multi-dimensional transient feature verification and topology mapping verification, generate a first logical start identifier, a second logical polarity identifier, and a third logical topology identifier, and output an isolation command for the circuit breaker based on the comprehensive logical operation result.

[0007] Preferably, the communication quantization module is configured as follows: Extract the sequence number field and timestamp parameter from the control message header of the communication link, and calculate the packet loss rate and transmission delay offset within the sliding time window based on the sequence number field and timestamp parameter to form the communication quality parameters; The packet loss rate and transmission delay offset are discretized and compared with preset judgment thresholds, and multi-level threshold logic judgment is performed. Based on the logic judgment result, the communication status is judged as normal status, sub-health status or interruption status, and the corresponding communication status word is generated and output.

[0008] Preferably, the token management module is configured to: when encapsulating the pre-armed token data packet: The fundamental voltage phasor and fundamental current phasor of each line branch are extracted by discrete Fourier transform as the steady-state electrical quantities, and the complex power balance equation of the local node is constructed by applying Kirchhoff's current law. The steady-state complex power differential current vector is calculated based on the complex power balance equation. The steady-state complex power differential vector is concatenated and encapsulated with the device identification code and timestamp information to generate the pre-arming token data packet, and written into the static random access memory of the volatile memory as a physical topology reference parameter.

[0009] Preferably, the token management module further includes a forced reset mechanism, which is configured as follows: Real-time parallel monitoring of microprocessor hardware reset events, communication interruption events where the communication status word changes to an interrupt state, data buffer queue events with discontinuous data loss, and timeout events based on timestamp information; When any of the above events is detected, it is determined that the pre-armed token data packet in the current static random access memory has physically failed, and a hardware interrupt is immediately triggered to perform a physical zeroing operation on the corresponding address segment of the static random access memory, overwrite the invalidation flag bit, and isolate the execution of subsequent high-frequency inference algorithms.

[0010] Preferably, the sampling and anchoring module is configured as follows: After reading the flag bit of the pre-arming token data packet that remains valid in the volatile memory, the dual-channel sequence instruction is pre-written into the shadow register at the bottom layer of the analog-to-digital conversion unit. When the rising edge of the sampling clock arrives, the configuration parameters are synchronously loaded by the shadow register. A high-frequency direct-pass sequence for extracting broadband transient data at the first sampling rate and a low-frequency anti-aliasing sequence for extracting fundamental data at the second sampling rate after digital low-pass filtering are established respectively. The conversion results of the high-frequency passthrough sequence and the processing results of the low-frequency anti-aliasing sequence are sent to the high-speed buffer queue and the low-frequency fundamental wave operation queue, respectively, to construct the high-frequency transient data stream and the low-frequency fundamental wave data stream.

[0011] Preferably, the sampling and anchoring module is configured to, when extracting the dynamic periodic time axis parameters: The fundamental voltage phasor in the low-frequency fundamental data stream is input into the software phase-locked loop algorithm unit to track the zero-crossing phase of the fundamental voltage phasor, calculate and output the dynamic period time axis parameters in real time, generate a memory offset index based on the product of the dynamic period time axis parameters and the first sampling rate, and store it in the address register. Upon receiving the electrical fault start signal, a hardware interrupt is triggered, suspending the data write operation and forcibly fixing the memory offset index inside the address register to the dynamic cycle time axis parameter of the last stable cycle before the fault occurred.

[0012] Preferably, the bypass shunt module is configured as follows: The anti-jitter filtering logic is used to monitor the level transition edge of the mechanical auxiliary contact of the circuit breaker in real time. When the level transition edge is detected and it is determined that the circuit breaker has changed from the open state to the closed state, the internal timer is triggered to generate a closing time window with a fixed duration. If an electrical fault start signal is received within the closing time window, a hardware bypass command is output to the simulation and verification module, and the phase current amplitude is compared with the preset instantaneous current instantaneous overcurrent protection threshold for single-variable comparison. A tripping level signal is then output to control the circuit breaker to disconnect.

[0013] Preferably, when the deduction and verification module is configured to perform the multidimensional transient feature verification: When an electrical fault start signal is received outside the closing time window, the transient voltage sampling sequence and transient current sampling sequence of each line branch are extracted from the high-frequency transient data stream; A first-order difference algorithm is used to replace the differential operator to calculate the transient voltage sampling sequence and the transient current sampling sequence. A complementary transient energy function containing voltage time difference and current time difference operations is constructed by combining the normalization coefficient. The calculated value of the complementary transient energy function is compared with the transient change start-up setpoint to generate the first logic start-up identifier.

[0014] Preferably, the deduction and verification module is further configured as follows: A memory offset index is generated based on the dynamic periodic time axis parameters. Historical waveform data with phase alignment characteristics are extracted from the high-frequency transient data stream by subtracting the memory offset index from the current data pointer. The transient voltage and transient current are obtained by differential operation between the current sampled value and the historical waveform data. The product of the transient voltage and the transient current is calculated to generate the transient active power. The physical injection direction of the initial energy of the fault is determined according to the algebraic symbol, and a second logic polarity identifier is generated.

[0015] Preferably, when the deduction and verification module is configured to perform the topology mapping verification and output isolation instructions: Perform algebraic summation calculation on the transient change active power of all line branches of the local node, obtain the summation amount, and perform a comparison and mapping operation with the steady-state active power difference reference value extracted from the steady-state complex power difference vector contained in the pre-deployment token data, and generate a third logical topology identifier based on the algebraic topology verification mechanism. Perform a three-condition synchronous logical AND operation on the first logical start flag, the second logical polarity flag, and the third logical topology flag. When the first logical start flag, the second logical polarity flag, and the third logical topology flag are all determined to be valid true values, output the isolation command that controls the circuit breaker.

[0016] This invention provides a primary and secondary integrated ring network enclosure with coordinated active and passive protection. It has the following beneficial effects: 1. During steady-state operation, this invention quantifies the communication quality parameters of the communication link into communication status words, and encapsulates the calculated steady-state complex power differential current vector into a pre-arming token data packet based on the communication status words, writing it into volatile memory. When communication status impairment and a fault are detected, the device extracts steady-state data as topology constraints and performs local transient feature deduction, avoiding direct degradation to delayed overcurrent protection when communication is abnormal, thereby reducing the risk of cascading tripping; at the same time, the configured hardware forced zeroing mechanism ensures the physical failure of data in the event of abnormal restart or timeout, preventing malfunctions caused by calling outdated parameters.

[0017] 2. This invention separates and generates high-frequency transient data streams and low-frequency fundamental data streams through a low-level shadow register. While extracting fault transient characteristics, it uses digital low-pass filtering to eliminate frequency aliasing interference caused by high-frequency signal downsampling. Based on this, the device obtains dynamic periodic time axis parameters through a software phase-locked loop algorithm unit. At the instant the fault exceeds the limit signal, it freezes these dynamic periodic time axis parameters via a hardware interrupt. The frozen memory offset index is used to extract historical waveform data for differential calculation, effectively compensating for phase misalignment errors caused by bus voltage drops and grid frequency drift during short circuits, thus improving the accuracy of transient change calculations.

[0018] 3. This invention combines multiple electrical characteristics for cross-validation, utilizing the first-order differential absolute values ​​of voltage and current to construct a complementary transient energy function, overcoming the start-up blind zone when short-circuit faults occur at the zero-crossing point of the AC waveform. By calculating the transient transient active power of each line branch and performing algebraic summation, a summation quantity is obtained. By performing a comparison mapping operation between the summation quantity and the steady-state differential current reference value, the device can accurately distinguish between internal short circuits on the busbar where multiple energy sources converge and external line faults where a single energy source flows out. It introduces a closing time window based on the change in the mechanical auxiliary contacts of the circuit breaker and hardware bypass logic, automatically shielding the high-frequency deduction algorithm and invoking instantaneous overcurrent protection during no-load closing, avoiding algorithm crashes caused by missing historical data or inrush current. Attached Figure Description

[0019] Figure 1 This is a diagram of the device architecture of the present invention; Figure 2 This is a flowchart of the method steps of the present invention; Figure 3 This is a schematic diagram illustrating the working principle of heterogeneous communication state quantification and monitoring in this invention. Figure 4 This is a flowchart illustrating the token management and steady-state differential backup workflow of the present invention. Figure 5 This is a schematic diagram illustrating the working principle of the hardware decoupling sampling and phase anchoring of this invention. Figure 6 This is a schematic diagram illustrating the working principle of the mechanical condition monitoring and protection path diversion method of the present invention. Figure 7 This is a flowchart illustrating the transient deduction and cross-validation process of this invention. Figure 8 This is a comparison chart of the action time curves of different protection methods of the present invention. Detailed Implementation

[0020] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] See attached document Figure 1 The active and passive coordinated protection device for the primary and secondary integrated ring network box provided by the present invention may include: The communication quantization module is configured to establish communication links with adjacent ring network box nodes, and to statistically analyze the packet loss rate and transmission delay offset within a set sliding time window. Based on the packet loss rate and transmission delay offset, the communication quantization module classifies the communication status into normal, sub-healthy, and interrupted states, and generates and outputs the corresponding communication status words.

[0022] The token management module is configured to communicate with the communication quantization module. When the communication status word is in a normal state, the token management module collects the fundamental voltage phasor and fundamental current phasor of each line branch as steady-state electrical quantities, calculates the steady-state complex power differential current vector of the local node, encapsulates the steady-state complex power differential current vector into a pre-armed token data packet, and writes it into the static random access memory (SRAM) of the microprocessor's volatile memory. The token management module monitors the microprocessor's hardware reset event, communication interruption event when the communication status word changes to an interrupt state, data loss event due to discontinuous data in the data buffer queue, and timeout event based on timestamp information. When a trigger signal of any of the above events is received, the token management module performs a physical zeroing operation on the corresponding address segment of the SRAM.

[0023] The sampling and anchoring module is configured to work in conjunction with the token management module. Controlled by the presence of pre-armed token data packets, when it confirms that a valid pre-armed token data packet remains in the volatile memory, the sampling and anchoring module triggers the shadow register at the bottom layer of the analog-to-digital converter unit to establish a high-frequency pass-through sequence and a low-frequency anti-aliasing sequence. The high-frequency pass-through sequence extracts wideband transient data at the first sampling rate and pushes it into the direct memory access channel. The low-frequency anti-aliasing sequence blocks high-frequency signal components through a digital low-pass filter, performs downsampling processing, and then sends it to the low-frequency fundamental wave operation queue. The sampling and anchoring module uses a phase-locked loop (PLL) algorithm to track the zero-crossing phase of the fundamental voltage phasor and outputs dynamic periodic time axis parameters. Upon receiving an electrical fault initiation signal, the sampling and anchoring module freezes the PLL algorithm update operation, locking and maintaining the dynamic periodic time axis parameters of the last stable cycle before the fault occurred.

[0024] The bypass shunt module is configured to monitor the level transition edges of the circuit breaker's mechanical auxiliary contacts. When a level transition edge is detected and it is determined that the corresponding circuit breaker has transitioned from the open state to the closed state, the bypass shunt module opens a fixed-length closing time window and outputs a hardware bypass command within the closing time window. During this period, the bypass shunt module blocks the high-frequency transient deduction algorithm path, calls the instantaneous overcurrent protection logic based on the phase current amplitude, and performs fault isolation.

[0025] The deduction and verification module is configured to be electrically connected to the aforementioned modules. When an electrical fault initiation signal is detected outside the closing time window, the deduction and verification module takes over control based on the communication status word and memory contents. The deduction and verification module retrieves the transient voltage and transient current sampling sequences from the high-frequency transient data stream, constructs a complementary transient energy function including voltage time difference and current time difference operations, compares the calculated value of the complementary transient energy function with the transient sudden change initiation setting, and generates a first logical initiation identifier. The deduction and verification module extracts historical waveform data of the memory offset index at a specified time based on the dynamic periodic time axis parameters frozen by the sampling and anchoring module, calculates the transient sudden change active power of each line branch, and determines the physical injection direction of the initial fault energy based on algebraic symbols, generating a second logical polarity identifier. The deduction and verification module calculates the algebraic summation of the transient abrupt active power of all line branches, obtains the summation value, and performs a power algebra and interval mapping comparison with the steady-state complex power differential vector in the static random access memory. Based on the algebraic topology verification mechanism, a third logical topology identifier is generated. The deduction and verification module performs a logical AND operation on the first logical start identifier, the second logical polarity identifier, and the third logical topology identifier, and finally outputs the circuit breaker isolation command.

[0026] See attached document Figure 2 This invention provides a distributed intelligent power distribution control method for a ring main unit, comprising the following steps: S1, establish communication links between adjacent ring network box nodes, statistically analyze the packet loss rate and transmission delay offset within the set sliding time window, divide the communication status into normal state, sub-health state and interrupted state, and output the corresponding communication status.

[0027] S2, when the communication status word is in the normal state, calculates the steady-state complex power differential current vector based on the steady-state electrical quantities of each line branch, encapsulates it as a pre-armed token data packet and writes it into the static random access memory of the volatile memory, and performs a physical clearing operation on the corresponding address segment according to the trigger signal.

[0028] S3, based on the state trigger of the pre-deployed anti-token data packet, establishes a high-frequency pass-through sequence and a low-frequency anti-aliasing sequence, uses a phase-locked loop algorithm to track the zero-crossing phase of the fundamental voltage phasor, outputs dynamic periodic time axis parameters, and freezes the phase-locked loop algorithm update operation at the instant the electrical fault start signal is received.

[0029] S4 monitors the level transition edge of the mechanical auxiliary contact of the circuit breaker. When a closing state transition is detected, the closing time window is opened, and a hardware bypass command is output to block the high-frequency transient deduction algorithm path and call the instantaneous overcurrent protection logic to perform fault isolation.

[0030] S5: When an electrical fault initiation signal is detected outside the closing time window, a complementary transient energy function is constructed, and a first logical initiation identifier is generated based on the calculated value of the complementary transient energy function and the transient sudden initiation setting. Historical waveform data is extracted according to the frozen dynamic cycle time axis parameters, the transient sudden active power is calculated, and the physical injection direction of the initial fault energy is determined, generating a second logical polarity identifier. The algebraic summation result of the transient sudden active power is compared with the steady-state active power difference reference value through a four-quadrant mapping to generate a third logical topology identifier. The first logical initiation identifier, the second logical polarity identifier, and the third logical topology identifier are combined to perform logical operations and output the circuit breaker isolation command.

[0031] The steps and working principles of the present invention will be described in detail below with reference to specific embodiments.

[0032] See attached document Figure 3 In this embodiment, the specific implementation of step S1 regarding heterogeneous communication state quantification and monitoring is as follows.

[0033] During steady-state operation of the ring main unit, the communication quantization module configures the corresponding network interface according to the physical network medium at the ring main unit site to establish communication links between adjacent ring main unit nodes. If a fiber optic network environment is available at the site, a direct link is established via the fiber optic interface, using a substation event protocol oriented towards general objects for control message transmission. If a wireless network environment is used at the site, a wireless link is established using the wireless communication module, and the peer control messages (control messages of the communication link) are encapsulated in User Datagram Protocol (UDP) format for network layer transmission. For the specific protocol stack configuration process of the underlying physical link of the fiber optic or wireless network, those skilled in the art can configure conventional parameters by referring to relevant industrial communication standards. The underlying networking operation is well-known technology in this field and will not be elaborated upon here.

[0034] Considering that electromagnetic interference or channel congestion in the power distribution network operating environment can easily lead to delays or loss of control messages, the communication quantization module generates an adjustable sliding time window after the communication link is established. This window is used to periodically calculate communication quality parameters, including packet loss rate and transmission delay offset. The length of this sliding time window is set according to the peer control message transmission cycle and covers no less than 5 consecutive control message cycles. In one specific embodiment, the length of the sliding time window is 50ms to 200ms. Specifically, the communication quantization module determines the continuity of the data stream by extracting and verifying the sequence number field in the header of the received peer control message, and accordingly calculates the total number N of expected received messages within the sliding time window. tx and the number of valid messages actually successfully received, N rx This leads to the packet loss rate (PLR), which is calculated using the following formula: PLR=(N tx-N rx ) / N tx ×100%; Meanwhile, the communication quantization module extracts the timestamp parameter in the header of the peer control message, and obtains the transmission timestamp T of the message sender of the adjacent ring network cabinet node tx and the data reception timestamp T generated by the local network interface rx , and calculates the transmission delay offset ΔD based on the above timestamp parameters. The calculation formula is as follows: ΔD = |T rx - T tx - D base |; In the formula, D base is the inherent transmission reference delay of the physical link pre-calibrated by combining the hardware processing time of the network switching device and the theoretical propagation time of the cable medium.

[0035] After obtaining the continuous packet loss rate and transmission delay offset parameters, the communication quantization module calls a set of determination thresholds preset in the register, performs multi-level threshold logic determination, and discretizes the packet loss rate and transmission delay offset parameters into communication status words. This determination process is a threshold size comparison logic based on Boolean algebra, without involving weighted or fuzzy operations. The determination thresholds specifically include the first packet loss threshold Th1, the second packet loss threshold Th2, the first delay threshold Th3, and the second delay threshold Th4; among them, Th2 and Th4 are calibrated according to the maximum backup delay time tolerable by the relay protection system of the distribution network, and Th1 and Th3 are set based on the reasonable jitter margin of the conventional network channel. The above determination thresholds strictly satisfy Th1 < Th2 and Th3 < Th4 in the logical relationship. In a specific implementation example of a 10 kV urban distribution network project, the first packet loss threshold Th1 is set to 3% to 5%, the second packet loss threshold Th2 is set to 15% to 20%; the first delay threshold Th3 is set to 5 ms to 10 ms, and the second delay threshold Th4 is set to 20 ms to 30 ms.

[0036] For the discretized comparison process of the above packet loss rate, transmission delay offset parameters and determination thresholds, it is specifically divided into the following logical branches: When the packet loss rate satisfies PLR ≤ Th1 and the transmission delay offset satisfies ΔD ≤ Th3, it indicates that the current communication link is in a stable condition that supports the real-time condition of the distributed cooperative protection logic. The communication quantization module classifies the communication status as a normal state and outputs the first coding parameter as the corresponding communication status word to notify the token management module to perform the topology data backup operation normally; When the packet loss rate of the message satisfies PLR > Th2, or the transmission delay offset satisfies ΔD > Th4, or the communication underlying interface feeds back a physical layer carrier disconnection signal, it indicates that the communication link is severely damaged and cannot carry the effective transmission of protection service data. The communication quantization module classifies the communication state as the interruption state and outputs the third coding parameter as the corresponding communication status word. When the link operation parameters exclude the above normal state and interruption state and are between the two, that is, the packet loss rate of the message satisfies Th1 < PLR ≤ Th2 or the transmission delay offset satisfies Th3 < ΔD ≤ Th4, it characterizes that there are occasional packet losses or network jitter delays in the peer-to-peer communication link. The communication quantization module classifies the communication state as the sub-healthy state and outputs the second coding parameter as the corresponding communication status word.

[0037] After completing the above state classification, the communication quantization module writes the generated communication status word into the shared memory area of the microprocessor to be used as a constraint variable for subsequent diversion of the protection algorithm path.

[0038] Refer to Appendix Figure 4 , in this embodiment, the specific implementation manners of step S2 regarding token management and steady-state differential current backup are as follows.

[0039] After receiving the first coding parameter indicating that the current peer-to-peer communication link is in the normal state and the electrical quantity data has the timeliness for collaborative calculation, the token management module starts the calculation process of the steady-state complex power differential current vector. Specifically, for a ring network cabinet node that usually includes multiple physical incoming and outgoing line branches, the token management module uses the discrete Fourier transform to extract the fundamental wave voltage phasor and fundamental wave current phasor of each line branch. For the specific algorithm implementation of the discrete Fourier transform, those skilled in the art can make conventional configurations according to the digital signal processing specifications and will not be elaborated here.

[0040] It should be noted that in an ideal state, the total power of the internal bus of the ring network cabinet node should be zero. However, due to the inherent properties such as the leakage of the busbar-to-ground distributed capacitance and the excitation loss of each branch current transformer in the actual physical node, a small imbalance will occur. This imbalance is extracted as a fingerprint feature for subsequent topological identification of the fault area; assume that the ring network cabinet node includes N line branches, and let k be the branch index parameter, k = 1, 2,..., N. At the same time, set the positive direction of the current phasor of each line branch to be uniformly from the ring network cabinet busbar node to the external line, and denote the fundamental wave voltage phasor of the kth line branch extracted as and the fundamental wave current phasor as .

[0041] Based on the above parameter settings, the token management module constructs the complex power balance equation of the local node according to Kirchhoff's current law, in order to calculate the steady-state complex power differential current vector that objectively reflects the inherent distributed capacitance, capacitive reactance, and unbalanced loss characteristics of the busbars inside the current ring network box node. This establishes physical topology baseline parameters for subsequent identification of internal busbar faults and external line faults. The calculation formula is as follows: ; In the formula, Represents the fundamental current phasor The conjugate of complex numbers.

[0042] After calculating and obtaining the steady-state complex power differential current vector, the token management module concatenates this vector, the local node's device identification code, and the timestamp information used for subsequent data packet timeliness determination at the current moment, using a fixed byte length, to encapsulate and generate a pre-arming token data packet. To avoid control logic deadlock caused by historical residual data after abnormal restarts, the pre-arming token data packet follows storage medium-directed write constraints. That is, the token management module configures the microprocessor's register pointer to force the pre-arming token data packet to be written to a static random access memory (SRAM) with the characteristic of data loss upon power failure, thereby eliminating the risk of incorrectly calling outdated topology data to execute the protection program after a device power failure and restart.

[0043] To address situations where sudden changes in physical network topology or communication environment during actual operation render existing steady-state backup data meaningless for engineering reference, the token management module simultaneously activates a lifecycle constraint and forced zeroing mechanism for the pre-arming token data packet after it is written to the static random access memory. Specifically, if the communication quantization module outputs a second encoded parameter indicating a change in communication status to a sub-healthy state, the token management module will cease updating the pre-arming token data packet and temporarily maintain the existing data in the static random access memory.

[0044] During the operation of the above mechanism, the token management module monitors four types of security trigger events in real time and in parallel, including: a first type of hardware reset event, which identifies restart operations by monitoring changes in the microprocessor hardware reset pin level; a second type of communication interruption event, which determines whether the communication status has changed from a normal or sub-healthy state to an interrupted state by listening to the communication status word output by the communication quantization module; a third type of data loss event, which identifies whether the data buffer queue has overflowed or experienced discontinuous frame drops by monitoring the underlying direct memory access channel status register; and a fourth type of timeout failure event, which calculates the difference between the timestamp information in the pre-armed token data packet and the current clock and determines whether the difference is greater than a preset token survival threshold. The token survival threshold is set based on the ring network box load fluctuation cycle, the communication status update cycle, and the allowable retention time of topology data. In a specific embodiment, the token survival threshold is set to 1s to 5s.

[0045] Once the token management module detects any of the above events, it determines that the pre-armed token data packet in the current static random access memory (SRAM) has physically failed. This immediately triggers a high-priority hardware interrupt to perform a physical zeroing operation on the corresponding SRAM address segment, overwriting the data in the corresponding memory region with a preset invalidation flag. After the physical zeroing operation is completed, since the microprocessor memory no longer maintains a valid pre-armed token data packet, the subsequent high-frequency transient inference algorithm relying on physical topology reference parameters is automatically isolated due to a lack of constraints. At this point, the control logic smoothly degrades to the backup protection path based on the effective value of the local current, thus avoiding malfunctions caused by old parameters under communication impairment conditions through this forced zeroing mechanism.

[0046] See attached document Figure 5 In this embodiment, the specific implementation of hardware decoupling sampling and dynamic phase anchoring in step S3 is as follows.

[0047] After reading the valid flag of the pre-armed token data packet in the static random access memory of the token management module, the sampling and anchoring module confirms that the pre-armed token data packet in the static random access memory is valid, and then performs an operation to change the underlying hardware sampling architecture. Considering that directly modifying the analog-to-digital conversion configuration during microprocessor operation can easily cause sampling jitter or interrupt conflicts, the sampling and anchoring module pre-writes the dual-channel sequence instructions into the shadow register at the bottom layer of the analog-to-digital conversion unit. When the rising edge of the next sampling clock arrives, the shadow register synchronously loads the configuration parameters into the working register, thereby separating and establishing the high-frequency pass-through sequence and the low-frequency anti-aliasing sequence.

[0048] In this process, the high-frequency pass-through sequence is configured to operate at a first sampling rate F. HHigh-frequency transient data, including higher harmonics and transiently decaying DC, is extracted. The sampling and anchoring module initiates a low-level direct memory access channel to transmit the conversion results of the high-frequency passthrough sequence to an internal high-speed buffer queue for subsequent transient inference algorithms. Simultaneously, the low-frequency anti-aliasing sequence operates in parallel. To avoid Nyquist frequency aliasing caused by downsampling, which could lead to distortion in the fundamental phasor calculation, the sampling and anchoring module guides the low-frequency anti-aliasing sequence data stream to the microprocessor's built-in finite-length unit impulse response filter. After blocking high-frequency signal components above the Nyquist frequency through digital low-pass filtering, the data is then processed at a second sampling rate F. L Downsampling is performed, and the clean fundamental frequency data is sent to the low-frequency fundamental frequency processing queue. In one specific embodiment, the first sampling rate F H The value range is set to 4kHz to 12.8kHz, and the second sampling rate F L The value range is set to 1kHz to 2kHz.

[0049] After acquiring data from the low-frequency fundamental wave computation queue, the sampling and anchoring module extracts dynamic periodic time axis parameters to suppress calculation errors introduced by grid frequency drift. Addressing the phase deviation issue caused by extracting historical electrical quantities with a fixed time window when the actual operating frequency of the grid deviates from the rated power frequency, the sampling and anchoring module inputs the fundamental voltage phasor parameters from the low-frequency fundamental wave computation queue into the software phase-locked loop (PLL) algorithm unit. This PLL algorithm unit then uses closed-loop negative feedback to adjust and track the zero-crossing phase of the fundamental voltage phasor, thereby calculating and outputting the current grid's dynamic periodic time axis parameter T in real time. dyn The construction of the phase detector and the tuning of the loop filter parameters within the software phase-locked loop module can be conventionally designed by those skilled in the art based on the microprocessor control theory manual, and will not be elaborated here.

[0050] Subsequently, the sampling and anchoring module uses the acquired dynamic periodic time axis parameter T dyn Generate a memory offset index N to indicate the number of points in the high-frequency pass-through sequence that backtrack through a complete power frequency cycle in the cache queue. offset The calculation formula is as follows: N offset =Round (T dyn ×F H ); In the formula, Round() is a mathematical function that rounds to the nearest integer; considering that the cache queue is usually configured as a circular storage structure, the microprocessor uses the current data pointer minus the memory offset index N when performing actual physical addressing. offset The module obtains the physical memory address of the corresponding historical waveform data by performing a modulo operation on the total depth parameter of the high-speed buffer queue, and the sampling and anchoring module calculates the memory offset index N.offset Store it in the addressing register.

[0051] Furthermore, considering that when a near-end multi-phase short-circuit fault occurs in the distribution network, causing the bus voltage to drop to an extremely low level, the software phase-locked loop algorithm unit will lose lock due to the loss of an effective reference voltage source, resulting in distorted values ​​of the dynamic periodic time axis parameter output, which in turn causes the memory pointer to go out of bounds when extracting historical waveform data. The sampling and anchoring module is configured with a memory freeze mechanism for the above-mentioned operating conditions.

[0052] Specifically, real-time monitoring is performed on the electrical fault initiation signal issued by the electrical quantity protection element when the phase current amplitude suddenly changes or the voltage drops sharply beyond the preset initiation setting. Upon receiving the electrical fault initiation signal, the sampling and anchoring module triggers a hardware interrupt to suspend the data write operation from the software phase-locked loop algorithm unit to the address register, and executes a parameter locking instruction to set the memory offset index N within the address register. offset The calculation results are forcibly frozen to the last stable cycle before the fault occurs. By implementing the above memory freeze operation, a relatively stable historical waveform data traceability pointer can be maintained during the short-circuit transient fluctuation period, thus providing a reliable data addressing basis for subsequent calculations of transient voltage and transient current.

[0053] See attached document Figure 6 In this embodiment, the specific implementation method of mechanical condition monitoring and protection path diversion in step S4 is as follows.

[0054] In actual power distribution network operation scenarios, when a circuit breaker is in the open state, the relevant steady-state electrical quantities and pre-armed token data packets are empty due to the line being unloaded. When the equipment performs an unloaded closing operation, the inrush current and operational overvoltage will generate severe electrical transient fluctuations. For the extreme condition of closing on a faulty line, due to the lack of pre-fault steady-state baseline data, high-frequency transient inference algorithms are prone to misjudgment or microprocessor division-by-zero anomalies. Therefore, the bypass shunting module introduces an identification and shunting mechanism based on the mechanical state of the circuit breaker.

[0055] Specifically, the digital input port inside the bypass shunt module is electrically connected to the mechanical auxiliary normally open or normally closed contacts of the ring main unit circuit breaker, and the bypass shunt module is equipped with an edge detection interrupt program for real-time monitoring of the level transition edges of the digital input port. Considering the inherent physical bounce phenomenon of the mechanical auxiliary contacts during operation, the bypass shunt module is configured with anti-jitter filtering logic at the digital input port. That is, after detecting a level signal transition, a preset anti-jitter time is delayed, and the port level is read again to confirm that the state is stable. This anti-jitter time is set according to the bounce duration of the circuit breaker's mechanical auxiliary contacts. In a specific embodiment, the anti-jitter time is 5ms to 20ms. When it is confirmed that the level signal has a rising edge or falling edge transition from low to high or from high to low, and it can be determined from the transition characteristics that the circuit breaker has changed from the open state to the closed state, the edge detection interrupt program of the bypass shunt module triggers the internal timer.

[0056] The internal timer starts counting from zero and generates a logic flag F after being triggered. sotf When the internal timer's timing value t is less than the preset closing time window constant T win During the period of (the duration of the closing time window), the bypass shunt module will set the logic flag F. sotf Set to high level active state. When the timing value t is greater than or equal to the closing time window constant T. win At that time, the bypass shunt module will set the logic flag F. sotf The system is reset to a low-level invalid state and the internal timer is stopped. The closing time window constant T is also specified. win The value range is set to cover the conventional protection setting parameters for the closing inrush current decay period. In one specific embodiment, its typical value range is 100 milliseconds to 200 milliseconds.

[0057] In logical flag F sotf During the closing time window maintained at a high level, if the microprocessor's underlying protection task receives an electrical fault initiation signal indicating an excessive current amplitude or voltage drop, the bypass shunt module will trigger a path switch in the protection state machine, i.e., output a hardware bypass command to the transient simulation and cross-verification module. This hardware bypass command suspends the simulation and verification module, thereby blocking the execution of all high-frequency transient simulation algorithms that rely on pre-armed token data packets and dynamic periodic time axis parameters.

[0058] Simultaneously with issuing the hardware bypass command, the bypass shunt module switches the protection action logic to the conventional instantaneous overcurrent protection path, retrieves the phase current amplitude from the low-frequency fundamental wave calculation queue, and performs a single-variable comparison with the preset instantaneous overcurrent protection threshold. The instantaneous overcurrent protection threshold is set based on avoiding the maximum inrush current peak value of the downstream transformer and matching the coefficients according to the expected maximum short-circuit current. Instantaneous overcurrent protection threshold I set According to I set >K1I inrush_max And I set <K2I sc_min Tuning is performed, where I inrush_max I represents the peak value of the maximum inrush current of the downstream transformer. sc_min K1 represents the minimum short-circuit current within the protection zone, K2 is the inrush current avoidance coefficient, and K1 is the sensitivity matching coefficient. For the specific derivation of the setting calculations, those skilled in the art can refer to the relevant power system relay protection setting regulations, which will not be elaborated here.

[0059] When the phase current amplitude exceeds the instantaneous overcurrent protection threshold, the bypass shunt module directly outputs a trip level signal to drive the corresponding circuit breaker to perform the disconnection operation, based on the bypass communication status and topology verification constraints. This shunt mechanism effectively isolates the algorithm fluctuation risk caused by the lack of historical waveform data during no-load closing, serving as a backup processing procedure for closing under fault conditions.

[0060] Subsequently, when the logic flag F sotf After being reset to a low-level invalid state, the bypass shunt module cancels the hardware bypass command, at which point it is determined that the distribution network has passed the closing transient and entered a steady-state operation period. Subsequent electrical faults will be handled by the deduction and verification module through a local collaborative rapid verification process based on the communication status words output by the token management module and the communication quantization module.

[0061] See attached document Figure 7 In this embodiment, the specific implementation of step S5 regarding multidimensional transient deduction and rapid cross-validation is as follows.

[0062] When the circuit breaker smoothly passes the inrush current closing phase and is outside the closing time window, if the underlying protection task detects a current or voltage over-limit start signal and the communication status word does not meet the normal state, the deduction and verification module will activate the execution path of the control algorithm. That is, by reading the pre-arming token data packet in the static random access memory, it enters the rapid deduction process based on multi-dimensional transient electrical quantity verification.

[0063] Considering that the instantaneous electrical quantity change amplitude during a short-circuit fault in an AC power grid is closely related to the initial phase angle of the fault, if the fault occurs near the zero-crossing point of the voltage waveform, relying solely on the derivative of voltage over time is insufficient to effectively trigger the initiation criterion. Therefore, in the digital computing environment of the microprocessor, the deduction and verification module retrieves high-speed buffer queue data generated by the high-frequency direct-through sequence, and extracts the transient voltage sampling sequence u for any line branch k. k [n] and transient current sampling sequence i k [n], where n is the discrete sequence index of the current sampling point.

[0064] Since microprocessors cannot directly process continuous-time differentials, the derivation and verification module uses a first-order difference algorithm to replace the differential operator, calculating the transient voltage and current sampling sequences. Based on the physical characteristic that voltage and current in an inductive network have an approximately 90-degree phase difference, a complementary transient energy function E is constructed. trans [n], the specific calculation formula is as follows: ; In the formula, u k [n-1] represents the transient voltage sample value extracted by line branch k at the previous sampling point n-1, i k [n-1] represents the transient current sample value extracted from the previous sampling point n-1 at line branch k, T s Here, α is the discrete sampling interval for the high-frequency direct-through sequence, β is the voltage normalization coefficient set based on the nominal operating voltage, and β is the current normalization coefficient set based on the line rated load current. In a specific embodiment, α is the reciprocal of the nominal voltage peak value, and β is the reciprocal of the rated current peak value.

[0065] The complementary transient energy function E is calculated by unifying the dimensions using normalized coefficients. trans [n] exhibits identifiable jump characteristics at any short-circuit initial phase angle. The derivation and verification module uses the complementary transient energy function E trans The calculated value of [n] is compared with the transient change start-up setting value set in the register, and a valid first logical start-up flag is generated when the calculated value exceeds the transient change start-up setting value. The transient change start-up setting value is set at 1.2 to 1.5 times the steady-state calculated value of the complementary transient energy function under the rated load state of each branch line to ensure that the maximum unbalanced load fluctuation and normal operating condition disturbance of the system are avoided.

[0066] After generating the first logical start flag, the deduction and verification module further calculates the pure fault mutation amount of each line branch. Specifically, the deduction and verification module reads the memory offset index N generated by the sampling and anchoring module at the moment of fault freezing. offsetThe corresponding historical waveform data is extracted from the high-speed buffer queue by subtracting the memory offset index from the current data pointer. This historical waveform data with phase alignment characteristics can effectively compensate for the impact of power grid frequency drift at the moment of the fault.

[0067] Subsequently, the deduction and verification module obtains the transient voltage change Δu of each line branch by performing a difference operation between the current sampled value and the aforementioned historical periodic sampled values. k [n] and transient sudden current Δi k [n], the specific difference formula is: Δu k [n]=u k [n]-u k [nN offset ]; Δi k [n]=i k [n]-i k [nN offset ]; Among them, u k [nN offset [i] represents the historical period voltage waveform data extracted from the k-th line branch, where i k [nN offset [ ] represents the historical cycle current waveform data extracted from the k-th line branch.

[0068] Based on this, the deduction and verification module calculates the transient active power ΔP of line branch k. k =Δu k [n]×Δi k [n]; Combining the preset positive current reference direction, the deduction and verification module is based on ΔP k The algebraic symbols determine the physical injection direction of the initial energy of the fault, and record the polarity of the transient change in active power of each line branch accordingly, generating a second logical polarity identifier.

[0069] Considering the fundamental differences in local energy flow characteristics exhibited by the ring main unit as a hub node with multiple branches when experiencing internal busbar short circuits versus external single outgoing line short circuits, the deduction and verification module performs algebraic summation calculations on the transient transient active power of all N line branches of the local node to obtain the summation quantity representing the overall transient energy convergence degree of the node. Simultaneously, the deduction and verification module analyzes the steady-state complex power differential current vector carried in the pre-armed token data packet in the volatile memory. The real part of the steady-state complex power differential current vector is extracted. Since the steady-state complex power differential current vector consists of active power and reactive power components in an electrical and physical sense, the extracted real part represents the inherent active power loss of the local node. As a reference value for steady-state active power difference.

[0070] The deduction and verification module will calculate the summation quantity ΔP mentioned above. node A comparison mapping operation is performed with the steady-state active power difference reference value. The complete mapping rule is as follows: When the mapping result indicates the summation quantity ΔP node Satisfy logical expression At that time, it was determined to be an internal short-circuit fault in the busbar. Among them, P... set P is the bus fault judgment threshold set based on the measurement error of the current transformer. set The value is set to 3% to 5% of the total rated active power of all line branches at the local node to ensure complete coverage of the comprehensive measurement error of the current transformers of each branch and the leakage power of the distributed capacitance of the line, and to prevent misjudgment when the fault outside the zone is accompanied by slight saturation of the current transformers. When it is determined that the power supply of each line branch is injecting short-circuit energy into the ring network box node, the current operating condition is identified as an internal short-circuit fault of the bus, and the isolation logic of the single line is blocked. When the mapping result indicates the summation quantity ΔP node The deviation from the steady-state active power differential reference value is within the preset tolerance band, i.e. If the transient change in active power polarity of only one line branch shows a unidirectional outflow from the bus to the external line, then it is determined that the line branch has a short circuit in the area. The deduction and verification module generates a third logical topology identifier to confirm the fault in the line area based on this algebraic topology verification mechanism. When the deviation of the mapping result is within the above-mentioned preset tolerance band, and there are no line branches with positive transient active power, the current operating condition is determined to be an external fault or a normal load impact of the system. The system does not generate a valid third logical topology identifier and maintains the original power supply status.

[0071] Finally, the deduction and verification module summarizes the output results of the above independent verification processes and performs a comprehensive judgment and decision. Specifically, it performs a three-condition synchronous AND operation on the first logic start flag, the second logic polarity flag, and the third logic topology flag using internal hardware logic gates or Boolean operations. When all three logic flags are determined to be valid true values, the deduction and verification module determines that a short-circuit fault has occurred in the line branch and outputs a high-level trip command with no delay within a millisecond time window to drive the trip coil of the corresponding circuit breaker to complete fault isolation. When any one of the first logic start flag, the second logic polarity flag, or the third logic topology flag is determined to be an invalid false value, the deduction and verification module automatically blocks the output circuit of the trip command. Control then transfers to the conventional overcurrent or zero-sequence backup protection task corresponding to the low-frequency anti-aliasing sequence in the sampling and anchoring module, waiting for the time-limited logic to complete the subsequent judgment.

[0072] In a specific application embodiment, the device of the present invention is applied to a 10kV urban distribution network ring network power supply line. This line includes a first ring network box A, a second ring network box B, and a third ring network box C, which are connected sequentially by cable lines and powered by the 10kV busbar of the upstream substation. A line branch L1 is provided between the first ring network box A and the second ring network box B, and a line branch L2 is provided between the second ring network box B and the third ring network box C. The third ring network box C is also connected to a user-side feeder L3. Each ring network box is equipped with a circuit breaker, an electronic current transformer, an electronic voltage transformer, a microprocessor control unit, a communication interface unit, and the functional modules described in this invention.

[0073] During normal operation, ring network boxes A, B, and C establish peer-to-peer communication links via fiber optic links, while a wireless communication link is reserved as a backup channel. During steady-state operation, communication quality parameters between adjacent ring network box nodes are continuously monitored, and when the communication status meets the requirements for distributed protection coordination, the steady-state electrical characteristics of each ring network box node are locally backed up. Taking the second ring network box B as an example, its microprocessor stores pre-arming token data packets related to line branches L1 and L2 and the busbar of the local node in static random access memory. These pre-arming token data packets are not written to non-volatile memory and are immediately cleared upon communication interruption, data cache abnormality, hardware reset, or token timeout.

[0074] When a short-circuit fault occurs in line branch L2, the second ring network box B first receives a current surge and voltage drop initiation signal. If the peer communication link is in a sub-healthy state at this time, the ring network box no longer relies on real-time interactive messages to complete fault diagnosis. Instead, it calls the pre-armed token data packet saved before the fault and performs local extrapolation by combining the transient voltage sampling sequence and transient current sampling sequence in the high-frequency transient data stream. It confirms whether the fault is within the control range of this ring network box by jointly analyzing waveform changes before and after the fault, branch energy direction, and node topology mapping. When all three types of diagnosis results meet the action conditions, the second ring network box B sends a signal to line branch L2. 2 corresponds to the circuit breaker outputting an isolation command, which enables the faulty line to be quickly disconnected.

[0075] When the second ring network box B is in the newly closed state, the circuit breaker's mechanical auxiliary contacts are detected to have switched from the open state to the closed state, and a closing time window is opened. Within this closing time window, even if a current exceeding the limit or a voltage drop occurs, the transient extrapolation path relying on pre-fault steady-state data is not activated; instead, the instantaneous overcurrent protection logic based on the local current amplitude is directly entered. This approach is suitable for scenarios such as closing the circuit on a faulty line, inrush current during closing an unloaded cable, and overvoltage during closing operations, and can avoid misjudgments caused by the lack of pre-fault baseline data.

[0076] The verification objects include traditional local overcurrent protection methods, collaborative protection methods relying on real-time communication, and the distributed intelligent power distribution control method described in this invention. Verification conditions include faults within the line zone, faults inside the busbar, faults on adjacent external lines, sub-optimal communication conditions, and fault-closed states. Protection action time, isolation results, and malfunctions were recorded for each condition, as shown in the table below. A comparison of verification results for different protection methods under typical conditions is as follows: L2 Single-phase ground fault Normal state 318.6 41.8 13.4 Disconnect the circuit breaker at L2 0 L2 two-phase short circuit fault Sub-health 286.5 96.7 9.8 Disconnect the circuit breaker at L2 0 The second ring mesh cage B busbar internal short circuit Sub-health 74.2 Failure 15.6 Single-line blockage trip 0 A fault in the external adjacent feeder of the third ring network box C. Interruption status 342.8 Failure 306.4 Switch to backup protection 0 The second ring network box B was closed due to a fault at L2. Normal state 23.5 58.2 17.9 Instantaneous disconnection of circuit breaker L2 0 L1 zone external load impact Sub-health 352.1 Failure No action taken Keep running 0 See attached document Figure 8 According to the data in the table above, when the communication status is normal, the action time of the present invention is lower than that of traditional local overcurrent protection and close to or better than that of real-time communication cooperative protection. When the communication is in a sub-healthy state, the action time of real-time communication cooperative protection is extended, while the present invention can still rely on the pre-armed token data packet and high-frequency transient data stream to complete the rapid judgment. In the case of communication interruption and failure of the pre-armed token data packet, the present invention does not continue to call the failed topology data, but switches to the backup protection path, thus avoiding non-selective tripping under the condition of communication impairment.

[0077] Under the condition of internal bus fault, the present invention can identify the characteristics of energy from multiple branches converging into the node and block the isolation logic of a single line branch to avoid misjudging the internal bus fault as an external adjacent line fault. Under the condition of load impact outside the zone, although the local current increases for a short time, the transient change direction and the topological constraint relationship do not meet the fault conditions of the line zone, so no trip command is output, and the continuous power supply of non-faulty lines is maintained.

[0078] When the circuit breaker is closed under fault conditions, the present invention identifies the closing process through the mechanical auxiliary contacts of the circuit breaker and shields the high-frequency transient deduction path within the closing time window, replacing it with instantaneous overcurrent protection logic for isolation. This method reduces the impact of the no-load closing transient process on the algorithm's judgment, avoids control anomalies caused by missing data before the fault, and is suitable for operating scenarios such as frequent switching in ring main units, power restoration after line maintenance, and accidental closing of faulty lines.

[0079] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A primary and secondary integrated ring main unit with active and passive coordinated protection device, characterized in that, include: The communication quantization module is configured to establish a communication link, collect communication quality parameters, and output a communication status word. The token management module is configured to be driven by the communication status word in the normal state, extract the steady-state electrical quantities of each line branch, calculate the steady-state complex power differential current vector of the local node, and encapsulate it into a pre-armed token data packet and write it into volatile memory. The sampling and anchoring module is configured to separate and generate a high-frequency transient data stream and a low-frequency fundamental data stream in response to the state of the pre-armed token data packet, and extract dynamic periodic time axis parameters; The bypass shunt module is configured to monitor the mechanical auxiliary contact displacement of the local node circuit breaker, generate a closing time window based on the closing displacement characteristics, block high-frequency simulation within the closing time window, and call the instantaneous overcurrent protection logic to control the circuit breaker to perform fault isolation. The deduction and verification module is configured to isolate the high-frequency deduction algorithm when the pre-arming token data packet fails if the fault start signal is received outside the closing time window; and when the pre-arming token data packet remains valid, it combines the high-frequency transient data stream, dynamic periodic time axis parameters, and pre-arming token data packet to perform multi-dimensional transient feature verification and topology mapping verification, generate a first logical start identifier, a second logical polarity identifier, and a third logical topology identifier, and output an isolation command for the circuit breaker based on the comprehensive logical operation result.

2. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 1, characterized in that, The communication quantization module is configured as follows: Extract the sequence number field and timestamp parameter from the control message header of the communication link, and calculate the packet loss rate and transmission delay offset within the sliding time window based on the sequence number field and timestamp parameter to form the communication quality parameters; The packet loss rate and transmission delay offset are discretized and compared with preset judgment thresholds, and multi-level threshold logic judgment is performed. Based on the calculation results, the communication status is judged as normal, sub-healthy or interrupted, and the corresponding communication status word is generated and output.

3. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 1, characterized in that, The token management module is configured to, when encapsulating the pre-armed token data packet: The fundamental voltage phasor and fundamental current phasor of each line branch are extracted by discrete Fourier transform as the steady-state electrical quantities, and the complex power balance equation of the local node is constructed by applying Kirchhoff's current law. The steady-state complex power differential current vector is calculated based on the complex power balance equation. The steady-state complex power differential vector is concatenated and encapsulated with the device identification code and timestamp information to generate the pre-arming token data packet, and written into the static random access memory of the volatile memory as a physical topology reference parameter.

4. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 3, characterized in that, The token management module also includes a forced reset mechanism, which is configured as follows: Real-time parallel monitoring of microprocessor hardware reset events, communication interruption events where the communication status word changes to an interrupt state, data buffer queue events with discontinuous data loss, and timeout events based on timestamp information; When any of the above events is detected, it is determined that the pre-armed token data packet in the current static random access memory has physically failed, and a hardware interrupt is immediately triggered to perform a physical zeroing operation on the corresponding address segment of the static random access memory, overwrite the invalidation flag bit, and isolate the execution of subsequent high-frequency inference algorithms.

5. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 1, characterized in that, The sampling and anchoring module is configured as follows: After reading the flag bit of the pre-arming token data packet that remains valid in the volatile memory, the dual-channel sequence instruction is pre-written into the shadow register at the bottom layer of the analog-to-digital conversion unit. When the rising edge of the sampling clock arrives, the configuration parameters are synchronously loaded by the shadow register. A high-frequency direct-pass sequence for extracting broadband transient data at the first sampling rate and a low-frequency anti-aliasing sequence for extracting fundamental data at the second sampling rate after digital low-pass filtering are established respectively. The conversion results of the high-frequency passthrough sequence and the processing results of the low-frequency anti-aliasing sequence are sent to the high-speed buffer queue and the low-frequency fundamental wave operation queue, respectively, to construct the high-frequency transient data stream and the low-frequency fundamental wave data stream.

6. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 5, characterized in that, The sampling and anchoring module is configured to, when extracting the dynamic periodic time axis parameters: The fundamental voltage phasor in the low-frequency fundamental data stream is input into the software phase-locked loop algorithm unit to track the zero-crossing phase of the fundamental voltage phasor, calculate and output the dynamic period time axis parameters in real time, generate a memory offset index based on the product of the dynamic period time axis parameters and the first sampling rate, and store it in the address register. Upon receiving the electrical fault start signal, a hardware interrupt is triggered, suspending the data write operation and forcibly fixing the memory offset index inside the address register to the dynamic cycle time axis parameter of the last stable cycle before the fault occurred.

7. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 1, characterized in that, The bypass shunt module is configured as follows: The anti-jitter filtering logic is used to monitor the level transition edge of the mechanical auxiliary contact of the circuit breaker in real time. When the level transition edge is detected and it is determined that the circuit breaker has changed from the open state to the closed state, the internal timer is triggered to generate a closing time window with a fixed duration. If an electrical fault start signal is received within the closing time window, a hardware bypass command is output to the simulation and verification module, and the phase current amplitude is compared with the preset instantaneous current instantaneous overcurrent protection threshold for single-variable comparison. A tripping level signal is then output to control the circuit breaker to disconnect.

8. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 1, characterized in that, When the deduction and verification module is configured to perform the multidimensional transient feature verification: When an electrical fault start signal is received outside the closing time window, the transient voltage sampling sequence and transient current sampling sequence of each line branch are extracted from the high-frequency transient data stream; A first-order difference algorithm is used to replace the differential operator to calculate the transient voltage sampling sequence and the transient current sampling sequence. A complementary transient energy function containing voltage time difference and current time difference operations is constructed by combining the normalization coefficient. The calculated value of the complementary transient energy function is compared with the transient change start-up setpoint to generate the first logic start-up identifier.

9. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 8, characterized in that, The deduction and verification module is also configured as follows: A memory offset index is generated based on the dynamic periodic time axis parameters. Historical waveform data with phase alignment characteristics are extracted from the high-frequency transient data stream by subtracting the memory offset index from the current data pointer. The transient voltage and transient current are obtained by differential operation between the current sampled value and the historical waveform data. The product of the transient voltage and the transient current is calculated to generate the transient active power. The physical injection direction of the initial energy of the fault is determined according to the algebraic symbol, and a second logic polarity identifier is generated.

10. The active and passive coordinated protection device for the primary and secondary integrated ring network box according to claim 9, characterized in that, When the deduction and verification module is configured to perform the topology mapping verification and output isolation instructions: Perform algebraic summation calculation on the transient change active power of all line branches of the local node, obtain the summation amount, and perform a comparison and mapping operation with the steady-state active power difference reference value extracted from the steady-state complex power difference vector contained in the pre-deployment token data, and generate a third logical topology identifier based on the algebraic topology verification mechanism. Perform a three-condition synchronous logical AND operation on the first logical start flag, the second logical polarity flag, and the third logical topology flag. When the first logical start flag, the second logical polarity flag, and the third logical topology flag are all determined to be valid true values, output the isolation command that controls the circuit breaker.

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