Power switching circuit, power supply system and electronic device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN LOWPOWER SEMICON CO LTD
- Filing Date
- 2026-07-08
- Publication Date
- 2026-08-07
AI Technical Summary
本申请实施例提供了一种电源切换电路,包括比较模块、检测模块、逻辑模块和选择模块,逻辑模块分别与检测模块、选择模块和比较模块连接,选择模块与比较模块连接,比较模块和选择模块均用于接收第一供电信号和第二供电信号,检测模块用于接收第一供电信号和参考电压信号。
Smart Images

Figure CN122533233A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of electronic circuit technology, and in particular relates to a power switching circuit, a power supply system and an electronic device. Background Technology
[0002] With the continuous development of integrated circuit technology, chip power supply systems are becoming increasingly complex, and applications using dual or multiple power supplies within chips are becoming more common. To avoid the need for numerous level shifters when transmitting signals across multiple power domains within the same system, it is necessary to unify the power supply within the system.
[0003] However, in practical applications, there are not only strict requirements on the power consumption of each power supply, but also the need to ensure that the system can operate normally when powered by a single power supply. Therefore, there is an urgent need for a power switching circuit that can ensure the system meets power consumption requirements and operates stably in both single-power supply and dual-power supply modes. Summary of the Invention
[0004] This application provides a power switching circuit, a power supply system, and an electronic device, which enables the power supply system to meet power consumption requirements and operate stably in both single-power supply and dual-power supply modes.
[0005] In a first aspect, embodiments of this application provide a power switching circuit, including a comparison module, a detection module, a logic module, and a selection module. The logic module is connected to the detection module, the selection module, and the comparison module, respectively. The selection module is connected to the comparison module. Both the comparison module and the selection module are used to receive a first power supply signal and a second power supply signal. The detection module is used to receive the first power supply signal and a reference voltage signal. The detection module is used to output a detection signal based on the reference voltage signal and the first power supply signal; the comparison module is used to output a comparison signal based on the first power supply signal and the second power supply signal, and simultaneously selects the signal with the higher voltage between the first power supply signal and the second power supply signal as the first signal, and transmits it to the selection module to ensure that there is no leakage path in the selection module; the logic module is used to output a first logic signal and a second logic signal based on the detection signal and the comparison signal; the selection module is used to select the first power supply signal and the second power supply signal based on the first logic signal and the second logic signal. When the first power supply signal is less than a preset threshold voltage and the second power supply signal is greater than the first power supply signal, the second power supply signal is selected as the target power supply signal; when the first power supply signal is greater than or equal to the preset threshold voltage, or when the first power supply signal is greater than the second power supply signal, the first power supply signal is selected as the target power supply signal.
[0006] In one possible implementation of the first aspect, the comparison module includes a comparison unit, a voltage selection unit, and a logic unit. The logic module is connected to the logic unit and the voltage selection unit, respectively. The logic unit is connected to the comparison unit and the voltage selection unit, respectively. The voltage selection unit is connected to the selection module. Both the comparison unit and the voltage selection unit are used to receive a first power supply signal and a second power supply signal. The comparison unit is used to output a second signal based on the first power supply signal and the second power supply signal; the logic unit is used to output a comparison signal and a third signal based on the second signal; the voltage selection unit is used to select the signal with the higher voltage between the first power supply signal and the second power supply signal as the first signal based on the third signal and the comparison signal, and transmit it to the selection module to ensure that there is no leakage path in the selection module.
[0007] In one possible implementation of the first aspect, the comparison unit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a first resistor. The source of the first transistor is used to receive a first power supply signal, the source of the second transistor is used to receive a second power supply signal, the gate of the first transistor is connected to the gate of the second transistor, the drain of the first transistor, and the drain of the third transistor, respectively, the drain of the second transistor is connected to the drain of the fourth transistor, the gate of the fourth transistor, and the gate of the sixth transistor, respectively, and the gate of the third transistor is connected to... The sixth transistor is connected to the gate of the fifth transistor, the drain of the fifth transistor, the first terminal of the first resistor, and the gate of the seventh transistor. The drain of the sixth transistor is connected to the drain of the eighth transistor, the gate of the eighth transistor, and the gate of the ninth transistor. The second terminal of the first resistor, the source of the eighth transistor, and the source of the ninth transistor all receive the target power supply signal or the first signal. The drain of the ninth transistor is connected to the drain of the seventh transistor and to the logic unit. The sources of the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are all grounded.
[0008] In one possible implementation of the first aspect, the voltage selection unit includes a tenth transistor and an eleventh transistor, the gate of the tenth transistor is connected to the logic unit, the drain of the tenth transistor is used to receive a second power supply signal, the source of the tenth transistor is connected to the source of the eleventh transistor and the selection module, the drain of the eleventh transistor is used to receive a first power supply signal, and the gate of the eleventh transistor is connected to the logic unit and the logic module.
[0009] In one possible implementation of the first aspect, the logic unit includes a first inverter and a second inverter, the input of the first inverter is connected to the comparison unit, the output of the first inverter is connected to the input of the second inverter and the voltage selection unit, and the output of the second inverter is connected to the voltage selection unit and the logic module.
[0010] In one possible implementation of the first aspect, the detection module includes a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a current source, a second resistor, a third resistor, a third inverter, and a fourth inverter. The sources of the twelfth and thirteenth transistors both receive a target power supply signal or a first signal. The gate of the twelfth transistor is connected to the gate of the thirteenth transistor, the drain of the twelfth transistor, and the source of the fourteenth transistor, respectively. The drain of the thirteenth transistor is connected to the source of the fifteenth transistor and the input terminal of the third inverter, respectively. The gate of the fourteenth transistor is used to receive a reference voltage signal. The gate of the fifteenth transistor is connected to the first terminal of the second resistor and the first terminal of the third resistor, respectively. The second terminal of the second resistor is used to receive the first power supply signal. The drain of the fourteenth transistor is connected to the drain of the fifteenth transistor and the input terminal of the current source, respectively. The output terminal of the third inverter is connected to the input terminal of the fourth inverter. The output terminal of the fourth inverter is connected to the logic module. The output terminal of the current source and the second terminal of the third resistor are both grounded.
[0011] In one possible implementation of the first aspect, the logic module includes a fifth inverter, a sixth inverter, a first NOR gate, a first NAND gate, a second NAND gate, a first buffer, and a second buffer. The input of the fifth inverter is connected to the comparison module, the output of the fifth inverter is connected to the first input of the first NOR gate, the second input of the first NOR gate is connected to the detection module, the output of the first NOR gate is connected to the input of the sixth inverter and the first input of the first NAND gate, the output of the sixth inverter is connected to the first input of the second NAND gate, the output of the second NAND gate is connected to the input of the second buffer, the output of the second buffer is connected to the second input of the first NAND gate and the selection module, the output of the first NAND gate is connected to the input of the first buffer, and the output of the first buffer is connected to the second input of the second NAND gate and the selection module.
[0012] In one possible implementation of the first aspect, the selection module includes a sixteenth transistor and a seventeenth transistor, the drain of the sixteenth transistor being used to receive a second power supply signal, the gate of the sixteenth transistor being connected to the logic module, the source of the sixteenth transistor being connected to the source of the seventeenth transistor and the body of the seventeenth transistor, the drain of the seventeenth transistor being used to receive a first power supply signal, the gate of the seventeenth transistor being connected to the logic module, and the body of the sixteenth transistor being connected to the comparison module.
[0013] Secondly, embodiments of this application provide a power supply system including the power switching circuit described in any one of the first aspects.
[0014] Thirdly, embodiments of this application provide an electronic device including the power supply system described in any one of the second aspects.
[0015] The beneficial effects of the embodiments in this application compared with the prior art are: This application provides a power switching circuit, including a comparison module, a detection module, a logic module, and a selection module. The logic module is connected to the detection module, the selection module, and the comparison module, respectively. The selection module is connected to the comparison module. Both the comparison module and the selection module are used to receive a first power supply signal and a second power supply signal. The detection module is used to receive the first power supply signal and a reference voltage signal.
[0016] The detection module outputs a detection signal based on a reference voltage signal and a first power supply signal. The comparison module outputs a comparison signal based on the first and second power supply signals. Simultaneously, it selects the signal with the higher voltage from the first and second power supply signals as the first signal and transmits it to the selection module to ensure there is no leakage path in the selection module. The logic module outputs a first logic signal and a second logic signal based on the detection and comparison signals. The selection module selects between the first and second power supply signals based on the first and second logic signals. When the first power supply signal is less than a preset threshold voltage and the second power supply signal is greater than the first power supply signal (i.e., the detection signal determines the first power supply signal is undervoltage, and the comparison signal determines the second power supply signal is greater than the first power supply signal), the second power supply signal is selected as the target power supply signal. When the first power supply signal is greater than or equal to the threshold voltage, or the first power supply signal is greater than the second power supply signal (i.e., the detection signal determines the first power supply signal is normal), or the comparison signal determines the second power supply signal is less than the first power supply signal), the first power supply signal is selected as the target power supply signal.
[0017] The power switching circuit provided in this application can select the power supply as needed. When the main power supply corresponding to the first power supply signal is undervoltage, it can automatically switch to the backup power supply corresponding to the second power supply signal to maintain power supply. At the same time, the leakage risk in the power supply path is eliminated by the voltage high selection operation to ensure power supply safety.
[0018] It is understood that the beneficial effects of the second and third aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a schematic diagram of a power switching circuit provided in an embodiment of this application; Figure 2 This is a schematic diagram of a power switching circuit provided in another embodiment of this application; Figure 3 This is a circuit connection diagram of the comparison module in this application; Figure 4 This is a circuit connection diagram of the detection module in this application; Figure 5 This is a schematic diagram of the circuit connection between the logic module and the selection module in this application.
[0021] In the diagram: 10. Comparison module; 11. Comparison unit; 12. Voltage selection unit; 13. Logic unit; 20. Detection module; 30. Logic module; 40. Selection module. Detailed Implementation
[0022] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0023] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.
[0024] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0025] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."
[0026] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0027] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0028] In practical applications, strict requirements are placed on the power consumption of each power supply, and it is also necessary to ensure that the system can operate normally when powered by a single power supply. Therefore, a power switching circuit is urgently needed to enable the system to meet power consumption requirements and operate stably in both single-power supply and dual-power supply modes.
[0029] To address the aforementioned issues, this application provides a power switching circuit that can select the power supply as needed. When the main power supply corresponding to the first power supply signal is undervoltage, it can automatically switch to the backup power supply corresponding to the second power supply signal to maintain power supply. At the same time, the high voltage selection operation eliminates the leakage risk in the power supply path and ensures power supply safety.
[0030] To illustrate the technical solution described in this application, specific embodiments are provided below.
[0031] Figure 1 A schematic diagram of a power switching circuit according to an embodiment of this application is shown.Figure 1 As shown, the power switching circuit includes a comparison module 10, a detection module 20, a logic module 30, and a selection module 40. The logic module 30 is connected to the detection module 20, the selection module 40, and the comparison module 10, respectively. The selection module 40 is connected to the comparison module 10. Both the comparison module 10 and the selection module 40 are used to receive the first power supply signal VPP1 and the second power supply signal VPP2. The detection module 20 is used to receive the first power supply signal VPP1 and the reference voltage signal VREF.
[0032] Specifically, the detection module 20 outputs a detection signal UVP based on the reference voltage signal VREF and the first power supply signal VPP1. The comparison module 10 outputs a comparison signal SWH1 based on the first power supply signal VPP1 and the second power supply signal VPP2. Simultaneously, it selects the signal with the higher voltage between the first power supply signal VPP1 and the second power supply signal VPP2 as the first signal VH and transmits it to the selection module 40 to ensure that there is no leakage path in the selection module 40. The logic module 30 outputs a first logic signal SWH2 and a second logic signal SWH3 based on the detection signal UVP and the comparison signal SWH1. The selection module 40 is used to select the first power supply signal VPP1 and the second power supply signal VPP2 based on the first logic signal SWH2 and the second logic signal SWH3. When the first power supply signal VPP1 is less than a preset threshold voltage and the second power supply signal VPP2 is greater than the first power supply signal VPP1, that is, when the detection signal UVP determines that the first power supply signal VPP1 is undervoltage and the comparison signal SWH1 determines that the second power supply signal VPP2 is greater than the first power supply signal VPP1, the second power supply signal VPP2 is selected as the target power supply signal VPP. When the first power supply signal VPP1 is greater than or equal to the threshold voltage, or the first power supply signal VPP1 is greater than the second power supply signal VPP2, that is, when the detection signal UVP determines that the first power supply signal VPP1 is normal, or the comparison signal SWH1 determines that the second power supply signal VPP2 is less than the first power supply signal VPP1, the first power supply signal VPP1 is selected as the target power supply signal VPP.
[0033] The power switching circuit provided in this application can select the power supply as needed. When the main power supply corresponding to the first power supply signal VPP1 is undervoltage, it can automatically switch to the backup power supply corresponding to the second power supply signal VPP2 to maintain power supply. At the same time, the leakage risk in the power supply path is eliminated by voltage selection operation to ensure power supply safety.
[0034] In one embodiment of this application, such as Figure 2As shown, the comparison module 10 includes a comparison unit 11, a voltage selection unit 12, and a logic unit 13. The logic module 30 is connected to the logic unit 13 and the voltage selection unit 12 respectively. The logic unit 13 is connected to the comparison unit 11 and the voltage selection unit 12 respectively. The voltage selection unit 12 is connected to the selection module 40. Both the comparison unit 11 and the voltage selection unit 12 are used to receive the first power supply signal VPP1 and the second power supply signal VPP2.
[0035] Specifically, the comparison unit 11 is used to output a second signal based on the first power supply signal VPP1 and the second power supply signal VPP2. The comparison unit 11 mainly compares the first power supply signal VPP1 and the second power supply signal VPP2 and outputs the second signal for subsequent power supply selection. The logic unit 13 is used to output a comparison signal SWH1 and a third signal SWH4 based on the second signal. The logic unit 13 outputs two logic signals based on the signal output by the comparison unit 11, so that the voltage selection unit 12 selects the signal with the higher voltage from the first power supply signal VPP1 and the second power supply signal VPP2. The voltage selection unit 12 is used to select the signal with the higher voltage from the first power supply signal VPP1 and the second power supply signal VPP2 as the first signal VH based on the third signal SWH4 and the comparison signal SWH1, and transmits it to the selection module 40 to ensure that there is no leakage path in the selection module 40.
[0036] In one embodiment of this application, such as Figure 3As shown, the comparison unit 11 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, and a first resistor R1. The source of the first transistor M1 is used to receive a first power supply signal VPP1, and the source of the second transistor M2 is used to receive a second power supply signal VPP2. The gate of the first transistor M1 is connected to the gate of the second transistor M2, the drain of the first transistor M1, and the drain of the third transistor M3. The drain of the second transistor M2 is connected to the drain of the fourth transistor M4, the gate of the fourth transistor M4, and the gate of the sixth transistor M6. The third transistor M3... The gate of the transistor is connected to the gate of the fifth transistor M5, the drain of the fifth transistor M5, the first terminal of the first resistor R1, and the gate of the seventh transistor M7. The drain of the sixth transistor M6 is connected to the drain of the eighth transistor M8, the gate of the eighth transistor M8, and the gate of the ninth transistor M9. The second terminal of the first resistor R1, the source of the eighth transistor M8, and the source of the ninth transistor M9 all receive the target power supply signal VPP or the first signal VH. The drain of the ninth transistor M9 is connected to the drain of the seventh transistor M7 and to the logic unit 13. The sources of the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the seventh transistor M7 are all grounded.
[0037] Specifically, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the first resistor R1 constitute a common-gate input comparator, which compares the first power supply signal VPP1 and the second power supply signal VPP2, and outputs a second signal. The second signal is processed by the logic unit 13 and outputs a comparison signal SWH1 and a third signal SWH4, so that the voltage selection unit 12 selects the signal with the higher voltage from the first power supply signal VPP1 and the second power supply signal VPP2 as the first signal VH.
[0038] In one embodiment of this application, such as Figure 3 As shown, the voltage selection unit 12 includes a tenth transistor M10 and an eleventh transistor M11. The gate of the tenth transistor M10 is connected to the logic unit 13. The drain of the tenth transistor M10 is used to receive the second power supply signal VPP2. The source of the tenth transistor M10 is connected to the source of the eleventh transistor M11 and the selection module 40, respectively. The drain of the eleventh transistor M11 is used to receive the first power supply signal VPP1. The gate of the eleventh transistor M11 is connected to the logic unit 13 and the logic module 30, respectively.
[0039] Specifically, when the first power supply signal VPP1 is greater than the second power supply signal VPP2, the second signal output by the comparison unit 11 is low, and the third signal SWH4 output after processing by the logic unit 13 is high, while the comparison signal SWH1 is low. Since the third signal SWH4 is high and the comparison signal SWH1 is low, the tenth transistor M10 is turned off and the eleventh transistor M11 is turned on, thereby selecting the first power supply signal VPP1 as the first signal VH.
[0040] When the first power supply signal VPP1 is less than the second power supply signal VPP2, the second signal output by the comparison unit 11 is high. After processing by the logic unit 13, the third signal SWH4 is low, and the comparison signal SWH1 is high. Since the third signal SWH4 is low and the comparison signal SWH1 is high, the tenth transistor M10 is turned on, and the eleventh transistor M11 is turned off, thereby selecting the second power supply signal VPP2 as the first signal VH.
[0041] In one embodiment of this application, such as Figure 3 As shown, the logic unit 13 includes a first inverter INV1 and a second inverter INV2. The input terminal of the first inverter INV1 is connected to the comparison unit 11. The output terminal of the first inverter INV1 is connected to the input terminal of the second inverter INV2 and the voltage selection unit 12, respectively. The output terminal of the second inverter INV2 is connected to the voltage selection unit 12 and the logic module 30, respectively.
[0042] Specifically, logic unit 13 includes two inverters, which are used to invert the second signal output by comparison unit 11 and output a third signal SWH4 and a comparison signal SWH1.
[0043] In one embodiment of this application, such as Figure 4As shown, the detection module 20 includes a twelfth transistor M12, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a current source IS, a second resistor R2, a third resistor R3, a third inverter INV3, and a fourth inverter INV4. The sources of both the twelfth transistor M12 and the thirteenth transistor M13 receive the target power supply signal VPP or the first signal VH. The gate of the twelfth transistor M12 is connected to the gate of the thirteenth transistor M13, the drain of the twelfth transistor M12, and the source of the fourteenth transistor M14, respectively. The drain of the thirteenth transistor M13 is connected to the source of the fifteenth transistor M15 and the third inverter INV4, respectively. The input terminal of inverter INV3 is connected to the gate of the fourteenth transistor M14, which is used to receive the reference voltage signal VREF. The gate of the fifteenth transistor M15 is connected to the first terminal of the second resistor R2 and the first terminal of the third resistor R3, respectively. The second terminal of the second resistor R2 is used to receive the first power supply signal VPP1. The drain of the fourteenth transistor M14 is connected to the drain of the fifteenth transistor M15 and the input terminal of the current source IS, respectively. The output terminal of the third inverter INV3 is connected to the input terminal of the fourth inverter INV4. The output terminal of the fourth inverter INV4 is connected to the logic module 30. The output terminal of the current source IS and the second terminal of the third resistor R3 are both grounded.
[0044] Specifically, the detection module 20 is essentially a comparator. The first power supply signal VPP1 is divided by the second resistor R2 and the third resistor R3 to obtain a sampling signal of k*VPP1, where k is the voltage division ratio. The comparator compares the reference voltage signal VREF with the sampling signal and sets a preset threshold voltage. When the first power supply signal VPP1 is greater than or equal to the preset threshold voltage, the sampling signal is greater than the reference voltage signal VREF, and the comparator outputs a high-level signal. This high-level signal is then inverted twice to obtain a high-level detection signal UVP, indicating that the main power supply corresponding to the first power supply signal VPP1 is normal.
[0045] When the first power supply signal VPP1 is less than the preset threshold voltage, the sampling signal is less than the reference voltage signal VREF, and the signal output by the comparator is low. After the high level is inverted by two stages, the resulting detection signal UVP is low. This indicates that the main power supply corresponding to the first power supply signal VPP1 is undervoltage.
[0046] In one embodiment of this application, such as Figure 5As shown, the logic module 30 includes a fifth inverter INV5, a sixth inverter INV6, a first NOR gate NOR1, a first NAND gate NAND1, a second NAND gate NAND2, a first buffer BUF1, and a second buffer BUF2. The input of the fifth inverter INV5 is connected to the comparison module 10, and the output of the fifth inverter INV5 is connected to the first input of the first NOR gate NOR1. The second input of the first NOR gate NOR1 is connected to the detection module 20, and the output of the first NOR gate NOR1 is connected to the input of the sixth inverter INV6 and the first NAND gate NAND2. The first input terminal of NAND gate NAND1 is connected, the output terminal of the sixth inverter INV6 is connected to the first input terminal of the second NAND gate NAND2, the output terminal of the second NAND gate NAND2 is connected to the input terminal of the second buffer BUF2, the output terminal of the second buffer BUF2 is connected to the second input terminal of the first NAND gate NAND1 and the selection module 40, the output terminal of the first NAND gate NAND1 is connected to the input terminal of the first buffer BUF1, and the output terminal of the first buffer BUF1 is connected to the second input terminal of the second NAND gate NAND2 and the selection module 40.
[0047] Specifically, logic module 30 is used to ensure that the first logic signal SWH2 and the second logic signal SWH3 are not low at the same time, to prevent the two switches in selection module 40 from being turned on at the same time, and to avoid the problem of current backflow from the low-voltage power supply.
[0048] Meanwhile, by adjusting the dimensions of the first buffer BUF1 and the second buffer BUF2, the on and off rates of the two switches in the selection module 40 can be controlled. This can prevent power noise and coupling caused by excessively fast rates, and also prevent situations where the two switches are on or off simultaneously due to excessively slow rates, which could lead to large current pulses during power switching and power drop due to power shoot-through.
[0049] In one embodiment of this application, such as Figure 5 As shown, the selection module 40 includes a sixteenth transistor M16 and a seventeenth transistor M17. The drain of the sixteenth transistor M16 is used to receive the second power supply signal VPP2. The gate of the sixteenth transistor M16 is connected to the logic module 30. The source of the sixteenth transistor M16 is connected to the source and body of the seventeenth transistor M17, respectively. The drain of the seventeenth transistor M17 is used to receive the first power supply signal VPP1. The gate of the seventeenth transistor M17 is connected to the logic module 30. The body of the sixteenth transistor M16 is connected to the comparison module 10.
[0050] Specifically, the body potential of the sixteenth transistor M16 is the first signal VH, which is the higher voltage signal between the first power supply signal VPP1 and the second power supply signal VPP2. This ensures that there is no leakage path in the body diode D3 of the sixteenth transistor M16. The body potential of the seventeenth transistor M17 is the target power supply signal VPP. This ensures that the target power supply signal VPP will not be lower than the first power supply signal VPP1 minus the voltage drop of the body diode D4 of the seventeenth transistor M17. This ensures that during power-up, when both the first power supply signal VPP1 and the second power supply signal VPP2 are low, the target power supply signal VPP is energized, thereby ensuring that the internal circuits, such as the detection module 20 and the comparison module 10, can work normally to realize the subsequent power switching operation.
[0051] Using the first signal VH as the body potential of the sixteenth transistor M16 can eliminate the leakage path caused by the parasitic channel of the MOS transistor and ensure normal power consumption under various power supply conditions.
[0052] The following is combined with Figure 3 , Figure 4 and Figure 5 Explain the working principle of this application.
[0053] When the first power supply signal VPP1 is greater than the preset threshold voltage, the sampling voltage is greater than the reference voltage signal VREF, and the detection signal UVP output by the detection module 20 is at a high level, indicating that the main power supply corresponding to the first power supply signal VPP1 is normal.
[0054] Comparison unit 11 compares the first power supply signal VPP1 and the second power supply signal VPP2. If the first power supply signal VPP1 is greater than the second power supply signal VPP2, the second signal output by comparison unit 11 is low. After two stages of inversion processing by logic unit 13, the second signal outputs comparison signal SWH1, which is low. After one stage of inversion processing by logic unit 13, the second signal outputs third signal SWH4, which is high. Since the third signal SWH4 is high and the comparison signal SWH1 is low, the tenth transistor M10 is turned off, and the eleventh transistor M11 is turned on. The first signal VH is the first power supply signal VPP1.
[0055] After the detection signal UVP (high level) and the comparison signal SWH1 (low level) are processed by the logic module 30, the first logic signal SWH2 is high and the second logic signal SWH3 is low. Then, the sixteenth transistor M16 is turned off and the seventeenth transistor M17 is turned on, and the target power supply signal VPP is the first power supply signal VPP1.
[0056] When the first power supply signal VPP1 is less than the preset threshold voltage and the first power supply signal VPP1 is less than the second power supply signal VPP2, the sampling voltage is less than the reference voltage signal VREF, and the detection signal UVP output by the detection module 20 is low, indicating that the main power supply corresponding to the first power supply signal VPP1 is undervoltage.
[0057] Comparison unit 11 compares the first power supply signal VPP1 and the second power supply signal VPP2. Since the first power supply signal VPP1 is less than the second power supply signal VPP2, the second signal output by comparison unit 11 is high. After the second signal undergoes two-stage inversion processing by logic unit 13, comparison signal SWH1 is output, which is high. After the second signal undergoes one-stage inversion processing by logic unit 13, a third signal SWH4 is output, which is low. Since the third signal SWH4 is low and the comparison signal SWH1 is high, the tenth transistor M10 is turned on, the eleventh transistor M11 is turned off, and the first signal VH becomes the second power supply signal VPP2.
[0058] After the detection signal UVP (low level) and the comparison signal SWH1 (high level) are processed by the logic module 30, the first logic signal SWH2 is low and the second logic signal SWH3 is high. Then, the sixteenth transistor M16 is turned on and the seventeenth transistor M17 is turned off, and the target power supply signal VPP becomes the second power supply signal VPP2.
[0059] In summary, the power switching circuit provided in this application can select the power supply as needed. When the main power supply corresponding to the first power supply signal VPP1 is undervoltage, it can automatically switch to the backup power supply corresponding to the second power supply signal VPP2 to maintain power supply. At the same time, the high voltage selection operation eliminates the leakage risk in the power supply path, ensuring power supply safety. In addition, the logic module 30 can control the on and off rates of the two switches in the selection module 40, which can avoid power noise caused by excessively fast rates and power drops caused by excessively slow rates; it can also prevent the two switches in the selection module 40 from being on simultaneously, preventing the problem of current backflow from the low voltage power supply.
[0060] This application also provides a power supply system, including the power switching circuit described above. Since the power supply system provided in this application adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be elaborated upon further here.
[0061] This application also provides an electronic device, including the power supply system described above. Since the electronic device provided in this application adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon here.
[0062] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0063] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A power switching circuit, characterized in that, It includes a comparison module, a detection module, a logic module, and a selection module. The logic module is connected to the detection module, the selection module, and the comparison module, respectively. The selection module is connected to the comparison module. Both the comparison module and the selection module are used to receive a first power supply signal and a second power supply signal. The detection module is used to receive the first power supply signal and a reference voltage signal. The detection module is used to output a detection signal based on the reference voltage signal and the first power supply signal; The comparison module is used to output a comparison signal based on the first power supply signal and the second power supply signal. Simultaneously, it selects the signal with the higher voltage from the first and second power supply signals as the first signal and transmits it to the selection module to ensure there is no leakage path in the selection module. The logic module is used to output a first logic signal and a second logic signal based on the detection signal and the comparison signal. The selection module is used to select between the first and second power supply signals based on the first and second logic signals. When the first power supply signal is less than a preset threshold voltage and the second power supply signal is greater than the first power supply signal, the second power supply signal is selected as the target power supply signal. When the first power supply signal is greater than or equal to a preset threshold voltage, or when the first power supply signal is greater than the second power supply signal, the first power supply signal is selected as the target power supply signal.
2. The power switching circuit according to claim 1, characterized in that, The comparison module includes a comparison unit, a voltage selection unit, and a logic unit. The logic module is connected to the logic unit and the voltage selection unit, respectively. The logic unit is connected to the comparison unit and the voltage selection unit, respectively. The voltage selection unit is connected to the selection module. Both the comparison unit and the voltage selection unit are used to receive a first power supply signal and a second power supply signal. The comparison unit is used to output a second signal based on the first power supply signal and the second power supply signal; the logic unit is used to output a comparison signal and a third signal based on the second signal; the voltage selection unit is used to select the signal with the higher voltage between the first power supply signal and the second power supply signal as the first signal based on the third signal and the comparison signal, and transmit it to the selection module to ensure that there is no leakage path in the selection module.
3. The power switching circuit according to claim 2, characterized in that, The comparison unit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a first resistor. The source of the first transistor receives a first power supply signal, and the source of the second transistor receives a second power supply signal. The gate of the first transistor is connected to the gate of the second transistor, the drain of the first transistor, and the drain of the third transistor. The drain of the second transistor is connected to the drain of the fourth transistor, the gate of the fourth transistor, and the gate of the sixth transistor. The gate of the third transistor is connected to the fifth transistor... The gate of the first transistor, the drain of the fifth transistor, the first end of the first resistor, and the gate of the seventh transistor are connected. The drain of the sixth transistor is connected to the drain of the eighth transistor, the gate of the eighth transistor, and the gate of the ninth transistor. The second end of the first resistor, the source of the eighth transistor, and the source of the ninth transistor all receive a target power supply signal or a first signal. The drain of the ninth transistor is connected to the drain of the seventh transistor and the logic unit. The sources of the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are all grounded.
4. The power switching circuit according to claim 2, characterized in that, The voltage selection unit includes a tenth transistor and an eleventh transistor. The gate of the tenth transistor is connected to the logic unit, the drain of the tenth transistor is used to receive a second power supply signal, the source of the tenth transistor is connected to the source of the eleventh transistor and the selection module, the drain of the eleventh transistor is used to receive a first power supply signal, and the gate of the eleventh transistor is connected to the logic unit and the logic module.
5. The power switching circuit according to claim 2, characterized in that, The logic unit includes a first inverter and a second inverter. The input terminal of the first inverter is connected to the comparison unit. The output terminal of the first inverter is connected to the input terminal of the second inverter and the voltage selection unit. The output terminal of the second inverter is connected to the voltage selection unit and the logic module.
6. The power switching circuit according to any one of claims 1-5, characterized in that, The detection module includes a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a current source, a second resistor, a third resistor, a third inverter, and a fourth inverter. The sources of the twelfth and thirteenth transistors both receive a target power supply signal or a first signal. The gate of the twelfth transistor is connected to the gate of the thirteenth transistor, the drain of the twelfth transistor, and the source of the fourteenth transistor. The drain of the thirteenth transistor is connected to the source of the fifteenth transistor and the input terminal of the third inverter. The gate of the fourteenth transistor receives a reference voltage signal. The gate of the fifteenth transistor is connected to the first terminal of the second resistor and the first terminal of the third resistor. The second terminal of the second resistor receives the first power supply signal. The drain of the fourteenth transistor is connected to the drain of the fifteenth transistor and the input terminal of the current source. The output terminal of the third inverter is connected to the input terminal of the fourth inverter. The output terminal of the fourth inverter is connected to the logic module. The output terminal of the current source and the second terminal of the third resistor are both grounded.
7. The power switching circuit according to any one of claims 1-5, characterized in that, The logic module includes a fifth inverter, a sixth inverter, a first NOR gate, a first NAND gate, a second NAND gate, a first buffer, and a second buffer. The input of the fifth inverter is connected to the comparison module, and the output of the fifth inverter is connected to the first input of the first NOR gate. The second input of the first NOR gate is connected to the detection module. The output of the first NOR gate is connected to both the input of the sixth inverter and the first input of the first NAND gate. The output of the sixth inverter is connected to the first input of the second NAND gate. The output of the second NAND gate is connected to the input of the second buffer. The output of the second buffer is connected to both the second input of the first NAND gate and the selection module. The output of the first NAND gate is connected to the input of the first buffer. The output of the first buffer is connected to both the second input of the second NAND gate and the selection module.
8. The power switching circuit according to any one of claims 1-5, characterized in that, The selection module includes a sixteenth transistor and a seventeenth transistor. The drain of the sixteenth transistor is used to receive a second power supply signal. The gate of the sixteenth transistor is connected to the logic module. The source of the sixteenth transistor is connected to the source and body of the seventeenth transistor, respectively. The drain of the seventeenth transistor is used to receive a first power supply signal. The gate of the seventeenth transistor is connected to the logic module. The body of the sixteenth transistor is connected to the comparison module.
9. A power supply system, characterized in that, Includes the power switching circuit as described in any one of claims 1-8.
10. An electronic device, characterized in that, Includes the power supply system as described in claim 9.