Transient acceleration circuit, switching power supply, and display device

Abstract

The application is suitable for the technical field of switching power supply, and provides a transient acceleration circuit, a switching power supply and a display device. The above-mentioned circuit comprises an adjusting current output module. A first input end of the adjusting current output module receives a feedback voltage, and a second input end of the adjusting current output module receives a reference voltage. When the difference between the feedback voltage and the reference voltage is greater than a preset value, the adjusting current output module outputs adjusting current in a first direction to raise the voltage at a first node. When the difference between the reference voltage and the feedback voltage is greater than the preset value, the adjusting current output module outputs adjusting current in a second direction to lower the voltage at the first node. The application can output adjusting current in the corresponding direction at the instant of load jump, thereby raising or lowering the reverse input level of the PWM comparator, greatly improving the transient response speed of the switching power supply, effectively reducing the peak-to-peak value of the output voltage transient fluctuation, and reducing the output ripple.

Description

Technical Field

[0001] This application belongs to the field of switching power supply technology, and particularly relates to a transient acceleration circuit, a switching power supply, and a display device. Background Technology

[0002] Common control architectures for switching power supplies include COT (Constant On-Time) control mode and peak current mode control mode. COT control mode offers faster transient response and smaller peak-to-peak output voltage fluctuations, but its operating frequency varies with the load, resulting in poor frequency stability. Peak current mode control mode relies on an error amplifier to form an outer voltage loop for regulation, achieving a constant operating frequency. It boasts advantages such as good loop stability and easy implementation of current limiting protection, making it widely used in scenarios requiring stable operating frequency. However, peak current mode control is limited by the response speed of the error amplifier, resulting in significant transient regulation lag. When the load changes rapidly from light to heavy, the output voltage is prone to large overshoot and undershoot, leading to a large peak-to-peak transient response. Summary of the Invention

[0003] This application provides a transient acceleration circuit, a switching power supply, and a display device, which can solve the problems of peak current mode control being limited by the response speed of the error amplifier, significant lag in transient regulation, and large overshoot and undershoot in the output voltage when the load changes rapidly from light to heavy.

[0004] In a first aspect, embodiments of this application provide a transient acceleration circuit applied to a switching power supply. The transient acceleration circuit includes an adjustable current output module. The first input terminal of the adjustable current output module is electrically connected to a feedback unit in the switching power supply and is used to receive the feedback voltage output by the feedback unit. The second input terminal of the adjustable current output module is used to receive a reference voltage. The output terminal of the adjustable current output module is electrically connected to a first node, which is the common terminal of the inverting input terminal of the PWM comparator in the switching power supply and the first terminal of the first resistor. When the difference between the feedback voltage and the reference voltage is greater than a preset value, the adjustment current output module outputs an adjustment current in the first direction to raise the voltage at the first node; When the difference between the reference voltage and the feedback voltage is greater than the preset value, the adjustment current output module outputs an adjustment current in the second direction to pull down the voltage at the first node; the first direction is opposite to the second direction.

[0005] In one possible implementation of the first aspect, the adjustment current in the first direction increases linearly as the difference between the feedback voltage and the reference voltage increases; the adjustment current in the second direction increases linearly as the difference between the reference voltage and the feedback voltage increases.

[0006] In one possible implementation of the first aspect, when the absolute value of the difference between the feedback voltage and the reference voltage is less than the preset value, the adjustment current output by the adjustment current output module is zero.

[0007] In one possible implementation of the first aspect, the adjustable current output module includes a bias unit, a transconductance amplifier unit, and an adjustable current output unit, wherein the transconductance amplifier unit is electrically connected to the bias unit and the adjustable current output unit, and the adjustable current output unit is electrically connected to the first node. The bias unit is used to provide a bias current, the transconductance amplifier unit is used to generate a first base current and a second base current based on the feedback voltage, the reference voltage and the bias current, and the adjustment current output unit is used to output the adjustment current based on the first base current and the second base current.

[0008] In one possible implementation of the first aspect, the bias unit includes a first bias current source, a second bias current source, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor. The gate of the first transistor is electrically connected to a first terminal of the first bias current source, the drain of the first transistor, the gate of the second transistor, the gate of the sixth transistor, the gate of the seventh transistor, and the transconductance amplifier unit. The sources of the first transistor, the third transistor, the fourth transistor, and the fifth transistor are all electrically connected to a power supply. The gate of the third transistor is electrically connected to the gate of the fourth transistor, the gate of the fifth transistor, the transconductance amplifier unit, and the... The drain of the second transistor is electrically connected to the first terminal of the second bias current source. The drain of the third transistor is electrically connected to the source of the second transistor. The source of the sixth transistor is electrically connected to the drain of the fourth transistor. The drain of the sixth transistor is electrically connected to the gate of the eighth transistor, the drain of the eighth transistor, the gate of the tenth transistor, and the transconductance amplifier unit. The source of the seventh transistor is electrically connected to the drain of the fifth transistor. The drain of the seventh transistor is electrically connected to the drain of the tenth transistor, the gate of the ninth transistor, and the transconductance amplifier unit. The drain of the ninth transistor is electrically connected to the source of the tenth transistor. The source of the ninth transistor, the source of the eighth transistor, the second terminal of the first bias current source, and the second terminal of the second bias current source are all grounded.

[0009] In one possible implementation of the first aspect, the transconductance amplifier unit includes an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a twentieth transistor, a twenty-first transistor, a twenty-second transistor, a twenty-third transistor, a twenty-fourth transistor, a twenty-fifth transistor, a twenty-sixth transistor, a twenty-seventh transistor, a twenty-eighth transistor, a twenty-ninth transistor, and a thirtieth transistor. The gates of the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor are all electrically connected to the bias unit. The sources of the eleventh, eleventh, nineteenth, twentieth, twenty-first, and thirteenth transistors are all electrically connected to the power supply. The drain of the eleventh transistor is electrically connected to the source of the twelfth transistor, and the drain of the thirteenth transistor is electrically connected to the source of the fourteenth transistor. The gate of the fifteenth transistor is used to receive the reference voltage. The source of the fifteenth transistor is electrically connected to the drain of the twelfth transistor and the source of the sixteenth transistor, respectively. The drain of the fifteenth transistor is electrically connected to the drain of the twenty-fifth transistor and the source of the seventeenth transistor, respectively. The drain of the transistor, the gate of the seventeenth transistor, the gate of the twentieth transistor, and the gate of the twenty-first transistor are electrically connected. The gate of the sixteenth transistor is used to receive the feedback voltage. The drain of the sixteenth transistor is electrically connected to the drain of the twenty-sixth transistor, the drain of the eighteenth transistor, the gate of the eighteenth transistor, and the gate of the nineteenth transistor. The gates of the twenty-fifth transistor, the twenty-sixth transistor, the twenty-seventh transistor, the twenty-eighth transistor, the twenty-ninth transistor, and the thirtieth transistor are all electrically connected to the bias unit. The source of the twenty-fifth transistor is electrically connected to the twenty-seventh transistor. The drains of the transistors are electrically connected. The drain of the 28th transistor is electrically connected to the source of the 26th transistor. The sources of the 28th, 27th, 22nd, 23rd, 24th, and 30th transistors are all grounded. The gate of the 23rd transistor is electrically connected to the gate of the 22nd transistor, the drain of the 22nd transistor, the gate of the 24th transistor, and the drain of the 19th transistor. The drain of the 23rd transistor is electrically connected to the drain of the 20th transistor, the drain of the 14th transistor, and the adjustable current output unit.The drain of the twenty-ninth transistor is electrically connected to the drain of the twenty-fourth transistor, the drain of the twenty-first transistor, and the adjusted current output unit, respectively. The source of the twenty-ninth transistor is electrically connected to the drain of the thirtieth transistor.

[0010] In one possible implementation of the first aspect, the adjustable current output unit includes a 31st transistor, a 32nd transistor, a 33rd transistor, and a 34th transistor. The gate of the 31st transistor is electrically connected to the drain of the 31st transistor, the gate of the 32nd transistor, and the transconductance amplifier unit, respectively. The sources of the 31st transistor and the 32nd transistor are both electrically connected to a power supply. The gate of the 33rd transistor is electrically connected to the drain of the 33rd transistor, the gate of the 34th transistor, and the transconductance amplifier unit, respectively. The sources of the 33rd transistor and the 34th transistor are both grounded. The drain of the 34th transistor is electrically connected to the drain of the 32nd transistor, for outputting the adjustable current.

[0011] In one possible implementation of the first aspect, the preset value is the ratio of the bias current to the transconductance value of the transconductance amplifier unit.

[0012] Secondly, embodiments of this application provide a switching power supply, including a feedback unit, a PWM comparator, a first resistor, and a transient acceleration circuit as described in any one of the first aspects. The feedback unit is electrically connected to the first input terminal of the adjustable current output module in the transient acceleration circuit, and the inverting input terminal of the PWM comparator and the first terminal of the first resistor are both electrically connected to the output terminal of the adjustable current output module.

[0013] Thirdly, embodiments of this application provide a display device including the switching power supply described in the second aspect.

[0014] The beneficial effects of the embodiments of this application compared with the prior art are: This application provides a transient acceleration circuit, including an adjusting current output module. The first input terminal of the adjusting current output module is electrically connected to a feedback unit in a switching power supply to receive a feedback voltage. The second input terminal of the adjusting current output module receives a reference voltage. The output terminal of the adjusting current output module is electrically connected to a first node. When the difference between the feedback voltage and the reference voltage is greater than a preset value, indicating that the output voltage is too high, the adjusting current output module outputs an adjusting current in the first direction to raise the voltage at the first node, i.e., raise the inverting input level of the PWM comparator, causing the PWM comparator to flip earlier, thereby reducing the duty cycle of the upper power transistor in the switching power supply and quickly suppressing output voltage overshoot. When the difference between the reference voltage and the feedback voltage is greater than a preset value, indicating that the output voltage is too low, the adjusting current output module outputs an adjusting current in the second direction to lower the voltage at the first node, i.e., lower the inverting input level of the PWM comparator, causing the PWM comparator to flip later, thereby increasing the duty cycle of the upper power transistor and quickly suppressing output voltage undershoot. Therefore, this application has set up an adjustment current output module, which can output an adjustment current in the corresponding direction at the moment of load change, and act on the inverting input terminal of the PWM comparator, thereby raising or lowering the inverting input level of the PWM comparator. It does not require waiting for the slow voltage outer loop adjustment of the error amplifier in the switching power supply, which greatly improves the transient response speed of the switching power supply, effectively reduces the peak-to-peak value of the transient fluctuation of the output voltage, and reduces the output ripple.

[0015] It is understood that the beneficial effects of the second and third aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram illustrating the application principle of the transient acceleration circuit provided in an embodiment of this application in BUCK; Figure 2 This is a schematic block diagram of an embodiment of the adjustable current output module provided in this application; Figure 3 This is a circuit connection diagram of an adjustable current output module provided in one embodiment of this application.

[0018] In the diagram: 101, Adjustable current output module; 1011, Bias unit; 1012, Transconductance amplifier unit; 1013, Adjustable current output unit. Detailed Implementation

[0019] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0020] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0021] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0022] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."

[0023] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0024] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0025] Common control architectures for switching power supplies include COT (Constant Current-mode) control and peak current-mode control. COT control offers faster transient response and smaller peak-to-peak output voltage fluctuations, but its operating frequency varies with the load, resulting in poor frequency stability. Peak current-mode control relies on an error amplifier to create an outer voltage loop for regulation, achieving a constant operating frequency. It boasts advantages such as good loop stability and easy implementation of current-limiting protection, making it widely used in scenarios requiring stable operating frequency. However, peak current-mode control is limited by the response speed of the error amplifier, resulting in significant transient lag. When the load changes rapidly from light to heavy, the output voltage is prone to large overshoot and undershoot, leading to a large peak-to-peak transient response.

[0026] To address the aforementioned issues, this application provides a transient acceleration circuit, including an adjusting current output module. The first input terminal of the adjusting current output module is electrically connected to a feedback unit in a switching power supply to receive a feedback voltage. The second input terminal of the adjusting current output module receives a reference voltage, and the output terminal of the adjusting current output module is electrically connected to a first node. When the difference between the feedback voltage and the reference voltage exceeds a preset value, indicating a high output voltage, the adjusting current output module outputs an adjusting current in the first direction to raise the voltage at the first node, i.e., raise the inverting input level of the PWM comparator, causing the PWM comparator to flip earlier, thereby reducing the duty cycle of the upper power transistor in the switching power supply and quickly suppressing output voltage overshoot. When the difference between the reference voltage and the feedback voltage exceeds a preset value, indicating a low output voltage, the adjusting current output module outputs an adjusting current in the second direction to lower the voltage at the first node, i.e., lower the inverting input level of the PWM comparator, causing the PWM comparator to flip later, thereby increasing the duty cycle of the upper power transistor and quickly suppressing output voltage undershoot. Therefore, this application has set up an adjustment current output module, which can output an adjustment current in the corresponding direction at the moment of load change, and act on the inverting input terminal of the PWM comparator, thereby raising or lowering the inverting input level of the PWM comparator. It does not require waiting for the slow voltage outer loop adjustment of the error amplifier in the switching power supply, which greatly improves the transient response speed of the switching power supply, effectively reduces the peak-to-peak value of the transient fluctuation of the output voltage, and reduces the output ripple.

[0027] To illustrate the technical solution described in this application, specific embodiments are provided below.

[0028] Figure 1 A schematic diagram illustrating the application principle of the transient acceleration circuit provided in an embodiment of this application in a BUCK circuit is shown. See also Figure 1As shown, the transient acceleration circuit includes an adjustable current output module 101. The first input terminal of the adjustable current output module 101 is electrically connected to the feedback unit in the switching power supply and is used to receive the feedback voltage VFB output by the feedback unit. The second input terminal of the adjustable current output module 101 is used to receive the reference voltage VREF. The output terminal of the adjustable current output module 101 is electrically connected to the first node, which is the common terminal of the inverting input terminal of the PWM comparator in the switching power supply and the first terminal of the first resistor R1.

[0029] Specifically, when the difference between the feedback voltage VFB and the reference voltage VREF is greater than a preset value, indicating that the output voltage is too high, the adjustment current output module 101 outputs an adjustment current IM in the first direction to raise the voltage at the first node, that is, to raise the inverting input level of the PWM comparator, causing the PWM comparator to flip earlier, thereby reducing the duty cycle of the upper power transistor Q01 in the switching power supply and quickly suppressing the output voltage overshoot. When the difference between the reference voltage VREF and the feedback voltage VFB is greater than a preset value, indicating that the output voltage is too low, the adjustment current output module 101 outputs an adjustment current IM in the second direction to lower the voltage at the first node, that is, to lower the inverting input level of the PWM comparator, causing the PWM comparator to flip later, thereby increasing the duty cycle of the upper power transistor Q01 and quickly suppressing the output voltage undershoot. Therefore, this application provides an adjustment current output module 101, which can output an adjustment current IM in the corresponding direction at the moment of load change, and act on the inverting input terminal of the PWM comparator, thereby raising or lowering the inverting input level of the PWM comparator. This eliminates the need to wait for the slow voltage outer loop adjustment of the error amplifier EA in the switching power supply, significantly improving the transient response speed of the switching power supply, effectively reducing the peak-to-peak value of the transient fluctuation of the output voltage, and reducing the output ripple.

[0030] It should be noted that, Figure 1In the peak current mode BUCK switching power supply shown, the ramp compensation current ISLOPE, the inductor sampling current ISENSE, the bias current I0, and the adjustment current IM output by the adjustment current output module 101 in this application are all superimposed on the first resistor R1. After superposition, a summed voltage VSUM is generated and input to the inverting input of the PWM comparator. The traditional architecture relies solely on the error amplifier EA to output the VEA adjustment loop. Due to the limitation of the loop compensation RC network, the VEA response speed is slow. When the load changes and the output feedback voltage VFB deviates from the reference voltage VREF, the switching duty cycle cannot be quickly changed through VEA, resulting in large transient voltage fluctuations. To address this, this application adds an adjustment current output module 101. When the difference between the feedback voltage VFB and the reference voltage VREF exceeds the preset value corresponding to the steady-state normal ripple, the adjustment current output module 101 quickly outputs the adjustment current IM in the corresponding direction. The adjustment current IM directly and quickly corrects the DC level of VSUM without waiting for the error amplifier EA to adjust slowly, achieving instantaneous adjustment of the switching duty cycle and significantly improving the transient response speed of the switching power supply.

[0031] It should be noted that the feedback unit includes a first feedback resistor RFB1 and a second feedback resistor RFB2. The first feedback resistor RFB1 and the second feedback resistor RFB2 are connected in series between the power output terminal and ground of the switching power supply. Together, they perform a resistive voltage divider sampling on the power supply output voltage VO, generating a feedback voltage VFB. This feedback voltage VFB is transmitted synchronously in two paths. One path is sent to the adjustment current output module 101, used to compare the difference with the reference voltage VREF to determine whether the output voltage exceeds a preset deviation threshold and generate an adjustment current IM. The other path is sent to the inverting input of the error amplifier EA, used to form a conventional regulated voltage outer loop, continuously achieving steady-state closed-loop voltage regulation control. The reference voltage VREF can be generated by an on-chip bandgap reference source circuit. The bandgap reference source can output a constant reference voltage with minimal temperature and process deviation, providing a stable voltage reference for feedback regulation and transient deviation determination.

[0032] It should be noted that the adjustment current IM in the first direction is Figure 1 The downward current flowing into the first resistor R1 increases the total current flowing into the first resistor R1, thereby raising the voltage at the first node; the adjustment current IM in the second direction is... Figure 1 The upward current drawn in the opposite direction will draw some current from the first node, causing the voltage of the first node to decrease.

[0033] It should be noted that the adjustment current IM in the first direction increases linearly with the difference between the feedback voltage VFB and the reference voltage VREF. That is, the larger the positive difference between the feedback voltage VFB and the reference voltage VREF, the greater the output voltage exceeds the standard value, corresponding to a larger adjustment current IM in the first direction. This quickly raises the first node voltage, reduces the duty cycle of the upper power transistor Q01, and quickly suppresses the output voltage overshoot. The adjustment current IM in the second direction increases linearly with the difference between the reference voltage VREF and the feedback voltage VFB. That is, the larger the positive difference between the reference voltage VREF and the feedback voltage VFB, the greater the output voltage falls below the standard value, corresponding to a larger adjustment current IM in the second direction. This quickly lowers the first node voltage, increases the duty cycle of the upper power transistor Q01, and quickly compensates for the output voltage drop. Therefore, this application can adaptively match the compensation current according to the magnitude of the output voltage deviation from the standard value. The greater the voltage deviation, the stronger the adjustment force. It can accurately and quickly correct the first node voltage, effectively suppress the output voltage overshoot and undershoot, and take into account both the sensitivity and adjustment accuracy of transient regulation.

[0034] Furthermore, when the absolute value of the difference between the feedback voltage VFB and the reference voltage VREF is less than a preset value, indicating that the output voltage only has a small steady-state ripple and the deviation is within the allowable range, no additional correction is needed for the first node voltage. The adjustment current IM output by the adjustment current output module 101 is zero, avoiding continuous interference from the compensation branch to the original voltage regulation loop and ensuring the stability of the switching power supply's steady-state operation. Therefore, this application only outputs the adjustment current IM when the voltage deviation exceeds the preset threshold. There is no compensation current output in steady state, which will not interfere with the original control loop and ensure the stable steady-state operation of the system.

[0035] The following is combined with Figure 2 and Figure 3 The working principle of the adjustable current output module 101 is explained in detail.

[0036] In one embodiment of this application, such as Figure 2 As shown, the adjustable current output module 101 includes a bias unit 1011, a transconductance amplifier unit 1012 and an adjustable current output unit 1013. The transconductance amplifier unit 1012 is electrically connected to the bias unit 1011 and the adjustable current output unit 1013 respectively, and the adjustable current output unit 1013 is electrically connected to the first node.

[0037] Specifically, the bias unit 1011 provides a stable static bias current I0 for the entire module, ensuring that each internal MOS device establishes a normal operating point. The transconductance amplifier unit 1012 receives the feedback voltage VFB, the reference voltage VREF, and the bias current I0 output by the bias unit 1011. By comparing the voltage difference between the two paths, it generates a first base current and a second base current of corresponding magnitude. The current output unit 1013 then performs proportional mirror amplification of the first base current and the second base current, and finally outputs an adjustment current IM of corresponding direction and amplitude to the first node, thereby realizing transient regulation of the voltage of the first node.

[0038] In one embodiment of this application, such as Figure 3 As shown, the bias unit 1011 includes a first bias current source Ia, a second bias current source Ib, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, and a tenth transistor M10. The gate of the first transistor M1 is electrically connected to the first terminal of the first bias current source Ia, the drain of the first transistor M1, the gate of the second transistor M2, the gate of the sixth transistor M6, the gate of the seventh transistor M7, and the transconductance amplifier unit 1012. The sources of the first transistor M1, the third transistor M3, the fourth transistor M4, and the fifth transistor M5 are all electrically connected to the power supply. The gate of the third transistor M3 is electrically connected to the gate of the fourth transistor M4, the gate of the fifth transistor M5, and the transconductance amplifier unit 1012. 12. The drain of the second transistor M2 is electrically connected to the first terminal of the second bias current source Ib. The drain of the third transistor M3 is electrically connected to the source of the second transistor M2. The source of the sixth transistor M6 is electrically connected to the drain of the fourth transistor M4. The drain of the sixth transistor M6 is electrically connected to the gate of the eighth transistor M8, the drain of the eighth transistor M8, the gate of the tenth transistor M10, and the transconductance amplifier unit 1012, respectively. The source of the seventh transistor M7 is electrically connected to the drain of the fifth transistor M5. The drain of the seventh transistor M7 is electrically connected to the drain of the tenth transistor M10, the gate of the ninth transistor M9, and the transconductance amplifier unit 1012, respectively. The drain of the ninth transistor M9 is electrically connected to the source of the tenth transistor M10. The source of the ninth transistor M9, the source of the eighth transistor M8, the second terminal of the first bias current source Ia, and the second terminal of the second bias current source Ib are all grounded.

[0039] Specifically, the first bias current source Ia and the second bias current source Ib provide two basic constant bias currents I0 for the overall circuit. M1, M3, M4, and M5 are PMOS matching current mirror transistors, which generate multiple mutually matched replicated currents based on the power supply. M2, M6, and M7 cooperate to complete current distribution and branch current shunting. NMOS transistors M8, M9, and M10 form the pull-down current mirror branch on the ground side. Each transistor forms multiple sets of proportionally matched current mirror networks through gate interconnection, which replicate and distribute the two original bias currents I0 into multiple stable and mutually matched static bias currents I0, and uniformly send them to the subsequent transconductance amplifier unit 1012. This provides a stable static operating point for all MOS devices inside the transconductance amplifier unit 1012, ensuring that the transconductance amplifier unit 1012 can accurately identify the difference between the feedback voltage VFB and the reference voltage VREF.

[0040] In one embodiment of this application, such as Figure 3As shown, the transconductance amplifier unit 1012 includes an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a seventeenth transistor M17, an eighteenth transistor M18, a nineteenth transistor M19, a twentieth transistor M20, a twenty-first transistor M21, a twenty-second transistor M22, a twenty-third transistor M23, a twenty-fourth transistor M24, a twenty-fifth transistor M25, a twenty-sixth transistor M26, a twenty-seventh transistor M27, a twenty-eighth transistor M28, a twenty-ninth transistor M29, and a thirtieth transistor M30. The eleventh transistor M11... The gates of the 12th transistor M12, 13th transistor M13, and 14th transistor M14 are all electrically connected to the bias unit 1011. The sources of the 11th transistor M11, 17th transistor M17, 18th transistor M18, 19th transistor M19, 20th transistor M20, 21st transistor M21, and 13th transistor M13 are all electrically connected to the power supply. The drain of the 11th transistor M11 is electrically connected to the source of the 12th transistor M12, and the drain of the 13th transistor M13 is electrically connected to the source of the 14th transistor M14. The gate of the 15th transistor M15 is used to receive the reference voltage VR. EF, the source of the fifteenth transistor M15 is electrically connected to the drain of the twelfth transistor M12 and the source of the sixteenth transistor M16, respectively. The drain of the fifteenth transistor M15 is electrically connected to the drain of the twenty-fifth transistor M25, the drain of the seventeenth transistor M17, the gate of the seventeenth transistor M17, the gate of the twentieth transistor M20, and the gate of the twenty-first transistor M21, respectively. The gate of the sixteenth transistor M16 is used to receive the feedback voltage VFB. The drain of the sixteenth transistor M16 is electrically connected to the drain of the twenty-sixth transistor M26, the drain of the eighteenth transistor M18, the gate of the eighteenth transistor M18, and the gate of the nineteenth transistor M19, respectively. The twenty-fifth transistor M15... The gates of transistors M25, M26, M27, M28, M29, and M30 are all electrically connected to bias unit 1011. The source of transistor M25 is electrically connected to the drain of transistor M27, and the drain of transistor M28 is electrically connected to the source of transistor M26. The sources of transistors M28, M27, M22, M23, M24, and M30 are all grounded.The gate of the twenty-third transistor M23 is electrically connected to the gate of the twenty-second transistor M22, the drain of the twenty-second transistor M22, the gate of the twenty-fourth transistor M24, and the drain of the nineteenth transistor M19. The drain of the twenty-third transistor M23 is electrically connected to the drain of the twentieth transistor M20, the drain of the fourteenth transistor M14, and the current adjustment output unit 1013. The drain of the twenty-ninth transistor M29 is electrically connected to the drain of the twenty-fourth transistor M24, the drain of the twenty-first transistor M21, and the current adjustment output unit 1013. The source of the twenty-ninth transistor M29 is electrically connected to the drain of the thirtieth transistor M30.

[0041] Specifically, M11, M12, M13, and M14 receive the static bias current I0 output by the bias unit 1011, providing power bias for the differential input branch and the subsequent current mirror; M15 and M16 form a transconductance core differential pair, respectively connected to the reference voltage VREF and the feedback voltage VFB, converting the voltage difference between the two into two differential currents IMP0 and IMP1; M17, M18, M19, M20, and M21 are multiple sets of 1:1 matched PMOS current mirrors used to replicate and transmit differential currents; M25, M26, and M2... 7. M28 forms a threshold judgment branch with 4I0 current, and introduces a fixed offset current to construct a voltage deviation judgment threshold; M22, M23, M24, M29, and M30 form a ground-side NMOS current mirror network to complete current superposition and threshold screening. Only when the difference between the feedback voltage VFB and the reference voltage VREF exceeds the preset value, the first base current and the second base current are output from the drain of M23 and the drain of M29 respectively to the subsequent adjustment current output unit 1013, realizing the conversion of voltage difference to bidirectional base current and deviation threshold judgment.

[0042] In one embodiment of this application, such as Figure 3 As shown, the adjustable current output unit 1013 includes a thirty-first transistor M31, a thirty-second transistor M32, a thirty-third transistor M33, and a thirty-fourth transistor M34. The gate of the thirty-first transistor M31 is electrically connected to the drain of the thirty-first transistor M31, the gate of the thirty-second transistor M32, and the transconductance amplifier unit 1012. The sources of the thirty-first transistor M31 and the thirty-second transistor M32 are both electrically connected to the power supply. The gate of the thirty-third transistor M33 is electrically connected to the drain of the thirty-third transistor M33, the gate of the thirty-fourth transistor M34, and the transconductance amplifier unit 1012. The sources of the thirty-third transistor M33 and the thirty-fourth transistor M34 are both grounded. The drain of the thirty-fourth transistor M34 is electrically connected to the drain of the thirty-second transistor M32. This unit is used to output an adjustable current IM.

[0043] Specifically, M31 and M32 form a 1:N PMOS pull-up current mirror. The gate of M31 receives the first base current output from the transconductance amplifier unit 1012 and forms a diode connection structure. After the first base current is amplified by mirroring at a 1:N ratio, the pull-up current ISP in the first direction is output by M32. M33 and M34 form a 1:N NMOS pull-down current mirror. The gate of M33 receives the second base current output from the transconductance amplifier unit 1012 and forms a diode connection structure. After the second base current is amplified by mirroring at a 1:N ratio, the pull-down current ISN in the second direction is output by M34. ISP and ISN are superimposed at the output node to synthesize the total adjustment current IM and output to the first node. The amplitude of the adjustment current IM can be flexibly configured by mirroring at a 1:N ratio, which enhances the transient regulation capability.

[0044] It should be noted that the preset value is the ratio of the bias current I0 to the transconductance of the transconductance amplifier unit 1012, i.e., the preset value ΔVset = I0 / Gm, where I0 is the bias current and Gm is the transconductance of the transconductance amplifier unit 1012. Therefore, the adjustment current IM can be calculated as: IM = Gm * (VFB - VREF - ΔVset).

[0045] It should be noted that the adjustment current IM is jointly determined by the pull-up current ISP and the pull-down current ISN, satisfying the relationship: IM = ISP ISN.

[0046] Under steady-state conditions, the feedback voltage VFB and the reference voltage VREF have approximately the same amplitude, the differential currents IMP0 and IMP1 are approximately equal in magnitude, and IMN is equal to IMP1. Due to the threshold effect of I0, the total pull-up current at point M is greater than the pull-down current (i.e., IMN), and the pull-up current ISP output is 0. At the same time, the total pull-down current at point N is greater than the pull-up current (i.e., IMP0), and the pull-down current ISN output is also 0. Finally, the total adjustment current IM=0, and there is no current intervention in the transient acceleration branch, which will not interfere with the original switching voltage regulation loop.

[0047] When the load changes and enters the transient process, adaptive adjustment is achieved under two operating conditions: Output voltage is too low, VREF is not met. When VFB > I0 / Gm, IMP0 is greater than IMN, the current balance at point M is not broken, and ISP remains 0; the pull-up current at point N (i.e., IMP0) is greater than the total pull-down current (i.e., IMN + I0), at which point a pull-down current ISN is generated, i.e., ISN = N * Gm * (VREF) VFB I0 / Gm).

[0048] At this time, the total adjustment current IM is negative, which lowers the DC level of the summation voltage VSUM. The turn-off time of the upper power transistor Q01 is delayed, the conduction duty cycle is increased, the inductor current rises rapidly, and the output voltage drop is delayed until the average inductor current is higher than the load current. The output voltage gradually recovers, effectively suppressing the output voltage undershoot.

[0049] Output voltage is too high, but meets VFB. When VREF > I0 / Gm, IMP0 is less than IMN, the current balance at point N is not broken, and ISN remains 0; the pull-down current at point M (i.e., IMN) is greater than the total pull-up current (IMP0 + I0), at which point the pull-up current ISP is generated, ISP = N * Gm * (VFB) VREF I0 / Gm).

[0050] At this time, the total adjustment current IM is positive, raising the DC level of the summed voltage VSUM. The upper power transistor Q01 is turned off in advance, the duty cycle is reduced, the inductor current decreases rapidly, and the output voltage rise is delayed until the average inductor current is lower than the load current. The output voltage gradually falls back, effectively suppressing the output voltage overshoot.

[0051] In summary, this application can quickly correct the first node voltage while retaining the advantage of constant frequency of peak current mode, significantly accelerate the transient response speed of the power supply, and greatly reduce the peak-to-peak value of transient output voltage fluctuations.

[0052] This application also discloses a switching power supply, including a feedback unit, a PWM comparator, a first resistor R1 and the aforementioned transient acceleration circuit. The feedback unit is electrically connected to the first input terminal of the adjustment current output module 101 in the transient acceleration circuit. The inverting input terminal of the PWM comparator and the first terminal of the first resistor R1 are both electrically connected to the output terminal of the adjustment current output module 101.

[0053] The switching power supply employs the aforementioned transient acceleration circuit, which, while maintaining a constant operating frequency under peak current mode control, compares the difference between the feedback voltage and the reference voltage in real time. Only when the voltage deviation exceeds a preset threshold is an adjustment current of corresponding amplitude and direction outputted, directly correcting the first node voltage at the input of the PWM comparator. This rapidly adjusts the duty cycle of the power transistor, significantly improving the transient response speed under load switching conditions, effectively suppressing overshoot and undershoot of the output voltage, and reducing the peak-to-peak value of transient fluctuations. Simultaneously, there is no additional compensation current output in steady-state mode, which does not interfere with the original voltage regulation loop, thus balancing fast transient performance with steady-state operating stability.

[0054] It should be noted that the switching power supply can be of various topologies such as BUCK buck, BUCK-BOOST buck-boost, and BOOST boost. The transient acceleration circuit of this application is not limited to a single topology and has universal adaptability. All of them can achieve the effects of fast transient response and suppression of output voltage overshoot and undershoot.

[0055] This application also discloses a display device including the aforementioned switching power supply. The switching power supply can provide stable power to the backlight load of the display device. In scenarios of rapid screen brightness switching and sudden load changes, it can quickly suppress output voltage overshoot and undershoot, avoiding problems such as screen flicker and color shift. At the same time, it maintains a constant switching frequency and reduces the impact of electromagnetic interference on the display screen.

[0056] It should be noted that the display device can be any type of display terminal equipped with a backlight power supply system, such as LCD screens, OLED screens, flat panel displays, laptop screens, vehicle display screens, and display modules.

[0057] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0058] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A transient acceleration circuit, applied to a switching power supply, characterized in that, The transient acceleration circuit includes an adjustable current output module. The first input terminal of the adjustable current output module is electrically connected to the feedback unit in the switching power supply and is used to receive the feedback voltage output by the feedback unit. The second input terminal of the adjustable current output module is used to receive the reference voltage. The output terminal of the adjustable current output module is electrically connected to a first node, which is the common terminal of the inverting input terminal of the PWM comparator in the switching power supply and the first terminal of the first resistor. When the difference between the feedback voltage and the reference voltage is greater than a preset value, the adjustment current output module outputs an adjustment current in the first direction to raise the voltage at the first node; When the difference between the reference voltage and the feedback voltage is greater than the preset value, the adjustment current output module outputs an adjustment current in the second direction to pull down the voltage at the first node; the first direction is opposite to the second direction. The adjustment current in the first direction increases linearly as the difference between the feedback voltage and the reference voltage increases; the adjustment current in the second direction increases linearly as the difference between the reference voltage and the feedback voltage increases. When the absolute value of the difference between the feedback voltage and the reference voltage is less than the preset value, the adjustment current output by the adjustment current output module is zero.

2. The transient acceleration circuit according to claim 1, characterized in that, The adjustable current output module includes a bias unit, a transconductance amplifier unit, and an adjustable current output unit. The transconductance amplifier unit is electrically connected to the bias unit and the adjustable current output unit, respectively. The adjustable current output unit is electrically connected to the first node. The bias unit is used to provide a bias current, the transconductance amplifier unit is used to generate a first base current and a second base current based on the feedback voltage, the reference voltage and the bias current, and the adjustment current output unit is used to output the adjustment current based on the first base current and the second base current.

3. The transient acceleration circuit according to claim 2, characterized in that, The biasing unit includes a first bias current source, a second bias current source, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor. The gate of the first transistor is electrically connected to the first terminal of the first bias current source, the drain of the first transistor, the gate of the second transistor, the gate of the sixth transistor, the gate of the seventh transistor, and the transconductance amplifier unit. The sources of the first transistor, the third transistor, the fourth transistor, and the fifth transistor are all electrically connected to a power supply. The gate of the third transistor is connected to the gate of the fourth transistor, the gate of the fifth transistor, the transconductance amplifier unit, the drain of the second transistor, and the... The first terminal of the second bias current source is electrically connected. The drain of the third transistor is electrically connected to the source of the second transistor. The source of the sixth transistor is electrically connected to the drain of the fourth transistor. The drain of the sixth transistor is electrically connected to the gate of the eighth transistor, the drain of the eighth transistor, the gate of the tenth transistor, and the transconductance amplifier unit, respectively. The source of the seventh transistor is electrically connected to the drain of the fifth transistor. The drain of the seventh transistor is electrically connected to the drain of the tenth transistor, the gate of the ninth transistor, and the transconductance amplifier unit, respectively. The drain of the ninth transistor is electrically connected to the source of the tenth transistor. The source of the ninth transistor, the source of the eighth transistor, the second terminal of the first bias current source, and the second terminal of the second bias current source are all grounded.

4. The transient acceleration circuit according to claim 2, characterized in that, The transconductance amplifier unit includes an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a twentieth transistor, a twenty-first transistor, a twenty-second transistor, a twenty-third transistor, a twenty-fourth transistor, a twenty-fifth transistor, a twenty-sixth transistor, a twenty-seventh transistor, a twenty-eighth transistor, a twenty-ninth transistor, and a thirtieth transistor. The gates of the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor are all electrically connected to the bias unit. The sources of the eleventh transistor, the seventeenth transistor, and the eighteenth transistor are also connected. The sources of the eleventh, eleventh, twelfth, thirteenth, and thirteenth transistors are all electrically connected to the power supply. The drain of the eleventh transistor is electrically connected to the source of the twelfth transistor, and the drain of the thirteenth transistor is electrically connected to the source of the fourteenth transistor. The gate of the fifteenth transistor is used to receive the reference voltage. The source of the fifteenth transistor is electrically connected to the drain of the twelfth transistor and the source of the sixteenth transistor, respectively. The drain of the fifteenth transistor is electrically connected to the drain of the twenty-fifth transistor, the drain of the seventeenth transistor, the gate of the seventeenth transistor, the gate of the twentieth transistor, and the source of the thirteenth transistor, respectively. The gate of the body transistor is electrically connected. The gate of the sixteenth transistor is used to receive the feedback voltage. The drain of the sixteenth transistor is electrically connected to the drain of the twenty-sixth transistor, the drain of the eighteenth transistor, the gate of the eighteenth transistor, and the gate of the nineteenth transistor. The gates of the twenty-fifth transistor, the twenty-sixth transistor, the twenty-seventh transistor, the twenty-eighth transistor, the twenty-ninth transistor, and the thirtieth transistor are all electrically connected to the bias unit. The source of the twenty-fifth transistor is electrically connected to the drain of the twenty-seventh transistor, and the drain of the twenty-eighth transistor is electrically connected to the source of the twenty-sixth transistor. The twenty-eighth transistor... The sources of the body transistor, the twenty-seventh transistor, the twenty-second transistor, the twenty-third transistor, the twenty-fourth transistor, and the thirtieth transistor are all grounded. The gate of the twenty-third transistor is electrically connected to the gate of the twenty-second transistor, the drain of the twenty-second transistor, the gate of the twenty-fourth transistor, and the drain of the nineteenth transistor. The drain of the twenty-third transistor is electrically connected to the drain of the twenty-first transistor, the drain of the fourteenth transistor, and the adjusting current output unit. The drain of the twenty-ninth transistor is electrically connected to the drain of the twenty-fourth transistor, the drain of the twenty-first transistor, and the adjusting current output unit.The source of the twenty-ninth transistor is electrically connected to the drain of the thirtieth transistor.

5. The transient acceleration circuit according to claim 2, characterized in that, The adjustable current output unit includes a 31st transistor, a 32nd transistor, a 33rd transistor, and a 34th transistor. The gate of the 31st transistor is electrically connected to the drain of the 31st transistor, the gate of the 32nd transistor, and the transconductance amplifier unit. The sources of the 31st transistor and the 32nd transistor are both electrically connected to the power supply. The gate of the 33rd transistor is electrically connected to the drain of the 33rd transistor, the gate of the 34th transistor, and the transconductance amplifier unit. The sources of the 33rd transistor and the 34th transistor are both grounded. The drain of the 34th transistor is electrically connected to the drain of the 32nd transistor, and is used to output the adjustable current.

6. The transient acceleration circuit according to claim 2, characterized in that, The preset value is the ratio of the bias current to the transconductance value of the transconductance amplifier unit.

7. A switching power supply, characterized in that, The device includes a feedback unit, a PWM comparator, a first resistor, and a transient acceleration circuit as described in any one of claims 1-6. The feedback unit is electrically connected to the first input terminal of the adjustable current output module in the transient acceleration circuit, and the inverting input terminal of the PWM comparator and the first terminal of the first resistor are both electrically connected to the output terminal of the adjustable current output module.

8. A display device, characterized in that, Includes the switching power supply as described in claim 7.

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